The powerpc64 part is under #if 0, so this change affects only macppc.
Simplify powerpc64's __syncicache (which had size_t len) and copy it
to macppc's syncicache (which had int len).
macppc was looping while ((l -= CACHELINESIZE) > 0). The loop would
be infinite if l became an unsigned type like size_t. It is simpler
to set size_t i = 0, do i += by, and loop while (i < len). It helps
that dcbst and icbi can add 2 registers, from + i.
-/* $OpenBSD: machdep.c,v 1.196 2022/05/19 05:43:48 miod Exp $ */
+/* $OpenBSD: machdep.c,v 1.197 2022/10/21 21:26:49 gkoehler Exp $ */
/* $NetBSD: machdep.c,v 1.4 1996/10/16 19:33:11 ws Exp $ */
/*
extint_call = (extint_call & 0xfc000003) | offset;
bcopy(&extint, (void *)EXC_EXI, (size_t)&extsize);
syncicache((void *)&extint_call, sizeof extint_call);
- syncicache((void *)EXC_EXI, (int)&extsize);
+ syncicache((void *)EXC_EXI, (size_t)&extsize);
ppc_mtmsr(omsr);
}
-/* $OpenBSD: Locore.c,v 1.17 2019/09/02 23:40:29 kettenis Exp $ */
+/* $OpenBSD: Locore.c,v 1.18 2022/10/21 21:26:49 gkoehler Exp $ */
/* $NetBSD: Locore.c,v 1.1 1997/04/16 20:29:11 thorpej Exp $ */
/*
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
-#include <lib/libsa/stand.h>
#include <macppc/stand/openfirm.h>
-#include <dev/cons.h>
-
+#include <dev/cons.h>
-/*
-#include "machine/cpu.h"
-*/
+#include "libsa.h"
int main(void);
-void syncicache(void *, int);
#define ENABLE_DECREMENTER_WORKAROUND
void bat_init(void);
-/* $OpenBSD: cache.c,v 1.2 2003/10/16 04:30:09 drahn Exp $ */
+/* $OpenBSD: cache.c,v 1.3 2022/10/21 21:26:49 gkoehler Exp $ */
+
+/*-
+ * SPDX-License-Identifier: BSD-4-Clause
+ *
+ * Copyright (C) 1995-1997, 1999 Wolfgang Solfrank.
+ * Copyright (C) 1995-1997, 1999 TooLs GmbH.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by TooLs GmbH.
+ * 4. The name of TooLs GmbH may not be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
+ * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * $NetBSD: syncicache.c,v 1.2 1999/05/05 12:36:40 tsubai Exp $
+ */
+
+#include "libsa.h"
+
#define CACHELINESIZE 32 /* For now XXX */
void
-syncicache(void *from, int len)
+syncicache(void *from, size_t len)
{
- int l = len;
- void *p = from;
+ size_t by, i;
+ by = CACHELINESIZE;
+ i = 0;
do {
- asm volatile ("dcbf %1,%0" :: "r"(p), "r"(0));
- p += CACHELINESIZE;
- } while ((l -= CACHELINESIZE) > 0);
- asm volatile ("sync");
+ __asm volatile ("dcbst %0,%1" :: "r"(from), "r"(i));
+ i += by;
+ } while (i < len);
+ __asm volatile ("sync");
+ i = 0;
do {
- asm volatile ("icbi %1,%0" :: "r"(from), "r"(0));
- from += CACHELINESIZE;
- } while ((len -= CACHELINESIZE) > 0);
- asm volatile ("isync");
+ __asm volatile ("icbi %0,%1" :: "r"(from), "r"(i));
+ i += by;
+ } while (i < len);
+ __asm volatile ("sync; isync");
}
-/* $OpenBSD: libsa.h,v 1.2 2019/09/02 23:40:29 kettenis Exp $ */
+/* $OpenBSD: libsa.h,v 1.3 2022/10/21 21:26:49 gkoehler Exp $ */
/*
* Copyright (c) 2006 Mark Kettenis
void freeall(void);
+void syncicache(void *, size_t);
+
void machdep(void);
void devboot(dev_t, char *);
void run_loadfile(uint64_t *marks, int howto);
-/* $OpenBSD: cpu.h,v 1.72 2022/07/24 00:28:09 cheloha Exp $ */
+/* $OpenBSD: cpu.h,v 1.73 2022/10/21 21:26:49 gkoehler Exp $ */
/* $NetBSD: cpu.h,v 1.1 1996/09/30 16:34:21 ws Exp $ */
/*
#endif
static __inline void
-syncicache(void *from, int len)
+syncicache(void *from, size_t len)
{
- int l;
- char *p = from;
-
- len = len + (((u_int32_t) from) & (CACHELINESIZE - 1));
- l = len;
+ size_t by, i;
+ by = CACHELINESIZE;
+ i = 0;
do {
- __asm volatile ("dcbst 0,%0" :: "r"(p));
- p += CACHELINESIZE;
- } while ((l -= CACHELINESIZE) > 0);
+ __asm volatile ("dcbst %0,%1" :: "r"(from), "r"(i));
+ i += by;
+ } while (i < len);
__asm volatile ("sync");
- p = from;
- l = len;
+ i = 0;
do {
- __asm volatile ("icbi 0,%0" :: "r"(p));
- p += CACHELINESIZE;
- } while ((l -= CACHELINESIZE) > 0);
- __asm volatile ("isync");
+ __asm volatile ("icbi %0,%1" :: "r"(from), "r"(i));
+ i += by;
+ } while (i < len);
+ __asm volatile ("sync; isync");
}
static __inline void
-/* $OpenBSD: syncicache.c,v 1.4 2022/08/29 02:01:18 jsg Exp $ */
+/* $OpenBSD: syncicache.c,v 1.5 2022/10/21 21:26:49 gkoehler Exp $ */
/*-
* SPDX-License-Identifier: BSD-4-Clause
__syncicache(void *from, size_t len)
{
#if 0
- size_t l, off;
- char *p;
-
- off = (uintptr_t)from & (cacheline_size - 1);
- l = len += off;
- p = (char *)from - off;
+ size_t by, i;
+ by = cacheline_size;
+ i = 0;
do {
- __asm volatile ("dcbst 0,%0" :: "r"(p));
- p += cacheline_size;
- l -= cacheline_size;
- } while (l + cacheline_size > cacheline_size);
+ __asm volatile ("dcbst %0,%1" :: "r"(from), "r"(i));
+ i += by;
+ } while (i < len);
__asm volatile ("sync");
- p = (char *)from - off;
+ i = 0;
do {
- __asm volatile ("icbi 0,%0" :: "r"(p));
- p += cacheline_size;
- len -= cacheline_size;
- } while (len + cacheline_size > cacheline_size);
+ __asm volatile ("icbi %0,%1" :: "r"(from), "r"(i));
+ i += by;
+ } while (i < len);
__asm volatile ("sync; isync");
#else
sync();
isync();
#endif
}
-
projects / openbsd / commitdiff