-/* $OpenBSD: ufshci.c,v 1.35 2024/06/09 03:21:54 jsg Exp $ */
+/* $OpenBSD: ufshci.c,v 1.36 2024/06/14 13:38:15 mglocker Exp $ */
/*
* Copyright (c) 2022 Marcus Glocker <mglocker@openbsd.org>
struct ufshci_dmamem *);
int ufshci_alloc(struct ufshci_softc *);
int ufshci_init(struct ufshci_softc *);
-int ufshci_disable(struct ufshci_softc *);
+void ufshci_disable(struct ufshci_softc *);
int ufshci_doorbell_read(struct ufshci_softc *);
void ufshci_doorbell_write(struct ufshci_softc *, int);
int ufshci_doorbell_poll(struct ufshci_softc *, int,
int ufshci_utr_cmd_sync(struct ufshci_softc *,
struct ufshci_ccb *, struct scsi_xfer *,
uint32_t, uint16_t);
-int ufshci_xfer_complete(struct ufshci_softc *);
+void ufshci_xfer_complete(struct ufshci_softc *);
/* SCSI */
int ufshci_ccb_alloc(struct ufshci_softc *, int);
SIMPLEQ_INIT(&sc->sc_ccb_list);
scsi_iopool_init(&sc->sc_iopool, sc, ufshci_ccb_get, ufshci_ccb_put);
- ufshci_reset(sc);
+ if (ufshci_reset(sc))
+ return 1;
sc->sc_ver = UFSHCI_READ_4(sc, UFSHCI_REG_VER);
printf(", UFSHCI %d.%d%d\n",
sc->sc_flags |= UFSHCI_FLAGS_AGGR_INTR; /* Enable intr. aggregation */
#endif
/* Allocate the DMA buffers and initialize the controller. */
- ufshci_alloc(sc);
- ufshci_init(sc);
+ if (ufshci_alloc(sc))
+ return 1;
+ if (ufshci_init(sc))
+ return 1;
if (ufshci_ccb_alloc(sc, sc->sc_nutrs) != 0) {
printf("%s: %s: Can't allocate CCBs\n",
if (i == retry) {
printf("%s: Enabling Host Controller failed!\n",
sc->sc_dev.dv_xname);
- return -1;
+ return 1;
}
DPRINTF(2, "\n%s: Host Controller enabled (i=%d)\n", __func__, i);
}
if (i == retry) {
printf("%s: %s: timeout\n", sc->sc_dev.dv_xname, __func__);
- return -1;
+ return 1;
}
DPRINTF(3, "%s: completed after %d retries\n", __func__, i);
if (sc->sc_dmamem_utmrd == NULL) {
printf("%s: Can't allocate DMA memory for UTMRD\n",
sc->sc_dev.dv_xname);
- return -1;
+ return 1;
}
/* 7.1.1 Host Controller Initialization: 15) */
if (sc->sc_dmamem_utrd == NULL) {
printf("%s: Can't allocate DMA memory for UTRD\n",
sc->sc_dev.dv_xname);
- return -1;
+ return 1;
}
/* Allocate UCDs. */
if (sc->sc_dmamem_ucd == NULL) {
printf("%s: Can't allocate DMA memory for UCD\n",
sc->sc_dev.dv_xname);
- return -1;
+ return 1;
}
return 0;
/* 7.1.1 Host Controller Initialization: 6) */
UFSHCI_WRITE_4(sc, UFSHCI_REG_UICCMD,
UFSHCI_REG_UICCMD_CMDOP_DME_LINKSTARTUP);
- if (ufshci_is_poll(sc, UFSHCI_REG_IS_UCCS) != 0)
- return -1;
+ if (ufshci_is_poll(sc, UFSHCI_REG_IS_UCCS))
+ return 1;
/*
* 7.1.1 Host Controller Initialization: 7), 8), 9)
return 0;
}
-int
+void
ufshci_disable(struct ufshci_softc *sc)
{
/* Stop run queues. */
/* Disable interrupts. */
UFSHCI_WRITE_4(sc, UFSHCI_REG_IE, 0);
-
- return 0;
}
int
}
if (timeout_us == 0) {
printf("%s: %s: timeout\n", sc->sc_dev.dv_xname, __func__);
- return -1;
+ return 1;
}
return 0;
if (UFSHCI_READ_4(sc, UFSHCI_REG_UTRLRSR) != 1) {
printf("%s: %s: UTRLRSR not set\n",
sc->sc_dev.dv_xname, __func__);
- return -1;
+ return 1;
}
bus_dmamap_sync(sc->sc_dmat, UFSHCI_DMA_MAP(sc->sc_dmamem_utrd),
if (UFSHCI_READ_4(sc, UFSHCI_REG_UTRLRSR) != 1) {
printf("%s: %s: UTRLRSR not set\n",
sc->sc_dev.dv_xname, __func__);
- return -1;
+ return 1;
}
bus_dmamap_sync(sc->sc_dmat, UFSHCI_DMA_MAP(sc->sc_dmamem_utrd),
if (UFSHCI_READ_4(sc, UFSHCI_REG_UTRLRSR) != 1) {
printf("%s: %s: UTRLRSR not set\n",
sc->sc_dev.dv_xname, __func__);
- return -1;
+ return 1;
}
bus_dmamap_sync(sc->sc_dmat, UFSHCI_DMA_MAP(sc->sc_dmamem_utrd),
ccb->ccb_status = CCB_STATUS_INPROGRESS;
ufshci_doorbell_write(sc, slot);
- return slot;
+ return 0;
}
int
if (UFSHCI_READ_4(sc, UFSHCI_REG_UTRLRSR) != 1) {
printf("%s: %s: UTRLRSR not set\n",
sc->sc_dev.dv_xname, __func__);
- return -1;
+ return 1;
}
bus_dmamap_sync(sc->sc_dmat, UFSHCI_DMA_MAP(sc->sc_dmamem_utrd),
ccb->ccb_status = CCB_STATUS_INPROGRESS;
ufshci_doorbell_write(sc, slot);
- return slot;
+ return 0;
}
int
if (UFSHCI_READ_4(sc, UFSHCI_REG_UTRLRSR) != 1) {
printf("%s: %s: UTRLRSR not set\n",
sc->sc_dev.dv_xname, __func__);
- return -1;
+ return 1;
}
bus_dmamap_sync(sc->sc_dmat, UFSHCI_DMA_MAP(sc->sc_dmamem_utrd),
ccb->ccb_status = CCB_STATUS_INPROGRESS;
ufshci_doorbell_write(sc, slot);
- return slot;
+ return 0;
}
int
if (UFSHCI_READ_4(sc, UFSHCI_REG_UTRLRSR) != 1) {
printf("%s: %s: UTRLRSR not set\n",
sc->sc_dev.dv_xname, __func__);
- return -1;
+ return 1;
}
bus_dmamap_sync(sc->sc_dmat, UFSHCI_DMA_MAP(sc->sc_dmamem_utrd),
ccb->ccb_status = CCB_STATUS_INPROGRESS;
ufshci_doorbell_write(sc, slot);
- return slot;
+ return 0;
}
int
if (UFSHCI_READ_4(sc, UFSHCI_REG_UTRLRSR) != 1) {
printf("%s: %s: UTRLRSR not set\n",
sc->sc_dev.dv_xname, __func__);
- return -1;
+ return 1;
}
bus_dmamap_sync(sc->sc_dmat, UFSHCI_DMA_MAP(sc->sc_dmamem_utrd),
ccb->ccb_status = CCB_STATUS_INPROGRESS;
ufshci_doorbell_write(sc, slot);
- return slot;
+ return 0;
}
-int
+void
ufshci_xfer_complete(struct ufshci_softc *sc)
{
struct ufshci_ccb *ccb;
if (ccb->ccb_status == CCB_STATUS_READY2FREE)
ccb->ccb_done(sc, ccb);
}
-
- return 0;
}
int
error = bus_dmamap_load(sc->sc_dmat, dmap, xs->data, xs->datalen, NULL,
ISSET(xs->flags, SCSI_NOSLEEP) ? BUS_DMA_NOWAIT : BUS_DMA_WAITOK);
- if (error != 0) {
+ if (error) {
printf("%s: bus_dmamap_load error=%d\n", __func__, error);
goto error1;
}
/* Response length should be UPIU_SCSI_RSP_INQUIRY_SIZE. */
error = ufshci_utr_cmd_inquiry(sc, ccb, xs);
- if (error == -1)
+ if (error)
goto error2;
if (ISSET(xs->flags, SCSI_POLL)) {
error = bus_dmamap_load(sc->sc_dmat, dmap, xs->data, xs->datalen, NULL,
ISSET(xs->flags, SCSI_NOSLEEP) ? BUS_DMA_NOWAIT : BUS_DMA_WAITOK);
- if (error != 0) {
+ if (error) {
printf("%s: bus_dmamap_load error=%d\n", __func__, error);
goto error1;
}
/* Response length should be UPIU_SCSI_RSP_CAPACITY16_SIZE. */
error = ufshci_utr_cmd_capacity16(sc, ccb, xs);
- if (error == -1)
+ if (error)
goto error2;
if (ISSET(xs->flags, SCSI_POLL)) {
error = bus_dmamap_load(sc->sc_dmat, dmap, xs->data, xs->datalen, NULL,
ISSET(xs->flags, SCSI_NOSLEEP) ? BUS_DMA_NOWAIT : BUS_DMA_WAITOK);
- if (error != 0) {
+ if (error) {
printf("%s: bus_dmamap_load error=%d\n", __func__, error);
goto error1;
}
/* Response length should be UPIU_SCSI_RSP_CAPACITY_SIZE */
error = ufshci_utr_cmd_capacity(sc, ccb, xs);
- if (error == -1)
+ if (error)
goto error2;
if (ISSET(xs->flags, SCSI_POLL)) {
error = ufshci_utr_cmd_sync(sc, ccb, xs, (uint32_t)lba,
(uint16_t)blocks);
- if (error == -1)
+ if (error)
goto error;
if (ISSET(xs->flags, SCSI_POLL)) {
error = bus_dmamap_load(sc->sc_dmat, dmap, xs->data, xs->datalen, NULL,
ISSET(xs->flags, SCSI_NOSLEEP) ? BUS_DMA_NOWAIT : BUS_DMA_WAITOK);
- if (error != 0) {
+ if (error) {
printf("%s: bus_dmamap_load error=%d\n", __func__, error);
goto error1;
}
error = ufshci_utr_cmd_io(sc, ccb, xs, SCSI_DATA_IN);
else
error = ufshci_utr_cmd_io(sc, ccb, xs, SCSI_DATA_OUT);
- if (error == -1)
+ if (error)
goto error2;
if (ISSET(xs->flags, SCSI_POLL)) {