dwiic resume is almost exclusively a "hardware state restore", and
authorderaadt <deraadt@openbsd.org>
Sat, 17 Aug 2024 02:14:20 +0000 (02:14 +0000)
committerderaadt <deraadt@openbsd.org>
Sat, 17 Aug 2024 02:14:20 +0000 (02:14 +0000)
not a "restart transaction", so the job should get done at DVACT_RESUME
time.
ok kettenis mlarkin

sys/dev/ic/dwiic.c
sys/dev/pci/dwiic_pci.c

index abe043c..cb2f986 100644 (file)
@@ -1,4 +1,4 @@
-/* $OpenBSD: dwiic.c,v 1.17 2024/08/16 15:27:11 deraadt Exp $ */
+/* $OpenBSD: dwiic.c,v 1.18 2024/08/17 02:14:20 deraadt Exp $ */
 /*
  * Synopsys DesignWare I2C controller
  *
@@ -43,7 +43,7 @@ dwiic_activate(struct device *self, int act)
                dwiic_write(sc, DW_IC_INTR_MASK, 0);
                dwiic_read(sc, DW_IC_CLR_INTR);
                break;
-       case DVACT_WAKEUP:
+       case DVACT_RESUME:
                dwiic_init(sc);
                break;
        }
index 4ef8e8f..68f25f3 100644 (file)
@@ -1,4 +1,4 @@
-/* $OpenBSD: dwiic_pci.c,v 1.27 2024/05/24 06:02:53 jsg Exp $ */
+/* $OpenBSD: dwiic_pci.c,v 1.28 2024/08/17 02:14:21 deraadt Exp $ */
 /*
  * Synopsys DesignWare I2C controller
  * PCI attachment
@@ -293,7 +293,7 @@ dwiic_pci_activate(struct device *self, int act)
        struct dwiic_softc *sc = (struct dwiic_softc *)self;
 
        switch (act) {
-       case DVACT_WAKEUP:
+       case DVACT_RESUME:
                bus_space_write_4(sc->sc_iot, sc->sc_ioh, LPSS_RESETS,
                    (LPSS_RESETS_I2C | LPSS_RESETS_IDMA));
                break;