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drm/i915: Fix one wrong caching mode enum usage
author
jsg
<jsg@openbsd.org>
Wed, 26 Jul 2023 06:10:51 +0000
(06:10 +0000)
committer
jsg
<jsg@openbsd.org>
Wed, 26 Jul 2023 06:10:51 +0000
(06:10 +0000)
From Tvrtko Ursulin
5a9aecb6651c6e1ef8198c162340ebe172b7a551
in linux-6.1.y/6.1.40
113899c2669dff148b2a5bea4780123811aecc13
in mainline linux
sys/dev/pci/drm/i915/gt/intel_gtt.c
patch
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diff --git
a/sys/dev/pci/drm/i915/gt/intel_gtt.c
b/sys/dev/pci/drm/i915/gt/intel_gtt.c
index
3e4a53f
..
b08965a
100644
(file)
--- a/
sys/dev/pci/drm/i915/gt/intel_gtt.c
+++ b/
sys/dev/pci/drm/i915/gt/intel_gtt.c
@@
-611,7
+611,7
@@
__vm_create_scratch_for_read(struct i915_address_space *vm, unsigned long size)
if (IS_ERR(obj))
return ERR_CAST(obj);
- i915_gem_object_set_cache_coherency(obj, I915_CACH
ING_CACHED
);
+ i915_gem_object_set_cache_coherency(obj, I915_CACH
E_LLC
);
vma = i915_vma_instance(obj, vm, NULL);
if (IS_ERR(vma)) {