+Sat Aug 31 11:45:57 1996 Stan Shebs <shebs@andros.cygnus.com>
+
+ * mpw-config.in: Test for mpw-true, true, and null-command scripts.
+ (host_libs, host_tools): Copy from configure.in.
+ * mpw-configure: Don't complain about directories not found.
+
+Thu Aug 29 16:44:58 1996 Michael Meissner <meissner@tiktok.cygnus.com>
+
+ * configure.in (i[345]86): Recognize i686 for pentium pro.
+ (i[3456]86-*-dgux*): Use config/mh-sysv for the host configuration
+ file.
+
+ * config.guess (i[345]86): Ditto.
+
+Wed Aug 21 18:56:38 1996 Fred Fish <fnf@cygnus.com>
+
+ * configure: Fix three locations where shell scripts were
+ being run directly rather than with config_shell.
+
+Thu Aug 15 12:19:33 1996 Stan Shebs <shebs@andros.cygnus.com>
+
+ * mpw-configure: Handle multiple enable/disable options and
+ pass them down recursively, handle -c and -s flags appropriately
+ depending on choice of compiler, add escape mechanism for
+ quoted arguments to gC.
+
+Mon Aug 12 13:15:13 1996 Michael Meissner <meissner@tiktok.cygnus.com>
+
+ * configure.in (powerpc*-*-*): For eabi, system V.4, Linux, and
+ solaris targets, use config/mt-ppc to set C{,XX}FLAGS_FOR_TARGETS
+ so that -mrelocatable-lib and -mno-eabi are used.
+
+ * Makefile.in (CONFIGURE_TARGET_MODULES): If target compiler does
+ not support --print-multi-lib, don't abort.
+
+Sun Aug 11 20:51:50 1996 Stu Grossman (grossman@critters.cygnus.com)
+
+ * config/mh-cygwin32 (CFLAGS): Define _WIN32 to be compatible
+ with normal Windows compilation environment.
+
+Thu Aug 8 12:18:59 1996 Klaus Kaempf <kkaempf@progis.de>
+
+ * make-all.com: Run config-a-gas.
+ * setup.com: Don't copy subdirectory files around.
+
+Tue Jul 30 17:49:31 1996 Brendan Kehoe <brendan@cygnus.com>
+
+ * configure.in (*-*-ose): Remove exclusion of libgloss for this
+ target, it now compiles correctly.
+
+Sat Jul 27 15:10:43 1996 Stan Shebs <shebs@andros.cygnus.com>
+
+ * mpw-config.in: Generate Mac include for elf/dwarf2.h.
+
+Mon Jul 22 13:28:51 1996 Brendan Kehoe <brendan@lisa.cygnus.com>
+
+ * configure.in (native_only): Add prms.
+
+Mon Jul 22 12:27:58 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * Makefile.in (GAS_SUPPORT_DIRS): Add make-all.com and setup.com.
+ (BINUTILS_SUPPORT_DIRS): Likewise.
+
+Mon Jul 15 11:53:00 1996 Jeffrey A Law (law@cygnus.com)
+
+ * config.guess (HP 9000/811): Recognize this as a PA1.1
+ machine.
+
+Fri Jul 12 23:21:17 1996 Ken Raeburn <raeburn@cygnus.com>
+
+ * Makefile.in (do-tar-gz): New target, split out from tail end of
+ taz target. Run each command separately, don't use pipes.
+ (taz): Use it.
+
+Fri Jul 12 12:08:04 1996 Stan Shebs <shebs@andros.cygnus.com>
+
+ * mpw-configure: Look for g-mpw-make.sed in config/mpw.
+ * mpw-build.in: No builds should depend on building byacc or flex,
+ they are assumed to be installed already.
+
+Fri Jul 12 09:52:52 1996 Michael Meissner <meissner@tiktok.cygnus.com>
+
+ * Makefile.in (CONFIGURE_TARGET_MODULES): Set r environment
+ variable that CC_FOR_TARGET needs.
+
+Thu Jul 11 10:09:45 1996 Michael Meissner <meissner@tiktok.cygnus.com>
+
+ * Makefile.in (CONFIGURE_TARGET_MODULES): Determine if the multlib
+ options have changed since the last time the subdirectory was
+ configured, and if it has, reconfigure.
+ (CLEAN_TARGET_MODULES): Delete multilib.out and tmpmulti.out, which
+ CONFIGURE_TARGET_MODULES uses to remember the old multilib options.
+
+Wed Jul 10 18:56:59 1996 Doug Evans <dje@canuck.cygnus.com>
+
+ * Makefile.in (ALL_MODULES,CROSS_CHECK_MODULES,INSTALL_MODULES,
+ CLEAN_MODULES): Add bash.
+ (all-bash): New target.
+
+Mon Jul 8 17:33:14 1996 Jim Wilson <wilson@cygnus.com>
+
+ * configure.in (mips-sgi-irix6*): Use mh-irix6 instead of mh-irix5.
+
+
+Fri Jun 28 12:14:35 1996 Stan Shebs <shebs@andros.cygnus.com>
+
+ * mpw-configure: Add support for --bindir.
+ * mpw-build.in: Use a GCC-specific build script for GCC actions.
+
+Wed Jun 26 17:20:12 1996 Geoffrey Noer <noer@cygnus.com>
+
+ * configure.in: add bash, time, gawk to list of hosttools and things
+ to only build for native toolchains
+
+Tue Jun 25 23:09:03 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
+
+ * Makefile.in (docdir): Remove.
+
+Tue Jun 25 19:00:08 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
+
+ * Makefile.in (datadir): Set to $(prefix)/share.
+
+Mon Jun 24 23:26:07 1996 Geoffrey Noer <noer@cygnus.com>
+
+ * configure.in: build diff and patch for cygwin32-hosted
+ toolchains.
+
+Mon Jun 24 15:01:12 1996 Joel Sherrill <joel@merlin.gcs.redstone.army.mil>
+
+ * config.sub: Accept -rtems*.
+
+Sun Jun 23 22:41:54 1996 Geoffrey Noer <noer@cygnus.com>
+
+ * configure.in: enable dosrel for cygwin32-hosted builds,
+ remove diff from the list of things not buildable
+ via Canadian Cross
+
+Sat Jun 22 11:39:01 1996 Jason Merrill <jason@yorick.cygnus.com>
+
+ * Makefile.in (TARGET_SUBDIR): Move comment to previous line so we
+ don't get ". ".
+
+Fri Jun 21 17:24:48 1996 Jim Wilson <wilson@cygnus.com>
+
+ * configure.in (mips*-sgi-irix6*): Set noconfigdirs appropriately.
+
+Thu Jun 20 16:57:40 1996 Ken Raeburn <raeburn@cygnus.com>
+
+ * Makefile.in (taz): Handle case where tex3patch didn't even get
+ checked out. Also, if it was found, put the symlink in a new util
+ subdirectory.
+
+Thu Jun 20 12:20:33 1996 Michael Meissner <meissner@tiktok.cygnus.com>
+
+ * config.guess (*:Linux:*:*): Add support for PowerPC Linux.
+
+Tue Jun 18 14:24:12 1996 Klaus Kaempf (kkaempf@progis.de)
+
+ * config.sub: Recognize -openvms.
+ * configure.in (alpha*-*-*vms*): Set noconfigdirs.
+ * make-all.com, setup.com: New files.
+
+Mon Jun 17 16:34:46 1996 Jason Merrill <jason@yorick.cygnus.com>
+
+ * Makefile.in (taz): tex3patch moved to texinfo/util.
+
+Sat Jun 15 17:13:25 1996 Geoffrey Noer <noer@cygnus.com>
+
+ * configure: enable_gdbtk=no for cygwin32-hosted toolchains
+ * configure.in: remove make from disable-if-Can-Cross list
+ enable gdb if ${host} and ${target} are cygwin32
+
Fri Jun 7 18:16:52 1996 Harlan Stenn <harlan@pfcs.com>
* config.guess (i?86-ncr-sysv*): Emit minor release numbers.
program_transform_name =
-datadir = $(prefix)/lib
+datadir = $(prefix)/share
mandir = $(prefix)/man
man1dir = $(mandir)/man1
man2dir = $(mandir)/man2
man9dir = $(mandir)/man9
infodir = $(prefix)/info
includedir = $(prefix)/include
-docdir = $(datadir)/doc
GDB_NLM_DEPS =
SHELL = /bin/sh
TARGET_CONFIGDIRS = libiberty libgloss newlib libio librx libstdc++ libg++ winsup
# Target libraries are put under this directory:
-TARGET_SUBDIR = . # Changed by configure to $(target_alias) if cross.
+# Changed by configure to $(target_alias) if cross.
+TARGET_SUBDIR = .
# This is set by the configure script to the arguments passed to configure.
CONFIG_ARGUMENTS =
ALL_MODULES = \
all-apache \
all-autoconf \
+ all-bash \
all-bfd \
all-binutils \
all-byacc \
all-uudecode \
all-wdiff
-# This is a list of the check targets for all of the modules which are
-# compiled using $(FLAGS_TO_PASS).
# This is a list of the check targets for all of the modules which are
# compiled using $(FLAGS_TO_PASS).
#
CROSS_CHECK_MODULES = \
check-apache \
check-autoconf \
+ check-bash \
check-bfd \
check-binutils \
check-cvs \
INSTALL_MODULES = \
install-apache \
install-autoconf \
+ install-bash \
install-bfd \
install-binutils \
install-byacc \
CLEAN_MODULES = \
clean-apache \
clean-autoconf \
+ clean-bash \
clean-bfd \
clean-binutils \
clean-byacc \
.PHONY: $(CLEAN_TARGET_MODULES)
$(CLEAN_TARGET_MODULES):
@dir=`echo $@ | sed -e 's/clean-target-//'`; \
+ rm -f $(TARGET_SUBDIR)/$${dir}/multilib.out $(TARGET_SUBDIR)/$${dir}/tmpmulti.out; \
if [ -f $(TARGET_SUBDIR)/$${dir}/Makefile ] ; then \
r=`pwd`; export r; \
srcroot=`cd $(srcdir); pwd`; export srcroot; \
# target tools.
.PHONY: $(CONFIGURE_TARGET_MODULES)
$(CONFIGURE_TARGET_MODULES):
+ @dir=`echo $@ | sed -e 's/configure-target-//'`; \
+ if [ -d $(TARGET_SUBDIR)/$${dir} ]; then \
+ r=`pwd`; export r; \
+ $(CC_FOR_TARGET) --print-multi-lib > $(TARGET_SUBDIR)/$${dir}/tmpmulti.out 2> /dev/null; \
+ if [ -s $(TARGET_SUBDIR)/$${dir}/tmpmulti.out ]; then \
+ if [ -f $(TARGET_SUBDIR)/$${dir}/multilib.out ]; then \
+ if cmp $(TARGET_SUBDIR)/$${dir}/multilib.out $(TARGET_SUBDIR)/$${dir}/tmpmulti.out > /dev/null; then \
+ rm -f $(TARGET_SUBDIR)/$${dir}/tmpmulti.out; \
+ else \
+ echo "Multilibs changed for $${dir}, reconfiguring"; \
+ rm -f $(TARGET_SUBDIR)/$${dir}/multilib.out $(TARGET_SUBDIR)/$${dir}/Makefile; \
+ mv $(TARGET_SUBDIR)/$${dir}/tmpmulti.out $(TARGET_SUBDIR)/$${dir}/multilib.out; \
+ fi; \
+ else \
+ mv $(TARGET_SUBDIR)/$${dir}/tmpmulti.out $(TARGET_SUBDIR)/$${dir}/multilib.out; \
+ fi; \
+ fi; \
+ fi; exit 0 # break command into two pieces
@dir=`echo $@ | sed -e 's/configure-target-//'`; \
if [ -f $(TARGET_SUBDIR)/$${dir}/Makefile ] ; then \
true; \
# This is a list of inter-dependencies among modules.
all-apache:
all-autoconf: all-m4
+all-bash:
all-bfd:
all-binutils: all-libiberty all-opcodes all-bfd all-flex all-byacc
all-byacc:
<configure.in >proto-toplev/configure.in
#
mkdir proto-toplev/texinfo
- ln -s ../../texinfo/texinfo.tex proto-toplev/texinfo/
- ln -s ../../texinfo/gpl.texinfo proto-toplev/texinfo/
- ln -s ../../texinfo/lgpl.texinfo proto-toplev/texinfo/
- ln -s ../../texinfo/tex3patch proto-toplev/texinfo/
+ ln -s ../../texinfo/texinfo.tex proto-toplev/texinfo/
+ ln -s ../../texinfo/gpl.texinfo proto-toplev/texinfo/
+ ln -s ../../texinfo/lgpl.texinfo proto-toplev/texinfo/
+ if test -r texinfo/util/tex3patch ; then \
+ mkdir proto-toplev/texinfo/util && \
+ ln -s ../../../texinfo/util/tex3patch proto-toplev/texinfo/util ; \
+ else true; fi
chmod og=u `find . -print`
- (VER=`sed <$(TOOL)/Makefile.in -n 's/^VERSION *= *//p'`; \
- echo "==> Making $(TOOL)-$$VER.tar.gz"; \
- rm -f $(TOOL)-$$VER; ln -s proto-toplev $(TOOL)-$$VER; \
- tar cfh - $(TOOL)-$$VER \
- | $(GZIPPROG) -v -9 >$(TOOL)-$$VER.tar.gz )
+ $(MAKE) -f Makefile.in do-tar-gz TOOL=$(TOOL) \
+ VER=`sed <$(TOOL)/Makefile.in -n 's/^VERSION *= *//p'`
+
+do-tar-gz:
+ echo "==> Making $(TOOL)-$(VER).tar.gz"
+ -rm -f $(TOOL)-$(VER)
+ ln -s proto-toplev $(TOOL)-$(VER)
+ tar cfh $(TOOL)-$(VER).tar $(TOOL)-$(VER)
+ $(GZIPPROG) -v -9 $(TOOL)-$(VER).tar
TEXINFO_SUPPORT= texinfo/texinfo.tex texinfo/gpl.texinfo texinfo/lgpl.texinfo
DIST_SUPPORT= $(DEVO_SUPPORT) $(TEXINFO_SUPPORT)
.PHONY: gas.tar.gz
-GAS_SUPPORT_DIRS= bfd include libiberty opcodes
+GAS_SUPPORT_DIRS= bfd include libiberty opcodes make-all.com setup.com
gas.tar.gz: $(DIST_SUPPORT) $(GAS_SUPPORT_DIRS) gas
$(MAKE) -f Makefile.in taz TOOL=gas \
SUPPORT_FILES="$(GAS_SUPPORT_DIRS)"
# The FSF "binutils" release includes gprof and ld.
.PHONY: binutils.tar.gz
-BINUTILS_SUPPORT_DIRS= bfd gas include libiberty opcodes ld gprof
+BINUTILS_SUPPORT_DIRS= bfd gas include libiberty opcodes ld gprof make-all.com setup.com
binutils.tar.gz: $(DIST_SUPPORT) $(BINUTILS_SUPPORT_DIRS) binutils
$(MAKE) -f Makefile.in taz TOOL=binutils \
SUPPORT_FILES="$(BINUTILS_SUPPORT_DIRS) makeall.bat configure.bat"
+Tue Sep 3 12:16:20 1996 Doug Evans <dje@canuck.cygnus.com>
+
+ * Makefile.in (aout-sparcle.o): New target.
+ * aoutf1.h (TARGET_IS_BIG_ENDIAN_P): Don't define if little endian.
+ * config.bfd (sparclet-*-aout*): Add case.
+ * configure.in (sparcle_aout_vec): Add case.
+ * configure: Regenerated.
+ * targets.c (sparcle_aout_vec): Declare.
+ (bfd_target_vector): Add sparcle_aout_vec.
+ * aout-sparcle.c: New file.
+
+Mon Sep 2 12:12:34 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * cpu-mips.c: Add an explicit mips:3000 entry, and change the
+ default architecture to a machine number of 0.
+ * elf32-mips.c (_bfd_mips_elf_object_p): Set the machine number
+ for E_MIPS_ARCH_1.
+ (_bfd_mips_elf_merge_private_bfd_data): If the machine number of
+ the output BFD is the default, set it from the first input BFD.
+
+Sun Sep 1 15:41:08 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * rs6000-core.c (rs6000coff_core_file_matches_executable_p):
+ Rewrite to use BFD file read routines and to avoid using a fixed
+ length for the file name.
+
+Fri Aug 30 11:49:19 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ Add SH ELF support.
+ * elf32-sh.c: New file.
+ * elf.c (prep_headers): Handle bfd_arch_sh.
+ * elfcode.h (write_relocs): Handle absolute symbol.
+ * elf-bfd.h (_bfd_elf32_link_read_relocs): Declare.
+ (_bfd_elf64_link_read_relocs): Declare.
+ * elflink.h (NAME(_bfd_elf,link_read_relocs)): Rename from
+ elf_link_read_relocs. Make globally visible. Change all
+ callers.
+ (elf_link_input_bfd): Get external symbols from cache in
+ symtab_hdr->contents. Get contents from cache in
+ elf_section_data.
+ * elfxx-target.h (bfD_elfNN_bfd_relax_section): Only define if not
+ already defined.
+ * reloc.c: Define BFD_RELOC_SH_* relocs.
+ * libbfd-in.h (_bfd_sh_align_load_span): Declare.
+ * coff-sh.c (sh_insns_conflict): Fix a return value.
+ (_bfd_sh_align_load_span): New globally visible function, broken
+ out of sh_align_load.
+ (sh_align_load): Call _bfd_sh_align_load_span.
+ (sh_swap_insns): Change relocs parameter to PTR.
+ * bfd-in2.h, libbfd.h: Rebuild.
+ * targets.c (bfd_elf32_sh_vec): Declare.
+ (bfd_elf32_shl_vec): Declare.
+ * config.bfd (sh-*-elf*): New target.
+ * configure.in (bfd_elf32_sh_vec): New target vector.
+ (bfd_elf32_shl_vec): New target vector.
+ * configure: Rebuild.
+ * Makefile.in: Rebuild dependencies.
+ (BFD32_BACKENDS): Add elf32-sh.o.
+ (BFD32_BACKENDS_CFILES): Add elf32-sh.c.
+
+ * elf.c (map_sections_to_segments): Check that LMA does not skip a
+ page before checking D_PAGED.
+
+ * ihex.c (ihex_scan): Removed unnecessary extbase variable.
+ (ihex_write_object_contents): Remove extbase; always use segbase
+ instead.
+
+Thu Aug 29 16:52:17 1996 Michael Meissner <meissner@tiktok.cygnus.com>
+
+ * configure.in (i[345]86-*-*): Recognize i686 for pentium pro.
+ * configure.host (i[345]86-*-*): Ditto.
+ * config.bfd (i[345]86-*-*): Ditto.
+ * configure: Regenerate.
+
+ * config.bfd (i[3456]86-*-dgux*): Recognize as a synonym for x86
+ elf.
+
+Tue Aug 27 09:18:18 1996 Jeffrey A Law (law@cygnus.com)
+
+ * elf32-hppa.c (hppa_elf_gen_reloc_type): Add new argument.
+ * elf32-hppa.h (hppa_elf_gen_reloc_type): Update prototype.
+ * som.c (hppa_som_gen_reloc_type): Add new argument. If
+ we encounter an R_DATA_ONE_SYMBOL reloc against a symbol that
+ will have an ST_CODE type, change the symbol's type to ST_DATA.
+ * som.c (hppa_som_gen_reloc_type): Update prototype.
+
+Tue Aug 27 00:12:22 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * elf32-mips.c (mips_elf_check_relocs): Set dynobj if needed for
+ R_MIPS_32 and R_MIPS_REL32. Set sgot and g as soon as possible.
+ (mips_elf_size_dynamic_sections): Don't require .got to exist.
+ (mips_elf_finish_dynamic_sections): Likewise.
+
+Thu Aug 22 10:54:38 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * configure.host (HLDENV): New variable to set. Set it for
+ *-*-sysv4*, since those linkers may not support -R but they always
+ support LD_RUN_PATH.
+
+ * libieee.h (NSECTIONS): Don't define.
+ (ieee_data_struct): Change section_table to asection **. Add
+ section_table_size.
+ * ieee.c (get_section_entry): If the table isn't big enough, make
+ it bigger.
+ (ieee_slurp_sections): Remove assertion about number of sections.
+ (ieee_object_p): Adjust initialization of ieee to match changes to
+ the structure.
+
+ * xcofflink.c (xcoff_mark): Don't copy relocs for undefined
+ symbols merely because we are generating a shared library.
+ (xcoff_build_ldsyms): Don't set up global linkage code for an
+ undefined symbol merely because we are generating a shared
+ library.
+
+Fri Aug 16 16:25:35 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * xcofflink.c (xcoff_link_add_dynamic_symbols): Create and define
+ a function code symbol for an XMC_XO symbol.
+
+Thu Aug 15 12:33:29 1996 Stan Shebs <shebs@andros.cygnus.com>
+
+ * mpw-config.in: Update editing of autoconf vars to reflect
+ Jul 18 configure.in change.
+ * mpw-make.sed: Update editing of include pathnames to be
+ more general, add @DASH_C_FLAG@ to explicit compile rule edit.
+
+Thu Aug 15 10:35:13 1996 Richard Henderson <rth@tamu.edu>
+
+ * elf64-alpha.c (elf64_alpha_output_extsym): The section from
+ which to offset to get the .plt entry address is ".plt".
+
+Thu Aug 15 16:40:30 1996 James G. Smith <jsmith@cygnus.co.uk>
+
+ * reloc.c: (BFD_RELOC_ARM_THUMB_ADD, BFD_RELOC_ARM_THUMB_IMM,
+ BFD_RELOC_ARM_THUMB_SHIFT, BFD_RELOC_ARM_THUMB_OFFSET):
+ Added, for internal use by the ARM gas.
+ * libbfd.h: Rebuilt
+ * bfd-in2.h: Rebuilt
+
+Wed Aug 14 17:02:09 1996 Richard Henderson <rth@tamu.edu>
+
+ * elf64-alpha.c (elf64_alpha_size_dynamic_sections): Correct typo
+ in section dynidx start.
+
+Tue Aug 13 14:35:38 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * elf.c (_bfd_elf_make_section_from_shdr): Treat sections whose
+ name begins with .gnu.linkonce as SEC_LINK_ONCE. This is an
+ optimization for g++.
+
+Tue Aug 13 17:04:40 1996 Michael Meissner <meissner@tiktok.cygnus.com>
+
+ * elf32-ppc.c (ppc_elf_merge_private_bfd_data): If one module has
+ the -mrelocatable-lib bit set and the other doesn't, clear the
+ -mrelocatable-lib bit in the header.
+
+Sat Aug 10 22:59:17 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * elflink.h (elf_link_add_object_symbols): Do not resolve a common
+ symbol against a STT_FUNC symbol in a shared library.
+
+Fri Aug 9 12:44:57 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * xcofflink.c (xcoff_link_add_dynamic_symbols): If a descriptor
+ symbol is found, automatically define the corresponding function
+ code.
+
+ * cofflink.c (coff_link_add_symbols): Only set (*sym_hash)->numaux
+ if sym.n_numaux is not zero.
+ (_bfd_coff_link_input_bfd): Permit the symbol and the hash table
+ entry to disagree about the number of aux entries if the symbol
+ has zero.
+
+ * elf32-mips.c (mips_elf_check_relocs): Create the .rel.dyn
+ section if it might be needed, not just if info->shared.
+ (mips_elf_adjust_dynamic_symbol): Make room for a null element at
+ the start of .rel.dyn if we are going to use it.
+ (mips_elf_finish_dynamic_sections): Only clear the first element
+ of .rel.dyn if the size is greater than zero.
+
+Thu Aug 8 16:24:55 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * xcofflink.c (xcoff_link_input_bfd): If we already called the
+ undefined_symbol callback for a symbol, then don't issue any more
+ warnings about loader relocs.
+ (_bfd_ppc_xcoff_relocate_section): Don't do any further processing
+ after calling the undefined_symbol callback.
+
+ * xcofflink.c (XCOFF_MULTIPLY_DEFINED): Define.
+ (xcoff_link_add_symbols): Permit multiple definitions of a symbol
+ as the AIX linker seems to do.
+
+Thu Aug 8 12:21:56 1996 Klaus Kaempf <kkaempf@progis.de>
+
+ * evax-alpha.c (evax_alpha_vec): Corrected flags, cleanup.
+ (evax_initialize): Remove evax_reloc_table.
+ (evax_close_and_cleanup): Ditto.
+ (reloc_nil): Ditto.
+ (alpha_howto_table): Remove ALPHA_R_SWREL32 and ALPHA_R_SWREL64
+ entries.
+ (evax_bfd_reloc_type_lookup): Ditto.
+ * evax-egsd.c (_bfd_evax_slurp_egsd): Add a few casts; set
+ cooked_size == raw_size.
+ * evax-emh.c (_bfd_evax_register_filename): Remove.
+ * evax-etir.c (etir_stc): Allow ETIR_S_C_STC_xx commands.
+ * evax-misc.c (add_new_contents): Malloc section at full size.
+ (_bfd_save_evax_section): Memcpy section contents directly.
+ * evax.h (ALPHA_R_SWREL32, ALPHA_R_SWREL64): Remove.
+ (evax_reloc_table): Remove.
+
+ * hosts/alphavms.h (O_ACCMODE): Define if needed.
+
+ * makefile.vms: Add better support for DEC C compilation
+ Add evax.h dependencies
+
+ * reloc.c (bfd_get_reloc_size): Add case for 16 byte reloc.
+ (BFD_RELOC_SWREL32,BFD_RELOC_SWREL64): Remove.
+ (BFD_RELOC_ALPHA_BASEREG): Remove.
+ * bfd-in2.h, libbfd.h: Rebuild.
+
+Thu Aug 8 08:17:32 1996 Stu Grossman (grossman@critters.cygnus.com)
+
+ * archive.c (bsd_write_armap): Ifdef around calls to getuid and
+ getgid if _WIN32 is defined.
+ * opncls.c (bfd_fdopenr): Remove unnecessary WINGDB ifdef.
+
+Wed Aug 7 23:19:00 1996 Stu Grossman (grossman@critters.cygnus.com)
+
+ * aoutx.h bfd-in.h bfd-in2.h opncls.c riscix.c som.c targets.c:
+ Change NO_FLAGS to BFD_NO_FLAGS to avoid conflict with an HPUX
+ include file.
+ * libbfd.c: Create dummy getpagesize() macro if HAVE_GETPAGESIZE
+ isn't defined.
+
+Wed Aug 7 14:11:44 1996 Philippe De Muyter <phdm@info.ucl.ac.be>
+
+ * configure.in: Call BFD_NEEDED_DECLARATION on strstr and
+ realloc.
+ * acconfig.h (NEED_DECLARATION_STRSTR): New macro.
+ (NEED_DECLARATION_REALLOC): New macro.
+ * configure, config.in: Rebuild.
+ * sysdep.h (strstr): Declare if NEED_DECLARATION_STRSTR.
+ (realloc): Declare if NEED_DECLARATION_REALLOC.
+
+ * aclocal.m4 (BFD_NEED_DECLARATION): Include <string.h> or
+ <strings.h> if they exist.
+
+ * ieee.c (ieee_set_section_contents): Cast bfd_alloc return.
+
+Wed Aug 7 12:12:03 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * cpu-i386.c (i8086_arch): Architecture info for the i8086.
+
+ Based on patches from Eric Valette <valette@crf.canon.fr>:
+ * elf32-i386.c (enum reloc_type): Add FIRST_INVALID_RELOC,
+ LAST_INVALID_RELOC, R_386_16, R_386_PC16, R_386_8, R_386_PC8.
+ (elf_howto_table): Add entries for new relocs.
+ (elf_i386_reloc_type_lookup): Handle new relocs.
+ (elf_i386_info_to_howto): Just call abort.
+ (elf_i386_info_to_howto_rel): Check that the reloc type is valid.
+ (elf_i386_relocate_section): Likewise.
+
+Mon Aug 5 13:42:41 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * elf.c (_bfd_elf_make_section_from_shdr): For a loadable section,
+ only get the LMA from the phdr if they are in the same part of the
+ file.
+
+ * elf.c (map_sections_to_segments): Rewrite tests for starting a
+ new segment to make them more comprehensible. If the relationship
+ between the LMA and the VMA changed, start a new segment. Don't
+ check dynsec when deciding whether to start a new segment for a
+ writeable section; -N will now handle this.
+
+Thu Aug 1 22:43:08 1996 Jeffrey A Law (law@cygnus.com)
+
+ * libhppa.h: Remove "esel" changes. Not the right approach.
+ * som.c: Corresponding changes.
+ (som_bfd_derive_misc_symbol_info): Use ST_DATA for symbols
+ which don't have a SOM symbol type associated with them.
+ Reverses a 1994 change.
+
+Wed Jul 31 15:50:55 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ Make ld -N more reasonable for ELF:
+ * elf.c (map_sections_to_segments): If D_PAGED is not set, set
+ phdr_in_section to false, and always use a single load segment.
+ (elf_sort_sections): Sort sections by LMA after VMA.
+ (assign_file_positions_for_segments): If D_PAGED is not set, don't
+ align to maxpagesize.
+ (assign_file_positions_except_relocs): Likewise.
+ * elfcode.h (elf_object_p): If a section is loaded but not page
+ aligned, clear D_PAGED.
+
+Wed Jul 31 15:00:12 1996 James G. Smith <jsmith@cygnus.co.uk>
+
+ * reloc.c: (BFD_RELOC_ARM_OFFSETIMM8, BFD_RELOC_ARM_HWLITERAL):
+ Added, for internal use by the ARM gas.
+ * libbfd.h: Rebuilt
+ * bfd-in2.h: Rebuilt
+
+Tue Jul 30 14:14:57 1996 Jeffrey A Law (law@cygnus.com)
+
+ * libhppa.h (R_HPPA_ESEL): New field selector.
+ (e_esel): Similarly.
+ * som.c (hppa_som_gen_reloc_type): If we encounter an e_esel,
+ then generate R_COMP2 (PUSH_SYM), R_DATA_EXPR fixup stream.
+ (som_write_fixups): Handle R_DATA_EXPR just like R_CODE_EXPR.
+
+Tue Jul 30 13:31:27 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * xcofflink.c (_bfd_xcoff_bfd_link_add_symbols): Do the regular
+ archive search before looking for stripped dynamic objects.
+
+Fri Jul 26 17:51:39 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * xcofflink.c (xcoff_build_ldsyms): Make exporting an undefined
+ symbol a warning rather than an error.
+
+Wed Jul 24 12:02:53 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * elf.c (assign_file_positions_for_segments): Track the virtual
+ memory position separately from the file position, and use it to
+ compute the alignment adjustment.
+
+Mon Jul 22 15:30:30 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * elf64-mips.c: Include "aout/ar.h".
+ (mips_elf64_slurp_armap): New static function.
+ (mips_elf64_write_armap): New static function.
+ (bfd_elf64_archive_*): Define.
+ * elfxx-target.h (bfd_elfNN_archive_p): Define if not defined.
+ Use instead of bfd_generic_archive_p.
+ (bfd_elfNN_write_archive_contents): Define if not defined. Use
+ instead of _bfd_write_archive_contents.
+ (bfd_elfNN_mkdarchive): Define if not defined. Use instead of
+ _bfd_generic_mkarchive.
+ (TARGET_BIG_SYM): If bfd_elfNN_archive_functions is defined, use
+ bfd_elfNN_archive in BFD_JUMP_TABLE_ARCHIVE rather than
+ _bfd_archive_coff.
+ (TARGET_LITTLE_SYM): Likewise.
+ * archive.c (bfd_slurp_armap): Check for and reject an archive map
+ name of /SYM64/.
+ * Makefile.in: Rebuild dependencies.
+
+ * elf32-mips.c (_bfd_mips_elf_final_write_processing): Handle
+ SHT_MIPS_LIBLIST, SHT_MIPS_CONTENT, SHT_MIPS_SYMBOL_LIB, and
+ SHT_MIPS_EVENTS sections.
+ (_bfd_mips_elf_section_from_shdr): Handle SHT_MIPS_IFACE,
+ SHT_MIPS_CONTENT, SHT_MIPS_SYMBOL_LIB, and SHT_MIPS_EVENTS
+ sections.
+ (_bfd_mips_elf_fake_sections): Likewise.
+
+ * libecoff.h (ecoff_data_type): Add rdata_in_text field.
+ * ecoff.c (ecoff_compute_section_file_positions): Copy
+ rdata_in_text from backend info to tdata. Clear it if any data
+ section comes before .rdata.
+ (_bfd_ecoff_write_object_contents): Use rdata_in_text field in
+ tdata rather than backend info.
+
+Fri Jul 19 18:15:51 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * configure.in: Fix test for whether a compiler has a 64 bit
+ type. From Jim Wilson <wilson@cygnus.com>.
+
+Thu Jul 18 15:39:10 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * configure.host (mips-sgi-irix6*): New host.
+
+ * configure.in: Set and substitute VERSION, BFD_HOST_64BIT_LONG
+ (replacing HOST_64BITLONG), BFD_HOST_64_BIT_DEFINED,
+ BFD_HOST_64_BIT, and BFD_HOST_U_64_BIT. Add bfd-in2.h:bfd-in2.h
+ to AC_OUTPUT call.
+ * configure: Rebuild.
+ * bfd-in.h (BFD_ARCH_SIZE): Define as @wordsize@, not @WORDSIZE@.
+ (BFD_HOST_64_BIT): Define conditionally.
+ (BFD_HOST_U_64_BIT): Define when BFD_HOST_64_BIT is defined.
+ (bfd_vma): Typedef as BFD_HOST_U_64_BIT.
+ (symvalue, bfd_size_type): Likewise.
+ * bfd-in2.h: Rebuild.
+ * Makefile.in (do_clean): Remove bfd-tmp.h.
+ (do_distclean): Remove bfd-in3.h.
+ (stmp-bfd.h): Just do copy-if-change bfd-in3.h bfd.h.
+ (bfd-in3.h): New target.
+
+ * config.bfd (sparc-*-sysv4*): Don't build sunos_big_vec. From
+ Andrew Gierth <ANDREWG@microlise.co.uk>.
+
+ * configure.host: Set INSTALL_SHLIB.
+ * configure.in: Call AC_SUBST (INSTALL_SHLIB).
+ * configure: Rebuild.
+ * Makefile.in (install): Use @INSTALL_SHLIB@.
+
+ * config.bfd (mips*-*-irix6*): New target.
+ * configure.host: Handle Irix 6 shared library like Irix 5.
+
+ * xcofflink.c (xcoff_link_add_symbols): Don't check an XMC_TD
+ symbol for a magic name.
+ (xcoff_link_input_bfd): Don't change the reloc symbol for an
+ XMC_TD symbol.
+ (_bfd_ppc_xcoff_relocate_section): Don't get the TOC offset for an
+ XMC_TD symbol.
+
+Thu Jul 18 11:36:31 1996 Stan Shebs <shebs@andros.cygnus.com>
+
+ * mpw-config.in: Add ELF support to mips config, create the
+ elf32-target.h file in the object dir.
+ * mpw-make.sed: Edit elfXX-target.h refs at beginnings of lines.
+
+Wed Jul 17 18:02:32 1996 Kim Knuttila <krk@cygnus.com>
+
+ * coff-ppc.c: Redid debug scheme - numerous fprintf's gone.
+ Also removed most abort calls, in favor of using bfd reporting.
+
+
+Wed Jul 17 10:58:55 1996 Kim Knuttila <krk@cygnus.com>
+
+ * coff-ppc.c (coff_ppc_relocate_section): Removed bogus fprintf
+
+Tue Jul 16 23:49:02 1996 Stu Grossman (grossman@critters.cygnus.com)
+
+ * archures.c bfd-in2.h: Add bfd_mach_i386_i386 and
+ bfd_mach_i386_i8086 machine types.
+
+Wed Jul 10 12:42:56 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * ecoff.c (_bfd_ecoff_new_section_hook): Set SEC_CODE for _INIT
+ and _FINI sections.
+
+Wed Jul 10 11:18:21 1996 Richard Henderson <rth@tamu.edu>
+
+ * coffcode.h (coff_set_section_contents): A/UX does not require
+ special handling of the _LIB section.
+
+Tue Jul 9 15:52:20 1996 Jeffrey A Law (law@cygnus.com)
+
+ * coff-h8300.c (h8300_reloc16_extra_cases): Use the correct
+ value for R_RELBYTE.
+
+ * reloc16.c (bfd_coff_reloc16_relax_section): Only "shrinks"
+ array if one was allocated.
+
+Tue Jul 9 12:21:54 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ From Kazumoto Kojima <kkojima@kk.info.kanagawa-u.ac.jp>:
+ * elf32-mips.c (struct mips_elf_link_hash_table): Add new fields
+ use_rld_obj_head and rld_value.
+ (mips_elf_link_hash_table_create): Initialize new fields.
+ (mips_elf_add_symbol_hook): Mark __rld_obj_head symbol as
+ dynamic.
+ (mips_elf_create_dynamic_sections): Create .rld_map section. If
+ __rld_obj_head symbol not seen, create an __rld_map symbol.
+ (mips_elf_size_dynamic_sections): Make space in .rld_map section.
+ Create a DT_MIPS_RLD_MAP entry rather than a DT_DEBUG entry.
+ (mips_elf_finish_dynamic_symbol): Save value of __rld_map or
+ __rld_obj_head symbol.
+ (mips_elf_finish_dynamic_sections): Handle DT_MIPS_RLD_MAP.
+
+Mon Jul 8 16:18:03 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * elf32-mips.c (mips_reloc_map): Remove BFD_RELOC_32_PCREL entry.
+
+ * elf32-ppc.c (ppc_elf_howto_raw): For R_PPC_ADDR16_HA, use
+ ppc_elf_addr16_ha_reloc.
+ (ppc_elf_addr16_ha_reloc): New static function.
+
+ * coff-mips.c (struct mips_hi): Define.
+ (mips_refhi_list): New static variable.
+ (mips_refhi_addr, mips_refhi_addend): Remove.
+ (mips_refhi_reloc): Maintain a list of unmatched REFHI relocs.
+ (mips_reflo_reloc): Process mips_refhi_list.
+ (mips_relhi_list): New static variable.
+ (mips_relhi_addr, mips_relhi_addend): Remove.
+ (mips_relhi_reloc): Maintain a list of unmatched RELHI relocs.
+ (mips_rello_reloc): Process mips_relhi_list.
+ (mips_relocate_section): Permit an arbitrary number of REFHI or
+ RELHI relocs before the associated REFLO or RELLO reloc.
+
+Fri Jul 5 19:27:49 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * aout-target.h (MY(callback)): Set reloc_count fields.
+
+Thu Jul 4 12:00:37 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * sunos.c (sunos_add_dynamic_symbols): Don't create dynamic
+ sections unless this is a SunOS link.
+
+ * VERSION: Set to 2.7.1.
+
+ * Released binutils 2.7.
+
+Wed Jul 3 14:59:47 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * i386aout.c: Include "aout/aout64.h".
+ (i386aout_write_object_contents): New static function.
+ (MY_write_object_contents): Define.
+
+ * netbsd.h (MY(write_object_contents)): Make sure that
+ adjust_sizes_and_vmas is called before fiddling with the magic
+ number.
+
+Tue Jul 2 23:30:39 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * stabs.c (_bfd_link_section_stabs): Fix casts of psinfo.
+
+Sun Jun 30 13:34:33 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * libbfd-in.h (itos, stoi): Don't define.
+ * libbfd.h: Rebuild.
+ * i386lynx.c (KEEPIT): Define as udata.i.
+ (NAME(lynx,swap_std_reloc_out)): Don't use stoi.
+ (NAME(lynx,swap_ext_reloc_out)): Likewise.
+ * riscix.c (riscix_swap_std_reloc_out): Use udata.i rather than
+ flags. Don't use stoi.
+
+ * elf32-mips.c (ELF_MAGPAGESIZE): Change definition to 0x1000.
+
+ * elf.c (map_sections_to_segments): Don't start a new segment for
+ a writable section if it's on the same page as the previous
+ segment. Reset the writable variable for a readonly section.
+
+Sat Jun 29 16:18:51 1996 Kim Knuttila <krk@cygnus.com>
+
+ * peicode.h (coff_swap_aouthdr_in): Missing initializations of
+ first_thunk_address, thunk_size, and import_table_size.
+ * peicode.h: Improved some diagnostics regarding edata sections.
+
+ * coff-ppc.c (coff_ppc_relocate_section): Earlier error check
+ on IMGLUE relocs.
+ (coff_ppc_relocate_section): Improved diagnostic for large TOCDEFN's.
+ (TARGET_LITTLE_SYM): Added missing D_PAGED.
+
+Fri Jun 28 13:48:45 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * xcofflink.c (xcoff_link_check_ar_symbols): An undefined symbol
+ with XCOFF_DEF_DYNAMIC set is really defined.
+ (xcoff_link_check_dynamic_ar_symbols): Likewise.
+ (xcoff_link_add_symbols): Only create special sections if using an
+ XCOFF hash table.
+
+ * reloc.c (bfd_perform_relocation): Handle xcoff-powermac like
+ aixcoff-rs6000.
+ (bfd_install_relocation): Likewise.
+
+Fri Jun 28 11:17:00 1996 Richard Henderson <rth@tamu.edu>
+
+ * elf64-alpha.c (struct alpha_elf_link_hash_entry): Add flags
+ field.
+ (ALPHA_ELF_LINK_HASH_LU_ADDR): Define.
+ (ALPHA_ELF_LINK_HASH_LU_MEM): Define.
+ (ALPHA_ELF_LINK_HASH_LU_FUNC): Define.
+ (elf64_alpha_link_hash_newfunc): Initialize flags field.
+ (elf64_alpha_check_relocs): Record types of LITUSE entries that
+ are found for LITERAL relocs.
+ (elf64_alpha_adjust_dynamic_symbol): If a symbol has its address
+ taken, we cannot generate a .plt entry for the symbol.
+
+Thu Jun 27 11:24:29 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * configure.in: Add AC_ISC_POSIX, and check for setitimer and
+ sysconf functions (for gprof).
+ * configure, config.in: Rebuild.
+
+Wed Jun 26 16:29:02 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * ecoff.c (_bfd_ecoff_archive_p): Check the first object file in
+ an archive if it has a map. If the object file has the wrong
+ xvec, reject it.
+
+ * coff-alpha.c (alpha_adjust_reloc_in): Set the addend for a
+ BRADDR, SREL16, SREL32, or SREL64 reloc against an external
+ symbol.
+ (alpha_relocate_section): Likewise.
+
+ * coffswap.h (coff_swap_reloc_out): Use RELSZ, not sizeof.
+ (coff_swap_filehdr_out): Use FILHSZ, not sizeof.
+ (coff_swap_sym_out): Use SYMESZ, not sizeof.
+ (coff_swap_aux_out): Use AUXESZ, not sizeof.
+ (coff_swap_lineno_out): Use LINESZ, not sizeof.
+ (coff_swap_aouthdr_out): Use AOUTSZ, not sizeof.
+ (coff_swap_scnhdr_out): Use SCNHSZ, not sizeof.
+ * peicode.h: Corresponding changes.
+
+Tue Jun 25 15:28:34 1996 Michael Meissner <meissner@tiktok.cygnus.com>
+
+ * elflink.h (elf_create_pointer_linker_section): Comment out code
+ dealing with making GOT pointers negative of the GOT symbol for
+ now.
+
+Tue Jun 25 11:41:24 1996 Richard Henderson <rth@tamu.edu>
+
+ * elf64-alpha.c (elf64_alpha_adjust_dynamic_symbol): Don't
+ increment the .rela.plt size until after we're done creating the
+ .plt entry.
+ (elf64_alpha_finish_dynamic_symbol): Change .plt entry to load the
+ .rela.plt offset directly rather than calculating it.
+
+Mon Jun 24 17:15:10 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
+
+ * Makefile.in, (bindir, libdir, datadir, mandir, infodir, includedir):
+ Use autoconf-set values.
+ * doc/Makefile.in (bindir, libdir, datadir, mandir, infodir,
+ includedir, INSTALL, INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set
+ values.
+ (docdir): Deleted.
+ * configure.in (AC_PREREQ): autoconf v2.5 or higher.
+ * configure: Rebuilt.
+
+Mon Jun 24 22:50:35 1996 Jeffrey A Law (law@cygnus.com)
+
+ * som.c (som_write_fixups): Fix typo in R_END_TRY for exception
+ handling code > 1k away.
+
+Mon Jun 24 18:41:06 1996 Michael Meissner <meissner@tiktok.cygnus.com>
+
+ * elflink.h (elf_create_pointer_linker_section): If DEBUG is
+ defined, output whenever the symbol is updated.
+
+Mon Jun 24 17:58:12 1996 Jouke Numan <jnuman@bazis.nl>
+
+ * elf.c (elf_fake_sections): Don't set sh_addr of a non SEC_ALLOC
+ section to 0 if user_set_vma is set.
+ * elflink.h (elf_bfd_final_link): Likewise.
+
+Sun Jun 23 20:42:51 1996 Doug Evans <dje@canuck.cygnus.com>
+
+ Partially undo patch of Jun 20.
+ * coffcode.h (coff_set_alignment_hook): Use COFF_IMAGE_WITH_PE.
+ (coff_compute_section_file_positions): Likewise.
+ (coff_write_object_contents): Likewise. Re-add deleted code, but
+ use #ifdef COFF_WITH_PE, not COFF_OBJ_WITH_PE.
+ * peicode.h (pe_bfd_copy_private_bfd_data): Re-add #ifdef.
+
+Fri Jun 21 17:38:15 1996 Joel Sherrill <joel@merlin.gcs.redstone.army.mil>
+
+ * config.bfd: Add support for *-*-rtems* configurations.
+
+Fri Jun 21 15:19:59 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * elf.c (prep_headers): Add bfd_arch_alpha case.
+
+Fri Jun 21 12:35:27 1996 Richard Henderson <rth@tamu.edu>
+
+ * elf64-alpha.c: New file.
+ * config.bfd (alpha-*-linuxecoff*): New target.
+ (alpha-*-linux*, alpha-*-elf*): New targets.
+ * configure.in (bfd_elf64_alpha_vec): New vector.
+ * configure: Rebuild.
+ * targets.c (bfd_elf64_alpha_vec): Declare.
+ (bfd_target_vector): Add bfd_elf64_alpha_vec if BFD64.
+ * reloc.c (BFD_RELOC_ALPHA_GPDISP): Define.
+ * bfd-in2.h, libbfd.h: Rebuild.
+ * Makefile.in: Rebuild dependencies.
+ (BFD64_BACKENDS): Add elf64-alpha.o.
+ (BFD64_BACKENDS_CFILES): Add elf64-alpha.c.
+
+Thu Jun 20 18:14:25 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * ecoff.c (ecoff_armap_hash): If hlog is 0, just return 0, rather
+ than relying on a right shift of 32.
+
+Thu Jun 20 11:00:57 1996 Doug Evans <dje@canuck.cygnus.com>
+
+ * coffcode.h (coff_set_alignment_hook): Change COFF_IMAGE_WITH_PE
+ ifdef to COFF_WITH_PE.
+ (coff_compute_section_file_positions): Likewise.
+ (coff_write_object_contents): Likewise. Delete COFF_OBJ_WITH_PE.
+ * pe-{arm,i386,ppc}.c (COFF_OBJ_WITH_PE): Delete.
+ * peicode.h (pe_bfd_copy_private_bfd_data): Delete ifdef
+ COFF_IMAGE_WITH_PE, always include.
+
+ * peicode.h (coff_swap_scnhdr_out): ".drectve" doesn't have trailing 0.
+
+Wed Jun 19 11:37:52 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * elf.c (map_sections_to_segments): Fix up the test for -Ttext to
+ approximate the correct answer if SIZEOF_HEADERS was not used.
+
+ * binary.c (binary_set_section_contents): Set section file
+ position based on LMA rather than VMA.
+
+Wed Jun 19 11:19:25 1996 Manfred Hollstein KS/EIC5 60/3/142 #40283 <manfred@lts.sel.alcatel.de>
+
+ * linker.c (_bfd_generic_link_output_symbols): Don't output any
+ symbols if info->strip == strip_all.
+
+Tue Jun 18 15:17:36 1996 Jeffrey A. Law <law@rtl.cygnus.com>
+
+ * coff-h8300.c: Remove #if 0 code.
+ (compatable): Don't allow mixing/matching of different architectures.
+
+ * archures.c (bfd_mach_h8300s): Add.
+ * bfd-in2.h: Rebuilt.
+ * coff-h8300.c (funcvec_hash_newfunc): Handle H8/S too.
+ (BADMAG): Likewise.
+ (h8300_reloc16_estimate): Likewise.
+ (h8300_reloc16_extra_cases): Likewise.
+ (h8300_bfd_link_add_symbols): Likewise.
+ * coffcode.h (coff_set_arch_mach_hook): Likewise.
+ (coff_set_flags): Likewise.
+ * cpu-h8300.c (h8300_scan): Likewise.
+ Add H8/S to bfd_h8300_arch list.
+
+Tue Jun 18 14:42:58 1996 Klaus Kaempf <kkaempf@progis.de>
+
+ Added support for Alpha OpenVMS:
+ * evax.h, evax-alpha.c, evax-egsd.c, evax-emh.c: New files.
+ * evax-etir.c, evax-misc.c, hosts/alphavms.h: New files.
+ * config.h-vms, makefile.vms: New files.
+ * config.bfd (alpha-*-*vms*): New target.
+ * configure.in (evax_alpha_vec): New target vector.
+ * configure: Rebuild.
+ * reloc.c (BFD_RELOC_SWREL32, BFD_RELOC_SWREL64): Define.
+ (BFD_RELOC_ALPHA_LINKAGE, BFD_RELOC_ALPHA_BASEREG): Define.
+ * targets.c (bfd_target_evax_flavour): Define.
+ (evax_alpha_vec): Declare.
+ (bfd_target_vector): Add ecoffalpha_little_vec and evax_alpha_vec
+ if BFD64 is defined.
+ * bfd-in2.h, libbfd.h: Rebuild.
+ * Makefile.in: Rebuild dependencies.
+ (BFD64_BACKENDS): Add evax-alpha.o, evax-egsd.o, evax-etir.o,
+ evax-emh.o, and evax-misc.o.
+ (BFD64_BACKENDS_CFILES): Add evax-alpha.c, evax-egsd.c,
+ evax-etir.c, evax-emh.c, and evax-misc.c.
+ (HFILES): Add evax.h.
+
+Tue Jun 18 13:54:18 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * coff-h8300.c (h8300_reloc16_extra_cases): Make name a const
+ pointer.
+ (h8300_bfd_link_add_symbols): Likewise.
+
+Mon Jun 17 10:06:50 1996 Jeffrey A. Law <law@rtl.cygnus.com>
+
+ * som.h (R_HPPA_BEGIN_TRY, R_HPPA_END_TRY): Define.
+ * som.c (som_write_fixups): Handle R_BEGIN_TRY and R_END_TRY.
+
+Mon Jun 17 12:49:11 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * elf32-mips.c (mips_elf_relocate_section): Don't create a reloc
+ for R_MIPS_REL32 and R_MIPS_32 relocs if no dynamic sections were
+ created.
+ (mips_elf_check_relocs): Only create .rel.dyn for R_MIPS_REL32 and
+ R_MIPS_32 relocs if creating a shared library.
+
+Thu Jun 13 20:14:51 1996 Doug Evans <dje@canuck.cygnus.com>
+
+ * peicode.h (add_data_entry): Use pei_section_data rather than
+ _cooked_size. Corresponds to May 13 change in coffcode.h.
+
+Thu Jun 13 10:23:40 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * cofflink.c (_bfd_coff_final_link): Handle long section names.
+ * coffcode.h (coff_write_object_contents): If there are long
+ section names, always set the f_symptr field, even if there are no
+ symbols.
+ * peicode.h (coff_swap_filehdr_in): Don't clear the f_symptr field
+ if there are no symbols.
+
+ * coffgen.c (make_a_section_from_file): Check return value of
+ _bfd_coff_read_string_table.
+ (coff_real_object_p): Check return value of
+ make_a_section_from_file.
+ (_bfd_coff_read_string_table): Check that there are some symbols
+ before trying to read the string table size.
+
+Wed Jun 12 11:16:37 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * xcofflink.c (xcoff_link_add_symbols): When considering whether
+ to replace a symbol in a dynamic object with a symbol from another
+ dynamic object, do the replacement if the existing symbol is
+ global linkage code.
+
+ * xcofflink.c (_bfd_ppc_xcoff_relocate_section): Check explicitly
+ for _ptrgl, and treat it as global linkage code.
+
+ * aoutx.h (NAME(aout,find_nearest_line)): Notice if we find a
+ filename or N_SO symbol past the offset, and use it to indicate
+ that there is no line number or function when appropriate.
+
+Tue Jun 11 15:24:48 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * xcofflink.c (xcoff_build_ldsyms): Set XCOFF_DEF_REGULAR for a
+ common symbol defined by the linker. Don't export function code
+ even if export_defineds is set.
+
+Mon Jun 10 11:57:27 1996 Jeffrey A Law (law@cygnus.com)
+
+ * coff-h8300.c (howto_table): Add new entries for R_BCC_INV
+ and R_JMP_DEL.
+ (rtype2howto): Handle R_BCC_INV and R_JMP_DEL.
+ (h8300_symbol_address_p): New function.
+ (h8300_reloc16_estimate): Eliminate jumps made unnecessary by
+ relaxing.
+
+Sun Jun 9 16:30:20 1996 Jeffrey A Law (law@cygnus.com)
+
+ * coff-h8300.c (h8300_reloc16_estimate): Fix many minor spacing
+ problems.
+ (h8300_reloc16_estimate, cases R_JMP1, R_JMP2): Adjust "dot"
+ correctly for the two variants. Allow relaxing if the target
+ is 128 bytes away since after relaxation it'll be 126 bytes away.
+ (h8300_reloc16_estimate, case R_PCRWORD): Correctly adjust
+ "dot" and "value". Allow relaxing if the target is 128 bytes
+ away since after relaxation it'll be 126 bytes away.
+ * reloc16.c (bfd_coff_reloc16_relax_section): Keep relaxing
+ the given section until nothing changes.
+
Thu Jun 6 15:24:45 1996 Richard Henderson <rth@tamu.edu>
* ecoff.c (_bfd_ecoff_new_section_hook): Remove the _PDATA
program_transform_name = @program_transform_name@
exec_prefix = @exec_prefix@
-bindir = $(exec_prefix)/bin
-libdir = $(exec_prefix)/lib
+bindir = @bindir@
+libdir = @libdir@
-datadir = $(prefix)/lib
-mandir = $(prefix)/man
+datadir = @datadir@
+mandir = @mandir@
man1dir = $(mandir)/man1
man2dir = $(mandir)/man2
man3dir = $(mandir)/man3
man7dir = $(mandir)/man7
man8dir = $(mandir)/man8
man9dir = $(mandir)/man9
-infodir = $(prefix)/info
-includedir = $(prefix)/include
+infodir = @infodir@
+includedir = @includedir@
oldincludedir =
docdir = doc
elf32-m88k.o \
elf32-mips.o \
elf32-ppc.o \
+ elf32-sh.o \
elf32-sparc.o \
elf32.o \
elflink.o \
elf32-m88k.c \
elf32-mips.c \
elf32-ppc.c \
+ elf32-sh.c \
elf32-sparc.c \
elf32.c \
elflink.c \
aout64.o \
coff-alpha.o \
demo64.o \
+ elf64-alpha.o \
elf64-gen.o \
elf64-mips.o \
elf64-sparc.o \
elf64.o \
+ evax-alpha.o \
+ evax-egsd.o \
+ evax-etir.o \
+ evax-emh.o \
+ evax-misc.o \
nlm32-alpha.o \
nlm64.o
aout64.c \
coff-alpha.c \
demo64.c \
+ elf64-alpha.c \
elf64-gen.c \
elf64-mips.c \
elf64-sparc.c \
elf64.c \
+ evax-alpha.c \
+ evax-egsd.c \
+ evax-etir.c \
+ evax-emh.c \
+ evax-misc.c \
nlm32-alpha.c \
nlm64.c
HFILES = aout-target.h aoutf1.h aoutx.h coffcode.h \
coffswap.h ecoffswap.h elf32-hppa.h elf32-target.h elf64-target.h \
- elfcode.h hppa_stubs.h libaout.h libbfd.h \
+ elfcode.h evax.h hppa_stubs.h libaout.h libbfd.h \
libcoff.h libecoff.h elf-bfd.h libhppa.h libieee.h libnlm.h \
liboasys.h nlm-target.h nlmcode.h som.h genlink.h netbsd.h ns32k.h
rm -f *.o *~ core *.E *.p *.ip aout-params.h gen-aout config.log \
pic/*.o
do_clean: do_mostlyclean
- rm -f libbfd.a TAGS bfd.h stmp-bfd.h ofiles stamp-ofiles \
+ rm -f libbfd.a TAGS bfd.h stmp-bfd.h bfd-tmp.h ofiles stamp-ofiles \
elf32-target.h elf64-target.h $(SHLIB) $(SHLINK) \
piclist stamp-piclist
do_distclean: do_clean
- rm -f Makefile config.status config.cache config.h stamp-h
+ rm -f Makefile config.status config.cache config.h stamp-h bfd-in3.h
rm -rf pic stamp-picdir
do_maintainer_clean: do_distclean
rm -f $(srcdir)/bfd-in2.h $(srcdir)/libbfd.h $(srcdir)/libcoff.h
ts=lib`echo $(SHLIB) | sed -e 's/^lib//' | sed '$(program_transform_name)'`; \
ln -sf $$ts $(libdir)/$$tf; \
elif [ "$$f" = "$(SHLIB)" ]; then \
- $(INSTALL_PROGRAM) $$f $(libdir)/$$tf; \
+ @INSTALL_SHLIB@ \
else \
$(INSTALL_DATA) $$f $(libdir)/$$tf; \
$(RANLIB) $(libdir)/$$tf; \
$(BFD_H): stmp-bfd.h ; @true
-stmp-bfd.h : $(srcdir)/bfd-in2.h Makefile
- rm -f bfd.h-new
- sed -e 's/@WORDSIZE@/$(WORDSIZE)/' \
- -e "s/@VERSION@/`cat $(srcdir)/VERSION`/" \
- -e 's/@BFD_HOST_64BIT_LONG@/@HOST_64BIT_LONG@/' \
- < $(srcdir)/bfd-in2.h \
- > bfd.h-new
- $(srcdir)/../move-if-change bfd.h-new $(BFD_H)
+stmp-bfd.h: bfd-in3.h
+ rm -f bfd-tmp.h
+ cp bfd-in3.h bfd-tmp.h
+ $(srcdir)/../move-if-change bfd-tmp.h $(BFD_H)
+ rm -f bfd-tmp.h
touch stmp-bfd.h
+bfd-in3.h: bfd-in2.h config.status
+ CONFIG_FILES=bfd-in3.h:bfd-in2.h CONFIG_HEADERS= $(SHELL) ./config.status
+
# Could really use a "copy-if-change"...
headers:
(cd $(docdir); $(MAKE) protos $(FLAGS_TO_PASS))
(cd $(docdir); $(MAKE) bfd.ps $(FLAGS_TO_PASS))
+
+
$(OFILES): stamp-picdir
stamp-picdir:
$(INCDIR)/aout/stab.def libaout.h $(INCDIR)/bfdlink.h
aout-ns32k.o: aout-ns32k.c $(INCDIR)/aout/aout64.h \
ns32k.h libaout.h $(INCDIR)/bfdlink.h
+aout-sparcle.o: aout-sparcle.c $(INCDIR)/bfdlink.h libaout.h aoutf1.h \
+ $(INCDIR)/aout/sun4.h $(INCDIR)/aout/aout64.h $(INCDIR)/aout/stab_gnu.h \
+ $(INCDIR)/aout/stab.def $(INCDIR)/aout/ar.h aout-target.h
aout0.o: aout0.c aoutf1.h $(INCDIR)/aout/sun4.h libaout.h \
$(INCDIR)/bfdlink.h $(INCDIR)/aout/aout64.h $(INCDIR)/aout/stab_gnu.h \
$(INCDIR)/aout/stab.def $(INCDIR)/aout/ar.h aout-target.h
elf32-ppc.o: elf32-ppc.c $(INCDIR)/bfdlink.h elf-bfd.h \
$(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
$(INCDIR)/elf/ppc.h elf32-target.h
+elf32-sh.o: elf32-sh.c $(INCDIR)/bfdlink.h elf-bfd.h \
+ $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
+ elf32-target.h
elf32-sparc.o: elf32-sparc.c $(INCDIR)/bfdlink.h elf-bfd.h \
$(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
$(INCDIR)/elf/sparc.h elf32-target.h
$(INCDIR)/aout/stab_gnu.h $(INCDIR)/aout/stab.def $(INCDIR)/aout/ar.h \
aout-target.h
som.o: som.c
-i386aout.o: i386aout.c libaout.h $(INCDIR)/bfdlink.h \
- aout-target.h $(INCDIR)/aout/aout64.h $(INCDIR)/aout/stab_gnu.h \
+i386aout.o: i386aout.c $(INCDIR)/aout/aout64.h libaout.h \
+ $(INCDIR)/bfdlink.h aout-target.h $(INCDIR)/aout/stab_gnu.h \
$(INCDIR)/aout/stab.def $(INCDIR)/aout/ar.h
i386bsd.o: i386bsd.c libaout.h $(INCDIR)/bfdlink.h \
aout-target.h $(INCDIR)/aout/aout64.h $(INCDIR)/aout/stab_gnu.h \
demo64.o: demo64.c aoutf1.h $(INCDIR)/aout/sun4.h libaout.h \
$(INCDIR)/bfdlink.h $(INCDIR)/aout/aout64.h $(INCDIR)/aout/stab_gnu.h \
$(INCDIR)/aout/stab.def $(INCDIR)/aout/ar.h aout-target.h
+elf64-alpha.o: elf64-alpha.c elf-bfd.h $(INCDIR)/elf/common.h \
+ $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h \
+ $(INCDIR)/elf/alpha.h $(INCDIR)/coff/internal.h $(INCDIR)/coff/sym.h \
+ $(INCDIR)/coff/symconst.h $(INCDIR)/coff/ecoff.h $(INCDIR)/coff/alpha.h \
+ $(INCDIR)/aout/ar.h libcoff.h libecoff.h ecoffswap.h \
+ elf64-target.h
elf64-gen.o: elf64-gen.c elf-bfd.h $(INCDIR)/elf/common.h \
$(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h \
elf64-target.h
-elf64-mips.o: elf64-mips.c $(INCDIR)/bfdlink.h genlink.h \
- elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
+elf64-mips.o: elf64-mips.c $(INCDIR)/aout/ar.h $(INCDIR)/bfdlink.h \
+ genlink.h elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/elf/mips.h $(INCDIR)/coff/sym.h \
$(INCDIR)/coff/symconst.h $(INCDIR)/coff/internal.h \
$(INCDIR)/coff/ecoff.h $(INCDIR)/coff/alpha.h ecoffswap.h \
elf64.o: elf64.c elfcode.h $(INCDIR)/bfdlink.h elf-bfd.h \
$(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
elfcore.h elflink.h
+evax-alpha.o: evax-alpha.c $(INCDIR)/bfdlink.h evax.h
+evax-egsd.o: evax-egsd.c $(INCDIR)/bfdlink.h evax.h
+evax-etir.o: evax-etir.c $(INCDIR)/bfdlink.h evax.h
+evax-emh.o: evax-emh.c $(INCDIR)/bfdlink.h evax.h
+evax-misc.o: evax-misc.c $(INCDIR)/bfdlink.h evax.h
nlm32-alpha.o: nlm32-alpha.c $(INCDIR)/nlm/alpha-ext.h \
libnlm.h $(INCDIR)/nlm/common.h $(INCDIR)/nlm/internal.h \
$(INCDIR)/nlm/external.h nlmswap.h nlm-target.h
-cygnus-2.6.3
+cygnus-2.7.1
+/* Whether strstr must be declared even if <string.h> is included. */
+#undef NEED_DECLARATION_STRSTR
+
/* Whether malloc must be declared even if <stdlib.h> is included. */
#undef NEED_DECLARATION_MALLOC
+/* Whether realloc must be declared even if <stdlib.h> is included. */
+#undef NEED_DECLARATION_REALLOC
+
/* Whether free must be declared even if <stdlib.h> is included. */
#undef NEED_DECLARATION_FREE
@TOP@
AC_CACHE_VAL(bfd_cv_decl_needed_$1,
[AC_TRY_COMPILE([
#include <stdio.h>
+#ifdef HAVE_STRING_H
+#include <string.h>
+#else
+#ifdef HAVE_STRINGS_H
+#include <strings.h>
+#endif
+#endif
#ifdef HAVE_STDLIB_H
#include <stdlib.h>
#endif
bfd_default_set_arch_mach(abfd, DEFAULT_ARCH, 0);
#endif
+ /* The number of relocation records. This must be called after
+ SET_ARCH_MACH. It assumes that SET_ARCH_MACH will set
+ obj_reloc_entry_size correctly, if the reloc size is not
+ RELOC_STD_SIZE. */
+ obj_textsec (abfd)->reloc_count =
+ execp->a_trsize / obj_reloc_entry_size (abfd);
+ obj_datasec (abfd)->reloc_count =
+ execp->a_drsize / obj_reloc_entry_size (abfd);
+
/* Now that we know the architecture, set the alignments of the
sections. This is normally done by NAME(aout,new_section_hook),
but when the initial sections were created the architecture had
/* A.out "format 1" file handling code for BFD.
- Copyright 1990, 1991, 1992, 1993 Free Software Foundation, Inc.
+ Copyright 1990, 1991, 1992, 1993, 1996 Free Software Foundation, Inc.
Written by Cygnus Support.
This file is part of BFD, the Binary File Descriptor library.
#define MY_write_object_contents NAME(aout,sunos4_write_object_contents)
#define MY_backend_data &sunos4_aout_backend
+#ifndef TARGET_IS_LITTLE_ENDIAN_P
#define TARGET_IS_BIG_ENDIAN_P
+#endif
#include "aout-target.h"
execp = abfd->tdata.aout_data->a.hdr;
/* Set the file flags */
- abfd->flags = NO_FLAGS;
+ abfd->flags = BFD_NO_FLAGS;
if (execp->a_drsize || execp->a_trsize)
abfd->flags |= HAS_RELOC;
/* Setting of EXEC_P has been deferred to the bottom of this function */
aout_symbol_type *q = (aout_symbol_type *)(*p);
next:
switch (q->type){
+ case N_TEXT:
+ /* If this looks like a file name symbol, and it comes after
+ the line number we have found so far, but before the
+ offset, then we have probably not found the right line
+ number. */
+ if (q->symbol.value <= offset
+ && ((q->symbol.value > low_line_vma
+ && (line_file_name != NULL
+ || *line_ptr != 0))
+ || (q->symbol.value > low_func_vma
+ && func != NULL)))
+ {
+ const char *symname;
+
+ symname = q->symbol.name;
+ if (strcmp (symname + strlen (symname) - 2, ".o") == 0)
+ {
+ if (q->symbol.value > low_line_vma)
+ {
+ *line_ptr = 0;
+ line_file_name = NULL;
+ }
+ if (q->symbol.value > low_func_vma)
+ func = NULL;
+ }
+ }
+ break;
+
case N_SO:
+ /* If this symbol is less than the offset, but greater than
+ the line number we have found so far, then we have not
+ found the right line number. */
+ if (q->symbol.value <= offset)
+ {
+ if (q->symbol.value > low_line_vma)
+ {
+ *line_ptr = 0;
+ line_file_name = NULL;
+ }
+ if (q->symbol.value > low_func_vma)
+ func = NULL;
+ }
+
main_file_name = current_file_name = q->symbol.name;
/* Look ahead to next symbol to check if that too is an N_SO. */
p++;
return do_slurp_bsd_armap (abfd);
else if (!strncmp (nextname, "/ ", 16))
return do_slurp_coff_armap (abfd);
+ else if (!strncmp (nextname, "/SYM64/ ", 16))
+ {
+ /* Irix 6 archive--must be recognized by code in elf64-mips.c. */
+ bfd_set_error (bfd_error_wrong_format);
+ return false;
+ }
bfd_has_map (abfd) = false;
return true;
bfd_ardata (arch)->armap_datepos = (SARMAG
+ offsetof (struct ar_hdr, ar_date[0]));
sprintf (hdr.ar_date, "%ld", bfd_ardata (arch)->armap_timestamp);
+#ifndef _WIN32
sprintf (hdr.ar_uid, "%ld", (long) getuid ());
sprintf (hdr.ar_gid, "%ld", (long) getgid ());
+#else
+ sprintf (hdr.ar_uid, "%ld", (long) 666);
+ sprintf (hdr.ar_gid, "%ld", (long) 42);
+#endif
sprintf (hdr.ar_size, "%-10d", (int) mapsize);
strncpy (hdr.ar_fmag, ARFMAG, 2);
for (i = 0; i < sizeof (struct ar_hdr); i++)
. ((mach) >= bfd_mach_sparc_v8plus && (mach) <= bfd_mach_sparc_v9a)
. bfd_arch_mips, {* MIPS Rxxxx *}
. bfd_arch_i386, {* Intel 386 *}
+.#define bfd_mach_i386_i386 0
+.#define bfd_mach_i386_i8086 1
. bfd_arch_we32k, {* AT&T WE32xxx *}
. bfd_arch_tahoe, {* CCI/Harris Tahoe *}
. bfd_arch_i860, {* Intel 860 *}
. bfd_arch_h8300, {* Hitachi H8/300 *}
.#define bfd_mach_h8300 1
.#define bfd_mach_h8300h 2
+.#define bfd_mach_h8300s 3
. bfd_arch_powerpc, {* PowerPC *}
. bfd_arch_rs6000, {* IBM RS/6000 *}
. bfd_arch_hppa, {* HP PA RISC *}
/* These two lines get substitutions done by commands in Makefile.in. */
#define BFD_VERSION "@VERSION@"
-#define BFD_ARCH_SIZE @WORDSIZE@
+#define BFD_ARCH_SIZE @wordsize@
#define BFD_HOST_64BIT_LONG @BFD_HOST_64BIT_LONG@
+#if @BFD_HOST_64_BIT_DEFINED@
+#define BFD_HOST_64_BIT @BFD_HOST_64_BIT@
+#define BFD_HOST_U_64_BIT @BFD_HOST_U_64_BIT@
+#endif
#if BFD_ARCH_SIZE >= 64
#define BFD64
/* Support for different sizes of target format ints and addresses.
If the type `long' is at least 64 bits, BFD_HOST_64BIT_LONG will be
set to 1 above. Otherwise, if gcc is being used, this code will
- use gcc's "long long" type. Otherwise, the compilation will fail
- if 64-bit targets are requested. */
+ use gcc's "long long" type. Otherwise, BFD_HOST_64_BIT must be
+ defined above. */
#ifdef BFD64
#ifndef BFD_HOST_64_BIT
#if BFD_HOST_64BIT_LONG
#define BFD_HOST_64_BIT long
+#define BFD_HOST_U_64_BIT unsigned long
#else
#ifdef __GNUC__
#define BFD_HOST_64_BIT long long
+#define BFD_HOST_U_64_BIT unsigned long long
#else /* ! defined (__GNUC__) */
#error No 64 bit integer type available
#endif /* ! defined (__GNUC__) */
#endif /* ! BFD_HOST_64BIT_LONG */
#endif /* ! defined (BFD_HOST_64_BIT) */
-typedef unsigned BFD_HOST_64_BIT bfd_vma;
+typedef BFD_HOST_U_64_BIT bfd_vma;
typedef BFD_HOST_64_BIT bfd_signed_vma;
-typedef unsigned BFD_HOST_64_BIT bfd_size_type;
-typedef unsigned BFD_HOST_64_BIT symvalue;
+typedef BFD_HOST_U_64_BIT bfd_size_type;
+typedef BFD_HOST_U_64_BIT symvalue;
#ifndef fprintf_vma
#if BFD_HOST_64BIT_LONG
to another, and are not necessarily correct). */
/* No flags. */
-#define NO_FLAGS 0x00
+#define BFD_NO_FLAGS 0x00
/* BFD contains relocation entries. */
#define HAS_RELOC 0x01
/* These two lines get substitutions done by commands in Makefile.in. */
#define BFD_VERSION "@VERSION@"
-#define BFD_ARCH_SIZE @WORDSIZE@
+#define BFD_ARCH_SIZE @wordsize@
#define BFD_HOST_64BIT_LONG @BFD_HOST_64BIT_LONG@
+#if @BFD_HOST_64_BIT_DEFINED@
+#define BFD_HOST_64_BIT @BFD_HOST_64_BIT@
+#define BFD_HOST_U_64_BIT @BFD_HOST_U_64_BIT@
+#endif
#if BFD_ARCH_SIZE >= 64
#define BFD64
/* Support for different sizes of target format ints and addresses.
If the type `long' is at least 64 bits, BFD_HOST_64BIT_LONG will be
set to 1 above. Otherwise, if gcc is being used, this code will
- use gcc's "long long" type. Otherwise, the compilation will fail
- if 64-bit targets are requested. */
+ use gcc's "long long" type. Otherwise, BFD_HOST_64_BIT must be
+ defined above. */
#ifdef BFD64
#ifndef BFD_HOST_64_BIT
#if BFD_HOST_64BIT_LONG
#define BFD_HOST_64_BIT long
+#define BFD_HOST_U_64_BIT unsigned long
#else
#ifdef __GNUC__
#define BFD_HOST_64_BIT long long
+#define BFD_HOST_U_64_BIT unsigned long long
#else /* ! defined (__GNUC__) */
#error No 64 bit integer type available
#endif /* ! defined (__GNUC__) */
#endif /* ! BFD_HOST_64BIT_LONG */
#endif /* ! defined (BFD_HOST_64_BIT) */
-typedef unsigned BFD_HOST_64_BIT bfd_vma;
+typedef BFD_HOST_U_64_BIT bfd_vma;
typedef BFD_HOST_64_BIT bfd_signed_vma;
-typedef unsigned BFD_HOST_64_BIT bfd_size_type;
-typedef unsigned BFD_HOST_64_BIT symvalue;
+typedef BFD_HOST_U_64_BIT bfd_size_type;
+typedef BFD_HOST_U_64_BIT symvalue;
#ifndef fprintf_vma
#if BFD_HOST_64BIT_LONG
to another, and are not necessarily correct). */
/* No flags. */
-#define NO_FLAGS 0x00
+#define BFD_NO_FLAGS 0x00
/* BFD contains relocation entries. */
#define HAS_RELOC 0x01
((mach) >= bfd_mach_sparc_v8plus && (mach) <= bfd_mach_sparc_v9a)
bfd_arch_mips, /* MIPS Rxxxx */
bfd_arch_i386, /* Intel 386 */
+#define bfd_mach_i386_i386 0
+#define bfd_mach_i386_i8086 1
bfd_arch_we32k, /* AT&T WE32xxx */
bfd_arch_tahoe, /* CCI/Harris Tahoe */
bfd_arch_i860, /* Intel 860 */
bfd_arch_h8300, /* Hitachi H8/300 */
#define bfd_mach_h8300 1
#define bfd_mach_h8300h 2
+#define bfd_mach_h8300s 3
bfd_arch_powerpc, /* PowerPC */
bfd_arch_rs6000, /* IBM RS/6000 */
bfd_arch_hppa, /* HP PA RISC */
BFD_RELOC_SPARC_6,
BFD_RELOC_SPARC_5,
-/* Alpha ECOFF relocations. Some of these treat the symbol or "addend"
-in some special way.
+/* Alpha ECOFF and ELF relocations. Some of these treat the symbol or
+"addend" in some special way.
For GPDISP_HI16 ("gpdisp") relocations, the symbol is ignored when
writing; when reading, it will be the absolute section symbol. The
addend is the displacement in bytes of the "lda" instruction from
reading, for convenience. */
BFD_RELOC_ALPHA_GPDISP_LO16,
+/* The ELF GPDISP relocation is exactly the same as the GPDISP_HI16
+relocation except that there is no accompanying GPDISP_LO16
+relocation. */
+ BFD_RELOC_ALPHA_GPDISP,
+
/* The Alpha LITERAL/LITUSE relocs are produced by a symbol reference;
the assembler turns it into a LDQ instruction to load the address of
the symbol, and then fills in a register in the real instruction.
prediction logic which may be provided on some processors. */
BFD_RELOC_ALPHA_HINT,
+/* The LINKAGE relocation outputs a linkage pair in the object file,
+which is filled by the linker. */
+ BFD_RELOC_ALPHA_LINKAGE,
+
/* Bits 27..2 of the relocation address shifted right 2 bits;
simple reloc otherwise. */
BFD_RELOC_MIPS_JMP,
BFD_RELOC_ARM_LDR_IMM,
BFD_RELOC_ARM_LITERAL,
BFD_RELOC_ARM_IN_POOL,
+ BFD_RELOC_ARM_OFFSET_IMM8,
+ BFD_RELOC_ARM_HWLITERAL,
+ BFD_RELOC_ARM_THUMB_ADD,
+ BFD_RELOC_ARM_THUMB_IMM,
+ BFD_RELOC_ARM_THUMB_SHIFT,
+ BFD_RELOC_ARM_THUMB_OFFSET,
+
+/* Hitachi SH relocs. Not all of these appear in object files. */
+ BFD_RELOC_SH_PCDISP8BY2,
+ BFD_RELOC_SH_PCDISP12BY2,
+ BFD_RELOC_SH_IMM4,
+ BFD_RELOC_SH_IMM4BY2,
+ BFD_RELOC_SH_IMM4BY4,
+ BFD_RELOC_SH_IMM8,
+ BFD_RELOC_SH_IMM8BY2,
+ BFD_RELOC_SH_IMM8BY4,
+ BFD_RELOC_SH_PCRELIMM8BY2,
+ BFD_RELOC_SH_PCRELIMM8BY4,
+ BFD_RELOC_SH_SWITCH16,
+ BFD_RELOC_SH_SWITCH32,
+ BFD_RELOC_SH_USES,
+ BFD_RELOC_SH_COUNT,
+ BFD_RELOC_SH_ALIGN,
+ BFD_RELOC_SH_CODE,
+ BFD_RELOC_SH_DATA,
+ BFD_RELOC_SH_LABEL,
+
+
+
BFD_RELOC_UNUSED };
typedef enum bfd_reloc_code_real bfd_reloc_code_real_type;
reloc_howto_type *
bfd_target_som_flavour,
bfd_target_os9k_flavour,
bfd_target_versados_flavour,
- bfd_target_msdos_flavour
+ bfd_target_msdos_flavour,
+ bfd_target_evax_flavour
};
enum bfd_endian { BFD_ENDIAN_BIG, BFD_ENDIAN_LITTLE, BFD_ENDIAN_UNKNOWN };
bfd_vma low;
asection *s;
- /* The lowest section VMA sets the virtual address of the start
- of the file. We use the set the file position of all the
+ /* The lowest section LMA sets the virtual address of the start
+ of the file. We use this to set the file position of all the
sections. */
- low = abfd->sections->vma;
+ low = abfd->sections->lma;
for (s = abfd->sections->next; s != NULL; s = s->next)
- if (s->vma < low)
- low = s->vma;
+ if ((s->flags & SEC_HAS_CONTENTS) != 0
+ && s->lma < low)
+ low = s->lma;
for (s = abfd->sections; s != NULL; s = s->next)
- s->filepos = s->vma - low;
+ s->filepos = s->lma - low;
abfd->output_has_begun = true;
}
case ALPHA_R_SREL16:
case ALPHA_R_SREL32:
case ALPHA_R_SREL64:
- /* The PC relative relocs do not seem to use the section VMA as
- a negative addend. */
- rptr->addend = 0;
+ /* This relocs appear to be fully resolved when they are against
+ internal symbols. Against external symbols, BRADDR at least
+ appears to be resolved against the next instruction. */
+ if (! intern->r_extern)
+ rptr->addend = 0;
+ else
+ rptr->addend = - (intern->r_vaddr + 4);
break;
case ALPHA_R_GPREL32:
case ALPHA_R_REFLONG:
case ALPHA_R_REFQUAD:
- case ALPHA_R_BRADDR:
case ALPHA_R_HINT:
+ relocatep = true;
+ break;
+
+ case ALPHA_R_BRADDR:
case ALPHA_R_SREL16:
case ALPHA_R_SREL32:
case ALPHA_R_SREL64:
+ if (r_extern)
+ addend += - (r_vaddr + 4);
relocatep = true;
break;
but it's not easily available here. */
if (bfd_get_mach (table->abfd) == bfd_mach_h8300)
table->offset += 2;
- else if (bfd_get_mach (table->abfd) == bfd_mach_h8300h)
+ else if (bfd_get_mach (table->abfd) == bfd_mach_h8300h
+ || bfd_get_mach (table->abfd) == bfd_mach_h8300s)
table->offset += 4;
else
return NULL;
HOWTO (R_MOVL2, 0, 1, 16, false, 0, complain_overflow_bitfield, special, "32/24 relaxed move", false, 0x0000ffff, 0x0000ffff, false),
+ HOWTO (R_BCC_INV, 0, 0, 8, true, 0, complain_overflow_signed, special, "DISP8 inverted", false, 0x000000ff, 0x000000ff, true),
+
+ HOWTO (R_JMP_DEL, 0, 0, 8, true, 0, complain_overflow_signed, special, "Deleted jump", false, 0x000000ff, 0x000000ff, true),
};
#define SELECT_RELOC(x,howto) \
{ x.r_type = select_reloc(howto); }
-#define BADMAG(x) (H8300BADMAG(x)&& H8300HBADMAG(x))
+#define BADMAG(x) (H8300BADMAG(x) && H8300HBADMAG(x) && H8300SBADMAG(x))
#define H8300 1 /* Customize coffcode.h */
#define __A_MAGIC_SET__
case R_MOVL2:
internal->howto = howto_table + 17;
break;
+ case R_BCC_INV:
+ internal->howto = howto_table + 18;
+ break;
+ case R_JMP_DEL:
+ internal->howto = howto_table + 19;
+ break;
default:
abort ();
break;
/* relent->section = 0;*/
}
+static boolean
+h8300_symbol_address_p (abfd, input_section, address)
+ bfd *abfd;
+ asection *input_section;
+ bfd_vma address;
+{
+ asymbol **s;
+
+ s = _bfd_generic_link_get_symbols (abfd);
+ BFD_ASSERT (s != (asymbol **) NULL);
+
+ /* Search all the symbols for one in INPUT_SECTION with
+ address ADDRESS. */
+ while (*s)
+ {
+ asymbol *p = *s;
+ if (p->section == input_section
+ && (input_section->output_section->vma
+ + input_section->output_offset
+ + p->value) == address)
+ return true;
+ s++;
+ }
+ return false;
+}
+
+
/* If RELOC represents a relaxable instruction/reloc, change it into
the relaxed reloc, notify the linker that symbol addresses
have changed (bfd_perform_slip) and return how much the current
bfd_vma value;
bfd_vma dot;
bfd_vma gap;
+ static asection *last_input_section = NULL;
+ static arelent *last_reloc = NULL;
/* The address of the thing to be relocated will have moved back by
the size of the shrink - but we don't change reloc->address here,
uncooked section. */
bfd_vma address = reloc->address - shrink;
+ if (input_section != last_input_section)
+ last_reloc = NULL;
+
/* Only examine the relocs which might be relaxable. */
switch (reloc->howto->type)
{
/* Get the address of the next instruction (not the reloc). */
dot = (input_section->output_section->vma
- + input_section->output_offset + address + 2);
+ + input_section->output_offset + address);
+
+ /* Adjust for R_JMP1 vs R_JMPL1. */
+ dot += (reloc->howto->type == R_JMP1 ? 1 : 2);
/* Compute the distance from this insn to the branch target. */
gap = value - dot;
- /* If the distance is within -128..+126 inclusive, then we can relax
- this jump. */
- if ((int)gap >= -128 && (int)gap <= 126 )
+ /* If the distance is within -128..+128 inclusive, then we can relax
+ this jump. +128 is valid since the target will move two bytes
+ closer if we do relax this branch. */
+ if ((int)gap >= -128 && (int)gap <= 128 )
{
+
+ /* It's possible we may be able to eliminate this branch entirely;
+ if the previous instruction is a branch around this instruction,
+ and there's no label at this instruction, then we can reverse
+ the condition on the previous branch and eliminate this jump.
+
+ original: new:
+ bCC lab1 bCC' lab2
+ jmp lab2
+ lab1: lab1:
+
+ This saves 4 bytes instead of two, and should be relatively
+ common. */
+
+ if (gap <= 126
+ && last_reloc
+ && last_reloc->howto->type == R_PCRBYTE)
+ {
+ bfd_vma last_value;
+ last_value = bfd_coff_reloc16_get_value (last_reloc, link_info,
+ input_section) + 1;
+
+ if (last_value == dot + 2
+ && last_reloc->address + 1 == reloc->address
+ && ! h8300_symbol_address_p (abfd, input_section, dot - 2))
+ {
+ reloc->howto = howto_table + 19;
+ last_reloc->howto = howto_table + 18;
+ last_reloc->sym_ptr_ptr = reloc->sym_ptr_ptr;
+ last_reloc->addend = reloc->addend;
+ shrink += 4;
+ bfd_perform_slip (abfd, 4, input_section, address);
+ break;
+ }
+ }
+
/* Change the reloc type. */
reloc->howto = reloc->howto + 1;
/* This shrinks this section by two bytes. */
- shrink +=2 ;
+ shrink += 2;
bfd_perform_slip(abfd, 2, input_section, address);
}
break;
/* This is the 16 bit pc-relative branch which could become an 8 bit
pc-relative branch. */
case R_PCRWORD:
- /* Get the address of the target of this branch. */
- value = bfd_coff_reloc16_get_value(reloc, link_info, input_section);
+ /* Get the address of the target of this branch, add one to the value
+ because the addend field in PCrel jumps is off by -1. */
+ value = bfd_coff_reloc16_get_value(reloc, link_info, input_section) + 1;
- /* Get the address of the next instruction. */
+ /* Get the address of the next instruction if we were to relax. */
dot = input_section->output_section->vma +
- input_section->output_offset + address - 1;
+ input_section->output_offset + address;
/* Compute the distance from this insn to the branch target. */
gap = value - dot;
- /* If the distance is within -128..+126 inclusive, then we can relax
- this jump. */
- if ((int)gap >= -128 && (int)gap <= 126 )
+ /* If the distance is within -128..+128 inclusive, then we can relax
+ this jump. +128 is valid since the target will move two bytes
+ closer if we do relax this branch. */
+ if ((int)gap >= -128 && (int)gap <= 128 )
{
/* Change the reloc type. */
reloc->howto = howto_table + 15;
/* This shrinks this section by two bytes. */
- shrink +=2 ;
+ shrink += 2;
bfd_perform_slip(abfd, 2, input_section, address);
}
break;
if ((bfd_get_mach (abfd) == bfd_mach_h8300
&& value >= 0xff00
&& value <= 0xffff)
- || (bfd_get_mach (abfd) == bfd_mach_h8300h
+ || ((bfd_get_mach (abfd) == bfd_mach_h8300h
+ || bfd_get_mach (abfd) == bfd_mach_h8300s)
&& value >= 0xffff00
&& value <= 0xffffff))
{
/* The address is in 0xffff00..0xffffff inclusive on the h8300h,
then we can relax this mov.b */
- if (bfd_get_mach (abfd) == bfd_mach_h8300h
+ if ((bfd_get_mach (abfd) == bfd_mach_h8300h
+ || bfd_get_mach (abfd) == bfd_mach_h8300s)
&& value >= 0xffff00
&& value <= 0xffffff)
{
reloc->howto = howto_table + 17;
/* This shrinks this section by two bytes. */
- shrink +=2 ;
+ shrink += 2;
bfd_perform_slip(abfd, 2, input_section, address);
}
break;
break;
}
+ last_reloc = reloc;
+ last_input_section = input_section;
return shrink;
}
src/dst address appropriately. */
bfd_put_16 (abfd, gap, data + dst_address);
- dst_address+=2;
- src_address+=2;
+ dst_address += 2;
+ src_address += 2;
/* All done. */
break;
/* Everything looks OK. Apply the relocation and update the
src/dst address appropriately. */
- bfd_put_8 (abfd, gap, data + dst_address);
+ bfd_put_8 (abfd, value & 0xff, data + dst_address);
dst_address += 1;
src_address += 1;
}
/* Fix the opcode. For all the move insns, we simply
need to turn off bit 0x20 in the previous byte. */
data[dst_address - 1] &= ~0x20;
- dst_address+=2;
- src_address+=4;
+ dst_address += 2;
+ src_address += 4;
}
else
{
src_address += 4;
break;
+ case R_BCC_INV:
+ /* Get the address of the target of this branch. */
+ value = bfd_coff_reloc16_get_value(reloc, link_info, input_section);
+
+ dot = (link_order->offset
+ + dst_address
+ + link_order->u.indirect.section->output_section->vma) + 1;
+
+ gap = value - dot;
+
+ /* Sanity check. */
+ if (gap < -128 || gap > 126)
+ {
+ if (! ((*link_info->callbacks->reloc_overflow)
+ (link_info, bfd_asymbol_name (*reloc->sym_ptr_ptr),
+ reloc->howto->name, reloc->addend, input_section->owner,
+ input_section, reloc->address)))
+ abort ();
+ }
+
+ /* Everything looks OK. Fix the condition in the instruction, apply
+ the relocation, and update the src/dst address appropriately. */
+
+ bfd_put_8 (abfd, bfd_get_8 (abfd, data + dst_address - 1) ^ 1,
+ data + dst_address - 1);
+ bfd_put_8 (abfd, gap, data + dst_address);
+ dst_address++;
+ src_address++;
+
+ /* All done. */
+ break;
+
+ case R_JMP_DEL:
+ src_address += 4;
+ break;
+
/* An 8bit memory indirect instruction (jmp/jsr).
There's several things that need to be done to handle
address in the function vector table. */
asymbol *symbol;
bfd_vma value;
- char *name;
+ const char *name;
struct funcvec_hash_entry *h;
asection *vectors_sec = h8300_coff_hash_table (link_info)->vectors_sec;
link_info,
input_section),
vectors_sec->contents + h->offset);
- else if (bfd_get_mach (input_section->owner) == bfd_mach_h8300h)
+ else if (bfd_get_mach (input_section->owner) == bfd_mach_h8300h
+ || bfd_get_mach (input_section->owner) == bfd_mach_h8300s)
bfd_put_32 (abfd,
bfd_coff_reloc16_get_value (reloc,
link_info,
{
arelent *reloc = relocs[i];
asymbol *symbol = *(reloc->sym_ptr_ptr);
- char *name;
+ const char *name;
/* We've got an indirect reloc. See if we need to add it
to the function vector table. At this point, we have
takes 2 bytes on the h8300 and 4 bytes on the h8300h. */
if (bfd_get_mach (abfd) == bfd_mach_h8300)
h8300_coff_hash_table (info)->vectors_sec->_raw_size += 2;
- else if (bfd_get_mach (abfd) == bfd_mach_h8300h)
+ else if (bfd_get_mach (abfd) == bfd_mach_h8300h
+ || bfd_get_mach (abfd) == bfd_mach_h8300s)
h8300_coff_hash_table (info)->vectors_sec->_raw_size += 4;
}
}
REFLO reloc, because there is a carry from the REFLO to the REFHI.
Here we just save the information we need; we do the actual
relocation when we see the REFLO. MIPS ECOFF requires that the
- REFLO immediately follow the REFHI, so this ought to work. */
+ REFLO immediately follow the REFHI. As a GNU extension, we permit
+ an arbitrary number of HI relocs to be associated with a single LO
+ reloc. This extension permits gcc to output the HI and LO relocs
+ itself. */
-static bfd_byte *mips_refhi_addr;
-static bfd_vma mips_refhi_addend;
+struct mips_hi
+{
+ struct mips_hi *next;
+ bfd_byte *addr;
+ bfd_vma addend;
+};
+
+/* FIXME: This should not be a static variable. */
+
+static struct mips_hi *mips_refhi_list;
static bfd_reloc_status_type
mips_refhi_reloc (abfd,
{
bfd_reloc_status_type ret;
bfd_vma relocation;
+ struct mips_hi *n;
/* If we're relocating, and this an external symbol, we don't want
to change anything. */
return bfd_reloc_outofrange;
/* Save the information, and let REFLO do the actual relocation. */
- mips_refhi_addr = (bfd_byte *) data + reloc_entry->address;
- mips_refhi_addend = relocation;
+ n = (struct mips_hi *) bfd_malloc (sizeof *n);
+ if (n == NULL)
+ return bfd_reloc_outofrange;
+ n->addr = (bfd_byte *) data + reloc_entry->address;
+ n->addend = relocation;
+ n->next = mips_refhi_list;
+ mips_refhi_list = n;
if (output_bfd != (bfd *) NULL)
reloc_entry->address += input_section->output_offset;
bfd *output_bfd;
char **error_message;
{
- if (mips_refhi_addr != (bfd_byte *) NULL)
+ if (mips_refhi_list != NULL)
{
- unsigned long insn;
- unsigned long val;
- unsigned long vallo;
-
- /* Do the REFHI relocation. Note that we actually don't need to
- know anything about the REFLO itself, except where to find
- the low 16 bits of the addend needed by the REFHI. */
- insn = bfd_get_32 (abfd, mips_refhi_addr);
- vallo = (bfd_get_32 (abfd, (bfd_byte *) data + reloc_entry->address)
- & 0xffff);
- val = ((insn & 0xffff) << 16) + vallo;
- val += mips_refhi_addend;
-
- /* The low order 16 bits are always treated as a signed value.
- Therefore, a negative value in the low order bits requires an
- adjustment in the high order bits. We need to make this
- adjustment in two ways: once for the bits we took from the
- data, and once for the bits we are putting back in to the
- data. */
- if ((vallo & 0x8000) != 0)
- val -= 0x10000;
- if ((val & 0x8000) != 0)
- val += 0x10000;
-
- insn = (insn &~ 0xffff) | ((val >> 16) & 0xffff);
- bfd_put_32 (abfd, insn, mips_refhi_addr);
-
- mips_refhi_addr = (bfd_byte *) NULL;
+ struct mips_hi *l;
+
+ l = mips_refhi_list;
+ while (l != NULL)
+ {
+ unsigned long insn;
+ unsigned long val;
+ unsigned long vallo;
+ struct mips_hi *next;
+
+ /* Do the REFHI relocation. Note that we actually don't
+ need to know anything about the REFLO itself, except
+ where to find the low 16 bits of the addend needed by the
+ REFHI. */
+ insn = bfd_get_32 (abfd, l->addr);
+ vallo = (bfd_get_32 (abfd, (bfd_byte *) data + reloc_entry->address)
+ & 0xffff);
+ val = ((insn & 0xffff) << 16) + vallo;
+ val += l->addend;
+
+ /* The low order 16 bits are always treated as a signed
+ value. Therefore, a negative value in the low order bits
+ requires an adjustment in the high order bits. We need
+ to make this adjustment in two ways: once for the bits we
+ took from the data, and once for the bits we are putting
+ back in to the data. */
+ if ((vallo & 0x8000) != 0)
+ val -= 0x10000;
+ if ((val & 0x8000) != 0)
+ val += 0x10000;
+
+ insn = (insn &~ 0xffff) | ((val >> 16) & 0xffff);
+ bfd_put_32 (abfd, insn, l->addr);
+
+ next = l->next;
+ free (l);
+ l = next;
+ }
+
+ mips_refhi_list = NULL;
}
/* Now do the REFLO reloc in the usual way. */
are Cygnus extensions used when generating position independent
code for embedded systems. */
-static bfd_byte *mips_relhi_addr;
-static bfd_vma mips_relhi_addend;
+/* FIXME: This should not be a static variable. */
+
+static struct mips_hi *mips_relhi_list;
static bfd_reloc_status_type
mips_relhi_reloc (abfd,
{
bfd_reloc_status_type ret;
bfd_vma relocation;
+ struct mips_hi *n;
/* If this is a reloc against a section symbol, then it is correct
in the object file. The only time we want to change this case is
return bfd_reloc_outofrange;
/* Save the information, and let RELLO do the actual relocation. */
- mips_relhi_addr = (bfd_byte *) data + reloc_entry->address;
- mips_relhi_addend = relocation;
+ n = (struct mips_hi *) bfd_malloc (sizeof *n);
+ if (n == NULL)
+ return bfd_reloc_outofrange;
+ n->addr = (bfd_byte *) data + reloc_entry->address;
+ n->addend = relocation;
+ n->next = mips_relhi_list;
+ mips_relhi_list = n;
if (output_bfd != (bfd *) NULL)
reloc_entry->address += input_section->output_offset;
bfd *output_bfd;
char **error_message;
{
- if (mips_relhi_addr != (bfd_byte *) NULL)
+ if (mips_relhi_list != NULL)
{
- unsigned long insn;
- unsigned long val;
- unsigned long vallo;
-
- /* Do the RELHI relocation. Note that we actually don't need to
- know anything about the RELLO itself, except where to find
- the low 16 bits of the addend needed by the RELHI. */
- insn = bfd_get_32 (abfd, mips_relhi_addr);
- vallo = (bfd_get_32 (abfd, (bfd_byte *) data + reloc_entry->address)
- & 0xffff);
- val = ((insn & 0xffff) << 16) + vallo;
- val += mips_relhi_addend;
-
- /* If the symbol is defined, make val PC relative. If the
- symbol is not defined we don't want to do this, because we
- don't want the value in the object file to incorporate the
- address of the reloc. */
- if (! bfd_is_und_section (bfd_get_section (symbol))
- && ! bfd_is_com_section (bfd_get_section (symbol)))
- val -= (input_section->output_section->vma
- + input_section->output_offset
- + reloc_entry->address);
-
- /* The low order 16 bits are always treated as a signed value.
- Therefore, a negative value in the low order bits requires an
- adjustment in the high order bits. We need to make this
- adjustment in two ways: once for the bits we took from the
- data, and once for the bits we are putting back in to the
- data. */
- if ((vallo & 0x8000) != 0)
- val -= 0x10000;
- if ((val & 0x8000) != 0)
- val += 0x10000;
-
- insn = (insn &~ 0xffff) | ((val >> 16) & 0xffff);
- bfd_put_32 (abfd, insn, mips_relhi_addr);
-
- mips_relhi_addr = (bfd_byte *) NULL;
+ struct mips_hi *l;
+
+ l = mips_relhi_list;
+ while (l != NULL)
+ {
+ unsigned long insn;
+ unsigned long val;
+ unsigned long vallo;
+ struct mips_hi *next;
+
+ /* Do the RELHI relocation. Note that we actually don't
+ need to know anything about the RELLO itself, except
+ where to find the low 16 bits of the addend needed by the
+ RELHI. */
+ insn = bfd_get_32 (abfd, l->addr);
+ vallo = (bfd_get_32 (abfd, (bfd_byte *) data + reloc_entry->address)
+ & 0xffff);
+ val = ((insn & 0xffff) << 16) + vallo;
+ val += l->addend;
+
+ /* If the symbol is defined, make val PC relative. If the
+ symbol is not defined we don't want to do this, because
+ we don't want the value in the object file to incorporate
+ the address of the reloc. */
+ if (! bfd_is_und_section (bfd_get_section (symbol))
+ && ! bfd_is_com_section (bfd_get_section (symbol)))
+ val -= (input_section->output_section->vma
+ + input_section->output_offset
+ + reloc_entry->address);
+
+ /* The low order 16 bits are always treated as a signed
+ value. Therefore, a negative value in the low order bits
+ requires an adjustment in the high order bits. We need
+ to make this adjustment in two ways: once for the bits we
+ took from the data, and once for the bits we are putting
+ back in to the data. */
+ if ((vallo & 0x8000) != 0)
+ val -= 0x10000;
+ if ((val & 0x8000) != 0)
+ val += 0x10000;
+
+ insn = (insn &~ 0xffff) | ((val >> 16) & 0xffff);
+ bfd_put_32 (abfd, insn, l->addr);
+
+ next = l->next;
+ free (l);
+ l = next;
+ }
+
+ mips_relhi_list = NULL;
}
/* If this is a reloc against a section symbol, then it is correct
for (i = 0; ext_rel < ext_rel_end; ext_rel++, i++)
{
struct internal_reloc int_rel;
+ boolean use_lo;
bfd_vma addend;
reloc_howto_type *howto;
struct ecoff_link_hash_entry *h = NULL;
if (int_rel.r_type == MIPS_R_REFHI
|| int_rel.r_type == MIPS_R_RELHI)
{
- BFD_ASSERT ((ext_rel + 1) < ext_rel_end);
- mips_ecoff_swap_reloc_in (input_bfd, (PTR) (ext_rel + 1),
- &lo_int_rel);
- BFD_ASSERT ((lo_int_rel.r_type
- == (int_rel.r_type == MIPS_R_REFHI
- ? MIPS_R_REFLO
- : MIPS_R_RELLO))
- && int_rel.r_extern == lo_int_rel.r_extern
- && int_rel.r_symndx == lo_int_rel.r_symndx);
- got_lo = true;
+ struct external_reloc *lo_ext_rel;
+
+ /* As a GNU extension, permit an arbitrary number of REFHI
+ or RELHI relocs before the REFLO or RELLO reloc. This
+ permits gcc to emit the HI and LO relocs itself. */
+ for (lo_ext_rel = ext_rel + 1;
+ lo_ext_rel < ext_rel_end;
+ lo_ext_rel++)
+ {
+ mips_ecoff_swap_reloc_in (input_bfd, (PTR) lo_ext_rel,
+ &lo_int_rel);
+ if (lo_int_rel.r_type != int_rel.r_type)
+ break;
+ }
+
+ if (lo_ext_rel < ext_rel_end
+ && (lo_int_rel.r_type
+ == (int_rel.r_type == MIPS_R_REFHI
+ ? MIPS_R_REFLO
+ : MIPS_R_RELLO))
+ && int_rel.r_extern == lo_int_rel.r_extern
+ && int_rel.r_symndx == lo_int_rel.r_symndx)
+ {
+ use_lo = true;
+ if (lo_ext_rel == ext_rel + 1)
+ got_lo = true;
+ }
}
howto = &mips_howto_table[int_rel.r_type];
being against a section, we must put a
special value into the r_offset field. This
value is the old addend. The r_offset for
- both the RELOHI and RELLO relocs are the
- same, and we set both when we see RELHI. */
+ both the RELHI and RELLO relocs are the same,
+ and we set both when we see RELHI. */
if (int_rel.r_type == MIPS_R_RELHI)
{
long addhi, addlo;
addhi -= 0x10000;
addhi <<= 16;
- addlo = bfd_get_32 (input_bfd,
- (contents
- + adjust
- + lo_int_rel.r_vaddr
- - input_section->vma));
- addlo &= 0xffff;
- if (addlo & 0x8000)
- addlo -= 0x10000;
+ if (! use_lo)
+ addlo = 0;
+ else
+ {
+ addlo = bfd_get_32 (input_bfd,
+ (contents
+ + adjust
+ + lo_int_rel.r_vaddr
+ - input_section->vma));
+ addlo &= 0xffff;
+ if (addlo & 0x8000)
+ addlo -= 0x10000;
+
+ lo_int_rel.r_offset = addhi + addlo;
+ }
int_rel.r_offset = addhi + addlo;
- lo_int_rel.r_offset = int_rel.r_offset;
}
}
- input_section->vma));
else
{
- mips_relocate_hi (&int_rel, &lo_int_rel,
+ mips_relocate_hi (&int_rel,
+ use_lo ? &lo_int_rel : NULL,
input_bfd, input_section, contents,
adjust, relocation,
int_rel.r_type == MIPS_R_RELHI);
adding in the start address. */
if (howto->pc_relative)
{
- if (int_rel.r_type != MIPS_R_RELHI)
+ if (int_rel.r_type != MIPS_R_RELHI || ! use_lo)
relocation += int_rel.r_vaddr + adjust;
else
relocation += lo_int_rel.r_vaddr + adjust;
addend);
else
{
- mips_relocate_hi (&int_rel, &lo_int_rel, input_bfd,
- input_section, contents, adjust,
+ mips_relocate_hi (&int_rel,
+ use_lo ? &lo_int_rel : NULL,
+ input_bfd, input_section, contents, adjust,
relocation,
int_rel.r_type == MIPS_R_RELHI);
r = bfd_reloc_ok;
#define MARK_AS_WRITTEN(x) ((x) |= 1)
#define MAKE_ADDR_AGAIN(x) ((x) &= ~1)
+
+/* Turn on this check if you suspect something amiss in the hash tables */
+#ifdef DEBUG_HASH
+
+/* Need a 7 char string for an eye catcher */
+#define EYE "krkjunk"
+
+#define HASH_CHECK_DCL char eye_catcher[8];
+#define HASH_CHECK_INIT(ret) strcpy(ret->eye_catcher, EYE)
+#define HASH_CHECK(addr) \
+ if (strcmp(addr->eye_catcher, EYE) != 0) \
+ { \
+ fprintf(stderr,\
+ "File %s, line %d, Hash check failure, bad eye %8s\n", \
+ __FILE__, __LINE__, addr->eye_catcher); \
+ abort(); \
+ }
+
+
+#else
+
+#define HASH_CHECK_DCL
+#define HASH_CHECK_INIT(ret)
+#define HASH_CHECK(addr)
+
+#endif
+
/* In order not to add an int to every hash table item for every coff
linker, we define our own hash table, derived from the coff one */
bfd_vma toc_offset; /* Our addition, as required */
int symbol_is_glue;
unsigned long int glue_insn;
- char eye_catcher[8];
+
+ HASH_CHECK_DCL
};
-/* Need a 7 char string for an eye catcher */
-#define EYE "krkjunk"
-
-#define CHECK_EYE(addr) \
- if (strcmp(addr, EYE) != 0) \
- { \
- fprintf(stderr,\
- "File %s, line %d, Hash check failure, bad eye %8s\n", \
- __FILE__, __LINE__, addr); \
- abort(); \
- }
/* PE linker hash table. */
SET_UNALLOCATED(ret->toc_offset);
ret->symbol_is_glue = 0;
ret->glue_insn = 0;
- strcpy(ret->eye_catcher, EYE);
+
+ HASH_CHECK_INIT(ret);
}
return (struct bfd_hash_entry *) ret;
\f
/* The nt loader points the toc register to &toc + 32768, in order to */
-/* use the complete range of a 16-bit displacement (I guess). We have */
-/* to adjust for this when we fix up loads displaced off the toc reg. */
+/* use the complete range of a 16-bit displacement. We have to adjust */
+/* for this when we fix up loads displaced off the toc reg. */
#define TOC_LOAD_ADJUSTMENT (-32768)
#define TOC_SECTION_NAME ".private.toc"
#ifdef COFF_IMAGE_WITH_PE
/* record a toc offset against a symbol */
-static int
+static boolean
ppc_record_toc_entry(abfd, info, sec, sym, toc_kind)
bfd *abfd;
struct bfd_link_info *info;
enum toc_type toc_kind;
{
struct ppc_coff_link_hash_entry *h;
- int ret_val;
const char *name;
int *local_syms;
h = (struct ppc_coff_link_hash_entry *) (obj_coff_sym_hashes (abfd)[sym]);
if (h != 0)
{
- CHECK_EYE(h->eye_catcher);
+ HASH_CHECK(h);
}
if (h == 0)
if (IS_UNALLOCATED(local_syms[sym]))
{
local_syms[sym] = global_toc_size;
- ret_val = global_toc_size;
global_toc_size += 4;
/* The size must fit in a 16bit displacment */
- if (global_toc_size >= 65535)
+ if (global_toc_size > 65535)
{
- fprintf(stderr,
- "Exceeded toc size of 65535\n");
- abort();
+ (*_bfd_error_handler) ("TOC overflow");
+ bfd_set_error (bfd_error_file_too_big);
+ return false;
}
-
-#ifdef TOC_DEBUG
- fprintf(stderr,
- "Setting toc_offset for local sym %d to %d\n",
- sym, ret_val);
-#endif
- }
- else
- {
- ret_val = local_syms[sym];
-#ifdef TOC_DEBUG
- fprintf(stderr,
- "toc_offset already set for local sym %d to %d\n",
- sym, ret_val);
-#endif
}
}
else
if (IS_UNALLOCATED(h->toc_offset))
{
h->toc_offset = global_toc_size;
- ret_val = global_toc_size;
global_toc_size += 4;
/* The size must fit in a 16bit displacment */
if (global_toc_size >= 65535)
{
- fprintf(stderr,
- "Exceeded toc size of 65535\n");
- abort();
- }
-
-#ifdef TOC_DEBUG
- fprintf(stderr,
- "Setting toc_offset for sym %d (%s) [h=%p] to %d\n",
- sym, name, h, ret_val);
-#endif
- }
- else
- {
- ret_val = h->toc_offset;
-#ifdef TOC_DEBUG
- fprintf(stderr,
- "toc_offset already set for sym %d (%s) [h=%p] to %d\n",
- sym, name, h, ret_val);
-#endif
- }
- }
-
- return ret_val;
-}
-
-#endif /* COFF_IMAGE_WITH_PE */
-
-#if 0
-
-/* FIXME: record a toc offset against a data-in-toc symbol */
-/* Now, there is currenly some confusion on what this means. In some
- compilers one sees the moral equivalent of:
- .tocd
- define some data
- .text
- refer to the data with a [tocv] qualifier
- In general, one sees something to indicate that a tocd has been
- seen, and that would trigger the allocation of data in toc. The IBM
- docs seem to suggest that anything with the TOCDEFN qualifier should
- never trigger storage allocation. However, in the kernel32.lib that
- we've been using for our test bed, there are a couple of variables
- referenced that fail that test.
-
- So it can't work that way.
-*/
-static int
-ppc_record_data_in_toc_entry(abfd, info, sec, sym, toc_kind)
- bfd *abfd;
- struct bfd_link_info *info;
- asection *sec;
- int sym;
- enum toc_type toc_kind;
-{
- struct ppc_coff_link_hash_entry *h = 0;
- int ret_val;
- const char *name;
-
- int *local_syms;
-
- h = (struct ppc_coff_link_hash_entry *) (obj_coff_sym_hashes (abfd)[sym]);
-
- if (h == 0)
- {
- local_syms = obj_coff_local_toc_table(abfd);
- if (local_syms == 0)
- {
- int i;
- /* allocate a table */
- local_syms =
- (int *) bfd_zalloc (abfd,
- obj_raw_syment_count(abfd) * sizeof(int));
- if (local_syms == 0)
- return false;
- obj_coff_local_toc_table(abfd) = local_syms;
- for (i = 0; i < obj_raw_syment_count(abfd); ++i)
- {
- SET_UNALLOCATED(local_syms[i]);
+ (*_bfd_error_handler) ("TOC overflow");
+ bfd_set_error (bfd_error_file_too_big);
+ return false;
}
}
-
- if (IS_UNALLOCATED(local_syms[sym]))
- {
- local_syms[sym] = global_toc_size;
- ret_val = global_toc_size;
- global_toc_size += 4;
-#ifdef TOC_DEBUG
- fprintf(stderr,
- "Setting data_in_toc_offset for local sym %d to %d\n",
- sym, ret_val);
-#endif
- }
- else
- {
- ret_val = local_syms[sym];
-#ifdef TOC_DEBUG
- fprintf(stderr,
- "data_in_toc_offset already set for local sym %d to %d\n",
- sym, ret_val);
-#endif
- }
- }
- else
- {
- CHECK_EYE(h->eye_catcher);
-
- name = h->root.root.root.string;
-
- /* check to see if there's a toc slot allocated. If not, do it
- here. It will be used in relocate_section */
- if (IS_UNALLOCATED(h->toc_offset))
- {
-#if 0
- h->toc_offset = global_toc_size;
-#endif
- ret_val = global_toc_size;
- /* We're allocating a chunk of the toc, as opposed to a slot */
- /* FIXME: alignment? */
-
- global_toc_size += 4;
-#ifdef TOC_DEBUG
- fprintf(stderr,
- "Setting data_in_toc_offset for sym %d (%s) [h=%p] to %d\n",
- sym, name, h, ret_val);
-#endif
- }
- else
- {
- ret_val = h->toc_offset;
-#ifdef TOC_DEBUG
- fprintf(stderr,
- "data_in_toc_offset already set for sym %d (%s) [h=%p] to %d\n",
- sym, name, h, ret_val);
-#endif
- }
}
- return ret_val;
+ return true;
}
-#endif /* 0 */
-
-#ifdef COFF_IMAGE_WITH_PE
-
/* record a toc offset against a symbol */
static void
ppc_mark_symbol_as_glue(abfd, sym, rel)
h = (struct ppc_coff_link_hash_entry *) (obj_coff_sym_hashes (abfd)[sym]);
- CHECK_EYE(h->eye_catcher);
+ HASH_CHECK(h);
h->symbol_is_glue = 1;
h->glue_insn = bfd_get_32 (abfd, (bfd_byte *) &rel->r_vaddr);
#endif /* COFF_IMAGE_WITH_PE */
\f
-#if 0
-
-/* Provided the symbol, returns the value reffed */
-static long get_symbol_value PARAMS ((asymbol *));
-
-static long
-get_symbol_value (symbol)
- asymbol *symbol;
-{
- long relocation = 0;
-
- if (bfd_is_com_section (symbol->section))
- {
- relocation = 0;
- }
- else
- {
- relocation = symbol->value +
- symbol->section->output_section->vma +
- symbol->section->output_offset;
- }
-
- return(relocation);
-}
-
-#endif /* 0 */
/* Return true if this relocation should
appear in the output .reloc section. */
unsigned short r_type;
unsigned long addr = reloc_entry->address ; /*+ input_section->vma*/
- fprintf(stderr, "pe_ppc_reloc (%s)\n", TARGET_LITTLE_NAME);
-
r_type = reloc_entry->howto->type;
if (output_bfd)
bfd_vma relocation;
reloc_howto_type *howto = 0;
-#ifdef DEBUG_RELOC
- fprintf(stderr,
- "pe_ppc_relocate_section (%s) for %s in bfd %s\n",
- TARGET_LITTLE_NAME,
- input_section->name,
- input_bfd->filename);
-
-#endif
-
/* If we are performing a relocateable link, we don't need to do a
thing. The caller will take care of adjusting the reloc
addresses and symbol indices. */
unsigned short r_type = EXTRACT_TYPE (rel->r_type);
unsigned short r_flags = EXTRACT_FLAGS(rel->r_type);
-#ifdef DEBUG_RELOC
- /* now examine flags */
- if (r_flags != 0)
- {
- fprintf (stderr, "Reloc with flags found!");
- if ( r_flags & IMAGE_REL_PPC_NEG )
- fprintf (stderr, " NEG");
- if ( r_flags & IMAGE_REL_PPC_BRTAKEN )
- fprintf (stderr, " BRTAKEN");
- if ( r_flags & IMAGE_REL_PPC_BRNTAKEN )
- fprintf (stderr, " BRNTAKEN");
- if ( r_flags & IMAGE_REL_PPC_TOCDEFN )
- fprintf (stderr, " TOCDEFN");
- fprintf(stderr, "\n");
- }
-#endif
-
symndx = rel->r_symndx;
loc = contents + rel->r_vaddr - input_section->vma;
(obj_coff_sym_hashes (input_bfd)[symndx]);
if (h != 0)
{
- CHECK_EYE(h->eye_catcher);
+ HASH_CHECK(h);
}
sym = syms + symndx;
}
+ if (r_type == IMAGE_REL_PPC_IMGLUE && h == 0)
+ {
+ /* An IMGLUE reloc must have a name. Something is very wrong. */
+ abort();
+ }
+
sec = NULL;
val = 0;
}
else
{
- CHECK_EYE(h->eye_catcher);
+ HASH_CHECK(h);
if (h->root.root.type == bfd_link_hash_defined
|| h->root.root.type == bfd_link_hash_defweak)
}
else
{
-fprintf(stderr,
- "missing %s\n",h->root.root.root.string);
if (! ((*info->callbacks->undefined_symbol)
(info, h->root.root.root.string, input_bfd, input_section,
rel->r_vaddr - input_section->vma)))
switch (r_type)
{
default:
- fprintf( stderr,
- "ERROR: during reloc processing -- unsupported reloc %s\n",
- howto->name);
+ (*_bfd_error_handler)
+ ("%s: unsupported relocation type 0x%02x",
+ bfd_get_filename (input_bfd), r_type);
bfd_set_error (bfd_error_bad_value);
- abort();
return false;
case IMAGE_REL_PPC_TOCREL16:
{
{
toc_section = bfd_get_section_by_name (bfd_of_toc_owner,
TOC_SECTION_NAME);
-#ifdef TOC_DEBUG
-
- fprintf(stderr,
- "BFD of toc owner %p (%s), section addr of %s %p\n",
- bfd_of_toc_owner, bfd_of_toc_owner->filename,
- TOC_SECTION_NAME, toc_section);
-#endif
if ( toc_section == NULL )
{
- fprintf(stderr, "No Toc section!\n");
+ /* There is no toc section. Something is very wrong. */
abort();
}
}
again.
*/
MAKE_ADDR_AGAIN(our_toc_offset);
-#ifdef TOC_DEBUG
-
- fprintf(stderr,
- "Not writing out toc_offset of %d for %s\n",
- our_toc_offset, name);
-#endif
}
else
{
/* write out the toc entry */
- record_toc(toc_section, our_toc_offset, priv, strdup(name));
-#ifdef TOC_DEBUG
- fprintf(stderr,
- "Writing out toc_offset "
- "toc_section (%p,%p)+%d val %d for %s\n",
- toc_section,
- toc_section->contents,
- our_toc_offset,
- val,
- name);
-#endif
+ record_toc(toc_section,
+ our_toc_offset,
+ priv,
+ strdup(name));
bfd_put_32(output_bfd,
val,
if ((r_flags & IMAGE_REL_PPC_TOCDEFN)
== IMAGE_REL_PPC_TOCDEFN )
-#if 0
- /* This is wrong. If tocdefn is on, we must unconditionally
- assume the following path */
- && IS_UNALLOCATED(our_toc_offset))
-#endif
{
/* This is unbelievable cheese. Some knowledgable asm
hacker has decided to use r2 as a base for loading
dll linkage, takes advantage of that and considers
the IAT to be part of the toc, thus saving a load.
*/
-#ifdef DEBUG_RELOC
- fprintf(stderr,
- "TOCDEFN is on, (%s) (%p) our_toc_offset = %x\n",
- name, h, our_toc_offset);
-#endif
our_toc_offset = val -
(toc_section->output_section->vma +
toc_section->output_offset);
-#ifdef DEBUG_RELOC
- fprintf(stderr,
- " our_toc_offset set to %x\n", our_toc_offset);
-#endif
-
/* The size must still fit in a 16bit displacment */
if (our_toc_offset >= 65535)
{
- fprintf(stderr,
- "TOCDEFN Relocation exceeded displacement of 65535\n");
- abort();
+ (*_bfd_error_handler)
+ ("%s: Relocation for %s of %x exceeds Toc size limit",
+ bfd_get_filename (input_bfd), name, our_toc_offset);
+ bfd_set_error (bfd_error_bad_value);
+ return false;
}
record_toc(toc_section, our_toc_offset, pub, strdup(name));
again.
*/
MAKE_ADDR_AGAIN(our_toc_offset);
-#ifdef TOC_DEBUG
- fprintf(stderr,
- "Not writing out toc_offset of %d for %s\n",
- our_toc_offset, name);
-#endif
}
else
{
record_toc(toc_section, our_toc_offset, pub, strdup(name));
-#ifdef TOC_DEBUG
- /* write out the toc entry */
- fprintf(stderr,
- "Writing out toc_offset "
- "toc_section (%p,%p)+%d val %d for %s\n",
- toc_section,
- toc_section->contents,
- our_toc_offset,
- val,
- name);
-#endif
-
/* write out the toc entry */
bfd_put_32(output_bfd,
val,
if (coff_data(output_bfd)->pe)
addr -= pe_data(output_bfd)->pe_opthdr.ImageBase;
-#ifdef DEBUG_RELOC
- fprintf(stderr,
- " Toc Section .reloc candidate addr = %x\n", addr);
-#endif
fwrite (&addr, 1,4, (FILE *) info->base_file);
}
if ( (r_flags & IMAGE_REL_PPC_TOCDEFN) != IMAGE_REL_PPC_TOCDEFN &&
our_toc_offset > toc_section->_raw_size)
{
- fprintf(stderr,
- "reloc offset is bigger than the toc size!\n");
- abort();
+ (*_bfd_error_handler)
+ ("%s: Relocation exceeds allocated TOC (%x)",
+ bfd_get_filename (input_bfd),
+ toc_section->_raw_size);
+ bfd_set_error (bfd_error_bad_value);
+ return false;
}
/* Now we know the relocation for this toc reference */
if (h->symbol_is_glue == 1)
break;
my_name = h->root.root.root.string;
- fprintf(stderr,
- "Warning: previously missed IMGLUE reloc %s <file %s, section %s>\n",
- howto->name,
- bfd_get_filename(input_bfd),
- input_section->name);
- break;
+ (*_bfd_error_handler)
+ ("%s: Out of order IMGLUE reloc for %s",
+ bfd_get_filename (input_bfd), my_name);
+ bfd_set_error (bfd_error_bad_value);
+ return false;
}
- break;
case IMAGE_REL_PPC_ADDR32NB:
{
"__idata4_magic__",
false, false, true);
import_table_size = myh->root.u.def.value;
-#ifdef DEBUG_RELOC
- fprintf(stderr,
- "first computation triggered fta %x, ts %d(%x), its %d(%x)\n",
- first_thunk_address, thunk_size, thunk_size, import_table_size,
- import_table_size);
-#endif
}
if (h == 0)
false, false, true);
if (myh == 0)
{
- fprintf(stderr, "Missing idata magic cookies, this cannot work anyway...\n");
+ /* Missing magic cookies. Something is very wrong. */
abort();
}
"__idata4_magic__",
false, false, true);
import_table_size = myh->root.u.def.value;
-#ifdef DEBUG_RELOC
-
- fprintf(stderr,
- "second computation triggered fta %x, ts %d(%x), its %d(%x)\n",
- first_thunk_address, thunk_size, thunk_size, import_table_size,
- import_table_size);
-#endif
}
}
}
if (coff_data(output_bfd)->pe)
{
-#ifdef DEBUG_RELOC
- bfd_vma before_addr = addr;
-#endif
addr -= pe_data(output_bfd)->pe_opthdr.ImageBase;
-#ifdef DEBUG_RELOC
- fprintf(stderr,
- " adjusted down from %x to %x", before_addr, addr);
-#endif
}
-#ifdef DEBUG_RELOC
- fprintf(stderr, "\n");
-#endif
-
fwrite (&addr, 1,4, (FILE *) info->base_file);
}
}
buf[SYMNMLEN] = '\0';
name = buf;
}
-#if 0
- else
- {
- name = _bfd_coff_internal_syment_name (input_bfd, sym, buf);
- if (name == NULL)
- return false;
- }
-#endif
if (! ((*info->callbacks->reloc_overflow)
(info, name, howto->name,
(bfd_vma) 0, input_bfd,
input_section, rel->r_vaddr - input_section->vma)))
{
-#ifdef DEBUG_RELOC
- fprintf(stderr,
- "pe_ppc_relocate_section (%s) for %s in bfd %s RETURNING TRUE\n",
- TARGET_LITTLE_NAME,
- input_section->name,
- input_bfd->filename);
-
-#endif
return false;
}
}
}
-#ifdef DEBUG_RELOC
- fprintf(stderr,
- "pe_ppc_relocate_section (%s) for %s in bfd %s RETURNING TRUE\n",
- TARGET_LITTLE_NAME,
- input_section->name,
- input_bfd->filename);
-
-#endif
-
return true;
}
if (bfd_of_toc_owner == 0)
{
- fprintf(stderr,
- "There is no bfd that owns the toc section!\n");
+ /* No toc owner? Something is very wrong. */
abort();
}
s = bfd_get_section_by_name ( bfd_of_toc_owner , TOC_SECTION_NAME);
if (s == NULL)
{
- fprintf(stderr, "No Toc section!\n");
+ /* No toc section? Something is very wrong. */
abort();
}
asection *sec;
struct internal_reloc *i, *rel;
-#ifdef DEBUG_RELOC
- fprintf(stderr,
- "ppc_process_before_allocation: BFD %s\n",
- bfd_get_filename(abfd));
-#endif
-
/* here we have a bfd that is to be included on the link. We have a hook
to do reloc rummaging, before section sizes are nailed down. */
for (; sec != 0; sec = sec->next)
{
- int toc_offset;
-
-#ifdef DEBUG_RELOC
- fprintf(stderr,
- " section %s reloc count %d\n",
- sec->name,
- sec->reloc_count);
-#endif
-
if (sec->reloc_count == 0)
continue;
{
unsigned short r_type = EXTRACT_TYPE (rel->r_type);
unsigned short r_flags = EXTRACT_FLAGS(rel->r_type);
+ boolean ok = true;
-#ifdef DEBUG_RELOC
- /* now examine flags */
- if (r_flags != 0)
- {
- fprintf (stderr, "Reloc with flags found!");
- if ( r_flags & IMAGE_REL_PPC_NEG )
- fprintf (stderr, " NEG");
- if ( r_flags & IMAGE_REL_PPC_BRTAKEN )
- fprintf (stderr, " BRTAKEN");
- if ( r_flags & IMAGE_REL_PPC_BRNTAKEN )
- fprintf (stderr, " BRNTAKEN");
- if ( r_flags & IMAGE_REL_PPC_TOCDEFN )
- fprintf (stderr, " TOCDEFN");
- fprintf(stderr, "\n");
- }
-#endif
-
DUMP_RELOC2(ppc_coff_howto_table[r_type].name, rel);
switch(r_type)
{
case IMAGE_REL_PPC_TOCREL16:
-#if 0
- /* FIXME:
- This remains unimplemented for now, as it currently adds
- un-necessary elements to the toc. All we need to do today
- is not do anything if TOCDEFN is on.
- */
- if ( r_flags & IMAGE_REL_PPC_TOCDEFN )
- toc_offset = ppc_record_data_in_toc_entry(abfd, info, sec,
- rel->r_symndx,
- default_toc);
- else
- toc_offset = ppc_record_toc_entry(abfd, info, sec,
- rel->r_symndx, default_toc);
-#endif
+ /* if TOCDEFN is on, ignore as someone else has allocated the
+ toc entry */
if ( (r_flags & IMAGE_REL_PPC_TOCDEFN) != IMAGE_REL_PPC_TOCDEFN )
- toc_offset = ppc_record_toc_entry(abfd, info, sec,
- rel->r_symndx, default_toc);
+ ok = ppc_record_toc_entry(abfd, info, sec,
+ rel->r_symndx, default_toc);
+ if (!ok)
+ return false;
break;
case IMAGE_REL_PPC_IMGLUE:
ppc_mark_symbol_as_glue(abfd, rel->r_symndx, rel);
/* the masking process only slices off the bottom byte for r_type. */
if ( r_type > MAX_RELOC_INDEX )
- {
- fprintf(stderr,
- "ppc_coff_rtype2howto: reloc index %d out of range [%d, %ld]\n",
- internal->r_type, 0, (long) MAX_RELOC_INDEX);
- abort();
- }
+ abort();
/* check for absolute crap */
if ( junk != 0 )
- {
- fprintf(stderr,
- "ppc_coff_rtype2howto: reloc index %d contains junk %d\n",
- internal->r_type, junk);
- abort();
- }
-
-#ifdef DEBUG_RELOC
- /* now examine flags */
- if (r_flags != 0)
- {
- fprintf (stderr, "Reloc with flags found!");
- if ( r_flags & IMAGE_REL_PPC_NEG )
- fprintf (stderr, " NEG");
- if ( r_flags & IMAGE_REL_PPC_BRTAKEN )
- fprintf (stderr, " BRTAKEN");
- if ( r_flags & IMAGE_REL_PPC_BRNTAKEN )
- fprintf (stderr, " BRNTAKEN");
- if ( r_flags & IMAGE_REL_PPC_TOCDEFN )
- fprintf (stderr, " TOCDEFN");
- fprintf(stderr, "\n");
- }
-#endif
+ abort();
switch(r_type)
{
/* the masking process only slices off the bottom byte for r_type. */
if ( r_type > MAX_RELOC_INDEX )
- {
- fprintf(stderr,
- "coff_ppc_rtype_to_howto: index %d out of range [%d, %ld]\n",
- r_type, 0, (long) MAX_RELOC_INDEX);
- abort();
- }
+ abort();
/* check for absolute crap */
if ( junk != 0 )
- {
- fprintf(stderr,
- "coff_ppc_rtype_to_howto: reloc index %d contains junk %d\n",
- rel->r_type, junk);
- abort();
- }
-
-#ifdef DEBUG_RELOC
- /* now examine flags */
- if (r_flags != 0)
- {
- fprintf (stderr, "Reloc with flags found!");
- if ( r_flags & IMAGE_REL_PPC_NEG )
- fprintf (stderr, " NEG");
- if ( r_flags & IMAGE_REL_PPC_BRTAKEN )
- fprintf (stderr, " BRTAKEN");
- if ( r_flags & IMAGE_REL_PPC_BRNTAKEN )
- fprintf (stderr, " BRNTAKEN");
- if ( r_flags & IMAGE_REL_PPC_TOCDEFN )
- fprintf (stderr, " TOCDEFN");
- fprintf(stderr, "\n");
- }
-#endif
-
+ abort();
+
switch(r_type)
{
case IMAGE_REL_PPC_ADDR32NB:
bfd *abfd;
bfd_reloc_code_real_type code;
{
-
-#ifdef DEBUG_RELOC
- fprintf(stderr, "ppc_coff_reloc_type_lookup for %s\n",
- bfd_get_reloc_code_name(code));
-#endif
-
switch (code)
{
HOW2MAP(BFD_RELOC_32_GOTOFF, IMAGE_REL_PPC_IMGLUE);
flags = SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY ;
-#ifdef TOC_DEBUG
- fprintf(stderr,
- "ppc_coff_swap_sym_in_hook: about to create the %s section\n",
- TOC_SECTION_NAME);
-#endif
-
s = bfd_make_section (abfd, TOC_SECTION_NAME);
if (s == NULL
|| !bfd_set_section_flags (abfd, s, flags)
|| !bfd_set_section_alignment (abfd, s, 2))
{
- fprintf(stderr,
- "toc section allocation failed!\n");
+ /* FIXME: set appropriate bfd error */
abort();
}
(HAS_RELOC | EXEC_P | /* FIXME: object flags */
HAS_LINENO | HAS_DEBUG |
- HAS_SYMS | HAS_LOCALS | WP_TEXT),
+ HAS_SYMS | HAS_LOCALS | WP_TEXT | D_PAGED),
#ifndef COFF_WITH_PE
(SEC_HAS_CONTENTS | SEC_ALLOC | SEC_LOAD | SEC_RELOC), /* section flags */
(HAS_RELOC | EXEC_P | /* FIXME: object flags */
HAS_LINENO | HAS_DEBUG |
- HAS_SYMS | HAS_LOCALS | WP_TEXT),
+ HAS_SYMS | HAS_LOCALS | WP_TEXT | D_PAGED),
#ifndef COFF_WITH_PE
(SEC_HAS_CONTENTS | SEC_ALLOC | SEC_LOAD | SEC_RELOC), /* section flags */
static boolean sh_align_loads
PARAMS ((bfd *, asection *, struct internal_reloc *, bfd_byte *, boolean *));
static boolean sh_swap_insns
- PARAMS ((bfd *, asection *, struct internal_reloc *, bfd_byte *, bfd_vma));
+ PARAMS ((bfd *, asection *, PTR, bfd_byte *, bfd_vma));
static boolean sh_relocate_section
PARAMS ((bfd *, struct bfd_link_info *, bfd *, asection *, bfd_byte *,
struct internal_reloc *, struct internal_syment *, asection **));
/* See whether instructions I1 and I2 conflict, assuming I1 comes
before I2. OP1 and OP2 are the corresponding sh_opcode structures.
- This should return true if the instructions can be swapped safely. */
+ This should return true if there is a conflict, or false if the
+ instructions can be swapped safely. */
static boolean
sh_insns_conflict (i1, op1, i2, op2)
return true;
if ((f1 & SETSSP) != 0 && (f2 & USESSP) != 0)
- return false;
+ return true;
if ((f2 & SETSSP) != 0 && (f1 & USESSP) != 0)
return true;
return false;
}
+/* Try to align loads and stores within a span of memory. This is
+ called by both the ELF and the COFF sh targets. ABFD and SEC are
+ the BFD and section we are examining. CONTENTS is the contents of
+ the section. SWAP is the routine to call to swap two instructions.
+ RELOCS is a pointer to the internal relocation information, to be
+ passed to SWAP. PLABEL is a pointer to the current label in a
+ sorted list of labels; LABEL_END is the end of the list. START and
+ STOP are the range of memory to examine. If a swap is made,
+ *PSWAPPED is set to true. */
+
+boolean
+_bfd_sh_align_load_span (abfd, sec, contents, swap, relocs,
+ plabel, label_end, start, stop, pswapped)
+ bfd *abfd;
+ asection *sec;
+ bfd_byte *contents;
+ boolean (*swap) PARAMS ((bfd *, asection *, PTR, bfd_byte *, bfd_vma));
+ PTR relocs;
+ bfd_vma **plabel;
+ bfd_vma *label_end;
+ bfd_vma start;
+ bfd_vma stop;
+ boolean *pswapped;
+{
+ bfd_vma i;
+
+ /* Instructions should be aligned on 2 byte boundaries. */
+ if ((start & 1) == 1)
+ ++start;
+
+ /* Now look through the unaligned addresses. */
+ i = start;
+ if ((i & 2) == 0)
+ i += 2;
+ for (; i < stop; i += 4)
+ {
+ unsigned int insn;
+ const struct sh_opcode *op;
+ unsigned int prev_insn = 0;
+ const struct sh_opcode *prev_op = NULL;
+
+ insn = bfd_get_16 (abfd, contents + i);
+ op = sh_insn_info (insn);
+ if (op == NULL
+ || (op->flags & (LOAD | STORE)) == 0)
+ continue;
+
+ /* This is a load or store which is not on a four byte boundary. */
+
+ while (*plabel < label_end && **plabel < i)
+ ++*plabel;
+
+ if (i > start)
+ {
+ prev_insn = bfd_get_16 (abfd, contents + i - 2);
+ prev_op = sh_insn_info (prev_insn);
+
+ /* If the load/store instruction is in a delay slot, we
+ can't swap. */
+ if (prev_op == NULL
+ || (prev_op->flags & DELAY) != 0)
+ continue;
+ }
+ if (i > start
+ && (*plabel >= label_end || **plabel != i)
+ && prev_op != NULL
+ && (prev_op->flags & (LOAD | STORE)) == 0
+ && ! sh_insns_conflict (prev_insn, prev_op, insn, op))
+ {
+ boolean ok;
+
+ /* The load/store instruction does not have a label, and
+ there is a previous instruction; PREV_INSN is not
+ itself a load/store instruction, and PREV_INSN and
+ INSN do not conflict. */
+
+ ok = true;
+
+ if (i >= start + 4)
+ {
+ unsigned int prev2_insn;
+ const struct sh_opcode *prev2_op;
+
+ prev2_insn = bfd_get_16 (abfd, contents + i - 4);
+ prev2_op = sh_insn_info (prev2_insn);
+
+ /* If the instruction before PREV_INSN has a delay
+ slot--that is, PREV_INSN is in a delay slot--we
+ can not swap. */
+ if (prev2_op == NULL
+ || (prev2_op->flags & DELAY) != 0)
+ ok = false;
+
+ /* If the instruction before PREV_INSN is a load,
+ and it sets a register which INSN uses, then
+ putting INSN immediately after PREV_INSN will
+ cause a pipeline bubble, so there is no point to
+ making the swap. */
+ if (ok
+ && (prev2_op->flags & LOAD) != 0
+ && sh_load_use (prev2_insn, prev2_op, insn, op))
+ ok = false;
+ }
+
+ if (ok)
+ {
+ if (! (*swap) (abfd, sec, relocs, contents, i - 2))
+ return false;
+ *pswapped = true;
+ continue;
+ }
+ }
+
+ while (*plabel < label_end && **plabel < i + 2)
+ ++*plabel;
+
+ if (i + 2 < stop
+ && (*plabel >= label_end || **plabel != i + 2))
+ {
+ unsigned int next_insn;
+ const struct sh_opcode *next_op;
+
+ /* There is an instruction after the load/store
+ instruction, and it does not have a label. */
+ next_insn = bfd_get_16 (abfd, contents + i + 2);
+ next_op = sh_insn_info (next_insn);
+ if (next_op != NULL
+ && (next_op->flags & (LOAD | STORE)) == 0
+ && ! sh_insns_conflict (insn, op, next_insn, next_op))
+ {
+ boolean ok;
+
+ /* NEXT_INSN is not itself a load/store instruction,
+ and it does not conflict with INSN. */
+
+ ok = true;
+
+ /* If PREV_INSN is a load, and it sets a register
+ which NEXT_INSN uses, then putting NEXT_INSN
+ immediately after PREV_INSN will cause a pipeline
+ bubble, so there is no reason to make this swap. */
+ if (prev_op != NULL
+ && (prev_op->flags & LOAD) != 0
+ && sh_load_use (prev_insn, prev_op, next_insn, next_op))
+ ok = false;
+
+ /* If INSN is a load, and it sets a register which
+ the insn after NEXT_INSN uses, then doing the
+ swap will cause a pipeline bubble, so there is no
+ reason to make the swap. However, if the insn
+ after NEXT_INSN is itself a load or store
+ instruction, then it is misaligned, so
+ optimistically hope that it will be swapped
+ itself, and just live with the pipeline bubble if
+ it isn't. */
+ if (ok
+ && i + 4 < stop
+ && (op->flags & LOAD) != 0)
+ {
+ unsigned int next2_insn;
+ const struct sh_opcode *next2_op;
+
+ next2_insn = bfd_get_16 (abfd, contents + i + 4);
+ next2_op = sh_insn_info (next2_insn);
+ if ((next2_op->flags & (LOAD | STORE)) == 0
+ && sh_load_use (insn, op, next2_insn, next2_op))
+ ok = false;
+ }
+
+ if (ok)
+ {
+ if (! (*swap) (abfd, sec, relocs, contents, i))
+ return false;
+ *pswapped = true;
+ continue;
+ }
+ }
+ }
+ }
+
+ return true;
+}
+
/* Look for loads and stores which we can align to four byte
boundaries. See the longer comment above sh_relax_section for why
this is desirable. This sets *PSWAPPED if some instruction was
for (irel = internal_relocs; irel < irelend; irel++)
{
- bfd_vma start, stop, i;
+ bfd_vma start, stop;
if (irel->r_type != R_SH_CODE)
continue;
else
stop = sec->_cooked_size;
- /* Instructions should be aligned on 2 byte boundaries. */
- if ((start & 1) == 1)
- ++start;
-
- /* Now look through the unaligned addresses. */
- i = start;
- if ((i & 2) == 0)
- i += 2;
- for (; i < stop; i += 4)
- {
- unsigned int insn;
- const struct sh_opcode *op;
- unsigned int prev_insn = 0;
- const struct sh_opcode *prev_op = NULL;
-
- insn = bfd_get_16 (abfd, contents + i);
- op = sh_insn_info (insn);
- if (op == NULL
- || (op->flags & (LOAD | STORE)) == 0)
- continue;
-
- /* This is a load or store which is not on a four byte
- boundary. */
-
- while (label < label_end && *label < i)
- ++label;
-
- if (i > start)
- {
- prev_insn = bfd_get_16 (abfd, contents + i - 2);
- prev_op = sh_insn_info (prev_insn);
-
- /* If the load/store instruction is in a delay slot, we
- can't swap. */
- if (prev_op == NULL
- || (prev_op->flags & DELAY) != 0)
- continue;
- }
- if (i > start
- && (label >= label_end || *label != i)
- && prev_op != NULL
- && (prev_op->flags & (LOAD | STORE)) == 0
- && ! sh_insns_conflict (prev_insn, prev_op, insn, op))
- {
- boolean ok;
-
- /* The load/store instruction does not have a label, and
- there is a previous instruction; PREV_INSN is not
- itself a load/store instruction, and PREV_INSN and
- INSN do not conflict. */
-
- ok = true;
-
- if (i >= start + 4)
- {
- unsigned int prev2_insn;
- const struct sh_opcode *prev2_op;
-
- prev2_insn = bfd_get_16 (abfd, contents + i - 4);
- prev2_op = sh_insn_info (prev2_insn);
-
- /* If the instruction before PREV_INSN has a delay
- slot--that is, PREV_INSN is in a delay slot--we
- can not swap. */
- if (prev2_op == NULL
- || (prev2_op->flags & DELAY) != 0)
- ok = false;
-
- /* If the instruction before PREV_INSN is a load,
- and it sets a register which INSN uses, then
- putting INSN immediately after PREV_INSN will
- cause a pipeline bubble, so there is no point to
- making the swap. */
- if (ok
- && (prev2_op->flags & LOAD) != 0
- && sh_load_use (prev2_insn, prev2_op, insn, op))
- ok = false;
- }
-
- if (ok)
- {
- if (! sh_swap_insns (abfd, sec, internal_relocs,
- contents, i - 2))
- goto error_return;
- *pswapped = true;
- continue;
- }
- }
-
- while (label < label_end && *label < i + 2)
- ++label;
-
- if (i + 2 < stop
- && (label >= label_end || *label != i + 2))
- {
- unsigned int next_insn;
- const struct sh_opcode *next_op;
-
- /* There is an instruction after the load/store
- instruction, and it does not have a label. */
- next_insn = bfd_get_16 (abfd, contents + i + 2);
- next_op = sh_insn_info (next_insn);
- if (next_op != NULL
- && (next_op->flags & (LOAD | STORE)) == 0
- && ! sh_insns_conflict (insn, op, next_insn, next_op))
- {
- boolean ok;
-
- /* NEXT_INSN is not itself a load/store instruction,
- and it does not conflict with INSN. */
-
- ok = true;
-
- /* If PREV_INSN is a load, and it sets a register
- which NEXT_INSN uses, then putting NEXT_INSN
- immediately after PREV_INSN will cause a pipeline
- bubble, so there is no reason to make this swap. */
- if (prev_op != NULL
- && (prev_op->flags & LOAD) != 0
- && sh_load_use (prev_insn, prev_op, next_insn, next_op))
- ok = false;
-
- /* If INSN is a load, and it sets a register which
- the insn after NEXT_INSN uses, then doing the
- swap will cause a pipeline bubble, so there is no
- reason to make the swap. However, if the insn
- after NEXT_INSN is itself a load or store
- instruction, then it is misaligned, so
- optimistically hope that it will be swapped
- itself, and just live with the pipeline bubble if
- it isn't. */
- if (ok
- && i + 4 < stop
- && (op->flags & LOAD) != 0)
- {
- unsigned int next2_insn;
- const struct sh_opcode *next2_op;
-
- next2_insn = bfd_get_16 (abfd, contents + i + 4);
- next2_op = sh_insn_info (next2_insn);
- if ((next2_op->flags & (LOAD | STORE)) == 0
- && sh_load_use (insn, op, next2_insn, next2_op))
- ok = false;
- }
-
- if (ok)
- {
- if (! sh_swap_insns (abfd, sec, internal_relocs,
- contents, i))
- goto error_return;
- *pswapped = true;
- continue;
- }
- }
- }
- }
+ if (! _bfd_sh_align_load_span (abfd, sec, contents, sh_swap_insns,
+ (PTR) internal_relocs, &label,
+ label_end, start, stop, pswapped))
+ goto error_return;
}
free (labels);
/* Swap two SH instructions. */
static boolean
-sh_swap_insns (abfd, sec, internal_relocs, contents, addr)
+sh_swap_insns (abfd, sec, relocs, contents, addr)
bfd *abfd;
asection *sec;
- struct internal_reloc *internal_relocs;
+ PTR relocs;
bfd_byte *contents;
bfd_vma addr;
{
+ struct internal_reloc *internal_relocs = (struct internal_reloc *) relocs;
unsigned short i1, i2;
struct internal_reloc *irel, *irelend;
break;
#endif
+#ifdef H8300SMAGIC
+ case H8300SMAGIC:
+ arch = bfd_arch_h8300;
+ machine = bfd_mach_h8300s;
+ /* !! FIXME this probably isn't the right place for this */
+ abfd->flags |= BFD_IS_RELAXABLE;
+ break;
+#endif
+
#ifdef SH_ARCH_MAGIC_BIG
case SH_ARCH_MAGIC_BIG:
case SH_ARCH_MAGIC_LITTLE:
case bfd_mach_h8300h:
*magicp = H8300HMAGIC;
return true;
+ case bfd_mach_h8300s:
+ *magicp = H8300SMAGIC;
+ return true;
}
break;
#endif
file_ptr sym_base;
unsigned long reloc_size = 0;
unsigned long lnno_size = 0;
+ boolean long_section_names;
asection *text_sec = NULL;
asection *data_sec = NULL;
asection *bss_sec = NULL;
if (bfd_seek (abfd, scn_base, SEEK_SET) != 0)
return false;
+ long_section_names = false;
for (current = abfd->sections;
current != NULL;
current = current->next)
memset (section.s_name, 0, SCNNMLEN);
sprintf (section.s_name, "/%lu", (unsigned long) string_size);
string_size += len + 1;
+ long_section_names = true;
}
}
#endif
section.s_paddr = current->lma;
section.s_size = current->_raw_size;
-#ifdef COFF_OBJ_WITH_PE
+#ifdef COFF_WITH_PE
section.s_paddr = 0;
#endif
#ifdef COFF_IMAGE_WITH_PE
+ /* Reminder: s_paddr holds the virtual size of the section. */
if (coff_section_data (abfd, current) != NULL
&& pei_section_data (abfd, current) != NULL)
section.s_paddr = pei_section_data (abfd, current)->virt_size;
}
else
{
- internal_f.f_symptr = 0;
+ if (long_section_names)
+ internal_f.f_symptr = sym_base;
+ else
+ internal_f.f_symptr = 0;
internal_f.f_flags |= F_LSYMS;
}
if (abfd->output_has_begun == false) /* set by bfd.c handler */
coff_compute_section_file_positions (abfd);
-#ifdef _LIB
+#if defined(_LIB) && !defined(TARG_AUX)
/* The physical address field of a .lib section is used to hold the
number of shared libraries in the section. This code counts the
if (*p == '\0' && strindex >= 0)
{
strings = _bfd_coff_read_string_table (abfd);
+ if (strings == NULL)
+ return false;
/* FIXME: For extra safety, we should make sure that
strindex does not run us past the end, but right now we
don't know the length of the string table. */
bfd_coff_swap_scnhdr_in (abfd,
(PTR) (external_sections + i * scnhsz),
(PTR) & tmp);
- make_a_section_from_file (abfd, &tmp, i + 1);
+ if (! make_a_section_from_file (abfd, &tmp, i + 1))
+ goto fail;
}
}
if (obj_coff_strings (abfd) != NULL)
return obj_coff_strings (abfd);
+ if (obj_sym_filepos (abfd) == 0)
+ {
+ bfd_set_error (bfd_error_no_symbols);
+ return NULL;
+ }
+
if (bfd_seek (abfd,
(obj_sym_filepos (abfd)
+ obj_raw_syment_count (abfd) * bfd_coff_symesz (abfd)),
{
(*sym_hash)->class = sym.n_sclass;
(*sym_hash)->type = sym.n_type;
- (*sym_hash)->numaux = sym.n_numaux;
(*sym_hash)->auxbfd = abfd;
if (sym.n_numaux != 0)
{
bfd_byte *eaux;
union internal_auxent *iaux;
+ (*sym_hash)->numaux = sym.n_numaux;
alloc = ((union internal_auxent *)
bfd_hash_allocate (&info->hash->table,
(sym.n_numaux
bfd_size_type symesz;
struct coff_final_link_info finfo;
boolean debug_merge_allocated;
+ boolean long_section_names;
asection *o;
struct bfd_link_order *p;
size_t max_sym_count;
max_lineno_count = 0;
max_reloc_count = 0;
+ long_section_names = false;
for (o = abfd->sections; o != NULL; o = o->next)
{
o->reloc_count = 0;
o->rel_filepos = rel_filepos;
rel_filepos += o->reloc_count * relsz;
}
+
+ if (bfd_coff_long_section_names (abfd)
+ && strlen (o->name) > SCNNMLEN)
+ {
+ /* This section has a long name which must go in the string
+ table. This must correspond to the code in
+ coff_write_object_contents which puts the string index
+ into the s_name field of the section header. That is why
+ we pass hash as false. */
+ if (_bfd_stringtab_add (finfo.strtab, o->name, false, false)
+ == (bfd_size_type) -1)
+ goto error_return;
+ long_section_names = true;
+ }
}
/* If doing a relocateable link, allocate space for the pointers we
}
/* Write out the string table. */
- if (obj_raw_syment_count (abfd) != 0)
+ if (obj_raw_syment_count (abfd) != 0 || long_section_names)
{
if (bfd_seek (abfd,
(obj_sym_filepos (abfd)
if (*indexp < 0)
{
h = *sym_hash;
- BFD_ASSERT (h->numaux == isymp->n_numaux);
+
+ /* The m68k-motorola-sysv assembler will sometimes
+ generate two symbols with the same name, but only one
+ will have aux entries. */
+ BFD_ASSERT (isymp->n_numaux == 0
+ || h->numaux == isymp->n_numaux);
}
esym += isymesz;
SWAP_OUT_RELOC_EXTRA(abfd,reloc_src, reloc_dst);
#endif
- return sizeof(struct external_reloc);
+ return RELSZ;
}
#endif /* NO_COFF_RELOCS */
bfd_h_put_16(abfd, filehdr_in->f_opthdr, (bfd_byte *) filehdr_out->f_opthdr);
bfd_h_put_16(abfd, filehdr_in->f_flags, (bfd_byte *) filehdr_out->f_flags);
- return sizeof(FILHDR);
+ return FILHSZ;
}
}
bfd_h_put_8(abfd, in->n_sclass , ext->e_sclass);
bfd_h_put_8(abfd, in->n_numaux , ext->e_numaux);
- return sizeof(SYMENT);
+ return SYMESZ;
}
static void
memcpy (ext->x_file.x_fname, in->x_file.x_fname, FILNMLEN);
#endif
}
- return sizeof (AUXENT);
+ return AUXESZ;
#ifdef RS6000COFF_C
/* RS/6000 "csect" auxents */
PUTBYTE (abfd, in->x_csect.x_smclas, ext->x_csect.x_smclas);
PUTWORD (abfd, in->x_csect.x_stab, ext->x_csect.x_stab);
PUTHALF (abfd, in->x_csect.x_snstab, ext->x_csect.x_snstab);
- return sizeof (AUXENT);
+ return AUXESZ;
}
break;
#endif
PUT_SCN_SCNLEN(abfd, in->x_scn.x_scnlen, ext);
PUT_SCN_NRELOC(abfd, in->x_scn.x_nreloc, ext);
PUT_SCN_NLINNO(abfd, in->x_scn.x_nlinno, ext);
- return sizeof (AUXENT);
+ return AUXESZ;
}
break;
}
PUT_LNSZ_SIZE (abfd, in->x_sym.x_misc.x_lnsz.x_size, ext);
}
- return sizeof(AUXENT);
+ return AUXESZ;
}
#endif /* NO_COFF_SYMBOLS */
ext->l_addr.l_symndx);
PUT_LINENO_LNNO (abfd, in->l_lnno, ext);
- return sizeof(struct external_lineno);
+ return LINESZ;
}
#endif /* NO_COFF_LINENOS */
bfd_h_put_32(abfd, aouthdr_in->fprmask, (bfd_byte *) aouthdr_out->fprmask);
#endif
- return sizeof(AOUTHDR);
+ return AOUTSZ;
}
static void
{
struct internal_scnhdr *scnhdr_int = (struct internal_scnhdr *)in;
SCNHDR *scnhdr_ext = (SCNHDR *)out;
- unsigned int ret = sizeof (SCNHDR);
+ unsigned int ret = SCNHSZ;
memcpy(scnhdr_ext->s_name, scnhdr_int->s_name, sizeof(scnhdr_int->s_name));
case "${targ_cpu}" in
arm*) targ_archs=bfd_arm_arch ;;
hppa*) targ_archs=bfd_hppa_arch ;;
-i[345]86) targ_archs=bfd_i386_arch ;;
+i[3456]86) targ_archs=bfd_i386_arch ;;
m68*) targ_archs=bfd_m68k_arch ;;
m88*) targ_archs=bfd_m88k_arch ;;
mips*) targ_archs=bfd_mips_arch ;;
targ_defvec=ecoffalpha_little_vec
targ_selvecs=nlm32_alpha_vec
;;
+ alpha-*-linuxecoff*)
+ targ_defvec=ecoffalpha_little_vec
+ targ_selvecs=bfd_elf64_alpha_vec
+ ;;
+ alpha-*-linux* | alpha-*-elf*)
+ targ_defvec=bfd_elf64_alpha_vec
+ targ_selvecs=ecoffalpha_little_vec
+ ;;
+ alpha-*-*vms*)
+ targ_defvec=evax_alpha_vec
+ ;;
alpha-*-*)
targ_defvec=ecoffalpha_little_vec
;;
-
arm-*-riscix*)
targ_defvec=riscix_vec
;;
targ_underscore=yes
;;
+
h8300*-*-*)
targ_defvec=h8300coff_vec
targ_underscore=yes
targ_underscore=yes
;;
+ sh-*-elf*)
+ targ_defvec=bfd_elf32_sh_vec
+ targ_selvecs="bfd_elf32_shl_vec shcoff_vec shlcoff_vec"
+ targ_underscore=yes
+ ;;
sh-*-*)
targ_defvec=shcoff_vec
targ_selvecs="shcoff_vec shlcoff_vec"
targ_selvecs=bfd_elf32_hppa_vec
;;
- i[345]86-*-sysv4* | i[345]86-*-unixware | i[345]86-*-solaris2* | \
- i[345]86-*-elf | i[345]86-*-sco*elf* | i[345]86-*-freebsdelf*)
+ i[3456]86-*-sysv4* | i[3456]86-*-unixware | i[3456]86-*-solaris2* | \
+ i[3456]86-*-elf | i[3456]86-*-sco*elf* | i[3456]86-*-freebsdelf* | \
+ i[3456]86-*-dgux*)
targ_defvec=bfd_elf32_i386_vec
targ_selvecs=i386coff_vec
;;
- i[345]86-*-sysv* | i[345]86-*-isc* | i[345]86-*-sco* | i[345]86-*-coff | \
- i[345]86-*-aix* | i[345]86-*-go32*)
+ i[3456]86-*-sysv* | i[3456]86-*-isc* | i[3456]86-*-sco* | i[3456]86-*-coff | \
+ i[3456]86-*-aix* | i[3456]86-*-go32* | i[3456]86*-*-rtems*)
targ_defvec=i386coff_vec
;;
- i[345]86-sequent-bsd*)
+ i[3456]86-sequent-bsd*)
targ_defvec=i386dynix_vec
targ_underscore=yes
;;
- i[345]86-*-bsd*)
+ i[3456]86-*-bsd*)
targ_defvec=i386bsd_vec
targ_underscore=yes
;;
- i[345]86-*-freebsd*)
+ i[3456]86-*-freebsd*)
targ_defvec=i386freebsd_vec
targ_selvecs=i386bsd_vec
targ_underscore=yes
;;
- i[345]86-*-netbsd*)
+ i[3456]86-*-netbsd*)
targ_defvec=i386netbsd_vec
targ_selvecs=i386bsd_vec
targ_underscore=yes
;;
- i[345]86-*-openbsd*)
+ i[3456]86-*-openbsd*)
targ_defvec=i386netbsd_vec
targ_selvecs=i386bsd_vec
targ_underscore=yes
;;
- i[345]86-*-netware*)
+ i[3456]86-*-netware*)
targ_defvec=bfd_elf32_i386_vec
targ_selvecs="nlm32_i386_vec i386coff_vec i386aout_vec"
;;
- i[345]86-*-linuxaout*)
+ i[3456]86-*-linuxaout*)
targ_defvec=i386linux_vec
targ_selvecs=bfd_elf32_i386_vec
targ_underscore=yes
;;
- i[345]86-*-linux*)
+ i[3456]86-*-linux*)
targ_defvec=bfd_elf32_i386_vec
targ_selvecs=i386linux_vec
targ_underscore=yes
;;
- i[345]86-*-lynxos*)
+ i[3456]86-*-lynxos*)
targ_defvec=i386lynx_coff_vec
targ_selvecs=i386lynx_aout_vec
;;
- i[345]86-*-gnu*)
+ i[3456]86-*-gnu*)
targ_defvec=bfd_elf32_i386_vec
targ_selvecs=i386mach3_vec
targ_cflags=-DSTAT_FOR_EXEC
targ_underscore=yes
;;
- i[345]86-*-mach* | i[345]86-*-osf1mk*)
+ i[3456]86-*-mach* | i[3456]86-*-osf1mk*)
targ_defvec=i386mach3_vec
targ_cflags=-DSTAT_FOR_EXEC
targ_underscore=yes
;;
- i[345]86-*-os9k)
+ i[3456]86-*-os9k)
targ_defvec=i386os9k_vec
;;
- i[345]86-*-msdos*)
+ i[3456]86-*-msdos*)
targ_defvec=i386aout_vec
targ_selvecs=i386msdos_vec
;;
- i[345]86-*-moss*)
+ i[3456]86-*-moss*)
targ_defvec=bfd_elf32_i386_vec
targ_selvecs="i386msdos_vec i386aout_vec"
;;
- i[345]86-*-cygwin32 | i[345]86-*-winnt | i[345]86-*-pe)
+ i[3456]86-*-cygwin32 | i[3456]86-*-winnt | i[3456]86-*-pe)
targ_defvec=i386pe_vec
targ_selvecs="i386pe_vec i386pei_vec"
;;
- i[345]86-none-*)
+ i[3456]86-none-*)
targ_defvec=i386coff_vec
;;
- i[345]86-*-aout* | i[345]86*-*-vsta*)
+ i[3456]86-*-aout* | i[3456]86*-*-vsta*)
targ_defvec=i386aout_vec
;;
targ_selvecs="b_out_vec_big_host icoff_little_vec icoff_big_vec ieee_vec"
targ_underscore=yes
;;
- i960-*-vxworks5.* | i960-*-coff* | i960-*-sysv*)
+ i960-*-vxworks5.* | i960-*-coff* | i960-*-sysv* | i960-*-rtems*)
targ_defvec=icoff_little_vec
targ_selvecs="icoff_big_vec b_out_vec_little_host b_out_vec_big_host ieee_vec"
targ_underscore=yes
targ_defvec=bfd_elf32_m68k_vec
targ_selvecs="m68kcoff_vec ieee_vec"
;;
- m68*-*-coff* | m68*-*-sysv*)
+ m68*-*-coff* | m68*-*-sysv* | m68*-*-rtems*)
targ_defvec=m68kcoff_vec
targ_selvecs="m68kcoff_vec versados_vec ieee_vec"
;;
targ_defvec=ecoff_big_vec
targ_selvecs=ecoff_little_vec
;;
+ mips*-*-irix6*)
+ targ_defvec=bfd_elf32_bigmips_vec
+ targ_selvecs="bfd_elf32_littlemips_vec bfd_elf64_bigmips_vec bfd_elf64_littlemips_vec"
+ ;;
mips*-*-irix5*)
targ_defvec=bfd_elf32_bigmips_vec
targ_selvecs="bfd_elf32_littlemips_vec ecoff_big_vec ecoff_little_vec"
targ_defvec=rs6000coff_vec
;;
powerpc-*-elf* | powerpc-*-sysv4* | powerpc-*-eabi* | \
- powerpc-*-solaris2* | powerpc-*-linux*)
+ powerpc-*-solaris2* | powerpc-*-linux* | powerpc-*-rtems*)
targ_defvec=bfd_elf32_powerpc_vec
targ_selvecs="rs6000coff_vec bfd_elf32_powerpcle_vec bfd_powerpcle_pei_vec bfd_powerpc_pei_vec bfd_powerpcle_pe_vec bfd_powerpc_pe_vec ppcboot_vec"
;;
targ_defvec=rs6000coff_vec
;;
+ sparclet-*-aout*)
+ targ_defvec=sunos_big_vec
+ targ_selvecs=sparcle_aout_vec
+ targ_underscore=yes
+ ;;
sparc-*-lynxos*)
targ_defvec=sparclynx_coff_vec
targ_selvecs=sparclynx_aout_vec
targ_defvec=sparcnetbsd_vec
targ_underscore=yes
;;
- sparc-*-elf* | sparc-*-sysv4* | sparc-*-solaris2*)
+ sparc-*-elf* | sparc-*-solaris2*)
targ_defvec=bfd_elf32_sparc_vec
targ_selvecs=sunos_big_vec
;;
+ sparc-*-sysv4*)
+ targ_defvec=bfd_elf32_sparc_vec
+ ;;
sparc64-*-aout*)
targ_defvec=sunos_big_vec
targ_underscore=yes
sparc*-*-coff*)
targ_defvec=sparccoff_vec
;;
- sparc*-*-*)
+ sparc*-*-* | sparc*-*-rtems*)
targ_defvec=sunos_big_vec
targ_underscore=yes
;;
/* config.in. Generated automatically from configure.in by autoheader. */
+/* Whether strstr must be declared even if <string.h> is included. */
+#undef NEED_DECLARATION_STRSTR
+
/* Whether malloc must be declared even if <stdlib.h> is included. */
#undef NEED_DECLARATION_MALLOC
+/* Whether realloc must be declared even if <stdlib.h> is included. */
+#undef NEED_DECLARATION_REALLOC
+
/* Whether free must be declared even if <stdlib.h> is included. */
#undef NEED_DECLARATION_FREE
/* Define if you have a working `mmap' system call. */
#undef HAVE_MMAP
+/* Define if you need to in order for stat and other things to work. */
+#undef _POSIX_SOURCE
+
/* Define if you can safely include both <sys/time.h> and <time.h>. */
#undef TIME_WITH_SYS_TIME
/* Define if you have the mprotect function. */
#undef HAVE_MPROTECT
+/* Define if you have the setitimer function. */
+#undef HAVE_SETITIMER
+
+/* Define if you have the sysconf function. */
+#undef HAVE_SYSCONF
+
/* Define if you have the valloc function. */
#undef HAVE_VALLOC
fi
+echo $ac_n "checking for POSIXized ISC""... $ac_c" 1>&6
+if test -d /etc/conf/kconfig.d &&
+ grep _POSIX_VERSION /usr/include/sys/unistd.h >/dev/null 2>&1
+then
+ echo "$ac_t""yes" 1>&6
+ ISC=yes # If later tests want to check for ISC.
+ cat >> confdefs.h <<\EOF
+#define _POSIX_SOURCE 1
+EOF
+
+ if test "$GCC" = yes; then
+ CC="$CC -posix"
+ else
+ CC="$CC -Xp"
+ fi
+else
+ echo "$ac_t""no" 1>&6
+ ISC=
+fi
+
+
# Permit host specific settings.
. ${srcdir}/configure.host
-HOST_64BIT_LONG=0
+
+VERSION=`cat ${srcdir}/VERSION`
+
+
+BFD_HOST_64BIT_LONG=0
+BFD_HOST_64_BIT_DEFINED=0
+BFD_HOST_64_BIT=
+BFD_HOST_U_64_BIT=
if test "x${HOST_64BIT_TYPE}" = "xlong"; then
- HOST_64BIT_LONG=1
+ BFD_HOST_64BIT_LONG=1
+elif test "x${HOST_64BIT_TYPE}" != "x"; then
+ BFD_HOST_64_BIT_DEFINED=1
+ BFD_HOST_64_BIT=${HOST_64BIT_TYPE}
+ BFD_HOST_U_64_BIT=${HOST_U_64BIT_TYPE}
fi
+
+
+
# If we cannot run a trivial program, we must be cross compiling.
echo $ac_n "checking whether cross-compiling""... $ac_c" 1>&6
if eval "test \"`echo '$''{'ac_cv_c_cross'+set}'`\" = set"; then
ac_cv_c_cross=yes
else
cat > conftest.$ac_ext <<EOF
-#line 1057 "configure"
+#line 1092 "configure"
#include "confdefs.h"
main(){return(0);}
EOF
-{ (eval echo configure:1061: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }
+{ (eval echo configure:1096: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }
if test -s conftest && (./conftest; exit) 2>/dev/null; then
ac_cv_c_cross=no
else
# On the NeXT, cc -E runs the code through the compiler's parser,
# not just through cpp.
cat > conftest.$ac_ext <<EOF
-#line 1099 "configure"
+#line 1134 "configure"
#include "confdefs.h"
#include <assert.h>
Syntax Error
EOF
ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:1105: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
+{ (eval echo configure:1140: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
ac_err=`grep -v '^ *+' conftest.out`
if test -z "$ac_err"; then
:
rm -rf conftest*
CPP="${CC-cc} -E -traditional-cpp"
cat > conftest.$ac_ext <<EOF
-#line 1114 "configure"
+#line 1149 "configure"
#include "confdefs.h"
#include <assert.h>
Syntax Error
EOF
ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:1120: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
+{ (eval echo configure:1155: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
ac_err=`grep -v '^ *+' conftest.out`
if test -z "$ac_err"; then
:
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 1148 "configure"
+#line 1183 "configure"
#include "confdefs.h"
#include <$ac_hdr>
EOF
ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:1153: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
+{ (eval echo configure:1188: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
ac_err=`grep -v '^ *+' conftest.out`
if test -z "$ac_err"; then
rm -rf conftest*
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 1185 "configure"
+#line 1220 "configure"
#include "confdefs.h"
#include <$ac_hdr>
EOF
ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:1190: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
+{ (eval echo configure:1225: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
ac_err=`grep -v '^ *+' conftest.out`
if test -z "$ac_err"; then
rm -rf conftest*
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 1219 "configure"
+#line 1254 "configure"
#include "confdefs.h"
#include <sys/types.h>
#include <sys/time.h>
struct tm *tp;
; return 0; }
EOF
-if { (eval echo configure:1229: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
+if { (eval echo configure:1264: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
rm -rf conftest*
ac_cv_header_time=yes
else
fi
-for ac_func in fcntl getpagesize
+for ac_func in fcntl getpagesize setitimer sysconf
do
echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 1255 "configure"
+#line 1290 "configure"
#include "confdefs.h"
/* System header to define __stub macros and hopefully few prototypes,
which can conflict with char $ac_func(); below. */
; return 0; }
EOF
-if { (eval echo configure:1279: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }; then
+if { (eval echo configure:1314: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }; then
rm -rf conftest*
eval "ac_cv_func_$ac_func=yes"
else
;;
esac
+echo $ac_n "checking whether strstr must be declared""... $ac_c" 1>&6
+if eval "test \"`echo '$''{'bfd_cv_decl_needed_strstr'+set}'`\" = set"; then
+ echo $ac_n "(cached) $ac_c" 1>&6
+else
+ cat > conftest.$ac_ext <<EOF
+#line 1351 "configure"
+#include "confdefs.h"
+
+#include <stdio.h>
+#ifdef HAVE_STRING_H
+#include <string.h>
+#else
+#ifdef HAVE_STRINGS_H
+#include <strings.h>
+#endif
+#endif
+#ifdef HAVE_STDLIB_H
+#include <stdlib.h>
+#endif
+#ifdef HAVE_UNISTD_H
+#include <unistd.h>
+#endif
+int main() { return 0; }
+int t() {
+char *(*pfn) = (char *(*)) strstr
+; return 0; }
+EOF
+if { (eval echo configure:1373: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
+ rm -rf conftest*
+ bfd_cv_decl_needed_strstr=no
+else
+ rm -rf conftest*
+ bfd_cv_decl_needed_strstr=yes
+fi
+rm -f conftest*
+
+fi
+
+echo "$ac_t""$bfd_cv_decl_needed_strstr" 1>&6
+if test $bfd_cv_decl_needed_strstr = yes; then
+ bfd_tr_decl=NEED_DECLARATION_`echo strstr | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'`
+ cat >> confdefs.h <<EOF
+#define $bfd_tr_decl 1
+EOF
+
+fi
+
echo $ac_n "checking whether malloc must be declared""... $ac_c" 1>&6
if eval "test \"`echo '$''{'bfd_cv_decl_needed_malloc'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 1316 "configure"
+#line 1398 "configure"
#include "confdefs.h"
#include <stdio.h>
+#ifdef HAVE_STRING_H
+#include <string.h>
+#else
+#ifdef HAVE_STRINGS_H
+#include <strings.h>
+#endif
+#endif
#ifdef HAVE_STDLIB_H
#include <stdlib.h>
#endif
char *(*pfn) = (char *(*)) malloc
; return 0; }
EOF
-if { (eval echo configure:1331: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
+if { (eval echo configure:1420: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
rm -rf conftest*
bfd_cv_decl_needed_malloc=no
else
fi
+echo $ac_n "checking whether realloc must be declared""... $ac_c" 1>&6
+if eval "test \"`echo '$''{'bfd_cv_decl_needed_realloc'+set}'`\" = set"; then
+ echo $ac_n "(cached) $ac_c" 1>&6
+else
+ cat > conftest.$ac_ext <<EOF
+#line 1445 "configure"
+#include "confdefs.h"
+
+#include <stdio.h>
+#ifdef HAVE_STRING_H
+#include <string.h>
+#else
+#ifdef HAVE_STRINGS_H
+#include <strings.h>
+#endif
+#endif
+#ifdef HAVE_STDLIB_H
+#include <stdlib.h>
+#endif
+#ifdef HAVE_UNISTD_H
+#include <unistd.h>
+#endif
+int main() { return 0; }
+int t() {
+char *(*pfn) = (char *(*)) realloc
+; return 0; }
+EOF
+if { (eval echo configure:1467: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
+ rm -rf conftest*
+ bfd_cv_decl_needed_realloc=no
+else
+ rm -rf conftest*
+ bfd_cv_decl_needed_realloc=yes
+fi
+rm -f conftest*
+
+fi
+
+echo "$ac_t""$bfd_cv_decl_needed_realloc" 1>&6
+if test $bfd_cv_decl_needed_realloc = yes; then
+ bfd_tr_decl=NEED_DECLARATION_`echo realloc | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'`
+ cat >> confdefs.h <<EOF
+#define $bfd_tr_decl 1
+EOF
+
+fi
+
echo $ac_n "checking whether free must be declared""... $ac_c" 1>&6
if eval "test \"`echo '$''{'bfd_cv_decl_needed_free'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 1356 "configure"
+#line 1492 "configure"
#include "confdefs.h"
#include <stdio.h>
+#ifdef HAVE_STRING_H
+#include <string.h>
+#else
+#ifdef HAVE_STRINGS_H
+#include <strings.h>
+#endif
+#endif
#ifdef HAVE_STDLIB_H
#include <stdlib.h>
#endif
char *(*pfn) = (char *(*)) free
; return 0; }
EOF
-if { (eval echo configure:1371: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
+if { (eval echo configure:1514: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
rm -rf conftest*
bfd_cv_decl_needed_free=no
else
hppa*-*-hiux*) COREFILE=hpux-core.o ;;
hppa*-*-bsd*) COREFILE="hpux-core.o hppabsd-core.o"
COREFLAG="-DHPUX_CORE -DHPPABSD_CORE" ;;
- i[345]86-sequent-bsd*)
+ i[3456]86-sequent-bsd*)
COREFILE=trad-core.o;
cat >> confdefs.h <<\EOF
#define TRAD_HEADER "hosts/symmetry.h"
EOF
;;
- i[345]86-sequent-sysv4*) ;;
- i[345]86-sequent-sysv*)
+ i[3456]86-sequent-sysv4*) ;;
+ i[3456]86-sequent-sysv*)
COREFILE=trad-core.o
cat >> confdefs.h <<\EOF
#define TRAD_HEADER "hosts/symmetry.h"
EOF
;;
- i[345]86-*-bsd* | i[345]86-*-freebsd*)
+ i[3456]86-*-bsd* | i[3456]86-*-freebsd*)
COREFILE=trad-core.o
cat >> confdefs.h <<\EOF
#define TRAD_HEADER "hosts/i386bsd.h"
EOF
;;
- i[345]86-*-netbsd*)
+ i[3456]86-*-netbsd*)
COREFILE=netbsd-core.o
;;
- i[345]86-*-openbsd*)
+ i[3456]86-*-openbsd*)
COREFILE=netbsd-core.o
;;
- i[345]86-esix-sysv3*)
+ i[3456]86-esix-sysv3*)
COREFILE=trad-core.o
cat >> confdefs.h <<\EOF
#define TRAD_HEADER "hosts/esix.h"
EOF
;;
- i[345]86-*-sco* | i[345]86-*-isc*)
+ i[3456]86-*-sco* | i[3456]86-*-isc*)
COREFILE=trad-core.o
cat >> confdefs.h <<\EOF
#define TRAD_HEADER "hosts/i386sco.h"
EOF
;;
- i[345]86-*-mach3*)
+ i[3456]86-*-mach3*)
COREFILE=trad-core.o
cat >> confdefs.h <<\EOF
#define TRAD_HEADER "hosts/i386mach3.h"
EOF
;;
- i[345]86-*-linux*)
+ i[3456]86-*-linux*)
COREFILE=trad-core.o
cat >> confdefs.h <<\EOF
#define TRAD_HEADER "hosts/i386linux.h"
EOF
;;
- i[345]86-*-isc*) COREFILE=trad-core.o ;;
- i[345]86-*-aix*) COREFILE=aix386-core.o ;;
+ i[3456]86-*-isc*) COREFILE=trad-core.o ;;
+ i[3456]86-*-aix*) COREFILE=aix386-core.o ;;
i860-*-mach3* | i860-*-osf1*)
COREFILE=trad-core.o
cat >> confdefs.h <<\EOF
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 1643 "configure"
+#line 1786 "configure"
#include "confdefs.h"
#include <sys/procfs.h>
int main() { return 0; }
prstatus_t t;
; return 0; }
EOF
-if { (eval echo configure:1651: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
+if { (eval echo configure:1794: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
rm -rf conftest*
bfd_cv_header_sys_procfs_h=yes
else
apollocoff_vec) tb="$tb coff-apollo.o" ;;
b_out_vec_big_host) tb="$tb bout.o aout32.o" ;;
b_out_vec_little_host) tb="$tb bout.o aout32.o" ;;
+ bfd_elf64_alpha_vec) tb="$tb elf64-alpha.o elf64.o $elf"
+ target64=true ;;
bfd_elf32_big_generic_vec) tb="$tb elf32-gen.o elf32.o $elf" ;;
bfd_elf32_bigmips_vec) tb="$tb elf32-mips.o elf32.o $elf ecofflink.o" ;;
bfd_elf64_bigmips_vec) tb="$tb elf64-mips.o elf64.o elf32-mips.o elf32.o $elf ecofflink.o"
bfd_elf32_m88k_vec) tb="$tb elf32-m88k.o elf32.o $elf" ;;
bfd_elf32_powerpc_vec) tb="$tb elf32-ppc.o elf32.o $elf" ;;
bfd_elf32_powerpcle_vec) tb="$tb elf32-ppc.o elf32.o $elf" ;;
+ bfd_elf32_sh_vec) tb="$tb elf32-sh.o elf32.o $elf coff-sh.o" ;;
+ bfd_elf32_shl_vec) tb="$tb elf32-sh.o elf32.o $elf coff-sh.o" ;;
bfd_elf32_sparc_vec) tb="$tb elf32-sparc.o elf32.o $elf" ;;
bfd_elf64_big_generic_vec) tb="$tb elf64-gen.o elf64.o $elf"
target64=true ;;
ecoff_little_vec) tb="$tb coff-mips.o ecoff.o ecofflink.o" ;;
ecoffalpha_little_vec) tb="$tb coff-alpha.o ecoff.o ecofflink.o"
target64=true ;;
+ evax_alpha_vec) tb="$tb evax-alpha.o evax-emh.o evax-egsd.o evax-etir.o evax-misc.o"
+ target64=true ;;
h8300coff_vec) tb="$tb coff-h8300.o reloc16.o" ;;
h8500coff_vec) tb="$tb coff-h8500.o reloc16.o" ;;
host_aout_vec) tb="$tb host-aout.o aout32.o" ;;
shcoff_vec) tb="$tb coff-sh.o cofflink.o" ;;
shlcoff_vec) tb="$tb coff-sh.o cofflink.o" ;;
som_vec) tb="$tb som.o" ;;
+ sparcle_aout_vec) tb="$tb aout-sparcle.o aout32.o" ;;
sparclynx_aout_vec) tb="$tb sparclynx.o lynx-core.o aout32.o" ;;
sparclynx_coff_vec) tb="$tb cf-sparclynx.o lynx-core.o" ;;
sparcnetbsd_vec) tb="$tb sparcnetbsd.o aout32.o" ;;
*true*)
wordsize=64
all_backends='$(BFD64_BACKENDS) $(BFD32_BACKENDS)'
- if test -z "$GCC" && test "$HOST_64BIT_LONG" = "0"; then
+ if test -z "$GCC" && test "$BFD_HOST_64BIT_LONG" = "0" && test "$BFD_HOST_64_BIT_DEFINED" = "0"; then
echo "configure: warning: You have requested a 64 bit BFD configuration, but" 1>&2
echo "configure: warning: your compiler may not have a 64 bit integral type" 1>&2
fi
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 1940 "configure"
+#line 2092 "configure"
#include "confdefs.h"
/* System header to define __stub macros and hopefully few prototypes,
which can conflict with char $ac_func(); below. */
; return 0; }
EOF
-if { (eval echo configure:1964: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }; then
+if { (eval echo configure:2116: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }; then
rm -rf conftest*
eval "ac_cv_func_$ac_func=yes"
else
ac_cv_func_mmap=no
else
cat > conftest.$ac_ext <<EOF
-#line 1994 "configure"
+#line 2146 "configure"
#include "confdefs.h"
/* Thanks to Mike Haertel and Jim Avera for this test. */
}
EOF
-{ (eval echo configure:2063: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }
+{ (eval echo configure:2215: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }
if test -s conftest && (./conftest; exit) 2>/dev/null; then
ac_cv_func_mmap=yes
else
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 2088 "configure"
+#line 2240 "configure"
#include "confdefs.h"
/* System header to define __stub macros and hopefully few prototypes,
which can conflict with char $ac_func(); below. */
; return 0; }
EOF
-if { (eval echo configure:2112: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }; then
+if { (eval echo configure:2264: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }; then
rm -rf conftest*
eval "ac_cv_func_$ac_func=yes"
else
ac_given_srcdir=$srcdir
ac_given_INSTALL="$INSTALL"
-trap 'rm -fr `echo "Makefile doc/Makefile config.h:config.in" | sed "s/:[^ ]*//g"` conftest*; exit 1' 1 2 15
+trap 'rm -fr `echo "Makefile doc/Makefile bfd-in3.h:bfd-in2.h config.h:config.in" | sed "s/:[^ ]*//g"` conftest*; exit 1' 1 2 15
EOF
cat >> $CONFIG_STATUS <<EOF
s%@COMMON_SHLIB@%$COMMON_SHLIB%g
s%@PICLIST@%$PICLIST%g
s%@SHLINK@%$SHLINK%g
-s%@HOST_64BIT_LONG@%$HOST_64BIT_LONG%g
+s%@INSTALL_SHLIB@%$INSTALL_SHLIB%g
+s%@VERSION@%$VERSION%g
+s%@BFD_HOST_64BIT_LONG@%$BFD_HOST_64BIT_LONG%g
+s%@BFD_HOST_64_BIT_DEFINED@%$BFD_HOST_64_BIT_DEFINED%g
+s%@BFD_HOST_64_BIT@%$BFD_HOST_64_BIT%g
+s%@BFD_HOST_U_64_BIT@%$BFD_HOST_U_64_BIT%g
s%@CC_FOR_BUILD@%$CC_FOR_BUILD%g
s%@CPP@%$CPP%g
s%@COREFILE@%$COREFILE%g
EOF
cat >> $CONFIG_STATUS <<EOF
-CONFIG_FILES=\${CONFIG_FILES-"Makefile doc/Makefile"}
+CONFIG_FILES=\${CONFIG_FILES-"Makefile doc/Makefile bfd-in3.h:bfd-in2.h"}
EOF
cat >> $CONFIG_STATUS <<\EOF
for ac_file in .. $CONFIG_FILES; do if test "x$ac_file" != x..; then
# HDEFINES host specific compiler options
# host64 set to true if this is a 64 bit host
# HOST_64BIT_TYPE host 64 bit type
+# HOST_U_64BIT_TYPE unsigned 64 bit type (not needed if 64BIT_TYPE is long)
# SHLIB_CC compiler to use when building shared library
# SHLIB_CFLAGS flags to use when building shared library
# PICFLAG may be set to flag to use to compile PIC
# SHLINK may be set to the name to link the shared library to
# ALLLIBS may be set to libraries to build
# HLDFLAGS LDFLAGS specific to the host
+# HLDENV environment variable to set when linking for the host
# RPATH_ENVVAR environment variable used to find shared libraries
+# INSTALL_SHLIB install a shared library
HDEFINES=
host64=false
hppa*-*-bsd*) HDEFINES=-DHOST_HPPABSD ;;
hppa*-*-osf*) HDEFINES=-DHOST_HPPAOSF ;;
-i[345]86-sequent-bsd*) HDEFINES=-Dshared=genshared ;;
-i[345]86-sequent-sysv4*) ;;
-i[345]86-sequent-sysv*) HDEFINES=-Dshared=genshared ;;
+i[3456]86-sequent-bsd*) HDEFINES=-Dshared=genshared ;;
+i[3456]86-sequent-sysv4*) ;;
+i[3456]86-sequent-sysv*) HDEFINES=-Dshared=genshared ;;
mips-dec-netbsd*) ;;
mips-dec-openbsd*) ;;
mips-dec-*) HDEFINES="-G 4" ;;
mips-sgi-irix3*) HDEFINES="-G 4" ;;
mips-sgi-irix4*) HDEFINES="-G 4" ;;
+mips-sgi-irix6*) # We can use __int64_t here because bfd.h
+ # includes obstack.h which includes stddef.h.
+ host64=true
+ HOST_64BIT_TYPE=__int64_t
+ HOST_U_64BIT_TYPE=__uint64_t
+ ;;
mips-*-sysv4*) ;;
mips-*-sysv*) HDEFINES="-G 4" ;;
mips-*-riscos*) HDEFINES="-G 4" ;;
# library support based on the host. This support must work for both
# the BFD and the opcodes libraries.
HLDFLAGS=
+HLDENV=
RPATH_ENVVAR=LD_LIBRARY_PATH
SHLIB_CC='$(CC)'
SHLIB_CFLAGS='-shared'
+INSTALL_SHLIB='$(INSTALL_PROGRAM) $$f $(libdir)/$$tf;'
if [ "${shared}" = "true" ]; then
case "${host}" in
hppa*-*-*) picfrag=${srcdir}/../config/mh-papic ;;
- i[3456]86-*-*) picfrag=${srcdir}/../config/mh-x86pic ;;
+ i[34566]86-*-*) picfrag=${srcdir}/../config/mh-x86pic ;;
*-*-*) picfrag=${srcdir}/../config/mh-${host_cpu}pic ;;
esac
if [ -f "${picfrag}" ]; then
SHLIB_CFLAGS='-shared $(PICFLAG)'
HLDFLAGS='-Wl,+s,+b,$(libdir)'
RPATH_ENVVAR=SHLIB_PATH
+ INSTALL_SHLIB='$(INSTALL_PROGRAM) $$f $(libdir)/$$tf; chmod -w $(libdir)/$$tf;'
;;
- *-*-irix5*)
- # -fpic is not needed on Irix 5.
+ *-*-irix[56]*)
+ # -fpic is not needed on Irix 5 or 6.
PICFLAG=
SHLIB_CFLAGS='-shared -Wl,-soname,$(SONAME)'
HLDFLAGS='-Wl,-rpath,$(libdir)'
*) HLDFLAGS='-Wl,-rpath,$(libdir)' ;;
esac
;;
- *-*-sysv4* | *-*-solaris*)
+ *-*-solaris*)
SHLIB_CFLAGS='-shared -h $(SONAME)'
HLDFLAGS='-R $(libdir)'
;;
+ *-*-sysv4*)
+ SHLIB_CFLAGS='-shared -h $(SONAME)'
+ HLDENV='if test -z "$${LD_RUN_PATH}"; then LD_RUN_PATH=$(libdir); else LD_RUN_PATH=$${LD_RUN_PATH}:$(libdir); fi; export LD_RUN_PATH;'
+ ;;
*-*-sunos*)
# Build a libTARGET-bfd.so.VERSION symlink in the object directory.
ALLLIBS=`echo ${ALLLIBS} | sed -e 's/\$(SHLINK)/stamp-tshlink/'`
dnl Process this file with autoconf to produce a configure script.
dnl
-AC_PREREQ(2.3)
+AC_PREREQ(2.5)
AC_INIT(libbfd.c)
AC_ARG_ENABLE(64-bit-bfd,
AC_PROG_CC
+AC_ISC_POSIX
+
# Permit host specific settings.
. ${srcdir}/configure.host
AC_SUBST(COMMON_SHLIB)
AC_SUBST(PICLIST)
AC_SUBST(SHLINK)
+AC_SUBST(INSTALL_SHLIB)
+
+VERSION=`cat ${srcdir}/VERSION`
+AC_SUBST(VERSION)
-HOST_64BIT_LONG=0
+BFD_HOST_64BIT_LONG=0
+BFD_HOST_64_BIT_DEFINED=0
+BFD_HOST_64_BIT=
+BFD_HOST_U_64_BIT=
if test "x${HOST_64BIT_TYPE}" = "xlong"; then
- HOST_64BIT_LONG=1
+ BFD_HOST_64BIT_LONG=1
+elif test "x${HOST_64BIT_TYPE}" != "x"; then
+ BFD_HOST_64_BIT_DEFINED=1
+ BFD_HOST_64_BIT=${HOST_64BIT_TYPE}
+ BFD_HOST_U_64_BIT=${HOST_U_64BIT_TYPE}
fi
-AC_SUBST(HOST_64BIT_LONG)
+AC_SUBST(BFD_HOST_64BIT_LONG)
+AC_SUBST(BFD_HOST_64_BIT_DEFINED)
+AC_SUBST(BFD_HOST_64_BIT)
+AC_SUBST(BFD_HOST_U_64_BIT)
BFD_CC_FOR_BUILD
AC_CHECK_HEADERS(stddef.h string.h strings.h stdlib.h time.h unistd.h)
AC_CHECK_HEADERS(fcntl.h sys/file.h sys/time.h)
AC_HEADER_TIME
-AC_CHECK_FUNCS(fcntl getpagesize)
+AC_CHECK_FUNCS(fcntl getpagesize setitimer sysconf)
BFD_BINARY_FOPEN
+BFD_NEED_DECLARATION(strstr)
BFD_NEED_DECLARATION(malloc)
+BFD_NEED_DECLARATION(realloc)
BFD_NEED_DECLARATION(free)
# If we are configured native, pick a core file support file.
hppa*-*-bsd*) COREFILE="hpux-core.o hppabsd-core.o"
COREFLAG="-DHPUX_CORE -DHPPABSD_CORE" ;;
changequote(,)dnl
- i[345]86-sequent-bsd*)
+ i[3456]86-sequent-bsd*)
changequote([,])dnl
COREFILE=trad-core.o;
AC_DEFINE(TRAD_HEADER,"hosts/symmetry.h")
;;
changequote(,)dnl
- i[345]86-sequent-sysv4*) ;;
- i[345]86-sequent-sysv*)
+ i[3456]86-sequent-sysv4*) ;;
+ i[3456]86-sequent-sysv*)
changequote([,])dnl
COREFILE=trad-core.o
AC_DEFINE(TRAD_HEADER,"hosts/symmetry.h")
;;
changequote(,)dnl
- i[345]86-*-bsd* | i[345]86-*-freebsd*)
+ i[3456]86-*-bsd* | i[3456]86-*-freebsd*)
changequote([,])dnl
COREFILE=trad-core.o
AC_DEFINE(TRAD_HEADER,"hosts/i386bsd.h")
;;
changequote(,)dnl
- i[345]86-*-netbsd*)
+ i[3456]86-*-netbsd*)
changequote([,])dnl
COREFILE=netbsd-core.o
;;
changequote(,)dnl
- i[345]86-*-openbsd*)
+ i[3456]86-*-openbsd*)
changequote([,])dnl
COREFILE=netbsd-core.o
;;
changequote(,)dnl
- i[345]86-esix-sysv3*)
+ i[3456]86-esix-sysv3*)
changequote([,])dnl
COREFILE=trad-core.o
AC_DEFINE(TRAD_HEADER,"hosts/esix.h")
;;
changequote(,)dnl
- i[345]86-*-sco* | i[345]86-*-isc*)
+ i[3456]86-*-sco* | i[3456]86-*-isc*)
changequote([,])dnl
COREFILE=trad-core.o
AC_DEFINE(TRAD_HEADER,"hosts/i386sco.h")
;;
changequote(,)dnl
- i[345]86-*-mach3*)
+ i[3456]86-*-mach3*)
changequote([,])dnl
COREFILE=trad-core.o
AC_DEFINE(TRAD_HEADER,"hosts/i386mach3.h")
;;
changequote(,)dnl
- i[345]86-*-linux*)
+ i[3456]86-*-linux*)
changequote([,])dnl
COREFILE=trad-core.o
AC_DEFINE(TRAD_HEADER,"hosts/i386linux.h")
;;
changequote(,)dnl
- i[345]86-*-isc*) COREFILE=trad-core.o ;;
- i[345]86-*-aix*) COREFILE=aix386-core.o ;;
+ i[3456]86-*-isc*) COREFILE=trad-core.o ;;
+ i[3456]86-*-aix*) COREFILE=aix386-core.o ;;
changequote([,])dnl
i860-*-mach3* | i860-*-osf1*)
COREFILE=trad-core.o
apollocoff_vec) tb="$tb coff-apollo.o" ;;
b_out_vec_big_host) tb="$tb bout.o aout32.o" ;;
b_out_vec_little_host) tb="$tb bout.o aout32.o" ;;
+ bfd_elf64_alpha_vec) tb="$tb elf64-alpha.o elf64.o $elf"
+ target64=true ;;
bfd_elf32_big_generic_vec) tb="$tb elf32-gen.o elf32.o $elf" ;;
bfd_elf32_bigmips_vec) tb="$tb elf32-mips.o elf32.o $elf ecofflink.o" ;;
bfd_elf64_bigmips_vec) tb="$tb elf64-mips.o elf64.o elf32-mips.o elf32.o $elf ecofflink.o"
bfd_elf32_m88k_vec) tb="$tb elf32-m88k.o elf32.o $elf" ;;
bfd_elf32_powerpc_vec) tb="$tb elf32-ppc.o elf32.o $elf" ;;
bfd_elf32_powerpcle_vec) tb="$tb elf32-ppc.o elf32.o $elf" ;;
+ bfd_elf32_sh_vec) tb="$tb elf32-sh.o elf32.o $elf coff-sh.o" ;;
+ bfd_elf32_shl_vec) tb="$tb elf32-sh.o elf32.o $elf coff-sh.o" ;;
bfd_elf32_sparc_vec) tb="$tb elf32-sparc.o elf32.o $elf" ;;
bfd_elf64_big_generic_vec) tb="$tb elf64-gen.o elf64.o $elf"
target64=true ;;
ecoff_little_vec) tb="$tb coff-mips.o ecoff.o ecofflink.o" ;;
ecoffalpha_little_vec) tb="$tb coff-alpha.o ecoff.o ecofflink.o"
target64=true ;;
+ evax_alpha_vec) tb="$tb evax-alpha.o evax-emh.o evax-egsd.o evax-etir.o evax-misc.o"
+ target64=true ;;
h8300coff_vec) tb="$tb coff-h8300.o reloc16.o" ;;
h8500coff_vec) tb="$tb coff-h8500.o reloc16.o" ;;
host_aout_vec) tb="$tb host-aout.o aout32.o" ;;
shcoff_vec) tb="$tb coff-sh.o cofflink.o" ;;
shlcoff_vec) tb="$tb coff-sh.o cofflink.o" ;;
som_vec) tb="$tb som.o" ;;
+ sparcle_aout_vec) tb="$tb aout-sparcle.o aout32.o" ;;
sparclynx_aout_vec) tb="$tb sparclynx.o lynx-core.o aout32.o" ;;
sparclynx_coff_vec) tb="$tb cf-sparclynx.o lynx-core.o" ;;
sparcnetbsd_vec) tb="$tb sparcnetbsd.o aout32.o" ;;
*true*)
wordsize=64
all_backends='$(BFD64_BACKENDS) $(BFD32_BACKENDS)'
- if test -z "$GCC" && test "$HOST_64BIT_LONG" = "0"; then
+ if test -z "$GCC" && test "$BFD_HOST_64BIT_LONG" = "0" && test "$BFD_HOST_64_BIT_DEFINED" = "0"; then
AC_MSG_WARN([You have requested a 64 bit BFD configuration, but])
AC_MSG_WARN([your compiler may not have a 64 bit integral type])
fi
esac
rm -f doc/config.status
-AC_OUTPUT(Makefile doc/Makefile,
+AC_OUTPUT(Makefile doc/Makefile bfd-in3.h:bfd-in2.h,
[case x$CONFIG_HEADERS in xconfig.h:config.in) echo > stamp-h ;; esac])
+Tue Jun 18 18:32:28 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * chew.c (kill_bogus_lines): Reset sl when not at the start of a
+ line. From Uwe Ohse <uwe@tirka.gun.de>.
+
Tue Jan 30 14:10:46 1996 Ian Lance Taylor <ian@cygnus.com>
From Ronald F. Guilmette <rfg@monkeys.com>:
prefix = @prefix@
exec_prefix = @exec_prefix@
-bindir = $(exec_prefix)/bin
-libdir = $(exec_prefix)/lib
+bindir = @bindir@
+libdir = @libdir@
-datadir = $(prefix)/lib
-mandir = $(prefix)/man
+datadir = @datadir@
+mandir = @mandir@
man1dir = $(mandir)/man1
man2dir = $(mandir)/man2
man3dir = $(mandir)/man3
man7dir = $(mandir)/man7
man8dir = $(mandir)/man8
man9dir = $(mandir)/man9
-infodir = $(prefix)/info
-includedir = $(prefix)/include
-docdir = $(datadir)/doc
+infodir = @infodir@
+includedir = @includedir@
MKDOC=./chew
SHELL = /bin/sh
-INSTALL = `cd $(srcdir)/../..;pwd`/install.sh -c
-INSTALL_PROGRAM = $(INSTALL)
-INSTALL_DATA = $(INSTALL)
+INSTALL = @INSTALL@
+INSTALL_PROGRAM = @INSTALL_PROGRAM@
+INSTALL_DATA = @INSTALL_DATA@
MAKEINFO = makeinfo
TEXI2DVI = texi2dvi
{
section->alignment_power = 4;
- if (strcmp (section->name, _TEXT) == 0)
+ if (strcmp (section->name, _TEXT) == 0
+ || strcmp (section->name, _INIT) == 0
+ || strcmp (section->name, _FINI) == 0)
section->flags |= SEC_CODE | SEC_LOAD | SEC_ALLOC;
else if (strcmp (section->name, _DATA) == 0
|| strcmp (section->name, _SDATA) == 0)
asection *current;
unsigned int i;
file_ptr old_sofar;
+ boolean rdata_in_text;
boolean first_data, first_nonalloc;
const bfd_vma round = ecoff_backend (abfd)->round;
qsort (sorted_hdrs, abfd->section_count, sizeof (asection *),
ecoff_sort_hdrs);
+ /* Some versions of the OSF linker put the .rdata section in the
+ text segment, and some do not. */
+ rdata_in_text = ecoff_backend (abfd)->rdata_in_text;
+ if (rdata_in_text)
+ {
+ for (i = 0; i < abfd->section_count; i++)
+ {
+ current = sorted_hdrs[i];
+ if (strcmp (current->name, _RDATA) == 0)
+ break;
+ if ((current->flags & SEC_CODE) == 0
+ && strcmp (current->name, _PDATA) != 0
+ && strcmp (current->name, _RCONST) != 0)
+ {
+ rdata_in_text = false;
+ break;
+ }
+ }
+ }
+ ecoff_data (abfd)->rdata_in_text = rdata_in_text;
+
first_data = true;
first_nonalloc = true;
for (i = 0; i < abfd->section_count; i++)
&& (abfd->flags & D_PAGED) != 0
&& ! first_data
&& (current->flags & SEC_CODE) == 0
- && (! ecoff_backend (abfd)->rdata_in_text
+ && (! rdata_in_text
|| strcmp (current->name, _RDATA) != 0)
&& strcmp (current->name, _PDATA) != 0
&& strcmp (current->name, _RCONST) != 0)
if ((section.s_flags & STYP_TEXT) != 0
|| ((section.s_flags & STYP_RDATA) != 0
- && backend->rdata_in_text)
+ && ecoff_data (abfd)->rdata_in_text)
|| section.s_flags == STYP_PDATA
|| (section.s_flags & STYP_DYNAMIC) != 0
|| (section.s_flags & STYP_LIBLIST) != 0
{
unsigned int hash;
+ if (hlog == 0)
+ return 0;
hash = *s++;
while (*s != '\0')
hash = ((hash >> 27) | (hash << 5)) + *s++;
_bfd_ecoff_archive_p (abfd)
bfd *abfd;
{
+ struct artdata *tdata_hold;
char armag[SARMAG + 1];
- if (bfd_read ((PTR) armag, 1, SARMAG, abfd) != SARMAG
- || strncmp (armag, ARMAG, SARMAG) != 0)
+ tdata_hold = abfd->tdata.aout_ar_data;
+
+ if (bfd_read ((PTR) armag, 1, SARMAG, abfd) != SARMAG)
{
if (bfd_get_error () != bfd_error_system_call)
bfd_set_error (bfd_error_wrong_format);
return (const bfd_target *) NULL;
}
+ if (strncmp (armag, ARMAG, SARMAG) != 0)
+ {
+ bfd_set_error (bfd_error_wrong_format);
+ return NULL;
+ }
+
/* We are setting bfd_ardata(abfd) here, but since bfd_ardata
involves a cast, we can't do it as the left operand of
assignment. */
(struct artdata *) bfd_zalloc (abfd, sizeof (struct artdata));
if (bfd_ardata (abfd) == (struct artdata *) NULL)
- return (const bfd_target *) NULL;
+ {
+ abfd->tdata.aout_ar_data = tdata_hold;
+ return (const bfd_target *) NULL;
+ }
bfd_ardata (abfd)->first_file_filepos = SARMAG;
bfd_ardata (abfd)->cache = NULL;
|| _bfd_ecoff_slurp_extended_name_table (abfd) == false)
{
bfd_release (abfd, bfd_ardata (abfd));
- abfd->tdata.aout_ar_data = (struct artdata *) NULL;
+ abfd->tdata.aout_ar_data = tdata_hold;
return (const bfd_target *) NULL;
}
+ if (bfd_has_map (abfd))
+ {
+ bfd *first;
+
+ /* This archive has a map, so we may presume that the contents
+ are object files. Make sure that if the first file in the
+ archive can be recognized as an object file, it is for this
+ target. If not, assume that this is the wrong format. If
+ the first file is not an object file, somebody is doing
+ something weird, and we permit it so that ar -t will work. */
+
+ first = bfd_openr_next_archived_file (abfd, (bfd *) NULL);
+ if (first != NULL)
+ {
+ boolean fail;
+
+ first->target_defaulted = false;
+ fail = false;
+ if (bfd_check_format (first, bfd_object)
+ && first->xvec != abfd->xvec)
+ {
+ (void) bfd_close (first);
+ bfd_release (abfd, bfd_ardata (abfd));
+ abfd->tdata.aout_ar_data = tdata_hold;
+ bfd_set_error (bfd_error_wrong_format);
+ return NULL;
+ }
+
+ /* We ought to close first here, but we can't, because we
+ have no way to remove it from the archive cache. FIXME. */
+ }
+ }
+
return abfd->xvec;
}
\f
PARAMS ((struct bfd_link_info *, bfd_vma, bfd_vma));
extern boolean bfd_elf32_link_create_dynamic_sections
PARAMS ((bfd *, struct bfd_link_info *));
+extern Elf_Internal_Rela *_bfd_elf32_link_read_relocs
+ PARAMS ((bfd *, asection *, PTR, Elf_Internal_Rela *, boolean));
extern const bfd_target *bfd_elf64_object_p PARAMS ((bfd *));
extern const bfd_target *bfd_elf64_core_file_p PARAMS ((bfd *));
PARAMS ((struct bfd_link_info *, bfd_vma, bfd_vma));
extern boolean bfd_elf64_link_create_dynamic_sections
PARAMS ((bfd *, struct bfd_link_info *));
+extern Elf_Internal_Rela *_bfd_elf64_link_read_relocs
+ PARAMS ((bfd *, asection *, PTR, Elf_Internal_Rela *, boolean));
#define bfd_elf32_link_record_dynamic_symbol _bfd_elf_link_record_dynamic_symbol
#define bfd_elf64_link_record_dynamic_symbol _bfd_elf_link_record_dynamic_symbol
static INLINE struct elf_segment_map *make_mapping
PARAMS ((bfd *, asection **, unsigned int, unsigned int, boolean));
+static boolean map_sections_to_segments PARAMS ((bfd *));
static int elf_sort_sections PARAMS ((const PTR, const PTR));
static boolean assign_file_positions_for_segments PARAMS ((bfd *));
static boolean assign_file_positions_except_relocs PARAMS ((bfd *));
|| strncmp (name, ".stab", sizeof ".stab" - 1) == 0)
flags |= SEC_DEBUGGING;
+ /* As a GNU extension, if the name begins with .gnu.linkonce, we
+ only link a single copy of the section. This is used to support
+ g++. g++ will emit each template expansion in its own section.
+ The symbols will be defined as weak, so that multiple definitions
+ are permitted. The GNU linker extension is to actually discard
+ all but one of the sections. */
+ if (strncmp (name, ".gnu.linkonce", sizeof ".gnu.linkonce" - 1) == 0)
+ flags |= SEC_LINK_ONCE | SEC_LINK_DUPLICATES_DISCARD;
+
if (! bfd_set_section_flags (abfd, newsect, flags))
return false;
&& phdr->p_paddr != 0
&& phdr->p_vaddr != phdr->p_paddr
&& phdr->p_vaddr <= hdr->sh_addr
- && phdr->p_vaddr + phdr->p_memsz >= hdr->sh_addr + hdr->sh_size)
+ && phdr->p_vaddr + phdr->p_memsz >= hdr->sh_addr + hdr->sh_size
+ && ((flags & SEC_LOAD) == 0
+ || (phdr->p_offset <= hdr->sh_offset
+ && (phdr->p_offset + phdr->p_filesz
+ >= hdr->sh_offset + hdr->sh_size))))
{
newsect->lma += phdr->p_paddr - phdr->p_vaddr;
break;
this_hdr->sh_flags = 0;
- if ((asect->flags & SEC_ALLOC) != 0)
+ if ((asect->flags & SEC_ALLOC) != 0
+ || asect->user_set_vma)
this_hdr->sh_addr = asect->vma;
else
this_hdr->sh_addr = 0;
&& (dynsec->flags & SEC_LOAD) == 0)
dynsec = NULL;
- /* Deal with -Ttext or something similar such that the
- first section is not adjacent to the program headers. */
- if (count
- && ((sections[0]->lma % maxpagesize) <
- (elf_tdata (abfd)->program_header_size % maxpagesize)))
- phdr_in_section = false;
+ /* Deal with -Ttext or something similar such that the first section
+ is not adjacent to the program headers. This is an
+ approximation, since at this point we don't know exactly how many
+ program headers we will need. */
+ if (count > 0)
+ {
+ bfd_size_type phdr_size;
+
+ phdr_size = elf_tdata (abfd)->program_header_size;
+ if (phdr_size == 0)
+ phdr_size = get_elf_backend_data (abfd)->s->sizeof_phdr;
+ if ((abfd->flags & D_PAGED) == 0
+ || sections[0]->lma % maxpagesize < phdr_size % maxpagesize)
+ phdr_in_section = false;
+ }
for (i = 0, hdrpp = sections; i < count; i++, hdrpp++)
{
asection *hdr;
+ boolean new_segment;
hdr = *hdrpp;
/* See if this section and the last one will fit in the same
- segment. Don't put a loadable section after a non-loadable
- section. If we are building a dynamic executable, don't put
- a writable section in a read only segment (we don't do this
- for a non-dynamic executable because some people prefer to
- have only one program segment; anybody can use PHDRS in their
- linker script to control what happens anyhow). */
- if (last_hdr == NULL
- || ((BFD_ALIGN (last_hdr->lma + last_hdr->_raw_size, maxpagesize)
- >= hdr->lma)
- && ((last_hdr->flags & SEC_LOAD) != 0
- || (hdr->flags & SEC_LOAD) == 0)
- && (dynsec == NULL
- || writable
- || (hdr->flags & SEC_READONLY) != 0)))
+ segment. */
+
+ if (last_hdr == NULL)
+ {
+ /* If we don't have a segment yet, then we don't need a new
+ one (we build the last one after this loop). */
+ new_segment = false;
+ }
+ else if (last_hdr->lma - last_hdr->vma != hdr->lma - hdr->vma)
+ {
+ /* If this section has a different relation between the
+ virtual address and the load address, then we need a new
+ segment. */
+ new_segment = true;
+ }
+ else if (BFD_ALIGN (last_hdr->lma + last_hdr->_raw_size, maxpagesize)
+ < hdr->lma)
+ {
+ /* If putting this section in this segment would force us to
+ skip a page in the segment, then we need a new segment. */
+ new_segment = true;
+ }
+ else if ((abfd->flags & D_PAGED) == 0)
+ {
+ /* If the file is not demand paged, which means that we
+ don't require the sections to be correctly aligned in the
+ file, then there is no other reason for a new segment. */
+ new_segment = false;
+ }
+ else if ((last_hdr->flags & SEC_LOAD) == 0
+ && (hdr->flags & SEC_LOAD) != 0)
+ {
+ /* We don't want to put a loadable section after a
+ nonloadable section in the same segment. */
+ new_segment = true;
+ }
+ else if (! writable
+ && (hdr->flags & SEC_READONLY) == 0
+ && (BFD_ALIGN (last_hdr->lma + last_hdr->_raw_size, maxpagesize)
+ == hdr->lma))
+ {
+ /* We don't want to put a writable section in a read only
+ segment, unless they are on the same page in memory
+ anyhow. We already know that the last section does not
+ bring us past the current section on the page, so the
+ only case in which the new section is not on the same
+ page as the previous section is when the previous section
+ ends precisely on a page boundary. */
+ new_segment = true;
+ }
+ else
{
+ /* Otherwise, we can use the same segment. */
+ new_segment = false;
+ }
+
+ if (! new_segment)
+ {
+ if ((hdr->flags & SEC_READONLY) == 0)
+ writable = true;
last_hdr = hdr;
continue;
}
- /* This section won't fit in the program segment. We must
- create a new program header holding all the sections from
- phdr_index until hdr. */
+ /* We need a new program segment. We must create a new program
+ header holding all the sections from phdr_index until hdr. */
m = make_mapping (abfd, sections, phdr_index, i, phdr_in_section);
if (m == NULL)
if ((hdr->flags & SEC_READONLY) == 0)
writable = true;
+ else
+ writable = false;
last_hdr = hdr;
phdr_index = i;
else if (sec1->vma > sec2->vma)
return 1;
+ /* Sort by LMA. Normally the LMA and the VMA will be the same, and
+ this will do nothing. */
+ if (sec1->lma < sec2->lma)
+ return -1;
+ else if (sec1->lma > sec2->lma)
+ return 1;
+
/* Put !SEC_LOAD sections after SEC_LOAD ones. */
#define TOEND(x) (((x)->flags & SEC_LOAD) == 0)
struct elf_segment_map *m;
unsigned int alloc;
Elf_Internal_Phdr *phdrs;
- file_ptr off;
+ file_ptr off, voff;
bfd_vma filehdr_vaddr, filehdr_paddr;
bfd_vma phdrs_vaddr, phdrs_paddr;
Elf_Internal_Phdr *p;
if (p->p_type == PT_LOAD
&& m->count > 0
&& (m->sections[0]->flags & SEC_LOAD) != 0)
- off += (m->sections[0]->vma - off) % bed->maxpagesize;
+ {
+ if ((abfd->flags & D_PAGED) != 0)
+ off += (m->sections[0]->vma - off) % bed->maxpagesize;
+ else
+ off += ((m->sections[0]->vma - off)
+ % (1 << bfd_get_section_alignment (abfd, m->sections[0])));
+ }
if (m->count == 0)
p->p_vaddr = 0;
else
p->p_paddr = m->sections[0]->lma;
- if (p->p_type == PT_LOAD)
+ if (p->p_type == PT_LOAD
+ && (abfd->flags & D_PAGED) != 0)
p->p_align = bed->maxpagesize;
else if (m->count == 0)
p->p_align = bed->s->file_align;
}
}
+ voff = off;
for (i = 0, secpp = m->sections; i < m->count; i++, secpp++)
{
asection *sec;
sec = *secpp;
flags = sec->flags;
+ align = 1 << bfd_get_section_alignment (abfd, sec);
if (p->p_type == PT_LOAD)
{
the page size. */
if ((flags & SEC_ALLOC) != 0)
{
- adjust = (sec->vma - off) % bed->maxpagesize;
+ if ((abfd->flags & D_PAGED) != 0)
+ adjust = (sec->vma - voff) % bed->maxpagesize;
+ else
+ adjust = (sec->vma - voff) % align;
if (adjust != 0)
{
if (i == 0)
abort ();
p->p_memsz += adjust;
off += adjust;
+ voff += adjust;
if ((flags & SEC_LOAD) != 0)
p->p_filesz += adjust;
}
if ((flags & SEC_LOAD) != 0)
off += sec->_raw_size;
+ if ((flags & SEC_ALLOC) != 0)
+ voff += sec->_raw_size;
}
p->p_memsz += sec->_raw_size;
if ((flags & SEC_LOAD) != 0)
p->p_filesz += sec->_raw_size;
- align = 1 << bfd_get_section_alignment (abfd, sec);
if (align > p->p_align)
p->p_align = align;
(hdr->bfd_section == NULL
? "*unknown*"
: hdr->bfd_section->name)));
- off += (hdr->sh_addr - off) % bed->maxpagesize;
+ if ((abfd->flags & D_PAGED) != 0)
+ off += (hdr->sh_addr - off) % bed->maxpagesize;
+ else
+ off += (hdr->sh_addr - off) % hdr->sh_addralign;
off = _bfd_elf_assign_file_position_for_section (hdr, off,
false);
}
case bfd_arch_powerpc:
i_ehdrp->e_machine = EM_PPC;
break;
+ case bfd_arch_alpha:
+ i_ehdrp->e_machine = EM_ALPHA;
+ break;
+ case bfd_arch_sh:
+ i_ehdrp->e_machine = EM_SH;
+ break;
/* also note that EM_M32, AT&T WE32100 is unknown to bfd */
default:
i_ehdrp->e_machine = EM_NONE;
relocation with modifications based on format and field. */
elf32_hppa_reloc_type **
-hppa_elf_gen_reloc_type (abfd, base_type, format, field, ignore)
+hppa_elf_gen_reloc_type (abfd, base_type, format, field, ignore, sym)
bfd *abfd;
elf32_hppa_reloc_type base_type;
int format;
int field;
int ignore;
+ asymbol *sym;
{
elf32_hppa_reloc_type *finaltype;
elf32_hppa_reloc_type **final_types;
R_386_RELATIVE,
R_386_GOTOFF,
R_386_GOTPC,
+ FIRST_INVALID_RELOC,
+ LAST_INVALID_RELOC = 19,
+ /* The remaining relocs are a GNU extension. */
+ R_386_16 = 20,
+ R_386_PC16,
+ R_386_8,
+ R_386_PC8,
R_386_max
};
HOWTO(R_386_RELATIVE, 0,2,32,false,0,complain_overflow_bitfield, bfd_elf_generic_reloc,"R_386_RELATIVE", true,0xffffffff,0xffffffff,false),
HOWTO(R_386_GOTOFF, 0,2,32,false,0,complain_overflow_bitfield, bfd_elf_generic_reloc,"R_386_GOTOFF", true,0xffffffff,0xffffffff,false),
HOWTO(R_386_GOTPC, 0,2,32,true,0,complain_overflow_bitfield, bfd_elf_generic_reloc,"R_386_GOTPC", true,0xffffffff,0xffffffff,true),
+ { 11 },
+ { 12 },
+ { 13 },
+ { 14 },
+ { 15 },
+ { 16 },
+ { 17 },
+ { 18 },
+ { 19 },
+ /* The remaining relocs are a GNU extension. */
+ HOWTO(R_386_16, 0,1,16,false,0,complain_overflow_bitfield, bfd_elf_generic_reloc,"R_386_16", true,0xffff,0xffff,false),
+ HOWTO(R_386_PC16, 0,1,16,true, 0,complain_overflow_bitfield, bfd_elf_generic_reloc,"R_386_PC16", true,0xffff,0xffff,true),
+ HOWTO(R_386_8, 0,0,8,false,0,complain_overflow_bitfield, bfd_elf_generic_reloc,"R_386_8", true,0xff,0xff,false),
+ HOWTO(R_386_PC8, 0,0,8,true, 0,complain_overflow_bitfield, bfd_elf_generic_reloc,"R_386_PC8", true,0xff,0xff,true),
};
#ifdef DEBUG_GEN_RELOC
TRACE ("BFD_RELOC_386_GOTPC");
return &elf_howto_table[ (int)R_386_GOTPC ];
+ /* The remaining relocs are a GNU extension. */
+ case BFD_RELOC_16:
+ TRACE ("BFD_RELOC_16");
+ return &elf_howto_table[(int) R_386_16];
+
+ case BFD_RELOC_16_PCREL:
+ TRACE ("BFD_RELOC_16_PCREL");
+ return &elf_howto_table[(int) R_386_PC16];
+
+ case BFD_RELOC_8:
+ TRACE ("BFD_RELOC_8");
+ return &elf_howto_table[(int) R_386_8];
+
+ case BFD_RELOC_8_PCREL:
+ TRACE ("BFD_RELOC_8_PCREL");
+ return &elf_howto_table[(int) R_386_PC8];
+
default:
break;
}
arelent *cache_ptr;
Elf32_Internal_Rela *dst;
{
- BFD_ASSERT (ELF32_R_TYPE(dst->r_info) < (unsigned int) R_386_max);
-
- cache_ptr->howto = &elf_howto_table[ELF32_R_TYPE(dst->r_info)];
+ abort ();
}
static void
elf_i386_info_to_howto_rel (abfd, cache_ptr, dst)
- bfd *abfd;
- arelent *cache_ptr;
+ bfd *abfd;
+ arelent *cache_ptr;
Elf32_Internal_Rel *dst;
{
- BFD_ASSERT (ELF32_R_TYPE(dst->r_info) < (unsigned int) R_386_max);
+ enum reloc_type type;
+
+ type = (enum reloc_type) ELF32_R_TYPE (dst->r_info);
+ BFD_ASSERT (type < R_386_max);
+ BFD_ASSERT (type < FIRST_INVALID_RELOC || type > LAST_INVALID_RELOC);
- cache_ptr->howto = &elf_howto_table[ELF32_R_TYPE(dst->r_info)];
+ cache_ptr->howto = &elf_howto_table[(int) type];
}
\f
/* Functions for the i386 ELF linker. */
bfd_reloc_status_type r;
r_type = ELF32_R_TYPE (rel->r_info);
- if (r_type < 0 || r_type >= (int) R_386_max)
+ if (r_type < 0
+ || r_type >= (int) R_386_max
+ || (r_type >= (int) FIRST_INVALID_RELOC
+ && r_type <= (int) LAST_INVALID_RELOC))
{
bfd_set_error (bfd_error_bad_value);
return false;
{ BFD_RELOC_16, R_MIPS_16 },
{ BFD_RELOC_32, R_MIPS_32 },
{ BFD_RELOC_CTOR, R_MIPS_32 },
- { BFD_RELOC_32_PCREL, R_MIPS_REL32 },
{ BFD_RELOC_MIPS_JMP, R_MIPS_26 },
{ BFD_RELOC_HI16_S, R_MIPS_HI16 },
{ BFD_RELOC_LO16, R_MIPS_LO16 },
{
default:
case E_MIPS_ARCH_1:
- /* Just use the default, which was set in elfcode.h. */
+ (void) bfd_default_set_arch_mach (abfd, bfd_arch_mips, 3000);
break;
case E_MIPS_ARCH_2:
unsigned long val;
unsigned int i;
Elf_Internal_Shdr **hdrpp;
+ const char *name;
+ asection *sec;
switch (bfd_get_mach (abfd))
{
i < elf_elfheader (abfd)->e_shnum;
i++, hdrpp++)
{
- if ((*hdrpp)->sh_type == SHT_MIPS_GPTAB)
+ switch ((*hdrpp)->sh_type)
{
- const char *name;
- asection *sec;
+ case SHT_MIPS_LIBLIST:
+ sec = bfd_get_section_by_name (abfd, ".dynstr");
+ if (sec != NULL)
+ (*hdrpp)->sh_link = elf_section_data (sec)->this_idx;
+ break;
+ case SHT_MIPS_GPTAB:
BFD_ASSERT ((*hdrpp)->bfd_section != NULL);
name = bfd_get_section_name (abfd, (*hdrpp)->bfd_section);
BFD_ASSERT (name != NULL
sec = bfd_get_section_by_name (abfd, name + sizeof ".gptab" - 1);
BFD_ASSERT (sec != NULL);
(*hdrpp)->sh_info = elf_section_data (sec)->this_idx;
+ break;
+
+ case SHT_MIPS_CONTENT:
+ BFD_ASSERT ((*hdrpp)->bfd_section != NULL);
+ name = bfd_get_section_name (abfd, (*hdrpp)->bfd_section);
+ BFD_ASSERT (name != NULL
+ && strncmp (name, ".MIPS.content",
+ sizeof ".MIPS.content" - 1) == 0);
+ sec = bfd_get_section_by_name (abfd,
+ name + sizeof ".MIPS.content" - 1);
+ BFD_ASSERT (sec != NULL);
+ (*hdrpp)->sh_info = elf_section_data (sec)->this_idx;
+ break;
+
+ case SHT_MIPS_SYMBOL_LIB:
+ sec = bfd_get_section_by_name (abfd, ".dynsym");
+ if (sec != NULL)
+ (*hdrpp)->sh_link = elf_section_data (sec)->this_idx;
+ sec = bfd_get_section_by_name (abfd, ".liblist");
+ if (sec != NULL)
+ (*hdrpp)->sh_info = elf_section_data (sec)->this_idx;
+ break;
+
+ case SHT_MIPS_EVENTS:
+ BFD_ASSERT ((*hdrpp)->bfd_section != NULL);
+ name = bfd_get_section_name (abfd, (*hdrpp)->bfd_section);
+ BFD_ASSERT (name != NULL);
+ if (strncmp (name, ".MIPS.events", sizeof ".MIPS.events" - 1) == 0)
+ sec = bfd_get_section_by_name (abfd,
+ name + sizeof ".MIPS.events" - 1);
+ else
+ {
+ BFD_ASSERT (strncmp (name, ".MIPS.post_rel",
+ sizeof ".MIPS.post_rel" - 1) == 0);
+ sec = bfd_get_section_by_name (abfd,
+ (name
+ + sizeof ".MIPS.post_rel" - 1));
+ }
+ BFD_ASSERT (sec != NULL);
+ (*hdrpp)->sh_link = elf_section_data (sec)->this_idx;
+ break;
}
}
}
{
elf_flags_init (obfd) = true;
elf_elfheader (obfd)->e_flags = new_flags;
+ if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
+ && bfd_get_arch_info (obfd)->the_default)
+ bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
}
else if (((new_flags ^ old_flags) & ~EF_MIPS_NOREORDER)
== 0) /* Compatible flags are ok */
|| hdr->sh_size != sizeof (Elf32_External_RegInfo))
return false;
break;
+ case SHT_MIPS_IFACE:
+ if (strcmp (name, ".MIPS.interfaces") != 0)
+ return false;
+ break;
+ case SHT_MIPS_CONTENT:
+ if (strncmp (name, ".MIPS.content", sizeof ".MIPS.content" - 1) != 0)
+ return false;
+ break;
case SHT_MIPS_OPTIONS:
if (strcmp (name, ".options") != 0
&& strcmp (name, ".MIPS.options") != 0)
if (strncmp (name, ".debug_", sizeof ".debug_" - 1) != 0)
return false;
break;
+ case SHT_MIPS_SYMBOL_LIB:
+ if (strcmp (name, ".MIPS.symlib") != 0)
+ return false;
+ break;
case SHT_MIPS_EVENTS:
- if (strncmp (name, ".MIPS.events.", sizeof ".MIPS.events." - 1) != 0)
+ if (strncmp (name, ".MIPS.events", sizeof ".MIPS.events" - 1) != 0
+ && strncmp (name, ".MIPS.post_rel",
+ sizeof ".MIPS.post_rel" - 1) != 0)
return false;
break;
default:
{
hdr->sh_type = SHT_MIPS_LIBLIST;
hdr->sh_info = sec->_raw_size / sizeof (Elf32_Lib);
- /* FIXME: Set the sh_link field. */
+ /* The sh_link field is set in final_write_processing. */
}
else if (strcmp (name, ".msym") == 0)
{
|| strcmp (name, ".lit4") == 0
|| strcmp (name, ".lit8") == 0)
hdr->sh_flags |= SHF_MIPS_GPREL;
+ else if (strcmp (name, ".MIPS.interfaces") == 0)
+ {
+ hdr->sh_type = SHT_MIPS_IFACE;
+ hdr->sh_flags |= SHF_MIPS_NOSTRIP;
+ }
+ else if (strcmp (name, ".MIPS.content") == 0)
+ {
+ hdr->sh_type = SHT_MIPS_CONTENT;
+ /* The sh_info field is set in final_write_processing. */
+ }
else if (strcmp (name, ".options") == 0
|| strcmp (name, ".MIPS.options") == 0)
{
hdr->sh_type = SHT_MIPS_OPTIONS;
hdr->sh_entsize = 1;
+ hdr->sh_flags |= SHF_MIPS_NOSTRIP;
}
else if (strncmp (name, ".debug_", sizeof ".debug_" - 1) == 0)
hdr->sh_type = SHT_MIPS_DWARF;
- else if (strncmp (name, ".MIPS.events.", sizeof ".MIPS.events." - 1) == 0)
- hdr->sh_type = SHT_MIPS_EVENTS;
+ else if (strcmp (name, ".MIPS.symlib") == 0)
+ {
+ hdr->sh_type = SHT_MIPS_SYMBOL_LIB;
+ /* The sh_link and sh_info fields are set in
+ final_write_processing. */
+ }
+ else if (strncmp (name, ".MIPS.events", sizeof ".MIPS.events" - 1) == 0
+ || strncmp (name, ".MIPS.post_rel",
+ sizeof ".MIPS.post_rel" - 1) == 0)
+ {
+ hdr->sh_type = SHT_MIPS_EVENTS;
+ hdr->sh_flags |= SHF_MIPS_NOSTRIP;
+ /* The sh_link field is set in final_write_processing. */
+ }
return true;
}
bfd_size_type procedure_count;
/* The size of the .compact_rel section (if SGI_COMPAT). */
bfd_size_type compact_rel_size;
+ /* This flag indicates that the value of DT_MIPS_RLD_MAP dynamic
+ entry is set to the address of __rld_obj_head as in Irix 5. */
+ boolean use_rld_obj_head;
+ /* This is the value of the __rld_map or __rld_obj_head symbol. */
+ bfd_vma rld_value;
};
/* Look up an entry in a MIPS ELF linker hash table. */
ret->dynsym_sec_strindex[i] = (bfd_size_type) -1;
ret->procedure_count = 0;
ret->compact_rel_size = 0;
+ ret->use_rld_obj_head = false;
+ ret->rld_value = 0;
return &ret->root.root;
}
break;
}
+ if (SGI_COMPAT (abfd)
+ && ! info->shared
+ && info->hash->creator == abfd->xvec
+ && strcmp (*namep, "__rld_obj_head") == 0)
+ {
+ struct elf_link_hash_entry *h;
+
+ /* Mark __rld_obj_head as dynamic. */
+ h = NULL;
+ if (! (_bfd_generic_link_add_one_symbol
+ (info, abfd, *namep, BSF_GLOBAL, *secp,
+ (bfd_vma) *valp, (const char *) NULL, false,
+ get_elf_backend_data (abfd)->collect,
+ (struct bfd_link_hash_entry **) &h)))
+ return false;
+ h->elf_link_hash_flags &=~ ELF_LINK_NON_ELF;
+ h->elf_link_hash_flags |= ELF_LINK_HASH_DEF_REGULAR;
+ h->type = STT_OBJECT;
+
+ if (! bfd_elf32_link_record_dynamic_symbol (info, h))
+ return false;
+
+ mips_elf_hash_table (info)->use_rld_obj_head = true;
+ }
+
return true;
}
bfd_byte *cr;
if ((info->shared
- || (h != NULL && !info->static_link
+ || (elf_hash_table (info)->dynamic_sections_created
+ && h != NULL
&& ((h->elf_link_hash_flags & ELF_LINK_HASH_DEF_REGULAR)
== 0)))
&& (input_section->flags & SEC_ALLOC) != 0)
return false;
}
+ if (SGI_COMPAT (abfd)
+ && !info->shared
+ && bfd_get_section_by_name (abfd, ".rld_map") == NULL)
+ {
+ s = bfd_make_section (abfd, ".rld_map");
+ if (s == NULL
+ || ! bfd_set_section_flags (abfd, s, flags & ~SEC_READONLY)
+ || ! bfd_set_section_alignment (abfd, s, 2))
+ return false;
+ }
+
if (SGI_COMPAT (abfd))
{
for (namep = mips_elf_dynsym_rtproc_names; *namep != NULL; namep++)
if (! bfd_elf32_link_record_dynamic_symbol (info, h))
return false;
+
+ if (! mips_elf_hash_table (info)->use_rld_obj_head)
+ {
+ /* __rld_map is a four byte word located in the .data section
+ and is filled in by the rtld to contain a pointer to
+ the _r_debug structure. Its symbol value will be set in
+ mips_elf_finish_dynamic_symbol. */
+ s = bfd_get_section_by_name (abfd, ".rld_map");
+ BFD_ASSERT (s != NULL);
+
+ h = NULL;
+ if (! (_bfd_generic_link_add_one_symbol
+ (info, abfd, "__rld_map", BSF_GLOBAL, s,
+ (bfd_vma) 0, (const char *) NULL, false,
+ get_elf_backend_data (abfd)->collect,
+ (struct bfd_link_hash_entry **) &h)))
+ return false;
+ h->elf_link_hash_flags &=~ ELF_LINK_NON_ELF;
+ h->elf_link_hash_flags |= ELF_LINK_HASH_DEF_REGULAR;
+ h->type = STT_OBJECT;
+
+ if (! bfd_elf32_link_record_dynamic_symbol (info, h))
+ return false;
+ }
}
return true;
sym_hashes = elf_sym_hashes (abfd);
extsymoff = (elf_bad_symtab (abfd)) ? 0 : symtab_hdr->sh_info;
- sgot = NULL;
+ if (dynobj == NULL)
+ {
+ sgot = NULL;
+ g = NULL;
+ }
+ else
+ {
+ sgot = bfd_get_section_by_name (dynobj, ".got");
+ if (sgot == NULL)
+ g = NULL;
+ else
+ {
+ BFD_ASSERT (elf_section_data (sgot) != NULL);
+ g = (struct mips_got_info *) elf_section_data (sgot)->tdata;
+ BFD_ASSERT (g != NULL);
+ }
+ }
+
sreloc = NULL;
rel_end = relocs + sec->reloc_count;
h = sym_hashes[r_symndx - extsymoff];
/* Some relocs require a global offset table. */
- if (dynobj == NULL)
+ if (dynobj == NULL || sgot == NULL)
{
switch (ELF32_R_TYPE (rel->r_info))
{
case R_MIPS_CALL_LO16:
case R_MIPS_GOT_HI16:
case R_MIPS_GOT_LO16:
- elf_hash_table (info)->dynobj = dynobj = abfd;
+ if (dynobj == NULL)
+ elf_hash_table (info)->dynobj = dynobj = abfd;
if (! mips_elf_create_got_section (dynobj, info))
return false;
+ sgot = bfd_get_section_by_name (dynobj, ".got");
+ BFD_ASSERT (sgot != NULL);
+ BFD_ASSERT (elf_section_data (sgot) != NULL);
+ g = (struct mips_got_info *) elf_section_data (sgot)->tdata;
+ BFD_ASSERT (g != NULL);
+ break;
+
+ case R_MIPS_32:
+ case R_MIPS_REL32:
+ if (dynobj == NULL
+ && (info->shared || h != NULL)
+ && (sec->flags & SEC_ALLOC) != 0)
+ elf_hash_table (info)->dynobj = dynobj = abfd;
break;
default:
case R_MIPS_CALL_HI16:
case R_MIPS_CALL_LO16:
/* This symbol requires a global offset table entry. */
- if (sgot == NULL)
- {
- sgot = bfd_get_section_by_name (dynobj, ".got");
- BFD_ASSERT (sgot != NULL);
- BFD_ASSERT (elf_section_data (sgot) != NULL);
- g = (struct mips_got_info *) elf_section_data (sgot)->tdata;
- BFD_ASSERT (g != NULL);
- }
BFD_ASSERT (h != NULL);
case R_MIPS_GOT_HI16:
case R_MIPS_GOT_LO16:
/* This symbol requires a global offset table entry. */
- if (sgot == NULL)
- {
- sgot = bfd_get_section_by_name (dynobj, ".got");
- BFD_ASSERT (sgot != NULL);
- BFD_ASSERT (elf_section_data (sgot) != NULL);
- g = (struct mips_got_info *) elf_section_data (sgot)->tdata;
- BFD_ASSERT (g != NULL);
- }
if (h != NULL)
{
if ((info->shared || h != NULL)
&& (sec->flags & SEC_ALLOC) != 0)
{
- /* When creating a shared object, we must copy these
- reloc types into the output file as R_MIPS_REL32
- relocs. We create the .rel.dyn reloc section in
- dynobj and make room for this reloc. */
if (sreloc == NULL)
{
const char *name = ".rel.dyn";
| SEC_HAS_CONTENTS
| SEC_IN_MEMORY
| SEC_READONLY))
- || ! bfd_set_section_alignment (dynobj, sreloc, 4))
+ || ! bfd_set_section_alignment (dynobj, sreloc,
+ 4))
return false;
-
+ }
+ }
+ if (info->shared)
+ {
+ /* When creating a shared object, we must copy these
+ reloc types into the output file as R_MIPS_REL32
+ relocs. We make room for this reloc in the
+ .rel.dyn reloc section */
+ if (sreloc->_raw_size == 0)
+ {
/* Add a null element. */
sreloc->_raw_size += sizeof (Elf32_External_Rel);
++sreloc->reloc_count;
}
+ sreloc->_raw_size += sizeof (Elf32_External_Rel);
}
-
- if (info->shared)
- sreloc->_raw_size += sizeof (Elf32_External_Rel);
else
{
struct mips_elf_link_hash_entry *hmips;
s = bfd_get_section_by_name (dynobj, ".rel.dyn");
BFD_ASSERT (s != NULL);
+ if (s->_raw_size == 0)
+ {
+ /* Make room for a null element. */
+ s->_raw_size += sizeof (Elf32_External_Rel);
+ ++s->reloc_count;
+ }
s->_raw_size += hmips->mips_32_relocs * sizeof (Elf32_External_Rel);
}
of .text section. So put a dummy. XXX */
s->_raw_size += MIPS_FUNCTION_STUB_SIZE;
}
+ else if (! info->shared
+ && ! mips_elf_hash_table (info)->use_rld_obj_head
+ && strncmp (name, ".rld_map", 8) == 0)
+ {
+ /* We add a room for __rld_map. It will be filled in by the
+ rtld to contain a pointer to the _r_debug structure. */
+ s->_raw_size += 4;
+ }
else if (SGI_COMPAT (output_bfd)
&& strncmp (name, ".compact_rel", 12) == 0)
s->_raw_size += mips_elf_hash_table (info)->compact_rel_size;
dynamic linker and used by the debugger. */
if (! info->shared)
{
- if (! bfd_elf32_add_dynamic_entry (info, DT_DEBUG, 0))
- return false;
+ if (SGI_COMPAT (output_bfd))
+ {
+ /* SGI object has the equivalence of DT_DEBUG in the
+ DT_MIPS_RLD_MAP entry. */
+ if (! bfd_elf32_add_dynamic_entry (info, DT_MIPS_RLD_MAP, 0))
+ return false;
+ }
+ else
+ if (! bfd_elf32_add_dynamic_entry (info, DT_DEBUG, 0))
+ return false;
}
if (reltext)
}
}
- s = bfd_get_section_by_name (dynobj, ".got");
- BFD_ASSERT (s != NULL);
- BFD_ASSERT (elf_section_data (s) != NULL);
- g = (struct mips_got_info *) elf_section_data (s)->tdata;
- BFD_ASSERT (g != NULL);
-
- /* If there are no global got symbols, fake the last symbol so for
- safety. */
- if (g->global_gotsym)
- g->global_gotsym += c;
- else
- g->global_gotsym = elf_hash_table (info)->dynsymcount - 1;
+ if (sgot != NULL)
+ {
+ BFD_ASSERT (elf_section_data (sgot) != NULL);
+ g = (struct mips_got_info *) elf_section_data (sgot)->tdata;
+ BFD_ASSERT (g != NULL);
+
+ /* If there are no global got symbols, fake the last symbol so
+ for safety. */
+ if (g->global_gotsym)
+ g->global_gotsym += c;
+ else
+ g->global_gotsym = elf_hash_table (info)->dynsymcount - 1;
+ }
}
return true;
}
}
+ if (SGI_COMPAT (output_bfd)
+ && ! info->shared)
+ {
+ if (! mips_elf_hash_table (info)->use_rld_obj_head
+ && strcmp (name, "__rld_map") == 0)
+ {
+ asection *s = bfd_get_section_by_name (dynobj, ".rld_map");
+ BFD_ASSERT (s != NULL);
+ sym->st_value = s->output_section->vma + s->output_offset;
+ bfd_put_32 (output_bfd, (bfd_vma) 0, s->contents);
+ if (mips_elf_hash_table (info)->rld_value == 0)
+ mips_elf_hash_table (info)->rld_value = sym->st_value;
+ }
+ else if (mips_elf_hash_table (info)->use_rld_obj_head
+ && strcmp (name, "__rld_obj_head") == 0)
+ {
+ asection *s = bfd_get_section_by_name (dynobj, ".rld_map");
+ BFD_ASSERT (s != NULL);
+ mips_elf_hash_table (info)->rld_value = sym->st_value;
+ }
+ }
+
return true;
}
sdyn = bfd_get_section_by_name (dynobj, ".dynamic");
sgot = bfd_get_section_by_name (dynobj, ".got");
- BFD_ASSERT (sgot != NULL);
-
- BFD_ASSERT (elf_section_data (sgot) != NULL);
- g = (struct mips_got_info *) elf_section_data (sgot)->tdata;
- BFD_ASSERT (g != NULL);
+ if (sgot == NULL)
+ g = NULL;
+ else
+ {
+ BFD_ASSERT (elf_section_data (sgot) != NULL);
+ g = (struct mips_got_info *) elf_section_data (sgot)->tdata;
+ BFD_ASSERT (g != NULL);
+ }
if (elf_hash_table (info)->dynamic_sections_created)
{
Elf32_External_Dyn *dyncon, *dynconend;
BFD_ASSERT (sdyn != NULL);
+ BFD_ASSERT (g != NULL);
dyncon = (Elf32_External_Dyn *) sdyn->contents;
dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->_raw_size);
bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
break;
+ case DT_MIPS_RLD_MAP:
+ dyn.d_un.d_ptr = mips_elf_hash_table (info)->rld_value;
+ bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
+ break;
+
}
}
}
/* The first entry of the global offset table will be filled at
runtime. The second entry will be used by some runtime loaders.
This isn't the case of Irix rld. */
- if (sgot->_raw_size > 0)
+ if (sgot != NULL && sgot->_raw_size > 0)
{
bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
bfd_put_32 (output_bfd, (bfd_vma) 0x80000000, sgot->contents + 4);
}
- elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
+ if (sgot != NULL)
+ elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
{
asection *sdynsym;
/* Clean up a first relocation in .rel.dyn. */
s = bfd_get_section_by_name (dynobj, ".rel.dyn");
- if (s != NULL)
+ if (s != NULL && s->_raw_size > 0)
memset (s->contents, 0, sizeof (Elf32_External_Rel));
}
#define TARGET_BIG_NAME "elf32-bigmips"
#define ELF_ARCH bfd_arch_mips
#define ELF_MACHINE_CODE EM_MIPS
-#define ELF_MAXPAGESIZE 0x10000
+
+/* The SVR4 MIPS ABI says that this should be 0x10000, but Irix 5 uses
+ a value of 0x1000, and we are compatible. */
+#define ELF_MAXPAGESIZE 0x1000
+
#define elf_backend_collect true
#define elf_backend_type_change_ok true
#define elf_info_to_howto 0
static void ppc_elf_info_to_howto
PARAMS ((bfd *abfd, arelent *cache_ptr, Elf32_Internal_Rela *dst));
static void ppc_elf_howto_init PARAMS ((void));
+static bfd_reloc_status_type ppc_elf_addr16_ha_reloc
+ PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **));
static boolean ppc_elf_set_private_flags PARAMS ((bfd *, flagword));
static boolean ppc_elf_copy_private_bfd_data PARAMS ((bfd *, bfd *));
static boolean ppc_elf_merge_private_bfd_data PARAMS ((bfd *, bfd *));
false, /* pc_relative */
0, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
- bfd_elf_generic_reloc, /* special_function */
+ ppc_elf_addr16_ha_reloc, /* special_function */
"R_PPC_ADDR16_HA", /* name */
false, /* partial_inplace */
0, /* src_mask */
cache_ptr->howto = ppc_elf_howto_table[ELF32_R_TYPE (dst->r_info)];
}
+/* Handle the R_PPC_ADDR16_HA reloc. */
+
+static bfd_reloc_status_type
+ppc_elf_addr16_ha_reloc (abfd, reloc_entry, symbol, data, input_section,
+ output_bfd, error_message)
+ bfd *abfd;
+ arelent *reloc_entry;
+ asymbol *symbol;
+ PTR data;
+ asection *input_section;
+ bfd *output_bfd;
+ char **error_message;
+{
+ bfd_vma relocation;
+
+ if (output_bfd != NULL)
+ {
+ reloc_entry->address += input_section->output_offset;
+ return bfd_reloc_ok;
+ }
+
+ if (reloc_entry->address > input_section->_cooked_size)
+ return bfd_reloc_outofrange;
+
+ if (bfd_is_com_section (symbol->section))
+ relocation = 0;
+ else
+ relocation = symbol->value;
+
+ relocation += symbol->section->output_section->vma;
+ relocation += symbol->section->output_offset;
+ relocation += reloc_entry->addend;
+
+ reloc_entry->addend += (relocation & 0x8000) << 1;
+
+ return bfd_reloc_continue;
+}
+
/* Function to set whether a module needs the -mrelocatable bit set. */
static boolean
("%s: compiled normally and linked with modules compiled with -mrelocatable",
bfd_get_filename (ibfd));
}
- else if ((new_flags & EF_PPC_RELOCATABLE_LIB) != 0)
- elf_elfheader (obfd)->e_flags |= EF_PPC_RELOCATABLE_LIB;
+ /* If -mrelocatable-lib is linked with an object without -mrelocatable-lib, turn off
+ the -mrelocatable-lib, since at least one module isn't relocatable. */
+ else if ((old_flags & EF_PPC_RELOCATABLE_LIB) != 0
+ && (new_flags & EF_PPC_RELOCATABLE_LIB) == 0)
+ elf_elfheader (obfd)->e_flags &= ~EF_PPC_RELOCATABLE_LIB;
/* Do not warn about eabi vs. V.4 mismatch, just or in the bit if any module uses it */
goto got_no_match;
elf_swap_shdr_in (abfd, &x_shdr, i_shdrp + shindex);
elf_elfsections (abfd)[shindex] = i_shdrp + shindex;
+
+ /* If the section is loaded, but not page aligned, clear
+ D_PAGED. */
+ if ((i_shdrp[shindex].sh_flags & SHF_ALLOC) != 0
+ && i_shdrp[shindex].sh_type != SHT_NOBITS
+ && (((i_shdrp[shindex].sh_addr - i_shdrp[shindex].sh_offset)
+ % ebd->maxpagesize)
+ != 0))
+ abfd->flags &= ~D_PAGED;
}
if (i_ehdrp->e_shstrndx)
{
sym = *ptr->sym_ptr_ptr;
if (sym == last_sym)
n = last_sym_idx;
+ else if (bfd_is_abs_section (sym->section) && sym->value == 0)
+ n = STN_UNDEF;
else
{
last_sym = sym;
last_sym_idx = n;
}
- if ((*ptr->sym_ptr_ptr)->the_bfd->xvec != abfd->xvec
+ if ((*ptr->sym_ptr_ptr)->the_bfd != NULL
+ && (*ptr->sym_ptr_ptr)->the_bfd->xvec != abfd->xvec
&& ! _bfd_elf_validate_reloc (abfd, ptr))
{
*failedp = true;
PARAMS ((bfd *, struct bfd_link_info *));
static boolean elf_link_add_archive_symbols
PARAMS ((bfd *, struct bfd_link_info *));
-static Elf_Internal_Rela *elf_link_read_relocs
- PARAMS ((bfd *, asection *, PTR, Elf_Internal_Rela *, boolean));
static boolean elf_export_symbol
PARAMS ((struct elf_link_hash_entry *, PTR));
static boolean elf_adjust_dynamic_symbol
by some other object. If it has, we want to use the
existing definition, and we do not want to report a
multiple symbol definition error; we do this by
- clobbering sec to be bfd_und_section_ptr. */
+ clobbering sec to be bfd_und_section_ptr. We treat a
+ common symbol as a definition if the symbol in the shared
+ library is a function, since common symbols always
+ represent variables; this can cause confusion in
+ principle, but any such confusion would seem to indicate
+ an erroneous program or shared library. */
if (dynamic && definition)
{
if (h->root.type == bfd_link_hash_defined
|| h->root.type == bfd_link_hash_defweak
|| (h->root.type == bfd_link_hash_common
- && bind == STB_WEAK))
+ && (bind == STB_WEAK
+ || ELF_ST_TYPE (sym.st_info) == STT_FUNC)))
{
sec = bfd_und_section_ptr;
definition = false;
size_change_ok = true;
+ if (h->root.type == bfd_link_hash_common)
+ type_change_ok = true;
}
}
objects, even if they are defined after the dynamic
object in the link. */
if (! dynamic
- && definition
+ && (definition
+ || (bfd_is_com_section (sec)
+ && (h->root.type == bfd_link_hash_defweak
+ || h->type == STT_FUNC)))
&& (h->root.type == bfd_link_hash_defined
|| h->root.type == bfd_link_hash_defweak)
&& (h->elf_link_hash_flags & ELF_LINK_HASH_DEF_DYNAMIC) != 0
h->root.type = bfd_link_hash_undefined;
h->root.u.undef.abfd = h->root.u.def.section->owner;
size_change_ok = true;
+ if (bfd_is_com_section (sec))
+ type_change_ok = true;
}
}
if ((o->flags & SEC_ALLOC) == 0)
continue;
- internal_relocs = elf_link_read_relocs (abfd, o, (PTR) NULL,
- (Elf_Internal_Rela *) NULL,
- info->keep_memory);
+ internal_relocs = (NAME(_bfd_elf,link_read_relocs)
+ (abfd, o, (PTR) NULL,
+ (Elf_Internal_Rela *) NULL,
+ info->keep_memory));
if (internal_relocs == NULL)
goto error_return;
value is allocated using either malloc or bfd_alloc, according to
the KEEP_MEMORY argument. */
-static Elf_Internal_Rela *
-elf_link_read_relocs (abfd, o, external_relocs, internal_relocs, keep_memory)
+Elf_Internal_Rela *
+NAME(_bfd_elf,link_read_relocs) (abfd, o, external_relocs, internal_relocs,
+ keep_memory)
bfd *abfd;
asection *o;
PTR external_relocs;
zero. This is done in elf_fake_sections as well, but forcing
the VMA to 0 here will ensure that relocs against these
sections are handled correctly. */
- if ((o->flags & SEC_ALLOC) == 0)
+ if ((o->flags & SEC_ALLOC) == 0
+ && ! o->user_set_vma)
o->vma = 0;
}
Elf_Internal_Shdr *symtab_hdr;
size_t locsymcount;
size_t extsymoff;
+ Elf_External_Sym *external_syms;
Elf_External_Sym *esym;
Elf_External_Sym *esymend;
Elf_Internal_Sym *isym;
}
/* Read the local symbols. */
- if (locsymcount > 0
- && (bfd_seek (input_bfd, symtab_hdr->sh_offset, SEEK_SET) != 0
- || (bfd_read (finfo->external_syms, sizeof (Elf_External_Sym),
+ if (symtab_hdr->contents != NULL)
+ external_syms = (Elf_External_Sym *) symtab_hdr->contents;
+ else if (locsymcount == 0)
+ external_syms = NULL;
+ else
+ {
+ external_syms = finfo->external_syms;
+ if (bfd_seek (input_bfd, symtab_hdr->sh_offset, SEEK_SET) != 0
+ || (bfd_read (external_syms, sizeof (Elf_External_Sym),
locsymcount, input_bfd)
- != locsymcount * sizeof (Elf_External_Sym))))
- return false;
+ != locsymcount * sizeof (Elf_External_Sym)))
+ return false;
+ }
/* Swap in the local symbols and write out the ones which we know
are going into the output file. */
- esym = finfo->external_syms;
+ esym = external_syms;
esymend = esym + locsymcount;
isym = finfo->internal_syms;
pindex = finfo->indices;
*ppsection = isec;
/* Don't output the first, undefined, symbol. */
- if (esym == finfo->external_syms)
+ if (esym == external_syms)
continue;
/* If we are stripping all symbols, we don't want to output this
/* Relocate the contents of each section. */
for (o = input_bfd->sections; o != NULL; o = o->next)
{
+ bfd_byte *contents;
+
if (! o->linker_mark)
{
/* This section was omitted from the link. */
continue;
}
- /* Read the contents of the section. */
- if (! bfd_get_section_contents (input_bfd, o, finfo->contents,
- (file_ptr) 0, o->_raw_size))
- return false;
+ /* Get the contents of the section. They have been cached by a
+ relaxation routine. Note that o is a section in an input
+ file, so the contents field will not have been set by any of
+ the routines which work on output files. */
+ if (elf_section_data (o)->this_hdr.contents != NULL)
+ contents = elf_section_data (o)->this_hdr.contents;
+ else
+ {
+ contents = finfo->contents;
+ if (! bfd_get_section_contents (input_bfd, o, contents,
+ (file_ptr) 0, o->_raw_size))
+ return false;
+ }
if ((o->flags & SEC_RELOC) != 0)
{
Elf_Internal_Rela *internal_relocs;
/* Get the swapped relocs. */
- internal_relocs = elf_link_read_relocs (input_bfd, o,
- finfo->external_relocs,
- finfo->internal_relocs,
- false);
+ internal_relocs = (NAME(_bfd_elf,link_read_relocs)
+ (input_bfd, o, finfo->external_relocs,
+ finfo->internal_relocs, false));
if (internal_relocs == NULL
&& o->reloc_count > 0)
return false;
the addend to be adjusted. */
if (! (*relocate_section) (output_bfd, finfo->info,
- input_bfd, o,
- finfo->contents,
+ input_bfd, o, contents,
internal_relocs,
finfo->internal_syms,
finfo->sections))
if (elf_section_data (o)->stab_info == NULL)
{
if (! bfd_set_section_contents (output_bfd, o->output_section,
- finfo->contents, o->output_offset,
+ contents, o->output_offset,
(o->_cooked_size != 0
? o->_cooked_size
: o->_raw_size)))
{
if (! _bfd_write_section_stabs (output_bfd, o,
&elf_section_data (o)->stab_info,
- finfo->contents))
+ contents))
return false;
}
}
linker_section_ptr->written_address_p = false;
*ptr_linker_section_ptr = linker_section_ptr;
+#if 0
if (lsect->hole_size && lsect->hole_offset < lsect->max_hole_offset)
{
- linker_section_ptr->offset = lsect->section->_raw_size - lsect->hole_size;
+ linker_section_ptr->offset = lsect->section->_raw_size - lsect->hole_size + (ARCH_SIZE / 8);
lsect->hole_offset += ARCH_SIZE / 8;
lsect->sym_offset += ARCH_SIZE / 8;
if (lsect->sym_hash) /* Bump up symbol value if needed */
- lsect->sym_hash->root.u.def.value += ARCH_SIZE / 8;
+ {
+ lsect->sym_hash->root.u.def.value += ARCH_SIZE / 8;
+#ifdef DEBUG
+ fprintf (stderr, "Bump up %s by %ld, current value = %ld\n",
+ lsect->sym_hash->root.root.string,
+ (long)ARCH_SIZE / 8,
+ (long)lsect->sym_hash->root.u.def.value);
+#endif
+ }
}
else
+#endif
linker_section_ptr->offset = lsect->section->_raw_size;
lsect->section->_raw_size += ARCH_SIZE / 8;
bfd_generic_get_relocated_section_contents
#endif
+#ifndef bfd_elfNN_bfd_relax_section
#define bfd_elfNN_bfd_relax_section bfd_generic_relax_section
+#endif
+
#define bfd_elfNN_bfd_make_debug_symbol \
((asymbol *(*) PARAMS ((bfd *, void *, unsigned long))) bfd_nullvoidptr)
#define bfd_elfNN_bfd_link_split_section _bfd_generic_link_split_section
#endif
+#ifndef bfd_elfNN_archive_p
+#define bfd_elfNN_archive_p bfd_generic_archive_p
+#endif
+
+#ifndef bfd_elfNN_write_archive_contents
+#define bfd_elfNN_write_archive_contents _bfd_write_archive_contents
+#endif
+
+#ifndef bfd_elfNN_mkarchive
+#define bfd_elfNN_mkarchive _bfd_generic_mkarchive
+#endif
+
#ifndef elf_symbol_leading_char
#define elf_symbol_leading_char 0
#endif
/* bfd_check_format: check the format of a file being read */
{ _bfd_dummy_target, /* unknown format */
bfd_elfNN_object_p, /* assembler/linker output (object file) */
- bfd_generic_archive_p, /* an archive */
+ bfd_elfNN_archive_p, /* an archive */
bfd_elfNN_core_file_p /* a core file */
},
/* bfd_set_format: set the format of a file being written */
{ bfd_false,
bfd_elf_mkobject,
- _bfd_generic_mkarchive,
+ bfd_elfNN_mkarchive,
bfd_false
},
/* bfd_write_contents: write cached information into a file being written */
{ bfd_false,
bfd_elfNN_write_object_contents,
- _bfd_write_archive_contents,
+ bfd_elfNN_write_archive_contents,
bfd_false
},
BFD_JUMP_TABLE_GENERIC (bfd_elfNN),
BFD_JUMP_TABLE_COPY (bfd_elfNN),
BFD_JUMP_TABLE_CORE (bfd_elfNN),
+#ifdef bfd_elfNN_archive_functions
+ BFD_JUMP_TABLE_ARCHIVE (bfd_elfNN_archive),
+#else
BFD_JUMP_TABLE_ARCHIVE (_bfd_archive_coff),
+#endif
BFD_JUMP_TABLE_SYMBOLS (bfd_elfNN),
BFD_JUMP_TABLE_RELOCS (bfd_elfNN),
BFD_JUMP_TABLE_WRITE (bfd_elfNN),
/* bfd_check_format: check the format of a file being read */
{ _bfd_dummy_target, /* unknown format */
bfd_elfNN_object_p, /* assembler/linker output (object file) */
- bfd_generic_archive_p, /* an archive */
+ bfd_elfNN_archive_p, /* an archive */
bfd_elfNN_core_file_p /* a core file */
},
/* bfd_set_format: set the format of a file being written */
{ bfd_false,
bfd_elf_mkobject,
- _bfd_generic_mkarchive,
+ bfd_elfNN_mkarchive,
bfd_false
},
/* bfd_write_contents: write cached information into a file being written */
{ bfd_false,
bfd_elfNN_write_object_contents,
- _bfd_write_archive_contents,
+ bfd_elfNN_write_archive_contents,
bfd_false
},
BFD_JUMP_TABLE_GENERIC (bfd_elfNN),
BFD_JUMP_TABLE_COPY (bfd_elfNN),
BFD_JUMP_TABLE_CORE (bfd_elfNN),
+#ifdef bfd_elfNN_archive_functions
+ BFD_JUMP_TABLE_ARCHIVE (bfd_elfNN_archive),
+#else
BFD_JUMP_TABLE_ARCHIVE (_bfd_archive_coff),
+#endif
BFD_JUMP_TABLE_SYMBOLS (bfd_elfNN),
BFD_JUMP_TABLE_RELOCS (bfd_elfNN),
BFD_JUMP_TABLE_WRITE (bfd_elfNN),
/* BFD back-end for i386 a.out binaries under LynxOS.
- Copyright (C) 1990, 1991, 1992 Free Software Foundation, Inc.
+ Copyright (C) 1990, 91, 92, 93, 94, 95, 1996 Free Software Foundation, Inc.
This file is part of BFD, the Binary File Descriptor library.
#endif /* LYNX_CORE */
\f
-#define KEEPIT flags
+#define KEEPIT udata.i
extern reloc_howto_type aout_32_ext_howto_table[];
extern reloc_howto_type aout_32_std_howto_table[];
{
/* Fill in symbol */
r_extern = 1;
- r_index = stoi ((*(g->sym_ptr_ptr))->KEEPIT);
-
+ r_index = (*g->sym_ptr_ptr)->KEEPIT;
}
}
else
else
{
r_extern = 1;
- r_index = stoi ((*(g->sym_ptr_ptr))->KEEPIT);
+ r_index = (*g->sym_ptr_ptr)->KEEPIT;
}
}
else
ieee_data_type *ieee;
unsigned int index;
{
+ if (index >= ieee->section_table_size)
+ {
+ unsigned int c, i;
+ asection **n;
+
+ c = ieee->section_table_size;
+ if (c == 0)
+ c = 20;
+ while (c <= index)
+ c *= 2;
+
+ n = ((asection **)
+ bfd_realloc (ieee->section_table, c * sizeof (asection *)));
+ if (n == NULL)
+ return NULL;
+
+ for (i = ieee->section_table_size; i < c; i++)
+ n[i] = NULL;
+
+ ieee->section_table = n;
+ ieee->section_table_size = c;
+ }
+
if (ieee->section_table[index] == (asection *) NULL)
{
char *tmp = bfd_alloc (abfd, 11);
unsigned int section_index;
next_byte (&(ieee->h));
section_index = must_parse_int (&(ieee->h));
- /* Fixme to be nice about a silly number of sections */
- BFD_ASSERT (section_index < NSECTIONS);
section = get_section_entry (abfd, ieee, section_index);
ieee->external_reference_min_index = IEEE_REFERENCE_BASE;
ieee->external_reference_max_index = 0;
ieee->h.abfd = abfd;
- memset ((PTR) ieee->section_table, 0, sizeof (ieee->section_table));
+ ieee->section_table = NULL;
+ ieee->section_table_size = 0;
processor = ieee->mb.processor = read_id (&(ieee->h));
if (strcmp (processor, "LIBRARY") == 0)
{
if (section->contents == NULL)
{
- section->contents = bfd_alloc (abfd, section->_raw_size);
+ section->contents = ((unsigned char *)
+ bfd_alloc (abfd, section->_raw_size));
if (section->contents == NULL)
return false;
}
FILE * bfd_cache_lookup_worker PARAMS ((bfd *));
extern bfd *bfd_last_cache;
-
-/* Now Steve, what's the story here? */
-#ifdef lint
-#define itos(x) "l"
-#define stoi(x) 1
-#else
-#define itos(x) ((char*)(x))
-#define stoi(x) ((int)(x))
-#endif
/* List of supported target vectors, and the default vector (if
bfd_default_vector[0] is NULL, there is no default). */
extern bfd_vma _bfd_get_gp_value PARAMS ((bfd *));
extern void _bfd_set_gp_value PARAMS ((bfd *, bfd_vma));
+/* Function shared by the COFF and ELF SH backends, which have no
+ other common header files. */
+
+extern boolean _bfd_sh_align_load_span
+ PARAMS ((bfd *, asection *, bfd_byte *,
+ boolean (*) (bfd *, asection *, PTR, bfd_byte *, bfd_vma),
+ PTR, bfd_vma **, bfd_vma *, bfd_vma, bfd_vma, boolean *));
+
/* And more follows */
#include "sysdep.h"
#include "libbfd.h"
+#ifndef HAVE_GETPAGESIZE
+#define getpagesize() 2048
+#endif
+
static int real_read PARAMS ((PTR, size_t, size_t, FILE *));
/*
FILE * bfd_cache_lookup_worker PARAMS ((bfd *));
extern bfd *bfd_last_cache;
-
-/* Now Steve, what's the story here? */
-#ifdef lint
-#define itos(x) "l"
-#define stoi(x) 1
-#else
-#define itos(x) ((char*)(x))
-#define stoi(x) ((int)(x))
-#endif
/* List of supported target vectors, and the default vector (if
bfd_default_vector[0] is NULL, there is no default). */
extern bfd_vma _bfd_get_gp_value PARAMS ((bfd *));
extern void _bfd_set_gp_value PARAMS ((bfd *, bfd_vma));
+/* Function shared by the COFF and ELF SH backends, which have no
+ other common header files. */
+
+extern boolean _bfd_sh_align_load_span
+ PARAMS ((bfd *, asection *, bfd_byte *,
+ boolean (*) (bfd *, asection *, PTR, bfd_byte *, bfd_vma),
+ PTR, bfd_vma **, bfd_vma *, bfd_vma, bfd_vma, boolean *));
+
/* And more follows */
void
"BFD_RELOC_SPARC_5",
"BFD_RELOC_ALPHA_GPDISP_HI16",
"BFD_RELOC_ALPHA_GPDISP_LO16",
+ "BFD_RELOC_ALPHA_GPDISP",
"BFD_RELOC_ALPHA_LITERAL",
"BFD_RELOC_ALPHA_LITUSE",
"BFD_RELOC_ALPHA_HINT",
+ "BFD_RELOC_ALPHA_LINKAGE",
"BFD_RELOC_MIPS_JMP",
"BFD_RELOC_HI16",
"BFD_RELOC_HI16_S",
"BFD_RELOC_ARM_LDR_IMM",
"BFD_RELOC_ARM_LITERAL",
"BFD_RELOC_ARM_IN_POOL",
+ "BFD_RELOC_ARM_OFFSET_IMM8",
+ "BFD_RELOC_ARM_HWLITERAL",
+ "BFD_RELOC_ARM_THUMB_ADD",
+ "BFD_RELOC_ARM_THUMB_IMM",
+ "BFD_RELOC_ARM_THUMB_SHIFT",
+ "BFD_RELOC_ARM_THUMB_OFFSET",
+ "BFD_RELOC_SH_PCDISP8BY2",
+ "BFD_RELOC_SH_PCDISP12BY2",
+ "BFD_RELOC_SH_IMM4",
+ "BFD_RELOC_SH_IMM4BY2",
+ "BFD_RELOC_SH_IMM4BY4",
+ "BFD_RELOC_SH_IMM8",
+ "BFD_RELOC_SH_IMM8BY2",
+ "BFD_RELOC_SH_IMM8BY4",
+ "BFD_RELOC_SH_PCRELIMM8BY2",
+ "BFD_RELOC_SH_PCRELIMM8BY4",
+ "BFD_RELOC_SH_SWITCH16",
+ "BFD_RELOC_SH_SWITCH32",
+ "BFD_RELOC_SH_USES",
+ "BFD_RELOC_SH_COUNT",
+ "BFD_RELOC_SH_ALIGN",
+ "BFD_RELOC_SH_CODE",
+ "BFD_RELOC_SH_DATA",
+ "BFD_RELOC_SH_LABEL",
+
+
+
"@@overflow: BFD_RELOC_UNUSED@@",
};
#endif
the memory just for the infrequently called find_nearest_line. */
struct ecoff_find_line *find_line_info;
+ /* Whether the .rdata section is in the text segment for this
+ particular ECOFF file. This is not valid until
+ ecoff_compute_section_file_positions is called. */
+ boolean rdata_in_text;
+
} ecoff_data_type;
/* Each canonical asymbol really looks like this. */
/* This switch is straight from the old code in
write_file_locals in ldsym.c. */
- if (info->strip == strip_some
- && (bfd_hash_lookup (info->keep_hash, bfd_asymbol_name (sym),
- false, false)
- == (struct bfd_hash_entry *) NULL))
+ if (info->strip == strip_all
+ || (info->strip == strip_some
+ && (bfd_hash_lookup (info->keep_hash, bfd_asymbol_name (sym),
+ false, false)
+ == (struct bfd_hash_entry *) NULL)))
output = false;
else if ((sym->flags & (BSF_GLOBAL | BSF_WEAK)) != 0)
{
Set selvecs '&pmac_xcoff_vec'
Set selarchs "&bfd_powerpc_arch"
-Else If "{target_canonical}" =~ /i386-unknown-go32/
+Else If "{target_canonical}" =~ /i386-\Option-x-go32/
Set BFD_BACKENDS '"{o}"coff-i386.c.o'
Set defvec i386coff_vec
Set selvecs '&i386coff_vec'
Else If "{target_canonical}" =~ /mips-\Option-x-\Option-x/
- Set BFD_BACKENDS '"{o}"coff-mips.c.o "{o}"ecoff.c.o "{o}"ecofflink.c.o'
+ Set BFD_BACKENDS '"{o}"coff-mips.c.o "{o}"ecoff.c.o "{o}"ecofflink.c.o "{o}"elf32.c.o "{o}"elf32-mips.c.o "{o}"elflink.c.o'
Set defvec ecoff_big_vec
- Set selvecs '&ecoff_big_vec,&ecoff_little_vec'
+ Set selvecs '&ecoff_big_vec,&ecoff_little_vec,&bfd_elf32_bigmips_vec'
-Else If "{target_canonical}" =~ /sh-hitachi-hms/
+Else If "{target_canonical}" =~ /sh-\Option-x-hms/
Set BFD_BACKENDS '"{o}"coff-sh.c.o "{o}"cofflink.c.o'
Set defvec shcoff_vec
Set selvecs '&shcoff_vec,&shlcoff_vec'
# We can only handle 32-bit targets right now.
sed -e 's/@WORDSIZE@/32/' \Option-d
+ -e 's/@wordsize@/32/' \Option-d
-e "s/@VERSION@/`Catenate {srcdir}VERSION`/" \Option-d
+ -e 's/@BFD_HOST_64_BIT_DEFINED@/0/' \Option-d
+ -e 's/@BFD_HOST_64_BIT@//' \Option-d
+ -e 's/@BFD_HOST_U_64_BIT@//' \Option-d
-e 's/@BFD_HOST_64BIT_LONG@/0/' \Option-d
"{srcdir}"bfd-in2.h >"{o}"bfd.h-new
MoveIfChange "{o}"bfd.h-new "{o}"bfd.h
+sed -e 's/NN/32/g' "{srcdir}"elfxx-target.h >"{o}"elf32-target.h-new
+MoveIfChange "{o}"elf32-target.h-new "{o}"elf32-target.h
+
# Pre-expand some macros in coffswap.h, so MPW C doesn't choke.
sed -e 's/^ PUT_AOUTHDR_TSIZE (/ bfd_h_put_32 (/' \Option-d
/HDEFINES/s/@HDEFINES@//
/TDEFINES/s/@TDEFINES@//
-/INCDIR=/s/"{srcdir}":/"{topsrcdir}"/
-/^CSEARCH = .*$/s/$/ -i "{INCDIR}":mpw: -i ::extra-include:/
+# Fix pathnames to include directories.
+/^INCDIR = /s/^INCDIR = .*$/INCDIR = "{topsrcdir}"include/
+/^CSEARCH = /s/$/ -i "{INCDIR}":mpw: -i ::extra-include:/
-/WORDSIZE/s/^WORDSIZE = /#WORDSIZE = /
-/BFD_MACHINES/s/^BFD_MACHINES = /#BFD_MACHINES = /
-/BFD_BACKENDS/s/^BFD_BACKENDS = /#BFD_BACKENDS = /
-/TDEFAULTS/s/^TDEFAULTS = /#TDEFAULTS = /
+# Comment out setting of vars, configure script will add these itself.
+/^WORDSIZE =/s/^/#/
+# /^ALL_BACKENDS/s/^/#/
+/^BFD_BACKENDS/s/^/#/
+/^BFD_MACHINES/s/^/#/
+/^TDEFAULTS/s/^/#/
# Remove extra, useless, "all".
/^all \\Option-f _oldest/,/^$/d
/bfd/s/"{s}"bfd\.h/"{o}"bfd.h/g
/config/s/"{s}"config\.h/"{o}"config.h/g
/elf32-target/s/"{s}"elf32-target\.h/"{o}"elf32-target.h/g
+/elf32-target/s/^elf32-target\.h/"{o}"elf32-target.h/
/elf64-target/s/"{s}"elf64-target\.h/"{o}"elf64-target.h/g
+/elf64-target/s/^elf64-target\.h/"{o}"elf64-target.h/
/"{s}"{INCDIR}/s/"{s}"{INCDIR}/"{INCDIR}"/g
# MPW Make doesn't know about $<.
/"{o}"targets.c.o \\Option-f "{s}"targets.c Makefile/,/^$/c\
"{o}"targets.c.o \\Option-f "{s}"targets.c Makefile\
- {CC} {ALL_CFLAGS} {TDEFAULTS} "{s}"targets.c -o "{o}"targets.c.o
+ {CC} @DASH_C_FLAG@ {ALL_CFLAGS} {TDEFAULTS} "{s}"targets.c -o "{o}"targets.c.o
/"{o}"archures.c.o \\Option-f "{s}"archures.c Makefile/,/^$/c\
"{o}"archures.c.o \\Option-f "{s}"archures.c Makefile\
- {CC} {ALL_CFLAGS} {TDEFAULTS} "{s}"archures.c -o "{o}"archures.c.o
+ {CC} @DASH_C_FLAG@ {ALL_CFLAGS} {TDEFAULTS} "{s}"archures.c -o "{o}"archures.c.o
# Remove the .h rebuilding rules, we don't currently have a doc subdir,
# or a way to build the prototype-hacking tool that's in it.
nbfd->section_count = 0;
nbfd->usrdata = (PTR)NULL;
nbfd->cacheable = false;
- nbfd->flags = NO_FLAGS;
+ nbfd->flags = BFD_NO_FLAGS;
nbfd->mtime_set = false;
return nbfd;
bfd_set_error (bfd_error_invalid_target);
return NULL;
}
-#if defined(VMS) || defined(__GO32__) || defined (WINGDB)
+#if defined(VMS) || defined(__GO32__)
nbfd->iostream = (PTR)fopen(filename, FOPEN_RB);
#else
/* (O_ACCMODE) parens are to avoid Ultrix header file bug */
#define TARGET_BIG_SYM armpe_big_vec
#define TARGET_BIG_NAME "pe-arm-big"
-#define COFF_OBJ_WITH_PE
#define COFF_WITH_PE
#define PCRELOFFSET true
#define COFF_LONG_SECTION_NAMES
#define TARGET_SYM i386pe_vec
#define TARGET_NAME "pe-i386"
-#define COFF_OBJ_WITH_PE
#define COFF_WITH_PE
#define PCRELOFFSET true
#define TARGET_UNDERSCORE '_'
-/* BFD back-end for Intel 386 PECOFF files.
+/* BFD back-end for PowerPC PECOFF files.
Copyright 1995 Free Software Foundation, Inc.
This file is part of BFD, the Binary File Descriptor library.
#define TARGET_BIG_SYM bfd_powerpc_pe_vec
#define TARGET_BIG_NAME "pe-powerpc"
-#define COFF_OBJ_WITH_PE
#define COFF_WITH_PE
#define COFF_LONG_SECTION_NAMES
-/* BFD back-end for Intel 386 PE IMAGE COFF files.
+/* BFD back-end for PowerPC PE IMAGE COFF files.
Copyright 1995 Free Software Foundation, Inc.
This file is part of BFD, the Binary File Descriptor library.
sac@cygnus.com
*/
-
+/* Hey look, some documentation [and in a place you expect to find it]!
+
+ The main reference for the pei format is "Microsoft Portable Executable
+ and Common Object File Format Specification 4.1". Get it if you need to
+ do some serious hacking on this code.
+
+ Another reference:
+ "Peering Inside the PE: A Tour of the Win32 Portable Executable
+ File Format", MSJ 1994, Volume 9.
+
+ The *sole* difference between the pe format and the pei format is that the
+ latter has an MSDOS 2.0 .exe header on the front that prints the message
+ "This app must be run under Windows." (or some such).
+ (FIXME: Whether that statement is *really* true or not is unknown.
+ Are there more subtle differences between pe and pei formats?
+ For now assume there aren't. If you find one, then for God sakes
+ document it here!)
+
+ The Microsoft docs use the word "image" instead of "executable" because
+ the former can also refer to a DLL (shared library). Confusion can arise
+ because the `i' in `pei' also refers to "image". The `pe' format can
+ also create images (i.e. executables), it's just that to run on a win32
+ system you need to use the pei format.
+
+ FIXME: Please add more docs here so the next poor fool that has to hack
+ on this code has a chance of getting something accomplished without
+ wasting too much time.
+*/
#define coff_bfd_print_private_bfd_data pe_print_private_bfd_data
#define coff_mkobject pe_mkobject
#ifdef SWAP_OUT_RELOC_EXTRA
SWAP_OUT_RELOC_EXTRA(abfd,reloc_src, reloc_dst);
#endif
- return sizeof(struct external_reloc);
+ return RELSZ;
}
}
else
{
- filehdr_dst->f_symptr = 0;
filehdr_dst->f_nsyms = 0;
filehdr_dst->f_flags &= ~HAS_SYMS;
}
- return sizeof(FILHDR);
+ return FILHSZ;
}
#else
bfd_h_put_16(abfd, filehdr_in->f_opthdr, (bfd_byte *) filehdr_out->f_opthdr);
bfd_h_put_16(abfd, filehdr_in->f_flags, (bfd_byte *) filehdr_out->f_flags);
- return sizeof(FILHDR);
+ return FILHSZ;
}
#endif
bfd_h_put_8(abfd, in->n_sclass , ext->e_sclass);
bfd_h_put_8(abfd, in->n_numaux , ext->e_numaux);
- return sizeof(SYMENT);
+ return SYMESZ;
}
static void
memcpy (ext->x_file.x_fname, in->x_file.x_fname, FILNMLEN);
#endif
}
- return sizeof (AUXENT);
+ return AUXESZ;
case C_STAT:
(bfd_byte *) ext->x_scn.x_associated);
bfd_h_put_8 (abfd, in->x_scn.x_comdat,
(bfd_byte *) ext->x_scn.x_comdat);
- return sizeof (AUXENT);
+ return AUXESZ;
}
break;
}
PUT_LNSZ_SIZE (abfd, in->x_sym.x_misc.x_lnsz.x_size, ext);
}
- return sizeof(AUXENT);
+ return AUXESZ;
}
ext->l_addr.l_symndx);
PUT_LINENO_LNNO (abfd, in->l_lnno, ext);
- return sizeof(struct external_lineno);
+ return LINESZ;
}
aouthdr_int->text_start += a->ImageBase;
if (aouthdr_int->dsize)
aouthdr_int->data_start += a->ImageBase;
+
+#ifdef POWERPC_LE_PE
+ /* These three fields are normally set up by ppc_relocate_section.
+ In the case of reading a file in, we can pick them up from
+ the DataDirectory.
+ */
+ first_thunk_address = a->DataDirectory[12].VirtualAddress ;
+ thunk_size = a->DataDirectory[12].Size;
+ import_table_size = a->DataDirectory[1].Size;
+#endif
}
if (sec != NULL)
{
aout->DataDirectory[idx].VirtualAddress = sec->vma - base;
- aout->DataDirectory[idx].Size = sec->_cooked_size;
+ aout->DataDirectory[idx].Size = pei_section_data (abfd, sec)->virt_size;
sec->flags |= SEC_DATA;
}
}
}
}
- return sizeof(AOUTHDR);
+ return AOUTSZ;
}
static void
{
struct internal_scnhdr *scnhdr_int = (struct internal_scnhdr *)in;
SCNHDR *scnhdr_ext = (SCNHDR *)out;
- unsigned int ret = sizeof (SCNHDR);
+ unsigned int ret = SCNHSZ;
bfd_vma ps;
bfd_vma ss;
else if (strcmp (scnhdr_int->s_name, ".rdata") == 0
|| strcmp (scnhdr_int->s_name, ".edata") == 0)
flags = IMAGE_SCN_MEM_READ | SEC_DATA;
- /* ppc-nt additions */
else if (strcmp (scnhdr_int->s_name, ".pdata") == 0)
flags = IMAGE_SCN_CNT_INITIALIZED_DATA | IMAGE_SCN_ALIGN_4BYTES |
IMAGE_SCN_MEM_READ ;
else if (strcmp (scnhdr_int->s_name, ".ydata") == 0)
flags = IMAGE_SCN_CNT_INITIALIZED_DATA | IMAGE_SCN_ALIGN_8BYTES |
IMAGE_SCN_MEM_READ | IMAGE_SCN_MEM_WRITE ;
- else if (strcmp (scnhdr_int->s_name, ".drectve") == 0)
+ else if (strncmp (scnhdr_int->s_name, ".drectve", strlen(".drectve")) == 0)
flags = IMAGE_SCN_LNK_INFO | IMAGE_SCN_LNK_REMOVE ;
- /* end of ppc-nt additions */
#ifdef POWERPC_LE_PE
else if (strncmp (scnhdr_int->s_name, ".stabstr", strlen(".stabstr")) == 0)
{
static char * dir_names[IMAGE_NUMBEROF_DIRECTORY_ENTRIES] =
{
- "Export Directory [.edata]",
+ "Export Directory [.edata (or where ever we found it)]",
"Import Directory [parts of .idata]",
"Resource Directory [.rsrc]",
"Exception Directory [.pdata]",
"\tcode-base %08lx toc (loadable/actual) %08lx/%08lx\n",
start_address, loadable_toc_address, toc_address);
}
+ else
+ {
+ fprintf(file,
+ "\nNo reldata section! Function descriptor not decoded.\n");
+ }
#endif
fprintf(file,
"Name \t\t\t\t");
fprintf_vma (file, edt.name);
fprintf (file,
- "%s\n", data + edt.name + adj);
+ " %s\n", data + edt.name + adj);
fprintf(file,
"Ordinal Base \t\t\t%ld\n", edt.base);
"LOW",
"HIGHLOW",
"HIGHADJ",
-"unknown"
+"MIPS_JMPADDR"
};
static boolean
/* BFD support for handling relocation entries.
- Copyright (C) 1990, 91, 92, 93, 94, 1995 Free Software Foundation, Inc.
+ Copyright (C) 1990, 91, 92, 93, 94, 95, 1996 Free Software Foundation, Inc.
Written by Cygnus Support.
This file is part of BFD, the Binary File Descriptor library.
case 2: return 4;
case 3: return 0;
case 4: return 8;
+ case 8: return 16;
case -2: return 4;
default: abort ();
}
/* WTF?? */
if (abfd->xvec->flavour == bfd_target_coff_flavour
&& strcmp (abfd->xvec->name, "aixcoff-rs6000") != 0
+ && strcmp (abfd->xvec->name, "xcoff-powermac") != 0
&& strcmp (abfd->xvec->name, "coff-Intel-little") != 0
&& strcmp (abfd->xvec->name, "coff-Intel-big") != 0)
{
/* WTF?? */
if (abfd->xvec->flavour == bfd_target_coff_flavour
&& strcmp (abfd->xvec->name, "aixcoff-rs6000") != 0
+ && strcmp (abfd->xvec->name, "xcoff-powermac") != 0
&& strcmp (abfd->xvec->name, "coff-Intel-little") != 0
&& strcmp (abfd->xvec->name, "coff-Intel-big") != 0)
{
ENUM
BFD_RELOC_ALPHA_GPDISP_HI16
ENUMDOC
- Alpha ECOFF relocations. Some of these treat the symbol or "addend"
- in some special way.
+ Alpha ECOFF and ELF relocations. Some of these treat the symbol or
+ "addend" in some special way.
For GPDISP_HI16 ("gpdisp") relocations, the symbol is ignored when
writing; when reading, it will be the absolute section symbol. The
addend is the displacement in bytes of the "lda" instruction from
relocations out, and is filled in with the file's GP value on
reading, for convenience.
+ENUM
+ BFD_RELOC_ALPHA_GPDISP
+ENUMDOC
+ The ELF GPDISP relocation is exactly the same as the GPDISP_HI16
+ relocation except that there is no accompanying GPDISP_LO16
+ relocation.
+
ENUM
BFD_RELOC_ALPHA_LITERAL
ENUMX
"hint" field of a jmp/jsr/ret instruction, for possible branch-
prediction logic which may be provided on some processors.
+ENUM
+ BFD_RELOC_ALPHA_LINKAGE
+ENUMDOC
+ The LINKAGE relocation outputs a linkage pair in the object file,
+ which is filled by the linker.
+
ENUM
BFD_RELOC_MIPS_JMP
ENUMDOC
BFD_RELOC_ARM_LITERAL
ENUMX
BFD_RELOC_ARM_IN_POOL
+ENUMX
+ BFD_RELOC_ARM_OFFSET_IMM8
+ENUMX
+ BFD_RELOC_ARM_HWLITERAL
+ENUMX
+ BFD_RELOC_ARM_THUMB_ADD
+ENUMX
+ BFD_RELOC_ARM_THUMB_IMM
+ENUMX
+ BFD_RELOC_ARM_THUMB_SHIFT
+ENUMX
+ BFD_RELOC_ARM_THUMB_OFFSET
ENUMDOC
These relocs are only used within the ARM assembler. They are not
(at present) written to any object files.
+ENUM
+ BFD_RELOC_SH_PCDISP8BY2
+ENUMX
+ BFD_RELOC_SH_PCDISP12BY2
+ENUMX
+ BFD_RELOC_SH_IMM4
+ENUMX
+ BFD_RELOC_SH_IMM4BY2
+ENUMX
+ BFD_RELOC_SH_IMM4BY4
+ENUMX
+ BFD_RELOC_SH_IMM8
+ENUMX
+ BFD_RELOC_SH_IMM8BY2
+ENUMX
+ BFD_RELOC_SH_IMM8BY4
+ENUMX
+ BFD_RELOC_SH_PCRELIMM8BY2
+ENUMX
+ BFD_RELOC_SH_PCRELIMM8BY4
+ENUMX
+ BFD_RELOC_SH_SWITCH16
+ENUMX
+ BFD_RELOC_SH_SWITCH32
+ENUMX
+ BFD_RELOC_SH_USES
+ENUMX
+ BFD_RELOC_SH_COUNT
+ENUMX
+ BFD_RELOC_SH_ALIGN
+ENUMX
+ BFD_RELOC_SH_CODE
+ENUMX
+ BFD_RELOC_SH_DATA
+ENUMX
+ BFD_RELOC_SH_LABEL
+ENUMDOC
+ Hitachi SH relocs. Not all of these appear in object files.
+
COMMENT
+
+COMMENT
+
+COMMENT
+
ENDSENUM
BFD_RELOC_UNUSED
CODE_FRAGMENT
/* Get enough memory to hold the stuff */
bfd *input_bfd = i->owner;
asection *input_section = i;
- int shrink = 0 ;
+ unsigned *shrinks;
+ int shrink = 0;
long reloc_size = bfd_get_reloc_upper_bound (input_bfd, input_section);
arelent **reloc_vector = NULL;
long reloc_count;
- /* We only run this relaxation once. It might work to run it more
- often, but it hasn't been tested. */
+ /* We only do global relaxation once. It is not safe to do it multiple
+ times (see discussion of the "shrinks" array below). */
*again = false;
if (reloc_size < 0)
return false;
}
+ /* The reloc16.c and related relaxing code is very simple, the price
+ for that simplicity is we can only call this function once for
+ each section.
+
+ So, to get the best results within that limitation, we do multiple
+ relaxing passes over each section here. That involves keeping track
+ of the "shrink" at each reloc in the section. This allows us to
+ accurately determine the relative location of two relocs within
+ this section.
+
+ In theory, if we kept the "shrinks" array for each section for the
+ entire link, we could use the generic relaxing code in the linker
+ and get better results, particularly for jsr->bsr and 24->16 bit
+ memory reference relaxations. */
+
if (reloc_count > 0)
{
- arelent **parent;
- for (parent = reloc_vector; *parent; parent++)
- {
- shrink = bfd_coff_reloc16_estimate (abfd, input_section,
- *parent, shrink, link_info);
- }
+ int another_pass = 0;
+
+ /* Allocate and initialize the shrinks array for this section. */
+ shrinks = (unsigned *)bfd_malloc (reloc_count * sizeof (unsigned));
+ memset (shrinks, 0, reloc_count * sizeof (unsigned));
+
+ /* Loop until nothing changes in this section. */
+ do {
+ arelent **parent;
+ unsigned int i, j;
+
+ another_pass = 0;
+
+ for (i = 0, parent = reloc_vector; *parent; parent++, i++)
+ {
+ /* Let the target/machine dependent code examine each reloc
+ in this section and attempt to shrink it. */
+ shrink = bfd_coff_reloc16_estimate (abfd, input_section, *parent,
+ shrinks[i], link_info);
+
+ /* If it shrunk, note it in the shrinks array and set up for
+ another pass. */
+ if (shrink != shrinks[i])
+ {
+ another_pass = 1;
+ for (j = i + 1; j < reloc_count; j++)
+ shrinks[j] += shrink - shrinks[i];
+ }
+ }
+
+ } while (another_pass);
+
+ free((char *)shrinks);
}
input_section->_cooked_size -= shrink;
{
/* Fill in symbol */
r_extern = 1;
- r_index = stoi((*(g->sym_ptr_ptr))->flags);
+ r_index = (*g->sym_ptr_ptr)->udata.i;
}
}
else
execp = abfd->tdata.aout_data->a.hdr;
/* Set the file flags */
- abfd->flags = NO_FLAGS;
+ abfd->flags = BFD_NO_FLAGS;
if (execp->a_drsize || execp->a_trsize)
abfd->flags |= HAS_RELOC;
/* Setting of EXEC_P has been deferred to the bottom of this function */
/* IBM RS/6000 "XCOFF" back-end for BFD.
- Copyright (C) 1990, 1991, 1995 Free Software Foundation, Inc.
+ Copyright (C) 1990, 91, 92, 93, 94, 95, 1996 Free Software Foundation, Inc.
FIXME: Can someone provide a transliteration of this name into ASCII?
Using the following chars caused a compiler warning on HIUX (so I replaced
them with octal escapes), and isn't useful without an understanding of what
bfd *core_bfd;
bfd *exec_bfd;
{
- FILE *fd;
struct core_dump coredata;
struct ld_info ldinfo;
- char pathname [1024];
+ int size;
+ char *path, *s;
+ size_t alloc;
const char *str1, *str2;
+ boolean ret;
- /* Use bfd_xxx routines, rather than O/S primitives, do error checking!!
- FIXMEmgo */
- /* Actually should be able to use bfd_get_section_contents now that
- we have a .ldinfo section. */
- fd = fopen (core_bfd->filename, FOPEN_RB);
-
- fread (&coredata, sizeof (struct core_dump), 1, fd);
- fseek (fd, (long)coredata.c_tab, 0);
- fread (&ldinfo, (char*)&ldinfo.ldinfo_filename[0] - (char*)&ldinfo.ldinfo_next,
- 1, fd);
- fscanf (fd, "%s", pathname);
+ if (bfd_seek (core_bfd, 0, SEEK_SET) != 0
+ || bfd_read (&coredata, sizeof coredata, 1, core_bfd) != sizeof coredata)
+ return false;
+
+ if (bfd_seek (core_bfd, (long) coredata.c_tab, SEEK_SET) != 0)
+ return false;
+
+ size = (char *) &ldinfo.ldinfo_filename[0] - (char *) &ldinfo.ldinfo_next;
+ if (bfd_read (&ldinfo, size, 1, core_bfd) != size)
+ return false;
+
+ alloc = 100;
+ path = bfd_malloc (alloc);
+ if (path == NULL)
+ return false;
+ s = path;
+
+ while (1)
+ {
+ if (bfd_read (s, 1, 1, core_bfd) != 1)
+ {
+ free (path);
+ return false;
+ }
+ if (*s == '\0')
+ break;
+ ++s;
+ if (s == path + alloc)
+ {
+ char *n;
+
+ alloc *= 2;
+ n = bfd_realloc (path, alloc);
+ if (n == NULL)
+ {
+ free (path);
+ return false;
+ }
+ s = n + (path - s);
+ path = n;
+ }
+ }
- str1 = strrchr (pathname, '/');
+ str1 = strrchr (path, '/');
str2 = strrchr (exec_bfd->filename, '/');
/* step over character '/' */
- str1 = str1 ? str1+1 : &pathname[0];
- str2 = str2 ? str2+1 : exec_bfd->filename;
+ str1 = str1 != NULL ? str1 + 1 : path;
+ str2 = str2 != NULL ? str2 + 1 : exec_bfd->filename;
+
+ if (strcmp (str1, str2) == 0)
+ ret = true;
+ else
+ ret = false;
+
+ free (path);
- fclose (fd);
- return strcmp (str1, str2) == 0;
+ return ret;
}
char *
and a field selector, return one or more appropriate SOM relocations. */
int **
-hppa_som_gen_reloc_type (abfd, base_type, format, field, sym_diff)
+hppa_som_gen_reloc_type (abfd, base_type, format, field, sym_diff, sym)
bfd *abfd;
int base_type;
int format;
enum hppa_reloc_field_selector_type_alt field;
int sym_diff;
+ asymbol *sym;
{
int *final_type, **final_types;
*final_type = R_DLT_REL;
/* A relocation in the data space is always a full 32bits. */
else if (format == 32)
- *final_type = R_DATA_ONE_SYMBOL;
+ {
+ *final_type = R_DATA_ONE_SYMBOL;
+
+ /* If there's no SOM symbol type associated with this BFD
+ symbol, then set the symbol type to ST_DATA.
+
+ Only do this if the type is going to default later when
+ we write the object file.
+
+ This is done so that the linker never encounters an
+ R_DATA_ONE_SYMBOL reloc involving an ST_CODE symbol.
+
+ This allows the compiler to generate exception handling
+ tables.
+ Note that one day we may need to also emit BEGIN_BRTAB and
+ END_BRTAB to prevent the linker from optimizing away insns
+ in exception handling regions. */
+ if (som_symbol_data (sym)->som_type == SYMBOL_TYPE_UNKNOWN
+ && (sym->flags & BSF_SECTION_SYM) == 0
+ && (sym->flags & BSF_FUNCTION) == 0
+ && ! bfd_is_com_section (sym->section))
+ som_symbol_data (sym)->som_type = SYMBOL_TYPE_DATA;
+ }
break;
+
case R_HPPA_GOTOFF:
/* More PLABEL special cases. */
if (field == e_psel
return 0;
/* Set BFD flags based on what information is available in the SOM. */
- abfd->flags = NO_FLAGS;
+ abfd->flags = BFD_NO_FLAGS;
if (file_hdrp->symbol_total)
abfd->flags |= HAS_LINENO | HAS_DEBUG | HAS_SYMS | HAS_LOCALS;
later relocation. */
switch (bfd_reloc->howto->type)
{
- /* This only needs to handle relocations that may be
- made by hppa_som_gen_reloc. */
case R_ENTRY:
case R_ALT_ENTRY:
case R_EXIT:
case R_COMP2:
case R_BEGIN_BRTAB:
case R_END_BRTAB:
+ case R_BEGIN_TRY:
+ case R_END_TRY:
case R_N0SEL:
case R_N1SEL:
reloc_offset = bfd_reloc->address;
case R_RSEL:
case R_BEGIN_BRTAB:
case R_END_BRTAB:
+ case R_BEGIN_TRY:
case R_N0SEL:
case R_N1SEL:
bfd_put_8 (abfd, bfd_reloc->howto->type, p);
p += 1;
break;
+ case R_END_TRY:
+ /* The end of a exception handling region. The reloc's
+ addend contains the offset of the exception handling
+ code. */
+ if (bfd_reloc->addend == 0)
+ bfd_put_8 (abfd, bfd_reloc->howto->type, p);
+ else if (bfd_reloc->addend < 1024)
+ {
+ bfd_put_8 (abfd, bfd_reloc->howto->type + 1, p);
+ bfd_put_8 (abfd, bfd_reloc->addend / 4, p + 1);
+ p = try_prev_fixup (abfd, &subspace_reloc_size,
+ p, 2, reloc_queue);
+ }
+ else
+ {
+ bfd_put_8 (abfd, bfd_reloc->howto->type + 2, p);
+ bfd_put_8 (abfd, (bfd_reloc->addend / 4) >> 16, p + 1);
+ bfd_put_16 (abfd, bfd_reloc->addend / 4, p + 2);
+ p = try_prev_fixup (abfd, &subspace_reloc_size,
+ p, 4, reloc_queue);
+ }
+ break;
+
case R_COMP1:
/* The only time we generate R_COMP1, R_COMP2 and
R_CODE_EXPR relocs is for the difference of two
info->arg_reloc = som_symbol_data (sym)->tc_data.hppa_arg_reloc;
}
- /* If the type is unknown at this point, it should be ST_DATA or
- ST_CODE (function/ST_ENTRY symbols were handled as special
- cases above). */
+ /* For unknown symbols set the symbol's type based on the symbol's
+ section (ST_DATA for DATA sections, ST_CODE for CODE sections). */
else if (som_symbol_data (sym)->som_type == SYMBOL_TYPE_UNKNOWN)
{
if (sym->section->flags & SEC_CODE)
else
info->symbol_type = ST_DATA;
}
+
+ else if (som_symbol_data (sym)->som_type == SYMBOL_TYPE_UNKNOWN)
+ info->symbol_type = ST_DATA;
/* From now on it's a very simple mapping. */
else if (som_symbol_data (sym)->som_type == SYMBOL_TYPE_ABSOLUTE)
unsigned long need;
/* Make sure we have all the required sections. */
- if (! sunos_create_dynamic_sections (abfd, info,
- (((abfd->flags & DYNAMIC) != 0
- && ! info->relocateable)
- ? true
- : false)))
- return false;
+ if (info->hash->creator == abfd->xvec)
+ {
+ if (! sunos_create_dynamic_sections (abfd, info,
+ (((abfd->flags & DYNAMIC) != 0
+ && ! info->relocateable)
+ ? true
+ : false)))
+ return false;
+ }
/* There is nothing else to do for a normal object. */
if ((abfd->flags & DYNAMIC) == 0)
/* sysdep.h -- handle host dependencies for the BFD library
- Copyright 1995 Free Software Foundation, Inc.
+ Copyright 1995, 1996 Free Software Foundation, Inc.
Written by Cygnus Support.
This file is part of BFD, the Binary File Descriptor library.
#else
extern char *strchr ();
extern char *strrchr ();
-extern char *strstr ();
#endif
#endif
#define SEEK_CUR 1
#endif
+#ifdef NEED_DECLARATION_STRSTR
+extern char *strstr ();
+#endif
+
#ifdef NEED_DECLARATION_MALLOC
extern PTR malloc ();
#endif
+#ifdef NEED_DECLARATION_REALLOC
+extern PTR realloc ();
+#endif
+
#ifdef NEED_DECLARATION_FREE
extern void free ();
#endif
. bfd_target_som_flavour,
. bfd_target_os9k_flavour,
. bfd_target_versados_flavour,
-. bfd_target_msdos_flavour
+. bfd_target_msdos_flavour,
+. bfd_target_evax_flavour
.};
.
.enum bfd_endian { BFD_ENDIAN_BIG, BFD_ENDIAN_LITTLE, BFD_ENDIAN_UNKNOWN };
. enum bfd_endian header_byteorder;
A mask of all the flags which an executable may have set -
-from the set <<NO_FLAGS>>, <<HAS_RELOC>>, ...<<D_PAGED>>.
+from the set <<BFD_NO_FLAGS>>, <<HAS_RELOC>>, ...<<D_PAGED>>.
. flagword object_flags;
extern const bfd_target armpei_big_vec;
extern const bfd_target b_out_vec_big_host;
extern const bfd_target b_out_vec_little_host;
+extern const bfd_target bfd_elf64_alpha_vec;
extern const bfd_target bfd_elf32_big_generic_vec;
extern const bfd_target bfd_elf32_bigmips_vec;
extern const bfd_target bfd_elf64_bigmips_vec;
extern const bfd_target bfd_elf32_m88k_vec;
extern const bfd_target bfd_elf32_powerpc_vec;
extern const bfd_target bfd_elf32_powerpcle_vec;
+extern const bfd_target bfd_elf32_sh_vec;
+extern const bfd_target bfd_elf32_shl_vec;
extern const bfd_target bfd_elf32_sparc_vec;
extern const bfd_target bfd_elf64_big_generic_vec;
extern const bfd_target bfd_elf64_little_generic_vec;
extern const bfd_target ecoff_big_vec;
extern const bfd_target ecoff_little_vec;
extern const bfd_target ecoffalpha_little_vec;
+extern const bfd_target evax_alpha_vec;
extern const bfd_target h8300coff_vec;
extern const bfd_target h8500coff_vec;
extern const bfd_target host_aout_vec;
extern const bfd_target rs6000coff_vec;
extern const bfd_target shcoff_vec;
extern const bfd_target shlcoff_vec;
+extern const bfd_target sparcle_aout_vec;
extern const bfd_target sparclynx_aout_vec;
extern const bfd_target sparclynx_coff_vec;
extern const bfd_target sparcnetbsd_vec;
--enable-targets=all, objdump or gdb should be able to examine
the file even if we don't recognize the machine type. */
&bfd_elf32_big_generic_vec,
+#ifdef BFD64
+ &bfd_elf64_alpha_vec,
+#endif
&bfd_elf32_bigmips_vec,
#ifdef BFD64
&bfd_elf64_bigmips_vec,
#endif
&ecoff_big_vec,
&ecoff_little_vec,
-#if 0
+#ifdef BFD64
&ecoffalpha_little_vec,
+ &evax_alpha_vec,
#endif
&h8300coff_vec,
&h8500coff_vec,
&ppcboot_vec,
&shcoff_vec,
&shlcoff_vec,
+ &sparcle_aout_vec,
&sparclynx_aout_vec,
&sparclynx_coff_vec,
&sparcnetbsd_vec,
set), this is the offset in toc_section. */
bfd_vma toc_offset;
/* If the TOC entry comes from an input file, this is set to the
- symbo lindex of the C_HIDEXT XMC_TC symbol. */
+ symbol index of the C_HIDEXT XMC_TC or XMC_TD symbol. */
long toc_indx;
} u;
#define XCOFF_HAS_SIZE (04000)
/* Symbol is a function descriptor. */
#define XCOFF_DESCRIPTOR (010000)
+ /* Multiple definitions have been for the symbol. */
+#define XCOFF_MULTIPLY_DEFINED (020000)
/* The storage mapping class. */
unsigned char smclas;
{
case bfd_object:
return xcoff_link_add_object_symbols (abfd, info);
+
case bfd_archive:
- /* We need to look through the archive for stripped dynamic
- objects, because they will not appear in the archive map even
- though they should, perhaps, be included. Also, if the
- linker has no map, we just consider each object file in turn,
- since that apparently is what the AIX native linker does. */
+ /* If the archive has a map, do the usual search. We then need
+ to check the archive for stripped dynamic objects, because
+ they will not appear in the archive map even though they
+ should, perhaps, be included. If the archive has no map, we
+ just consider each object file in turn, since that apparently
+ is what the AIX native linker does. */
+ if (bfd_has_map (abfd))
+ {
+ if (! (_bfd_generic_link_add_archive_symbols
+ (abfd, info, xcoff_link_check_archive_element)))
+ return false;
+ }
+
{
bfd *member;
}
member = bfd_openr_next_archived_file (abfd, member);
}
-
- if (! bfd_has_map (abfd))
- return true;
-
- /* Now do the usual search. */
- return (_bfd_generic_link_add_archive_symbols
- (abfd, info, xcoff_link_check_archive_element));
}
+ return true;
+
default:
bfd_set_error (bfd_error_wrong_format);
return false;
defines it. We also don't bring in symbols to satisfy
undefined references in shared objects. */
if (h != (struct bfd_link_hash_entry *) NULL
- && h->type == bfd_link_hash_undefined)
+ && h->type == bfd_link_hash_undefined
+ && (info->hash->creator != abfd->xvec
+ || (((struct xcoff_link_hash_entry *) h)->flags
+ & XCOFF_DEF_DYNAMIC) == 0))
{
if (! (*info->callbacks->add_archive_element) (info, abfd, name))
return false;
h = bfd_link_hash_lookup (info->hash, name, false, false, true);
/* We are only interested in symbols that are currently
- undefined. */
- if (h != NULL && h->type == bfd_link_hash_undefined)
+ undefined. At this point we know that we are using an XCOFF
+ hash table. */
+ if (h != NULL
+ && h->type == bfd_link_hash_undefined
+ && (((struct xcoff_link_hash_entry *) h)->flags
+ & XCOFF_DEF_DYNAMIC) == 0)
{
if (! (*info->callbacks->add_archive_element) (info, abfd, name))
return false;
return false;
}
- /* We need to build a .loader section, so we do it here. This won't
- work if we're producing an XCOFF output file with no XCOFF input
- files. FIXME. */
- if (xcoff_hash_table (info)->loader_section == NULL)
+ if (info->hash->creator == abfd->xvec)
{
- asection *lsec;
+ /* We need to build a .loader section, so we do it here. This
+ won't work if we're producing an XCOFF output file with no
+ XCOFF input files. FIXME. */
+ if (xcoff_hash_table (info)->loader_section == NULL)
+ {
+ asection *lsec;
- lsec = bfd_make_section_anyway (abfd, ".loader");
- if (lsec == NULL)
- goto error_return;
- xcoff_hash_table (info)->loader_section = lsec;
- lsec->flags |= SEC_HAS_CONTENTS | SEC_IN_MEMORY;
- }
- /* Likewise for the linkage section. */
- if (xcoff_hash_table (info)->linkage_section == NULL)
- {
- asection *lsec;
+ lsec = bfd_make_section_anyway (abfd, ".loader");
+ if (lsec == NULL)
+ goto error_return;
+ xcoff_hash_table (info)->loader_section = lsec;
+ lsec->flags |= SEC_HAS_CONTENTS | SEC_IN_MEMORY;
+ }
+ /* Likewise for the linkage section. */
+ if (xcoff_hash_table (info)->linkage_section == NULL)
+ {
+ asection *lsec;
- lsec = bfd_make_section_anyway (abfd, ".gl");
- if (lsec == NULL)
- goto error_return;
- xcoff_hash_table (info)->linkage_section = lsec;
- lsec->flags |= SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY;
- lsec->alignment_power = 2;
- }
- /* Likewise for the TOC section. */
- if (xcoff_hash_table (info)->toc_section == NULL)
- {
- asection *tsec;
+ lsec = bfd_make_section_anyway (abfd, ".gl");
+ if (lsec == NULL)
+ goto error_return;
+ xcoff_hash_table (info)->linkage_section = lsec;
+ lsec->flags |= (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS
+ | SEC_IN_MEMORY);
+ lsec->alignment_power = 2;
+ }
+ /* Likewise for the TOC section. */
+ if (xcoff_hash_table (info)->toc_section == NULL)
+ {
+ asection *tsec;
- tsec = bfd_make_section_anyway (abfd, ".tc");
- if (tsec == NULL)
- goto error_return;
- xcoff_hash_table (info)->toc_section = tsec;
- tsec->flags |= SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY;
- tsec->alignment_power = 2;
- }
- /* Likewise for the descriptor section. */
- if (xcoff_hash_table (info)->descriptor_section == NULL)
- {
- asection *dsec;
+ tsec = bfd_make_section_anyway (abfd, ".tc");
+ if (tsec == NULL)
+ goto error_return;
+ xcoff_hash_table (info)->toc_section = tsec;
+ tsec->flags |= (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS
+ | SEC_IN_MEMORY);
+ tsec->alignment_power = 2;
+ }
+ /* Likewise for the descriptor section. */
+ if (xcoff_hash_table (info)->descriptor_section == NULL)
+ {
+ asection *dsec;
- dsec = bfd_make_section_anyway (abfd, ".ds");
- if (dsec == NULL)
- goto error_return;
- xcoff_hash_table (info)->descriptor_section = dsec;
- dsec->flags |= SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY;
- dsec->alignment_power = 2;
- }
- /* Likewise for the .debug section. */
- if (xcoff_hash_table (info)->debug_section == NULL)
- {
- asection *dsec;
+ dsec = bfd_make_section_anyway (abfd, ".ds");
+ if (dsec == NULL)
+ goto error_return;
+ xcoff_hash_table (info)->descriptor_section = dsec;
+ dsec->flags |= (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS
+ | SEC_IN_MEMORY);
+ dsec->alignment_power = 2;
+ }
+ /* Likewise for the .debug section. */
+ if (xcoff_hash_table (info)->debug_section == NULL)
+ {
+ asection *dsec;
- dsec = bfd_make_section_anyway (abfd, ".debug");
- if (dsec == NULL)
- goto error_return;
- xcoff_hash_table (info)->debug_section = dsec;
- dsec->flags |= SEC_HAS_CONTENTS | SEC_IN_MEMORY;
+ dsec = bfd_make_section_anyway (abfd, ".debug");
+ if (dsec == NULL)
+ goto error_return;
+ xcoff_hash_table (info)->debug_section = dsec;
+ dsec->flags |= SEC_HAS_CONTENTS | SEC_IN_MEMORY;
+ }
}
if ((abfd->flags & DYNAMIC) != 0
/* Check for magic symbol names. */
if ((smtyp == XTY_SD || smtyp == XTY_CM)
- && aux.x_csect.x_smclas != XMC_TC)
+ && aux.x_csect.x_smclas != XMC_TC
+ && aux.x_csect.x_smclas != XMC_TD)
{
int i;
|| sym._n._n_n._n_offset == 0)
copy = true;
+ /* The AIX linker appears to only detect multiple symbol
+ definitions when there is a reference to the symbol. If
+ a symbol is defined multiple times, and the only
+ references are from the same object file, the AIX linker
+ appears to permit it. It does not merge the different
+ definitions, but handles them independently. On the
+ other hand, if there is a reference, the linker reports
+ an error.
+
+ This matters because the AIX <net/net_globals.h> header
+ file actually defines an initialized array, so we have to
+ actually permit that to work.
+
+ We also have to handle the case of statically linking a
+ shared object, which will cause symbol redefinitions,
+ although this is an easier case to detect. */
+
if (info->hash->creator == abfd->xvec)
{
- /* If we are statically linking a shared object, it is
- OK for symbol redefinitions to occur. I can't figure
- out just what the XCOFF linker is doing, but
- something like this is required for -bnso to work. */
if (! bfd_is_und_section (section))
*sym_hash = xcoff_link_hash_lookup (xcoff_hash_table (info),
name, true, copy, false);
&& ! bfd_is_und_section (section)
&& ! bfd_is_com_section (section))
{
- if ((abfd->flags & DYNAMIC) != 0)
+ /* This is a second definition of a defined symbol. */
+ if ((abfd->flags & DYNAMIC) != 0
+ && ((*sym_hash)->smclas != XMC_GL
+ || aux.x_csect.x_smclas == XMC_GL
+ || ((*sym_hash)->root.u.def.section->owner->flags
+ & DYNAMIC) == 0))
{
+ /* The new symbol is from a shared library, and
+ either the existing symbol is not global
+ linkage code or this symbol is global linkage
+ code. If the existing symbol is global
+ linkage code and the new symbol is not, then
+ we want to use the new symbol. */
section = bfd_und_section_ptr;
value = 0;
}
else if (((*sym_hash)->root.u.def.section->owner->flags
& DYNAMIC) != 0)
{
+ /* The existing symbol is from a shared library.
+ Replace it. */
(*sym_hash)->root.type = bfd_link_hash_undefined;
(*sym_hash)->root.u.undef.abfd =
(*sym_hash)->root.u.def.section->owner;
}
+ else if ((*sym_hash)->root.next != NULL
+ || info->hash->undefs_tail == &(*sym_hash)->root)
+ {
+ /* This symbol has been referenced. In this
+ case, we just continue and permit the
+ multiple definition error. See the comment
+ above about the behaviour of the AIX linker. */
+ }
+ else if ((*sym_hash)->smclas == aux.x_csect.x_smclas)
+ {
+ /* The symbols are both csects of the same
+ class. There is at least a chance that this
+ is a semi-legitimate redefinition. */
+ section = bfd_und_section_ptr;
+ value = 0;
+ (*sym_hash)->flags |= XCOFF_MULTIPLY_DEFINED;
+ }
+ }
+ else if (((*sym_hash)->flags & XCOFF_MULTIPLY_DEFINED) != 0
+ && ((*sym_hash)->root.type == bfd_link_hash_defined
+ || (*sym_hash)->root.type == bfd_link_hash_defweak)
+ && (bfd_is_und_section (section)
+ || bfd_is_com_section (section)))
+ {
+ /* This is a reference to a multiply defined symbol.
+ Report the error now. See the comment above
+ about the behaviour of the AIX linker. We could
+ also do this with warning symbols, but I'm not
+ sure the XCOFF linker is wholly prepared to
+ handle them, and that would only be a warning,
+ not an error. */
+ if (! ((*info->callbacks->multiple_definition)
+ (info, (*sym_hash)->root.root.string,
+ (bfd *) NULL, (asection *) NULL, 0,
+ (*sym_hash)->root.u.def.section->owner,
+ (*sym_hash)->root.u.def.section,
+ (*sym_hash)->root.u.def.value)))
+ goto error_return;
+ /* Try not to give this error too many times. */
+ (*sym_hash)->flags &= ~XCOFF_MULTIPLY_DEFINED;
}
}
/* Make sure that we have seen all the relocs. */
for (o = abfd->sections; o != first_csect; o = o->next)
{
- /* Reset the section size and the line numebr count, since the
+ /* Reset the section size and the line number count, since the
data is now attached to the csects. Don't reset the size of
the .debug section, since we need to read it below in
bfd_xcoff_size_dynamic_sections. */
h->root.u.def.section = bfd_abs_section_ptr;
h->root.u.def.value = ldsym.l_value;
}
+
+ /* If this symbol defines a function descriptor, then it
+ implicitly defines the function code as well. */
+ if (h->smclas == XMC_DS
+ || (h->smclas == XMC_XO && name[0] != '.'))
+ h->flags |= XCOFF_DESCRIPTOR;
+ if ((h->flags & XCOFF_DESCRIPTOR) != 0)
+ {
+ struct xcoff_link_hash_entry *hds;
+
+ hds = h->descriptor;
+ if (hds == NULL)
+ {
+ char *dsnm;
+
+ dsnm = bfd_malloc (strlen (name) + 2);
+ if (dsnm == NULL)
+ return false;
+ dsnm[0] = '.';
+ strcpy (dsnm + 1, name);
+ hds = xcoff_link_hash_lookup (xcoff_hash_table (info), dsnm,
+ true, true, true);
+ free (dsnm);
+ if (hds == NULL)
+ return false;
+
+ if (hds->root.type == bfd_link_hash_new)
+ {
+ hds->root.type = bfd_link_hash_undefined;
+ hds->root.u.undef.abfd = abfd;
+ /* We do not want to add this to the undefined
+ symbol list. */
+ }
+
+ hds->descriptor = h;
+ h->descriptor = hds;
+ }
+
+ hds->flags |= XCOFF_DEF_DYNAMIC;
+ if (hds->smclas == XMC_UA)
+ hds->smclas = XMC_PR;
+
+ /* An absolute symbol appears to actually define code, not a
+ function descriptor. This is how some math functions are
+ implemented on AIX 4.1. */
+ if (h->smclas == XMC_XO
+ && (hds->root.type == bfd_link_hash_undefined
+ || hds->root.type == bfd_link_hash_undefweak))
+ {
+ hds->smclas = XMC_XO;
+ hds->root.type = bfd_link_hash_defined;
+ hds->root.u.def.section = bfd_abs_section_ptr;
+ hds->root.u.def.value = ldsym.l_value;
+ }
+ }
}
if (buf != NULL && ! coff_section_data (abfd, lsec)->keep_contents)
&& h->root.root.string[0] == '.'
&& h->descriptor != NULL
&& ((h->descriptor->flags & XCOFF_DEF_DYNAMIC) != 0
- || info->shared
|| ((h->descriptor->flags & XCOFF_IMPORT) != 0
&& (h->descriptor->flags
& XCOFF_DEF_REGULAR) == 0))))
struct xcoff_loader_info *ldinfo = (struct xcoff_loader_info *) p;
size_t len;
- /* If all defined symbols should be exported, mark them now. */
+ /* If this is a final link, and the symbol was defined as a common
+ symbol in a regular object file, and there was no definition in
+ any dynamic object, then the linker will have allocated space for
+ the symbol in a common section but the XCOFF_DEF_REGULAR flag
+ will not have been set. */
+ if (h->root.type == bfd_link_hash_defined
+ && (h->flags & XCOFF_DEF_REGULAR) == 0
+ && (h->flags & XCOFF_REF_REGULAR) != 0
+ && (h->flags & XCOFF_DEF_DYNAMIC) == 0
+ && (h->root.u.def.section->owner->flags & DYNAMIC) == 0)
+ h->flags |= XCOFF_DEF_REGULAR;
+
+ /* If all defined symbols should be exported, mark them now. We
+ don't want to export the actual functions, just the function
+ descriptors. */
if (ldinfo->export_defineds
- && (h->flags & XCOFF_DEF_REGULAR) != 0)
+ && (h->flags & XCOFF_DEF_REGULAR) != 0
+ && h->root.root.string[0] != '.')
h->flags |= XCOFF_EXPORT;
/* We don't want to garbage collect symbols which are not defined in
!= ldinfo->info->hash->creator)))
h->flags |= XCOFF_MARK;
- /* If this symbol is called and defined in a dynamic object, or not
- defined at all when building a shared object, or imported, then
- we need to set up global linkage code for it. (Unless we did
- garbage collection and we didn't need this symbol.) */
+ /* If this symbol is called and defined in a dynamic object, or it
+ is imported, then we need to set up global linkage code for it.
+ (Unless we did garbage collection and we didn't need this
+ symbol.) */
if ((h->flags & XCOFF_CALLED) != 0
&& (h->root.type == bfd_link_hash_undefined
|| h->root.type == bfd_link_hash_undefweak)
&& h->root.root.string[0] == '.'
&& h->descriptor != NULL
&& ((h->descriptor->flags & XCOFF_DEF_DYNAMIC) != 0
- || ldinfo->info->shared
|| ((h->descriptor->flags & XCOFF_IMPORT) != 0
&& (h->descriptor->flags & XCOFF_DEF_REGULAR) == 0))
&& (! xcoff_hash_table (ldinfo->info)->gc
else
{
(*_bfd_error_handler)
- ("attempt to export undefined symbol `%s'",
+ ("warning: attempt to export undefined symbol `%s'",
h->root.root.string);
- ldinfo->failed = true;
- bfd_set_error (bfd_error_invalid_operation);
- return false;
+ h->ldsym = NULL;
+ return true;
}
}
{
struct xcoff_link_hash_entry *h = NULL;
struct internal_ldrel ldrel;
+ boolean quiet;
*rel_hash = NULL;
if (r_symndx != -1)
{
h = obj_xcoff_sym_hashes (input_bfd)[r_symndx];
- if (h != NULL
- && (irel->r_type == R_TOC
- || irel->r_type == R_GL
- || irel->r_type == R_TCL
- || irel->r_type == R_TRL
- || irel->r_type == R_TRLA))
+ if (h != NULL
+ && h->smclas != XMC_TD
+ && (irel->r_type == R_TOC
+ || irel->r_type == R_GL
+ || irel->r_type == R_TCL
+ || irel->r_type == R_TRL
+ || irel->r_type == R_TRLA))
{
/* This is a TOC relative reloc with a symbol
attached. The symbol should be the one which
}
}
+ quiet = false;
switch (irel->r_type)
{
default:
}
else
{
- if (h->ldindx < 0)
+ if (! finfo->info->relocateable
+ && (h->flags & XCOFF_DEF_DYNAMIC) == 0
+ && (h->flags & XCOFF_IMPORT) == 0)
+ {
+ /* We already called the undefined_symbol
+ callback for this relocation, in
+ _bfd_ppc_xcoff_relocate_section. Don't
+ issue any more warnings. */
+ quiet = true;
+ }
+ if (h->ldindx < 0 && ! quiet)
{
(*_bfd_error_handler)
("%s: `%s' in loader reloc but not loader sym",
ldrel.l_rtype = (irel->r_size << 8) | irel->r_type;
ldrel.l_rsecnm = o->output_section->target_index;
if (xcoff_hash_table (finfo->info)->textro
- && strcmp (o->output_section->name, ".text") == 0)
+ && strcmp (o->output_section->name, ".text") == 0
+ && ! quiet)
{
(*_bfd_error_handler)
("%s: loader reloc in read-only section %s",
(info, h->root.root.string, input_bfd, input_section,
rel->r_vaddr - input_section->vma)))
return false;
+
+ /* Don't try to process the reloc. It can't help, and
+ it may generate another error. */
+ continue;
}
}
address instruction which may be changed to a load
instruction. FIXME: I don't know if this is the correct
implementation. */
- if (h != NULL && h->toc_section == NULL)
- {
- (*_bfd_error_handler)
- ("%s: TOC reloc at 0x%x to symbol `%s' with no TOC entry",
- bfd_get_filename (input_bfd), rel->r_vaddr,
- h->root.root.string);
- bfd_set_error (bfd_error_bad_value);
- return false;
- }
- if (h != NULL)
+ if (h != NULL && h->smclas != XMC_TD)
{
+ if (h->toc_section == NULL)
+ {
+ (*_bfd_error_handler)
+ ("%s: TOC reloc at 0x%x to symbol `%s' with no TOC entry",
+ bfd_get_filename (input_bfd), rel->r_vaddr,
+ h->root.root.string);
+ bfd_set_error (bfd_error_bad_value);
+ return false;
+ }
+
BFD_ASSERT ((h->flags & XCOFF_SET_TOC) == 0);
val = (h->toc_section->output_section->vma
+ h->toc_section->output_offset);
}
+
val = ((val - xcoff_data (output_bfd)->toc)
- (sym->n_value - xcoff_data (input_bfd)->toc));
addend = 0;
pnext = contents + (rel->r_vaddr - input_section->vma) + 4;
next = bfd_get_32 (input_bfd, pnext);
- if (h->smclas == XMC_GL)
+
+ /* The _ptrgl function is magic. It is used by the AIX
+ compiler to call a function through a pointer. */
+ if (h->smclas == XMC_GL
+ || strcmp (h->root.root.string, "._ptrgl") == 0)
{
if (next == 0x4def7b82 /* cror 15,15,15 */
|| next == 0x4ffffb82) /* cror 31,31,31 */
+Tue Sep 3 14:05:29 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * ieee.c (ieee_enum_type): Don't check index into a NULL names
+ array.
+ * nm.c (sort_symbols_by_size): Always initialize next.
+ * rdcoff.c (parse_coff_type): Warn about an incomprehensible
+ type rather than crashing.
+ * rddbg.c (read_symbol_stabs_debugging_info): Initialize f.
+ * stabs.c (parse_stab_members): Set context in all cases.
+
+Thu Aug 29 16:56:52 1996 Michael Meissner <meissner@tiktok.cygnus.com>
+
+ * configure.in (i[345]86-*-*): Recognize i686 for pentium pro.
+ * configure: Regenerate.
+
+Thu Aug 29 11:29:20 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * objdump.c (L_tmpnam): Never define.
+ (display_target_list): Use choose_temp_base instead of tmpnam.
+ (display_info_table): Likewise.
+
+Tue Aug 27 18:15:01 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * stabs.c (parse_stab): An N_FUN symbol with an empty string
+ indicates the end of a function.
+
+Thu Aug 22 17:08:00 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * wrstabs.c (struct string_hash_entry): Add next field.
+ (struct stab_write_handle): Change strings to a pointer to
+ string_hash_entry. Add last_strings field. Remove strings_alloc
+ field.
+ (string_hash_newfunc): Initialize next field.
+ (stab_write_symbol): Copy string into hash table rather than into
+ buffer. Keep a list of hash table entries.
+ (write_stabs_in_sections_debugging_info): Initialize last_string.
+ Copy strings from list of hash table entries in memory.
+ (stab_modify_type): If the entry on the stack is a definition,
+ make a new definition rather than failing an assert.
+ (stab_array_type): The size is only zero if high is strictly less
+ than low.
+
+ * ieee.c (struct ieee_info): Add saw_filename field.
+ (parse_ieee): Initialize saw_filename.
+ (parse_ieee_bb): Set saw_filename for a BB1 or BB2. In a BB1,
+ discard the current variables and types. In a BB10, if no
+ filename has been seen, call debug_set_filename.
+ (parse_ieee_ty): In case 'g', the type is optional.
+
+ * prdbg.c (pr_fix_visibility): Don't abort on
+ DEBUG_VISIBILITY_IGNORE.
+
+ * debug.c (debug_name_type): Correct error message.
+
+ * configure.in: Substitute HLDENV.
+ * configure: Rebuild.
+ * Makefile.in (HLDENV): New variable. Use it whenever linking a
+ program.
+
+Thu Aug 15 19:30:41 1996 Stan Shebs <shebs@andros.cygnus.com>
+
+ * mpw-make.sed: Add symbolic doublequotes around the version
+ number.
+
+Thu Aug 8 12:27:52 1996 Klaus Kaempf <kkaempf@progis.de>
+
+ * makefile.vms: Add better support for DEC C compilation.
+ Add new macros as in Makefile.in.
+
+Wed Aug 7 14:27:33 1996 Philippe De Muyter <phdm@info.ucl.ac.be>
+
+ * configure.in: Call BFD_NEED_DECLARATION on strstr and sbrk.
+ * acconfig.h (NEED_DECLARATION_STRSTR): New macro.
+ (NEED_DECLARATION_SBRK): New macro.
+ * configure, config.in: Rebuild.
+ * bucomm.h (strstr): Declare if NEED_DECLARATION_STRSTR.
+ (sbrk): Declare if HAVE_SBRK and NEED_DECLARATION_SBRK.
+
+ * prdbg.c (pr_end_struct_type): Avoid using a string constant in
+ assert, for the benefit of broken assert macros.
+
+Fri Jul 26 14:06:50 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * objdump.c (disassemble_data): Set disasm_info.flavour from
+ abfd.
+
+Tue Jul 23 13:59:54 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * dlltool.c (secdata): In non DLLTOOL_PPC case, change alignment
+ of .text section to 2.
+
+Mon Jul 22 08:46:15 1996 Stu Grossman (grossman@lisa.cygnus.com)
+
+ * objdump.c (dump_section_stabs): Fix test for stabs sections
+ ending with numbers. This fixes a problem with .stab being
+ confused with .stab.index.
+
+Wed Jul 10 13:32:28 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * stabs.c (stab_demangle_fund_type): Return a void * for a
+ template, rather than simply aborting.
+
+Mon Jul 8 15:28:05 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * ar.c (open_inarch): Add file parameter. Change all callers. If
+ this is a newly created archive, set the target based on the
+ file.
+ * arsup.h (open_inarch): Update declaration.
+
+Thu Jul 4 12:00:55 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * Makefile.in (VERSION): Set to cygnus-2.7.1.
+
+ * Released binutils 2.7.
+
+ * rdcoff.c (parse_coff): Get address to pass to debug_end_function
+ from function size, not value of .ef symbol. From Ning
+ Mosberger-Tang <ning@AZStarNet.com>.
+
+Sat Jun 29 21:18:09 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * objcopy.c (strip_main): Add -o option, and handle it.
+ (strip_usage): Mention -o.
+ * binutils.texi, strip.1: Mention -o.
+
+Mon Jun 24 17:19:02 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
+
+ * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
+ INSTALL_PROGRAM, INSTALL_DATA): Use autoconf set values.
+ (docdir): Removed.
+ * configure.in (AC_PREREQ): Autoconf 2.5 or higher.
+
+Mon Jun 24 11:59:13 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * objdump.c (endian): New static variable.
+ (usage): Mention -EB/-EL/--endian.
+ (long_options): Add "endian".
+ (disassemble_data): If endianness was specified, replace
+ abfd->xvec with a copy of itself with the given endianness.
+ (main): Handle -EB/-EL/--endian.
+ * binutils.texi, objdump.1: Mention -EB/-EL/--endian.
+
+ * objdump.c: Make most variables and functions static.
+
+ * configure.in: On alpha*-*-osf*, link against libbfd.a if not
+ using shared libraries.
+ * configure: Rebuild with autoconf 2.10.
+
+Sun Jun 23 14:47:36 1996 Kim Knuttila <krk@cygnus.com>
+
+ * dlltool.c (secdata): Changed .rdata to .reldata so .reloc will work.
+ (make_one_lib_file): Removed cruft. (#if 1)
+
+Wed Jun 19 14:46:38 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * objdump.c (stabs): Change from struct internal_nlist * to
+ bfd_byte *.
+ (print_section_stabs): Fetch stabs information directly, rather
+ than assuming that struct internal_nlist is the right size.
+
+ * binutils.texi: Document change to binary format: file position
+ based on load address, not section VMA.
+
+ * bucomm.h: Define SEEK_SET, SEEK_CUR, and SEEK_END if they are
+ not already defined.
+
+Tue Jun 18 18:25:00 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * Makefile.in (DISTSTUFF): Add deflex.c.
+
+Tue Jun 18 15:03:44 1996 Klaus Kaempf <kkaempf@progis.de>
+
+ * config.h-vms, makefile.vms: New files.
+
+Mon Jun 17 09:47:31 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * dlltool.c (make_one_lib_file): Use BFD_RELOC_RVA rather than
+ BFD_RELOC_32 in IDATA7.
+
+Wed Jun 12 11:52:06 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * nm.c (struct get_relocs_info): Define.
+ (line_numbers): New static variable.
+ (long_options): Add "line-numbers".
+ (usage): Mention -l and --line-numbers.
+ (main): Handle -l.
+ (print_symbol): Print line numbers if requested.
+ (get_relocs): New static function.
+ * binutils.texi, nm.1: Document -l/--line-numbers.
+
+Tue Jun 11 20:12:15 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * objdump.c (dump_reloc_set): Add sec parameter. Change all
+ callers. If with_line_numbers is set, display line numbers of
+ relocation entries.
+ * binutils.texi, objdump.1: Document -l with -r.
+
+Mon Jun 10 23:42:59 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * ar.c (open_inarch): Report BFD error message if an archive can
+ not be recognized. List matching formats if the file is
+ ambiguously recognized.
+ (ranlib_touch): Likewise.
+
Thu Jun 6 13:56:14 1996 Ian Lance Taylor <ian@cygnus.com>
* README: Add notes on how to build if you don't have ar.
program_transform_name = @program_transform_name@
exec_prefix = @exec_prefix@
-bindir = $(exec_prefix)/bin
-libdir = $(exec_prefix)/lib
+bindir = @bindir@
+libdir = @libdir@
tooldir = $(exec_prefix)/$(target_alias)
-datadir = $(prefix)/lib
-mandir = $(prefix)/man
+datadir = @datadir@
+mandir = @mandir@
man1dir = $(mandir)/man1
man2dir = $(mandir)/man2
man3dir = $(mandir)/man3
man7dir = $(mandir)/man7
man8dir = $(mandir)/man8
man9dir = $(mandir)/man9
-infodir = $(prefix)/info
-includedir = $(prefix)/include
-docdir = $(datadir)/doc
+infodir = @infodir@
+includedir = @includedir@
SHELL = /bin/sh
INSTALL = `cd $(srcdir)/..;pwd`/install.sh -c
-INSTALL_PROGRAM = $(INSTALL)
-INSTALL_DATA = $(INSTALL) -m 644
+INSTALL_PROGRAM = @INSTALL_PROGRAM@
+INSTALL_DATA = @INSTALL_DATA@
INSTALL_XFORM = $(INSTALL) -t='$(program_transform_name)'
INSTALL_XFORM1 = $(INSTALL_XFORM) -b=.1 -m 644
CFLAGS = @CFLAGS@
LDFLAGS = @LDFLAGS@
HLDFLAGS = @HLDFLAGS@
+HLDENV = @HLDENV@
RPATH_ENVVAR = @RPATH_ENVVAR@
MAKEINFO = makeinfo
TEXI2DVI = texi2dvi
LEX = `if [ -f ../flex/flex ] ; then echo ../flex/flex ; else echo flex ; fi`
# Distribution version
-VERSION=cygnus-2.6
+VERSION=cygnus-2.7.1
# Distribution name
DIST_NAME=binutils-${VERSION}
# Files that can be generated, but should be in the distribution.
# Don't build $(DEMANGLER_PROG).1, since its name may vary with the
# configuration.
-DISTSTUFF=arparse.c arparse.h arlex.c nlmheader.c sysinfo.c sysinfo.h syslex.c
+DISTSTUFF=arparse.c arparse.h arlex.c nlmheader.c sysinfo.c sysinfo.h \
+ syslex.c deflex.c
# Stuff that goes in tooldir/ if appropriate
TOOL_PROGS = nm.new strip.new ar ranlib $(DLLTOOL_PROG)
dvi: binutils.dvi
$(SIZE_PROG): $(ADDL_DEPS) size.o
- $(CC) $(HLDFLAGS) $(CFLAGS) $(LDFLAGS) -o $(SIZE_PROG) size.o $(ADDL_LIBS) $(EXTRALIBS)
+ $(HLDENV) $(CC) $(HLDFLAGS) $(CFLAGS) $(LDFLAGS) -o $(SIZE_PROG) size.o $(ADDL_LIBS) $(EXTRALIBS)
$(OBJCOPY_PROG): $(ADDL_DEPS) objcopy.o not-strip.o $(WRITE_DEBUG_OBJS)
- $(CC) $(HLDFLAGS) $(CFLAGS) $(LDFLAGS) -o $(OBJCOPY_PROG) objcopy.o not-strip.o $(WRITE_DEBUG_OBJS) $(ADDL_LIBS) $(EXTRALIBS)
+ $(HLDENV) $(CC) $(HLDFLAGS) $(CFLAGS) $(LDFLAGS) -o $(OBJCOPY_PROG) objcopy.o not-strip.o $(WRITE_DEBUG_OBJS) $(ADDL_LIBS) $(EXTRALIBS)
$(STRINGS_PROG): $(ADDL_DEPS) strings.o
- $(CC) $(HLDFLAGS) $(CFLAGS) $(LDFLAGS) -o $(STRINGS_PROG) strings.o $(ADDL_LIBS) $(EXTRALIBS)
+ $(HLDENV) $(CC) $(HLDFLAGS) $(CFLAGS) $(LDFLAGS) -o $(STRINGS_PROG) strings.o $(ADDL_LIBS) $(EXTRALIBS)
$(STRIP_PROG): $(ADDL_DEPS) objcopy.o is-strip.o $(WRITE_DEBUG_OBJS)
- $(CC) $(HLDFLAGS) $(CFLAGS) $(LDFLAGS) -o $(STRIP_PROG) objcopy.o is-strip.o $(WRITE_DEBUG_OBJS) $(ADDL_LIBS) $(EXTRALIBS)
+ $(HLDENV) $(CC) $(HLDFLAGS) $(CFLAGS) $(LDFLAGS) -o $(STRIP_PROG) objcopy.o is-strip.o $(WRITE_DEBUG_OBJS) $(ADDL_LIBS) $(EXTRALIBS)
$(NM_PROG): $(ADDL_DEPS) nm.o
- $(CC) $(HLDFLAGS) $(CFLAGS) $(LDFLAGS) -o $(NM_PROG) nm.o $(ADDL_LIBS) $(EXTRALIBS)
+ $(HLDENV) $(CC) $(HLDFLAGS) $(CFLAGS) $(LDFLAGS) -o $(NM_PROG) nm.o $(ADDL_LIBS) $(EXTRALIBS)
#libbfd is searched twice here ($(BFDLIB) and $(ADDL_LIBS)) because when a
#shared libbfd is built with --enable-commonbfdlib, all of libopcodes is
#available in libbfd.so and we don't want to link anything from libopcodes.a
$(OBJDUMP_PROG): $(ADDL_DEPS) objdump.o prdbg.o $(DEBUG_OBJS) $(OPCODES_DEP)
- $(CC) $(HLDFLAGS) $(CFLAGS) $(LDFLAGS) -o $(OBJDUMP_PROG) objdump.o prdbg.o $(DEBUG_OBJS) $(BFDLIB) $(OPCODES) $(ADDL_LIBS) $(EXTRALIBS)
+ $(HLDENV) $(CC) $(HLDFLAGS) $(CFLAGS) $(LDFLAGS) -o $(OBJDUMP_PROG) objdump.o prdbg.o $(DEBUG_OBJS) $(BFDLIB) $(OPCODES) $(ADDL_LIBS) $(EXTRALIBS)
underscore.c: stamp-under ; @true
$(CC) -c -DMAIN -DVERSION='"$(VERSION)"' $(ALL_CFLAGS) $(BASEDIR)/libiberty/cplus-dem.c
$(DEMANGLER_PROG): cplus-dem.o $(LIBIBERTY) underscore.o $(DEMANGLER_PROG).1
- $(CC) $(HLDFLAGS) $(CFLAGS) $(LDFLAGS) -o $(DEMANGLER_PROG) cplus-dem.o $(LIBIBERTY) $(EXTRALIBS) underscore.o
+ $(HLDENV) $(CC) $(HLDFLAGS) $(CFLAGS) $(LDFLAGS) -o $(DEMANGLER_PROG) cplus-dem.o $(LIBIBERTY) $(EXTRALIBS) underscore.o
arparse.c: arparse.y
$(BISON) $(BISONFLAGS) $(srcdir)/arparse.y
mv lex.yy.c arlex.c
$(AR_PROG): $(ADDL_DEPS) ar.o arparse.o arlex.o not-ranlib.o arsup.o
- $(CC) $(HLDFLAGS) $(CFLAGS) $(LDFLAGS) -o $(AR_PROG) ar.o arparse.o arlex.o arsup.o not-ranlib.o $(ADDL_LIBS) $(EXTRALIBS)
+ $(HLDENV) $(CC) $(HLDFLAGS) $(CFLAGS) $(LDFLAGS) -o $(AR_PROG) ar.o arparse.o arlex.o arsup.o not-ranlib.o $(ADDL_LIBS) $(EXTRALIBS)
$(RANLIB_PROG): $(ADDL_DEPS) ar.o is-ranlib.o arparse.o arlex.o arsup.o
- $(CC) $(HLDFLAGS) $(CFLAGS) $(LDFLAGS) -o $(RANLIB_PROG) ar.o arparse.o arlex.o arsup.o is-ranlib.o $(ADDL_LIBS) $(EXTRALIBS)
+ $(HLDENV) $(CC) $(HLDFLAGS) $(CFLAGS) $(LDFLAGS) -o $(RANLIB_PROG) ar.o arparse.o arlex.o arsup.o is-ranlib.o $(ADDL_LIBS) $(EXTRALIBS)
# This rule creates a single binary that switches between ar and ranlib
# by looking at argv[0]. Use this kludge to save some disk space.
# Alternatively, you can install ranlib.sh as ranlib.
ar_with_ranlib: $(ADDL_DEPS) ar.o maybe-ranlib.o
- $(CC) $(HLDFLAGS) $(CFLAGS) $(LDFLAGS) -o $(AR_PROG) ar.o maybe-ranlib.o $(ADDL_LIBS) $(EXTRALIBS)
+ $(HLDENV) $(CC) $(HLDFLAGS) $(CFLAGS) $(LDFLAGS) -o $(AR_PROG) ar.o maybe-ranlib.o $(ADDL_LIBS) $(EXTRALIBS)
-rm -f $(RANLIB_PROG)
-ln $(AR_PROG) $(RANLIB_PROG)
# objcopy and strip in one binary that uses argv[0] to decide its action.
objcopy_with_strip: $(ADDL_DEPS) objcopy.o maybe-strip.o
- $(CC) $(HLDFLAGS) $(CFLAGS) $(LDFLAGS) -o $(OBJCOPY_PROG) objcopy.o maybe-strip.o $(ADDL_LIBS) $(EXTRALIBS)
+ $(HLDENV) $(CC) $(HLDFLAGS) $(CFLAGS) $(LDFLAGS) -o $(OBJCOPY_PROG) objcopy.o maybe-strip.o $(ADDL_LIBS) $(EXTRALIBS)
-rm -f $(STRIP_PROG)
-ln $(OBJCOPY_PROG) $(STRIP_PROG)
fi
srconv: srconv.o coffgrok.o $(ADDL_DEPS)
- $(CC) $(HLDFLAGS) $(CFLAGS) $(LDFLAGS) -o $@ srconv.o coffgrok.o $(ADDL_LIBS) $(EXTRALIBS)
+ $(HLDENV) $(CC) $(HLDFLAGS) $(CFLAGS) $(LDFLAGS) -o $@ srconv.o coffgrok.o $(ADDL_LIBS) $(EXTRALIBS)
dlltool: dlltool.o defparse.o deflex.o cplus-dem.o $(ADDL_DEPS)
- $(CC) $(HLDFLAGS) $(CFLAGS) $(LDFLAGS) -o $@ dlltool.o defparse.o deflex.o $(ADDL_LIBS) $(EXTRALIBS)
+ $(HLDENV) $(CC) $(HLDFLAGS) $(CFLAGS) $(LDFLAGS) -o $@ dlltool.o defparse.o deflex.o $(ADDL_LIBS) $(EXTRALIBS)
defparse.c:defparse.y
$(BISON) $(BISONFLAGS) $(srcdir)/defparse.y
$(CC) -c @DLLTOOL_DEFS@ $(ALL_CFLAGS) $(srcdir)/dlltool.c
coffdump: coffdump.o coffgrok.o $(ADDL_DEPS)
- $(CC) $(HLDFLAGS) $(CFLAGS) $(LDFLAGS) -o $@ coffdump.o coffgrok.o $(ADDL_LIBS) $(EXTRALIBS)
+ $(HLDENV) $(CC) $(HLDFLAGS) $(CFLAGS) $(LDFLAGS) -o $@ coffdump.o coffgrok.o $(ADDL_LIBS) $(EXTRALIBS)
sysdump: sysdump.o $(ADDL_DEPS)
- $(CC) $(HLDFLAGS) $(CFLAGS) $(LDFLAGS) -o $@ sysdump.o $(ADDL_LIBS) $(EXTRALIBS)
+ $(HLDENV) $(CC) $(HLDFLAGS) $(CFLAGS) $(LDFLAGS) -o $@ sysdump.o $(ADDL_LIBS) $(EXTRALIBS)
# Depend upon sysinfo.c to avoid building both nlmheader.c and sysinfo.c
# simultaneously.
$(CC) -c -DLD_NAME="\"$${ldname}\"" @NLMCONV_DEFS@ $(ALL_CFLAGS) $(srcdir)/nlmconv.c
$(NLMCONV_PROG): nlmconv.o nlmheader.o $(ADDL_DEPS)
- $(CC) $(HLDFLAGS) $(CFLAGS) $(LDFLAGS) -o $@ nlmconv.o nlmheader.o $(ADDL_LIBS) $(EXTRALIBS)
+ $(HLDENV) $(CC) $(HLDFLAGS) $(CFLAGS) $(LDFLAGS) -o $@ nlmconv.o nlmheader.o $(ADDL_LIBS) $(EXTRALIBS)
# Targets to rebuild dependencies in this Makefile.
# Have to get rid of .dep1 here so that "$?" later includes all of $(CFILES).
* Added --remove-leading-char argument to objcopy.
+* The objdump --line-numbers option is now meaningful with --reloc.
+
+* Added --line-numbers option to nm.
+
+* Added --endian/-EB/-EL option to objdump.
+
+* Added support for Alpha OpenVMS/AXP.
+
Changes since binutils 2.5
* Added -N/--strip-symbol and -K/--keep-symbol arguments to strip and objcopy.
libiberty libraries. It will be installed as libbfd. This option
will make the binutils programs as small as possible.
+To build under openVMS/AXP, see the file make-all.com in the top level
+directory.
+
If you don't have ar
====================
+/* Whether strstr must be declared even if <string.h> is included. */
+#undef NEED_DECLARATION_STRSTR
+
/* Whether fprintf must be declared even if <stdio.h> is included. */
#undef NEED_DECLARATION_FPRINTF
+
+/* Whether sbrk must be declared even if <unistd.h> is included. */
+#undef NEED_DECLARATION_SBRK
@TOP@
/* Is the type time_t defined in <time.h>? */
{
bfd *arch;
- arch = open_inarch (ar_name);
+ arch = open_inarch (ar_name, (char *) NULL);
if (output)
{
outfile = fopen(output,"w");
{
bfd *arch;
- arch = open_inarch (name);
+ arch = open_inarch (name, (char *) NULL);
if (arch != NULL)
map_over_list (arch, ar_addlib_doer, list);
[ -r | --reverse-sort ] [ --size-sort ] [ -u | --undefined-only ]
[ -t @var{radix} | --radix=@var{radix} ] [ -P | --portability ]
[ --target=@var{bfdname} ] [ -f @var{format} | --format=@var{format} ]
- [ --defined-only ]
+ [ --defined-only ] [-l | --line-numbers ]
[ --no-demangle ] [ -V | --version ] [ --help ] [ @var{objfile}@dots{} ]
@end smallexample
@cindex external symbols
Display only external symbols.
+@item -l
+@itemx --line-numbers
+@cindex symbol line numbers
+For each symbol, use debugging information to try to find a filename and
+line number. For a defined symbol, look for the line number of the
+address of the symbol. For an undefined symbol, look for the line
+number of a relocation entry which refers to the symbol. If line number
+information can be found, print it after the other symbol information.
+
@item -n
@itemx -v
@itemx --numeric-sort
@code{objcopy} generates a raw binary file, it will essentially produce
a memory dump of the contents of the input object file. All symbols and
relocation information will be discarded. The memory dump will start at
-the virtual address of the lowest section copied into the output file.
+the load address of the lowest section copied into the output file.
When generating an S-record or a raw binary file, it may be helpful to
use @samp{-S} to remove sections containing debugging information. In
objdump [ -a | --archive-headers ]
[ -b @var{bfdname} | --target=@var{bfdname} ] [ --debugging ]
[ -d | --disassemble ] [ -D | --disassemble-all ]
+ [ -EB | -EL | --endian=@{big | little @} ]
[ -f | --file-headers ]
[ -h | --section-headers | --headers ] [ -i | --info ]
[ -j @var{section} | --section=@var{section} ]
Like @samp{-d}, but disassemble the contents of all sections, not just
those expected to contain instructions.
+@item -EB
+@itemx -EL
+@itemx --endian=@{big|little@}
+@cindex endianness
+@cindex disassembly endianness
+Specify the endianness of the object files. This only affects
+disassembly. This can be useful when disassembling a file format which
+does not describe endianness information, such as S-records.
+
@item -f
@itemx --file-header
@cindex object file header
@item -l
@itemx --line-numbers
@cindex source filenames for object files
-Label the display (using debugging information) with the filename
-and source line numbers corresponding to the object code shown.
-Only useful with @samp{-d} or @samp{-D}.
+Label the display (using debugging information) with the filename and
+source line numbers corresponding to the object code or relocs shown.
+Only useful with @samp{-d}, @samp{-D}, or @samp{-r}.
@item -m @var{machine}
@itemx --architecture=@var{machine}
@cindex architecture
-Specify that the object files @var{objfile} are for architecture
-@var{machine}. You can list available architectures using the @samp{-i}
-option.
+@cindex disassembly architecture
+Specify the architecture to use when disassembling object files. This
+can be useful when disasembling object files which do not describe
+architecture information, such as S-records. You can list the available
+architectures with the @samp{-i} option.
@item -r
@itemx --reloc
[ -N @var{symbolname} | --strip-symbol=@var{symbolname} ]
[ -x | --discard-all ] [ -X | --discard-locals ]
[ -R @var{sectionname} | --remove-section=@var{sectionname} ]
+ [ -o @var{file} ]
[ -v | --verbose ] [ -V | --version ] [ --help ]
@var{objfile}@dots{}
@end smallexample
given more than once, and may be combined with strip options other than
@code{-K}.
+@item -o @var{file}
+Put the stripped output in @var{file}, rather than replacing the
+existing file. When this argument is used, only one @var{objfile}
+argument may be specified.
+
@item -x
@itemx --discard-all
Remove non-global symbols.
#else
extern char *strchr ();
extern char *strrchr ();
-extern char *strstr ();
#endif
#endif
#endif
#endif
+#ifdef NEED_DECLARATION_STRSTR
+extern char *strstr ();
+#endif
+
+#ifdef HAVE_SBRK
+#ifdef NEED_DECLARATION_SBRK
+extern char *sbrk ();
+#endif
+#endif
+
#ifndef O_RDONLY
#define O_RDONLY 0
#endif
#define O_RDWR 2
#endif
+#ifndef SEEK_SET
+#define SEEK_SET 0
+#endif
+#ifndef SEEK_CUR
+#define SEEK_CUR 1
+#endif
+#ifndef SEEK_END
+#define SEEK_END 2
+#endif
+
/* bucomm.c */
void bfd_nonfatal PARAMS ((CONST char *));
/* config.in. Generated automatically from configure.in by autoheader. */
+/* Whether strstr must be declared even if <string.h> is included. */
+#undef NEED_DECLARATION_STRSTR
+
/* Whether fprintf must be declared even if <stdio.h> is included. */
#undef NEED_DECLARATION_FPRINTF
+/* Whether sbrk must be declared even if <unistd.h> is included. */
+#undef NEED_DECLARATION_SBRK
+
/* Define if you have <sys/wait.h> that is POSIX.1 compatible. */
#undef HAVE_SYS_WAIT_H
#! /bin/sh
# Guess values for system-dependent variables and create Makefiles.
-# Generated automatically using autoconf version 2.8
-# Copyright (C) 1992, 1993, 1994 Free Software Foundation, Inc.
+# Generated automatically using autoconf version 2.10
+# Copyright (C) 1992, 93, 94, 95, 96 Free Software Foundation, Inc.
#
# This configure script is free software; the Free Software Foundation
# gives unlimited permission to copy, distribute and modify it.
verbose=yes ;;
-version | --version | --versio | --versi | --vers)
- echo "configure generated by autoconf version 2.8"
+ echo "configure generated by autoconf version 2.10"
exit 0 ;;
-with-* | --with-*)
HDEFINES=
HLDFLAGS=
+HLDENV=
RPATH_ENVVAR=LD_LIBRARY_PATH
# Extract the first word of "gcc", so it can be a program name with args.
yes;
#endif
EOF
-if { ac_try='${CC-cc} -E conftest.c'; { (eval echo configure:770: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; } | egrep yes >/dev/null 2>&1; then
+if { ac_try='${CC-cc} -E conftest.c'; { (eval echo configure:771: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; } | egrep yes >/dev/null 2>&1; then
ac_cv_prog_gcc=yes
else
ac_cv_prog_gcc=no
+
AR=${AR-ar}
# Extract the first word of "ranlib", so it can be a program name with args.
# need to handle some hosts specially.
BFDLIB='-L../bfd -lbfd'
OPCODES='-L../opcodes -lopcodes'
-if test "${shared}" = "true"; then
- case "${host}" in
- *-*-sunos*)
- # On SunOS, we must link against the name we are going to install,
- # not -lbfd, since SunOS does not support SONAME.
- if test "${shared_bfd}" = "true"; then
- BFDLIB='-L../bfd -l`echo bfd | sed '"'"'$(program_transform_name)'"'"'`'
- fi
- if test "${shared_opcodes}" = "true"; then
- OPCODES='-L../opcodes -l`echo opcodes | sed '"'"'$(program_transform_name)'"'"'`'
- fi
- ;;
- esac
-fi
+case "${host}" in
+*-*-sunos*)
+ # On SunOS, we must link against the name we are going to install,
+ # not -lbfd, since SunOS does not support SONAME.
+ if test "${shared_bfd}" = "true"; then
+ BFDLIB='-L../bfd -l`echo bfd | sed '"'"'$(program_transform_name)'"'"'`'
+ fi
+ if test "${shared_opcodes}" = "true"; then
+ OPCODES='-L../opcodes -l`echo opcodes | sed '"'"'$(program_transform_name)'"'"'`'
+ fi
+ ;;
+alpha*-*-osf*)
+ # On Alpha OSF/1, the native linker searches all the -L
+ # directories for any LIB.so files, and only then searches for any
+ # LIB.a files. That means that if there is an installed
+ # libbfd.so, but this build is not done with --enable-shared, the
+ # link will wind up being against the install libbfd.so rather
+ # than the newly built libbfd. To avoid this, we must explicitly
+ # link against libbfd.a when --enable-shared is not used.
+ if test "${shared_bfd}" != "true"; then
+ BFDLIB='../bfd/libbfd.a'
+ fi
+ if test "${shared_opcodes}" != "true"; then
+ OPCODES='../opcodes/libopcodes.a'
+ fi
+ ;;
+esac
ac_cv_c_cross=yes
else
cat > conftest.$ac_ext <<EOF
-#line 934 "configure"
+#line 949 "configure"
#include "confdefs.h"
main(){return(0);}
EOF
-{ (eval echo configure:938: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }
+{ (eval echo configure:953: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }
if test -s conftest && (./conftest; exit) 2>/dev/null; then
ac_cv_c_cross=no
else
# On the NeXT, cc -E runs the code through the compiler's parser,
# not just through cpp.
cat > conftest.$ac_ext <<EOF
-#line 976 "configure"
+#line 991 "configure"
#include "confdefs.h"
#include <assert.h>
Syntax Error
EOF
ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:982: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
+{ (eval echo configure:997: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
ac_err=`grep -v '^ *+' conftest.out`
if test -z "$ac_err"; then
:
rm -rf conftest*
CPP="${CC-cc} -E -traditional-cpp"
cat > conftest.$ac_ext <<EOF
-#line 991 "configure"
+#line 1006 "configure"
#include "confdefs.h"
#include <assert.h>
Syntax Error
EOF
ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:997: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
+{ (eval echo configure:1012: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
ac_err=`grep -v '^ *+' conftest.out`
if test -z "$ac_err"; then
:
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 1025 "configure"
+#line 1040 "configure"
#include "confdefs.h"
#include <$ac_hdr>
EOF
ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:1030: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
+{ (eval echo configure:1045: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
ac_err=`grep -v '^ *+' conftest.out`
if test -z "$ac_err"; then
rm -rf conftest*
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 1059 "configure"
+#line 1074 "configure"
#include "confdefs.h"
#include <sys/types.h>
#include <sys/wait.h>
s = WIFEXITED (s) ? WEXITSTATUS (s) : 1;
; return 0; }
EOF
-if { (eval echo configure:1076: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
+if { (eval echo configure:1091: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
rm -rf conftest*
ac_cv_header_sys_wait_h=yes
else
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 1102 "configure"
+#line 1117 "configure"
#include "confdefs.h"
/* System header to define __stub macros and hopefully few prototypes,
which can conflict with char $ac_func(); below. */
#include <assert.h>
/* Override any gcc2 internal prototype to avoid an error. */
+/* We use char because int might match the return type of a gcc2
+ builtin and then its argument prototype would still apply. */
char $ac_func();
int main() { return 0; }
; return 0; }
EOF
-if { (eval echo configure:1124: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }; then
+if { (eval echo configure:1141: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }; then
rm -rf conftest*
eval "ac_cv_func_$ac_func=yes"
else
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 1151 "configure"
+#line 1168 "configure"
#include "confdefs.h"
#include <stdlib.h>
#include <stdarg.h>
#include <float.h>
EOF
ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:1159: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
+{ (eval echo configure:1176: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
ac_err=`grep -v '^ *+' conftest.out`
if test -z "$ac_err"; then
rm -rf conftest*
if test $ac_cv_header_stdc = yes; then
# SunOS 4.x string.h does not declare mem*, contrary to ANSI.
cat > conftest.$ac_ext <<EOF
-#line 1174 "configure"
+#line 1191 "configure"
#include "confdefs.h"
#include <string.h>
EOF
if test $ac_cv_header_stdc = yes; then
# ISC 2.0.2 stdlib.h does not declare free, contrary to ANSI.
cat > conftest.$ac_ext <<EOF
-#line 1192 "configure"
+#line 1209 "configure"
#include "confdefs.h"
#include <stdlib.h>
EOF
:
else
cat > conftest.$ac_ext <<EOF
-#line 1213 "configure"
+#line 1230 "configure"
#include "confdefs.h"
#include <ctype.h>
#define ISLOWER(c) ('a' <= (c) && (c) <= 'z')
exit (0); }
EOF
-{ (eval echo configure:1224: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }
+{ (eval echo configure:1241: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }
if test -s conftest && (./conftest; exit) 2>/dev/null; then
:
else
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 1248 "configure"
+#line 1265 "configure"
#include "confdefs.h"
#include <sys/types.h>
#if STDC_HEADERS
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 1280 "configure"
+#line 1297 "configure"
#include "confdefs.h"
#include <vfork.h>
EOF
ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:1285: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
+{ (eval echo configure:1302: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
ac_err=`grep -v '^ *+' conftest.out`
if test -z "$ac_err"; then
rm -rf conftest*
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 1317 "configure"
+#line 1334 "configure"
#include "confdefs.h"
/* System header to define __stub macros and hopefully few prototypes,
which can conflict with char vfork(); below. */
#include <assert.h>
/* Override any gcc2 internal prototype to avoid an error. */
+/* We use char because int might match the return type of a gcc2
+ builtin and then its argument prototype would still apply. */
char vfork();
int main() { return 0; }
; return 0; }
EOF
-if { (eval echo configure:1339: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }; then
+if { (eval echo configure:1358: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }; then
rm -rf conftest*
eval "ac_cv_func_vfork=yes"
else
else
cat > conftest.$ac_ext <<EOF
-#line 1358 "configure"
+#line 1377 "configure"
#include "confdefs.h"
/* Thanks to Paul Eggert for this test. */
#include <stdio.h>
}
}
EOF
-{ (eval echo configure:1451: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }
+{ (eval echo configure:1470: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }
if test -s conftest && (./conftest; exit) 2>/dev/null; then
ac_cv_func_vfork=yes
else
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 1475 "configure"
+#line 1494 "configure"
#include "confdefs.h"
#include <time.h>
int main() { return 0; }
time_t i;
; return 0; }
EOF
-if { (eval echo configure:1483: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
+if { (eval echo configure:1502: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
rm -rf conftest*
bu_cv_decl_time_t_time_h=yes
else
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 1507 "configure"
+#line 1526 "configure"
#include "confdefs.h"
#include <sys/types.h>
int main() { return 0; }
time_t i;
; return 0; }
EOF
-if { (eval echo configure:1515: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
+if { (eval echo configure:1534: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
rm -rf conftest*
bu_cv_decl_time_t_types_h=yes
else
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 1541 "configure"
+#line 1560 "configure"
#include "confdefs.h"
#include <sys/types.h>
#ifdef HAVE_TIME_H
struct utimbuf s;
; return 0; }
EOF
-if { (eval echo configure:1553: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
+if { (eval echo configure:1572: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
rm -rf conftest*
bu_cv_header_utime_h=yes
else
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 1577 "configure"
+#line 1596 "configure"
#include "confdefs.h"
#include <stdio.h>
+#ifdef HAVE_STRING_H
+#include <string.h>
+#else
+#ifdef HAVE_STRINGS_H
+#include <strings.h>
+#endif
+#endif
#ifdef HAVE_STDLIB_H
#include <stdlib.h>
#endif
char *(*pfn) = (char *(*)) fprintf
; return 0; }
EOF
-if { (eval echo configure:1592: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
+if { (eval echo configure:1618: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
rm -rf conftest*
bfd_cv_decl_needed_fprintf=no
else
fi
+echo $ac_n "checking whether strstr must be declared""... $ac_c" 1>&6
+if eval "test \"`echo '$''{'bfd_cv_decl_needed_strstr'+set}'`\" = set"; then
+ echo $ac_n "(cached) $ac_c" 1>&6
+else
+ cat > conftest.$ac_ext <<EOF
+#line 1643 "configure"
+#include "confdefs.h"
+
+#include <stdio.h>
+#ifdef HAVE_STRING_H
+#include <string.h>
+#else
+#ifdef HAVE_STRINGS_H
+#include <strings.h>
+#endif
+#endif
+#ifdef HAVE_STDLIB_H
+#include <stdlib.h>
+#endif
+#ifdef HAVE_UNISTD_H
+#include <unistd.h>
+#endif
+int main() { return 0; }
+int t() {
+char *(*pfn) = (char *(*)) strstr
+; return 0; }
+EOF
+if { (eval echo configure:1665: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
+ rm -rf conftest*
+ bfd_cv_decl_needed_strstr=no
+else
+ rm -rf conftest*
+ bfd_cv_decl_needed_strstr=yes
+fi
+rm -f conftest*
+
+fi
+
+echo "$ac_t""$bfd_cv_decl_needed_strstr" 1>&6
+if test $bfd_cv_decl_needed_strstr = yes; then
+ bfd_tr_decl=NEED_DECLARATION_`echo strstr | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'`
+ cat >> confdefs.h <<EOF
+#define $bfd_tr_decl 1
+EOF
+
+fi
+
+echo $ac_n "checking whether sbrk must be declared""... $ac_c" 1>&6
+if eval "test \"`echo '$''{'bfd_cv_decl_needed_sbrk'+set}'`\" = set"; then
+ echo $ac_n "(cached) $ac_c" 1>&6
+else
+ cat > conftest.$ac_ext <<EOF
+#line 1690 "configure"
+#include "confdefs.h"
+
+#include <stdio.h>
+#ifdef HAVE_STRING_H
+#include <string.h>
+#else
+#ifdef HAVE_STRINGS_H
+#include <strings.h>
+#endif
+#endif
+#ifdef HAVE_STDLIB_H
+#include <stdlib.h>
+#endif
+#ifdef HAVE_UNISTD_H
+#include <unistd.h>
+#endif
+int main() { return 0; }
+int t() {
+char *(*pfn) = (char *(*)) sbrk
+; return 0; }
+EOF
+if { (eval echo configure:1712: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
+ rm -rf conftest*
+ bfd_cv_decl_needed_sbrk=no
+else
+ rm -rf conftest*
+ bfd_cv_decl_needed_sbrk=yes
+fi
+rm -f conftest*
+
+fi
+
+echo "$ac_t""$bfd_cv_decl_needed_sbrk" 1>&6
+if test $bfd_cv_decl_needed_sbrk = yes; then
+ bfd_tr_decl=NEED_DECLARATION_`echo sbrk | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'`
+ cat >> confdefs.h <<EOF
+#define $bfd_tr_decl 1
+EOF
+
+fi
+
case "${host}" in
NLMCONV_DEFS="-DNLMCONV_I386 -DNLMCONV_ALPHA -DNLMCONV_POWERPC -DNLMCONV_SPARC"
else
case $targ in
- i[345]86*-*-netware*)
+ i[3456]86*-*-netware*)
BUILD_NLMCONV='$(NLMCONV_PROG)'
NLMCONV_DEFS="$NLMCONV_DEFS -DNLMCONV_I386"
;;
echo "running \${CONFIG_SHELL-/bin/sh} $0 $ac_configure_args --no-create --no-recursion"
exec \${CONFIG_SHELL-/bin/sh} $0 $ac_configure_args --no-create --no-recursion ;;
-version | --version | --versio | --versi | --vers | --ver | --ve | --v)
- echo "$CONFIG_STATUS generated by autoconf version 2.8"
+ echo "$CONFIG_STATUS generated by autoconf version 2.10"
exit 0 ;;
-help | --help | --hel | --he | --h)
echo "\$ac_cs_usage"; exit 0 ;;
s%@CC@%$CC%g
s%@HDEFINES@%$HDEFINES%g
s%@HLDFLAGS@%$HLDFLAGS%g
+s%@HLDENV@%$HLDENV%g
s%@RPATH_ENVVAR@%$RPATH_ENVVAR%g
s%@AR@%$AR%g
s%@RANLIB@%$RANLIB%g
cat > conftest.hdr <<\EOF
s/[\\&%]/\\&/g
s%[\\$`]%\\&%g
-s%#define \([A-Za-z_][A-Za-z0-9_]*\) \(.*\)%${ac_dA}\1${ac_dB}\1${ac_dC}\2${ac_dD}%gp
+s%#define \([A-Za-z_][A-Za-z0-9_]*\) *\(.*\)%${ac_dA}\1${ac_dB}\1${ac_dC}\2${ac_dD}%gp
s%ac_d%ac_u%gp
s%ac_u%ac_e%gp
EOF
echo "$ac_file is unchanged"
rm -f conftest.h
else
+ # Remove last slash and all that follows it. Not all systems have dirname.
+ ac_dir=`echo $ac_file|sed 's%/[^/][^/]*$%%'`
+ if test "$ac_dir" != "$ac_file" && test "$ac_dir" != .; then
+ # The file is in a subdirectory.
+ test ! -d "$ac_dir" && mkdir "$ac_dir"
+ fi
rm -f $ac_file
mv conftest.h $ac_file
fi
dnl Process this file with autoconf to produce a configure script.
dnl
-AC_PREREQ(2.0)
+AC_PREREQ(2.5)
AC_INIT(ar.c)
AC_ARG_ENABLE(targets,
HDEFINES=
HLDFLAGS=
+HLDENV=
RPATH_ENVVAR=LD_LIBRARY_PATH
AC_PROG_CC
AC_SUBST(HDEFINES)
AC_SUBST(HLDFLAGS)
+AC_SUBST(HLDENV)
AC_SUBST(RPATH_ENVVAR)
AR=${AR-ar}
AC_SUBST(AR)
# need to handle some hosts specially.
BFDLIB='-L../bfd -lbfd'
OPCODES='-L../opcodes -lopcodes'
-if test "${shared}" = "true"; then
- case "${host}" in
- *-*-sunos*)
- # On SunOS, we must link against the name we are going to install,
- # not -lbfd, since SunOS does not support SONAME.
- if test "${shared_bfd}" = "true"; then
- BFDLIB='-L../bfd -l`echo bfd | sed '"'"'$(program_transform_name)'"'"'`'
- fi
- if test "${shared_opcodes}" = "true"; then
- OPCODES='-L../opcodes -l`echo opcodes | sed '"'"'$(program_transform_name)'"'"'`'
- fi
- ;;
- esac
-fi
+case "${host}" in
+*-*-sunos*)
+ # On SunOS, we must link against the name we are going to install,
+ # not -lbfd, since SunOS does not support SONAME.
+ if test "${shared_bfd}" = "true"; then
+ BFDLIB='-L../bfd -l`echo bfd | sed '"'"'$(program_transform_name)'"'"'`'
+ fi
+ if test "${shared_opcodes}" = "true"; then
+ OPCODES='-L../opcodes -l`echo opcodes | sed '"'"'$(program_transform_name)'"'"'`'
+ fi
+ ;;
+alpha*-*-osf*)
+ # On Alpha OSF/1, the native linker searches all the -L
+ # directories for any LIB.so files, and only then searches for any
+ # LIB.a files. That means that if there is an installed
+ # libbfd.so, but this build is not done with --enable-shared, the
+ # link will wind up being against the install libbfd.so rather
+ # than the newly built libbfd. To avoid this, we must explicitly
+ # link against libbfd.a when --enable-shared is not used.
+ if test "${shared_bfd}" != "true"; then
+ BFDLIB='../bfd/libbfd.a'
+ fi
+ if test "${shared_opcodes}" != "true"; then
+ OPCODES='../opcodes/libopcodes.a'
+ fi
+ ;;
+esac
AC_SUBST(BFDLIB)
AC_SUBST(OPCODES)
fi
BFD_NEED_DECLARATION(fprintf)
+BFD_NEED_DECLARATION(strstr)
+BFD_NEED_DECLARATION(sbrk)
BFD_BINARY_FOPEN
else
case $targ in
changequote(,)dnl
- i[345]86*-*-netware*)
+ i[3456]86*-*-netware*)
changequote([,])dnl
BUILD_NLMCONV='$(NLMCONV_PROG)'
NLMCONV_DEFS="$NLMCONV_DEFS -DNLMCONV_I386"
DLLs to run on a system which understands PE format image files.
(eg, Windows NT)
+ See "Peering Inside the PE: A Tour of the Win32 Portable Executable
+ File Format", MSJ 1994, Volume 9 for more information.
+ Also see "Microsoft Portable Executable and Common Object File Format,
+ Specification 4.1" for more information.
+
A DLL contains an export table which contains the information
which the runtime loader needs to tie up references from a
referencing program.
static sinfo secdata[NSECS] =
{
- { TEXT, ".text", SEC_CODE | SEC_HAS_CONTENTS, 3},
+ { TEXT, ".text", SEC_CODE | SEC_HAS_CONTENTS, 2},
{ DATA, ".data", SEC_DATA, 2},
{ BSS, ".bss", 0, 2},
{ IDATA7, ".idata$7", SEC_HAS_CONTENTS, 2},
{
{ TEXT, ".text", SEC_CODE | SEC_HAS_CONTENTS, 3},
{ PDATA, ".pdata", SEC_HAS_CONTENTS, 2},
- { RDATA, ".rdata", SEC_HAS_CONTENTS, 2},
+ { RDATA, ".reldata", SEC_HAS_CONTENTS, 2},
{ IDATA5, ".idata$5", SEC_HAS_CONTENTS, 2},
{ IDATA4, ".idata$4", SEC_HAS_CONTENTS, 2},
{ IDATA6, ".idata$6", SEC_HAS_CONTENTS, 1},
if (machine == MPPC)
{
-#if 1
rel->howto = bfd_reloc_type_lookup (abfd,
BFD_RELOC_16_GOTOFF);
-#else
- rel->howto = bfd_reloc_type_lookup (abfd,
- BFD_RELOC_PPC_TOC16);
-#endif
rel->sym_ptr_ptr = iname_pp;
}
else
rpp[0] = rel;
rel->address = 0;
rel->addend = 0;
- rel->howto = bfd_reloc_type_lookup (abfd, BFD_RELOC_32);
+ rel->howto = bfd_reloc_type_lookup (abfd, BFD_RELOC_RVA);
rel->sym_ptr_ptr = iname_lab_pp;
sec->orelocation = rpp;
sec->reloc_count = 1;
# Whack out unused host define bits.
/HDEFINES/s/@HDEFINES@//
+# Don't build specialized tools.
/BUILD_NLMCONV/s/@BUILD_NLMCONV@//
/BUILD_SRCONV/s/@BUILD_SRCONV@//
/BUILD_DLLTOOL/s/@BUILD_DLLTOOL@//
/BISON/s/^BISON =.*$/BISON = byacc/
#/BISONFLAGS/s/^BISONFLAGS =.*$/BISONFLAGS = /
+# Embed the version in symbolic doublequotes that will expand to
+# the right thing for each compiler.
+/VERSION/s/'"{VERSION}"'/{dq}{VERSION}{dq}/
+
# '+' is a special char to MPW, don't use it ever.
/c++filt/s/c++filt/cplusfilt/
+# All of the binutils use the same Rez file, change names to refer to it.
/^{[A-Z]*_PROG}/s/$/ "{s}"mac-binutils.r/
/{[A-Z]*_PROG}\.r/s/{[A-Z]*_PROG}\.r/mac-binutils.r/
/* nm.c -- Describe symbol table of a rel file.
- Copyright 1991, 92, 93, 94 Free Software Foundation, Inc.
+ Copyright 1991, 92, 93, 94, 95, 1996 Free Software Foundation, Inc.
This file is part of GNU Binutils.
bfd_vma size;
};
+/* When fetching relocs, we use this structure to pass information to
+ get_relocs. */
+
+struct get_relocs_info
+{
+ asection **secs;
+ arelent ***relocs;
+ long *relcount;
+ asymbol **syms;
+};
+
static boolean
display_file PARAMS ((char *filename));
static void
print_symbol_info_posix PARAMS ((symbol_info * info, bfd * abfd));
+static void
+get_relocs PARAMS ((bfd *, asection *, PTR));
/* Support for different output formats. */
struct output_fns
static int dynamic = 0; /* print dynamic symbols. */
static int show_version = 0; /* show the version number */
static int show_stats = 0; /* show statistics */
+static int line_numbers = 0; /* print line numbers for symbols */
/* When to print the names of files. Not mutually exclusive in SYSV format. */
static int filename_per_file = 0; /* Once per file, on its own line. */
{"extern-only", no_argument, &external_only, 1},
{"format", required_argument, 0, 'f'},
{"help", no_argument, 0, 'h'},
+ {"line-numbers", no_argument, 0, 'l'},
{"no-cplus", no_argument, &do_demangle, 0}, /* Linux compatibility. */
{"no-demangle", no_argument, &do_demangle, 0},
{"no-sort", no_argument, &no_sort, 1},
int status;
{
fprintf (stream, "\
-Usage: %s [-aABCDgnopPrsuvV] [-t radix] [--radix=radix] [--target=bfdname]\n\
+Usage: %s [-aABCDglnopPrsuvV] [-t radix] [--radix=radix] [--target=bfdname]\n\
[--debug-syms] [--extern-only] [--print-armap] [--print-file-name]\n\
[--numeric-sort] [--no-sort] [--reverse-sort] [--size-sort]\n\
[--undefined-only] [--portability] [-f {bsd,sysv,posix}]\n\
[--format={bsd,sysv,posix}] [--demangle] [--no-demangle] [--dynamic]\n\
- [--defined-only]\n\
+ [--defined-only] [--line-numbers]\n\
[--version] [--help]\n\
[file...]\n",
program_name);
bfd_init ();
- while ((c = getopt_long (argc, argv, "aABCDef:gnopPrst:uvV", long_options, (int *) 0)) != EOF)
+ while ((c = getopt_long (argc, argv, "aABCDef:glnopPrst:uvV", long_options, (int *) 0)) != EOF)
{
switch (c)
{
break;
case 'h':
usage (stdout, 0);
+ case 'l':
+ line_numbers = 1;
+ break;
case 'n':
case 'v':
sort_numerically = 1;
if (next == NULL)
bfd_fatal (bfd_get_filename (abfd));
}
+ else
+ next = NULL;
sec = bfd_get_section (sym);
if (undefined_only)
{
if (bfd_is_und_section (bfd_get_section (sym)))
- print_symname ("%s\n", bfd_asymbol_name (sym), abfd);
+ print_symname ("%s", bfd_asymbol_name (sym), abfd);
}
else
{
bfd_get_symbol_info (abfd, sym, &syminfo);
(*format->print_symbol_info) (&syminfo, abfd);
- putchar ('\n');
}
+
+ if (line_numbers)
+ {
+ static asymbol **syms;
+ static long symcount;
+ const char *filename, *functionname;
+ unsigned int lineno;
+
+ /* We need to get the canonical symbols in order to call
+ bfd_find_nearest_line. This is inefficient, but, then, you
+ don't have to use --line-numbers. */
+ if (syms == NULL)
+ {
+ long symsize;
+
+ symsize = bfd_get_symtab_upper_bound (abfd);
+ if (symsize < 0)
+ bfd_fatal (bfd_get_filename (abfd));
+ syms = (asymbol **) xmalloc (symsize);
+ symcount = bfd_canonicalize_symtab (abfd, syms);
+ if (symcount < 0)
+ bfd_fatal (bfd_get_filename (abfd));
+ }
+
+ if (bfd_is_und_section (bfd_get_section (sym)))
+ {
+ static asection **secs;
+ static arelent ***relocs;
+ static long *relcount;
+ unsigned int seccount, i;
+ const char *symname;
+
+ /* For an undefined symbol, we try to find a reloc for the
+ symbol, and print the line number of the reloc. */
+
+ seccount = bfd_count_sections (abfd);
+
+ if (relocs == NULL)
+ {
+ struct get_relocs_info info;
+
+ secs = (asection **) xmalloc (seccount * sizeof *secs);
+ relocs = (arelent ***) xmalloc (seccount * sizeof *relocs);
+ relcount = (long *) xmalloc (seccount * sizeof *relcount);
+
+ info.secs = secs;
+ info.relocs = relocs;
+ info.relcount = relcount;
+ info.syms = syms;
+ bfd_map_over_sections (abfd, get_relocs, (PTR) &info);
+ }
+
+ symname = bfd_asymbol_name (sym);
+ for (i = 0; i < seccount; i++)
+ {
+ unsigned int j;
+
+ for (j = 0; j < relcount[i]; j++)
+ {
+ arelent *r;
+
+ r = relocs[i][j];
+ if (r->sym_ptr_ptr != NULL
+ && (*r->sym_ptr_ptr)->section == sym->section
+ && (*r->sym_ptr_ptr)->value == sym->value
+ && strcmp (symname,
+ bfd_asymbol_name (*r->sym_ptr_ptr)) == 0
+ && bfd_find_nearest_line (abfd, secs[i], syms,
+ r->address, &filename,
+ &functionname, &lineno))
+ {
+ /* We only print the first one we find. */
+ printf ("\t%s:%u", filename, lineno);
+ i = seccount;
+ break;
+ }
+ }
+ }
+ }
+ else if (bfd_get_section (sym)->owner == abfd)
+ {
+ if (bfd_find_nearest_line (abfd, bfd_get_section (sym), syms,
+ sym->value, &filename, &functionname,
+ &lineno)
+ && filename != NULL
+ && lineno != 0)
+ {
+ printf ("\t%s:%u", filename, lineno);
+ }
+ }
+ }
+
+ putchar ('\n');
}
\f
/* The following 3 groups of functions are called unconditionally,
}
}
}
+\f
+/* This function is used to get the relocs for a particular section.
+ It is called via bfd_map_over_sections. */
+
+static void
+get_relocs (abfd, sec, dataarg)
+ bfd *abfd;
+ asection *sec;
+ PTR dataarg;
+{
+ struct get_relocs_info *data = (struct get_relocs_info *) dataarg;
+
+ *data->secs = sec;
+
+ if ((sec->flags & SEC_RELOC) == 0)
+ {
+ *data->relocs = NULL;
+ *data->relcount = 0;
+ }
+ else
+ {
+ long relsize;
+
+ relsize = bfd_get_reloc_upper_bound (abfd, sec);
+ if (relsize < 0)
+ bfd_fatal (bfd_get_filename (abfd));
+
+ *data->relocs = (arelent **) xmalloc (relsize);
+ *data->relcount = bfd_canonicalize_reloc (abfd, sec, *data->relocs,
+ data->syms);
+ if (*data->relcount < 0)
+ bfd_fatal (bfd_get_filename (abfd));
+ }
+
+ ++data->secs;
+ ++data->relocs;
+ ++data->relcount;
+}
[--strip-all] [--strip-debug] [--strip-unneeded] [--discard-all]\n\
[--discard-locals] [--keep-symbol symbol] [-K symbol]\n\
[--strip-symbol symbol] [-N symbol] [--remove-section=section]\n\
- [--verbose] [--version] [--help] file...\n",
+ [-o file] [--verbose] [--version] [--help] file...\n",
program_name);
list_supported_targets (program_name, stream);
exit (exit_status);
boolean show_version = false;
int c, i;
struct section_list *p;
+ char *output_file = NULL;
- while ((c = getopt_long (argc, argv, "I:O:F:K:N:R:sSgxXVv",
+ while ((c = getopt_long (argc, argv, "I:O:F:K:N:R:o:sSgxXVv",
strip_options, (int *) 0)) != EOF)
{
switch (c)
}
add_strip_symbol (optarg);
break;
+ case 'o':
+ output_file = optarg;
+ break;
case 'x':
discard_locals = locals_all;
break;
output_target = input_target;
i = optind;
- if (i == argc)
+ if (i == argc
+ || (output_file != NULL && (i + 1) < argc))
strip_usage (stderr, 1);
for (; i < argc; i++)
{
int hold_status = status;
+ char *tmpname;
- char *tmpname = make_tempname (argv[i]);
+ if (output_file != NULL)
+ tmpname = output_file;
+ else
+ tmpname = make_tempname (argv[i]);
status = 0;
copy_file (argv[i], tmpname, input_target, output_target);
if (status == 0)
{
- smart_rename (tmpname, argv[i]);
+ if (output_file == NULL)
+ smart_rename (tmpname, argv[i]);
status = hold_status;
}
else
unlink (tmpname);
- free (tmpname);
+ if (output_file == NULL)
+ free (tmpname);
}
return 0;
.RB "[\|" \-\-debugging "\|]"
.RB "[\|" \-d | \-\-disassemble "\|]"
.RB "[\|" \-D | \-\-disassemble-all "\|]"
+.RB "[\|" \-EB | \-EL | \-\-endian=\c
+.I {big|little}\c
+\&\|]
.RB "[\|" \-f | \-\-file\-headers "\|]"
.RB "[\|" \-h | \-\-section\-headers
.RB "| " \-\-headers "\|]"
Like \fB\-d\fP, but disassemble the contents of all sections, not just
those expected to contain instructions.
+.TP
+.B \-EB
+.TP
+.B \-EL
+.TP
+.BI "\-\-endian=" "{big|little}"
+Specify the endianness of the object files. This only affects
+disassembly. This can be useful when disassembling a file format which
+does not describe endianness information, such as S-records.
+
.TP
.B \-f
.TP
.B \-\-line\-numbers
Label the display (using debugging information) with the filename
and source line numbers corresponding to the object code shown.
-Only useful with \fB\-d\fP or \fB\-D\fP.
+Only useful with \fB\-d\fP, \fB\-D\fP, or \fB\-r\fP.
.TP
.BI "\-m " "machine"\c
.TP
.BI "\-\-architecture=" "machine"
-Specify the object files \c
-.I objfile\c
-\& are for architecture
-\c
-.I machine\c
-\&. You can list available architectures using the `\|\c
-.B \-i\c
-\|'
-option.
+Specify the architecture to use when disassembling object files. This
+can be useful when disasembling object files which do not describe
+architecture information, such as S-records. You can list the available
+architectures with the \fB\-i\fP option.
.TP
.B \-r
extern int fprintf PARAMS ((FILE *, const char *, ...));
#endif
-char *default_target = NULL; /* default at runtime */
+static char *default_target = NULL; /* default at runtime */
extern char *program_version;
-int show_version = 0; /* show the version number */
-int dump_section_contents; /* -s */
-int dump_section_headers; /* -h */
-boolean dump_file_header; /* -f */
-int dump_symtab; /* -t */
-int dump_dynamic_symtab; /* -T */
-int dump_reloc_info; /* -r */
-int dump_dynamic_reloc_info; /* -R */
-int dump_ar_hdrs; /* -a */
-int dump_private_headers; /* -p */
-int with_line_numbers; /* -l */
-boolean with_source_code; /* -S */
-int show_raw_insn; /* --show-raw-insn */
-int dump_stab_section_info; /* --stabs */
-boolean disassemble; /* -d */
-boolean disassemble_all; /* -D */
-boolean formats_info; /* -i */
-char *only; /* -j secname */
-int wide_output; /* -w */
-bfd_vma start_address = (bfd_vma) -1; /* --start-address */
-bfd_vma stop_address = (bfd_vma) -1; /* --stop-address */
-int dump_debugging; /* --debugging */
+static int show_version = 0; /* show the version number */
+static int dump_section_contents; /* -s */
+static int dump_section_headers; /* -h */
+static boolean dump_file_header; /* -f */
+static int dump_symtab; /* -t */
+static int dump_dynamic_symtab; /* -T */
+static int dump_reloc_info; /* -r */
+static int dump_dynamic_reloc_info; /* -R */
+static int dump_ar_hdrs; /* -a */
+static int dump_private_headers; /* -p */
+static int with_line_numbers; /* -l */
+static boolean with_source_code; /* -S */
+static int show_raw_insn; /* --show-raw-insn */
+static int dump_stab_section_info; /* --stabs */
+static boolean disassemble; /* -d */
+static boolean disassemble_all; /* -D */
+static boolean formats_info; /* -i */
+static char *only; /* -j secname */
+static int wide_output; /* -w */
+static bfd_vma start_address = (bfd_vma) -1; /* --start-address */
+static bfd_vma stop_address = (bfd_vma) -1; /* --stop-address */
+static int dump_debugging; /* --debugging */
/* Extra info to pass to the disassembler address printing function. */
struct objdump_disasm_info {
};
/* Architecture to disassemble for, or default if NULL. */
-char *machine = (char *) NULL;
+static char *machine = (char *) NULL;
+
+/* Endianness to disassemble for, or default if BFD_ENDIAN_UNKNOWN. */
+static enum bfd_endian endian = BFD_ENDIAN_UNKNOWN;
/* The symbol table. */
-asymbol **syms;
+static asymbol **syms;
/* Number of symbols in `syms'. */
-long symcount = 0;
+static long symcount = 0;
/* The sorted symbol table. */
-asymbol **sorted_syms;
+static asymbol **sorted_syms;
/* Number of symbols in `sorted_syms'. */
-long sorted_symcount = 0;
+static long sorted_symcount = 0;
/* The dynamic symbol table. */
-asymbol **dynsyms;
+static asymbol **dynsyms;
/* Number of symbols in `dynsyms'. */
-long dynsymcount = 0;
+static long dynsymcount = 0;
/* Forward declarations. */
dump_dynamic_relocs PARAMS ((bfd * abfd));
static void
-dump_reloc_set PARAMS ((bfd *, arelent **, long));
+dump_reloc_set PARAMS ((bfd *, asection *, arelent **, long));
static void
dump_symbols PARAMS ((bfd *abfd, boolean dynamic));
static const char *
endian_string PARAMS ((enum bfd_endian));
\f
-void
+static void
usage (stream, status)
FILE *stream;
int status;
[--syms] [--all-headers] [--dynamic-syms] [--dynamic-reloc]\n\
[--wide] [--version] [--help] [--private-headers]\n\
[--start-address=addr] [--stop-address=addr]\n\
- [--show-raw-insn] objfile...\n\
+ [--show-raw-insn] [-EB|-EL] [--endian={big|little}] objfile...\n\
at least one option besides -l (--line-numbers) must be given\n");
list_supported_targets (program_name, stream);
exit (status);
/* 150 isn't special; it's just an arbitrary non-ASCII char value. */
-#define OPTION_START_ADDRESS (150)
+#define OPTION_ENDIAN (150)
+#define OPTION_START_ADDRESS (OPTION_ENDIAN + 1)
#define OPTION_STOP_ADDRESS (OPTION_START_ADDRESS + 1)
static struct option long_options[]=
{"disassemble-all", no_argument, NULL, 'D'},
{"dynamic-reloc", no_argument, NULL, 'R'},
{"dynamic-syms", no_argument, NULL, 'T'},
+ {"endian", required_argument, NULL, OPTION_ENDIAN},
{"file-headers", no_argument, NULL, 'f'},
{"full-contents", no_argument, NULL, 's'},
{"headers", no_argument, NULL, 'h'},
COUNT is the number of elements in SYMBOLS.
Return the number of useful symbols. */
-long
+static long
remove_useless_symbols (symbols, count)
asymbol **symbols;
long count;
}
#endif
-void
+static void
disassemble_data (abfd)
bfd *abfd;
{
abfd->arch_info = info;
}
+ if (endian != BFD_ENDIAN_UNKNOWN)
+ {
+ struct bfd_target *xvec;
+
+ xvec = (struct bfd_target *) xmalloc (sizeof (struct bfd_target));
+ memcpy (xvec, abfd->xvec, sizeof (struct bfd_target));
+ xvec->byteorder = endian;
+ abfd->xvec = xvec;
+ }
+
disassemble_fn = disassembler (abfd);
if (!disassemble_fn)
{
exit (1);
}
+ disasm_info.flavour = bfd_get_flavour (abfd);
disasm_info.arch = bfd_get_arch (abfd);
disasm_info.mach = bfd_get_mach (abfd);
if (bfd_big_endian (abfd))
could be a direct-mapped table, but instead we build one the first
time we need it. */
-void dump_section_stabs PARAMS ((bfd *abfd, char *stabsect_name,
- char *strsect_name));
+static void dump_section_stabs PARAMS ((bfd *abfd, char *stabsect_name,
+ char *strsect_name));
/* Dump the stabs sections from an object file that has a section that
- uses Sun stabs encoding. It has to use some hooks into BFD because
- string table sections are not normally visible to BFD callers. */
+ uses Sun stabs encoding. */
-void
+static void
dump_stabs (abfd)
bfd *abfd;
{
dump_section_stabs (abfd, "$GDB_SYMBOLS$", "$GDB_STRINGS$");
}
-static struct internal_nlist *stabs;
+static bfd_byte *stabs;
static bfd_size_type stab_size;
static char *strtab;
If the section exists and was read, allocate the space and return true.
Otherwise return false. */
-boolean
+static boolean
read_section_stabs (abfd, stabsect_name, strsect_name)
bfd *abfd;
char *stabsect_name;
stab_size = bfd_section_size (abfd, stabsect);
stabstr_size = bfd_section_size (abfd, stabstrsect);
- stabs = (struct internal_nlist *) xmalloc (stab_size);
+ stabs = (bfd_byte *) xmalloc (stab_size);
strtab = (char *) xmalloc (stabstr_size);
if (! bfd_get_section_contents (abfd, stabsect, (PTR) stabs, 0, stab_size))
return true;
}
-#define SWAP_SYMBOL(symp, abfd) \
-{ \
- (symp)->n_strx = bfd_h_get_32(abfd, \
- (unsigned char *)&(symp)->n_strx); \
- (symp)->n_desc = bfd_h_get_16 (abfd, \
- (unsigned char *)&(symp)->n_desc); \
- (symp)->n_value = bfd_h_get_32 (abfd, \
- (unsigned char *)&(symp)->n_value); \
-}
+/* Stabs entries use a 12 byte format:
+ 4 byte string table index
+ 1 byte stab type
+ 1 byte stab other field
+ 2 byte stab desc field
+ 4 byte stab value
+ FIXME: This will have to change for a 64 bit object format. */
+
+#define STRDXOFF (0)
+#define TYPEOFF (4)
+#define OTHEROFF (5)
+#define DESCOFF (6)
+#define VALOFF (8)
+#define STABSIZE (12)
/* Print ABFD's stabs section STABSECT_NAME (in `stabs'),
using string table section STRSECT_NAME (in `strtab'). */
-void
+static void
print_section_stabs (abfd, stabsect_name, strsect_name)
bfd *abfd;
char *stabsect_name;
{
int i;
unsigned file_string_table_offset = 0, next_file_string_table_offset = 0;
- struct internal_nlist *stabp = stabs,
- *stabs_end = (struct internal_nlist *) (stab_size + (char *) stabs);
+ bfd_byte *stabp, *stabs_end;
+
+ stabp = stabs;
+ stabs_end = stabp + stab_size;
printf ("Contents of %s section:\n\n", stabsect_name);
printf ("Symnum n_type n_othr n_desc n_value n_strx String\n");
We start the index at -1 because there is a dummy symbol on
the front of stabs-in-{coff,elf} sections that supplies sizes. */
- for (i = -1; stabp < stabs_end; stabp++, i++)
+ for (i = -1; stabp < stabs_end; stabp += STABSIZE, i++)
{
const char *name;
+ unsigned long strx;
+ unsigned char type, other;
+ unsigned short desc;
+ bfd_vma value;
+
+ strx = bfd_h_get_32 (abfd, stabp + STRDXOFF);
+ type = bfd_h_get_8 (abfd, stabp + TYPEOFF);
+ other = bfd_h_get_8 (abfd, stabp + OTHEROFF);
+ desc = bfd_h_get_16 (abfd, stabp + DESCOFF);
+ value = bfd_h_get_32 (abfd, stabp + VALOFF);
- SWAP_SYMBOL (stabp, abfd);
printf ("\n%-6d ", i);
/* Either print the stab name, or, if unnamed, print its number
again (makes consistent formatting for tools like awk). */
- name = bfd_get_stab_name (stabp->n_type);
+ name = bfd_get_stab_name (type);
if (name != NULL)
printf ("%-6s", name);
- else if (stabp->n_type == N_UNDF)
+ else if (type == N_UNDF)
printf ("HdrSym");
else
- printf ("%-6d", stabp->n_type);
- printf (" %-6d %-6d ", stabp->n_other, stabp->n_desc);
- printf_vma (stabp->n_value);
- printf (" %-6lu", stabp->n_strx);
+ printf ("%-6d", type);
+ printf (" %-6d %-6d ", other, desc);
+ printf_vma (value);
+ printf (" %-6lu", strx);
/* Symbols with type == 0 (N_UNDF) specify the length of the
string table associated with this file. We use that info
to know how to relocate the *next* file's string table indices. */
- if (stabp->n_type == N_UNDF)
+ if (type == N_UNDF)
{
file_string_table_offset = next_file_string_table_offset;
- next_file_string_table_offset += stabp->n_value;
+ next_file_string_table_offset += value;
}
else
{
/* Using the (possibly updated) string table offset, print the
string (if any) associated with this symbol. */
- if ((stabp->n_strx + file_string_table_offset) < stabstr_size)
- printf (" %s", &strtab[stabp->n_strx + file_string_table_offset]);
+ if ((strx + file_string_table_offset) < stabstr_size)
+ printf (" %s", &strtab[strx + file_string_table_offset]);
else
printf (" *");
}
printf ("\n\n");
}
-void
+static void
dump_section_stabs (abfd, stabsect_name, strsect_name)
bfd *abfd;
char *stabsect_name;
s != NULL;
s = s->next)
{
- if (strncmp (stabsect_name, s->name, strlen (stabsect_name)) == 0
- && strncmp (strsect_name, s->name, strlen (strsect_name)) != 0)
+ int len;
+
+ len = strlen (stabsect_name);
+
+/* If the prefix matches, and the files section name ends with a nul or a digit,
+ then we match. Ie: we want either an exact match or a a section followed by
+ a number. */
+ if (strncmp (stabsect_name, s->name, len) == 0
+ && (s->name[len] == '\000' || isdigit (s->name[len])))
{
if (read_section_stabs (abfd, s->name, strsect_name))
{
{
bfd_print_private_bfd_data (abfd, stdout);
}
+
static void
display_bfd (abfd)
bfd *abfd;
else
{
printf ("\n");
- dump_reloc_set (abfd, relpp, relcount);
+ dump_reloc_set (abfd, a, relpp, relcount);
printf ("\n\n");
}
free (relpp);
else
{
printf ("\n");
- dump_reloc_set (abfd, relpp, relcount);
+ dump_reloc_set (abfd, (asection *) NULL, relpp, relcount);
printf ("\n\n");
}
free (relpp);
}
static void
-dump_reloc_set (abfd, relpp, relcount)
+dump_reloc_set (abfd, sec, relpp, relcount)
bfd *abfd;
+ asection *sec;
arelent **relpp;
long relcount;
{
arelent **p;
+ char *last_filename, *last_functionname;
+ unsigned int last_line;
/* Get column headers lined up reasonably. */
{
printf ("OFFSET %*s TYPE %*s VALUE \n", width, "", 12, "");
}
+ last_filename = NULL;
+ last_functionname = NULL;
+ last_line = 0;
+
for (p = relpp; relcount && *p != (arelent *) NULL; p++, relcount--)
{
arelent *q = *p;
- CONST char *sym_name;
- CONST char *section_name;
+ const char *filename, *functionname;
+ unsigned int line;
+ const char *sym_name;
+ const char *section_name;
if (start_address != (bfd_vma) -1
&& q->address < start_address)
&& q->address > stop_address)
continue;
+ if (with_line_numbers
+ && sec != NULL
+ && bfd_find_nearest_line (abfd, sec, syms, q->address,
+ &filename, &functionname, &line))
+ {
+ if (functionname != NULL
+ && (last_functionname == NULL
+ || strcmp (functionname, last_functionname) != 0))
+ {
+ printf ("%s():\n", functionname);
+ if (last_functionname != NULL)
+ free (last_functionname);
+ last_functionname = xstrdup (functionname);
+ }
+ if (line > 0
+ && (line != last_line
+ || (filename != NULL
+ && last_filename != NULL
+ && strcmp (filename, last_filename) != 0)))
+ {
+ printf ("%s:%u\n", filename == NULL ? "???" : filename, line);
+ last_line = line;
+ if (last_filename != NULL)
+ free (last_filename);
+ if (filename == NULL)
+ last_filename = NULL;
+ else
+ last_filename = xstrdup (filename);
+ }
+ }
+
if (q->sym_ptr_ptr && *q->sym_ptr_ptr)
{
sym_name = (*(q->sym_ptr_ptr))->name;
/* The length of the longest architecture name + 1. */
#define LONGEST_ARCH sizeof("rs6000:6000")
-#ifndef L_tmpnam
-#define L_tmpnam 25
-#endif
-
static const char *
endian_string (endian)
enum bfd_endian endian;
static void
display_target_list ()
{
- extern char *tmpnam ();
extern bfd_target *bfd_target_vector[];
- char tmparg[L_tmpnam];
char *dummy_name;
int t;
- dummy_name = tmpnam (tmparg);
+ dummy_name = choose_temp_base ();
for (t = 0; bfd_target_vector[t]; t++)
{
bfd_target *p = bfd_target_vector[t];
bfd_printable_arch_mach ((enum bfd_architecture) a, 0));
}
unlink (dummy_name);
+ free (dummy_name);
}
/* Print a table showing which architectures are supported for entries
int last;
{
extern bfd_target *bfd_target_vector[];
- extern char *tmpnam ();
- char tmparg[L_tmpnam];
int t, a;
char *dummy_name;
printf ("%s ", bfd_target_vector[t]->name);
putchar ('\n');
- dummy_name = tmpnam (tmparg);
+ dummy_name = choose_temp_base ();
for (a = (int) bfd_arch_obscure + 1; a < (int) bfd_arch_last; a++)
if (strcmp (bfd_printable_arch_mach (a, 0), "UNKNOWN!") != 0)
{
putchar ('\n');
}
unlink (dummy_name);
+ free (dummy_name);
}
/* Print tables of all the target-architecture combinations that
bfd_init ();
- while ((c = getopt_long (argc, argv, "pib:m:VdDlfahrRtTxsSj:w", long_options,
- (int *) 0))
+ while ((c = getopt_long (argc, argv, "pib:m:VdDlfahrRtTxsSj:wE:",
+ long_options, (int *) 0))
!= EOF)
{
if (c != 'l' && c != OPTION_START_ADDRESS && c != OPTION_STOP_ADDRESS)
case OPTION_STOP_ADDRESS:
stop_address = parse_vma (optarg, "--stop-address");
break;
+ case 'E':
+ if (strcmp (optarg, "B") == 0)
+ endian = BFD_ENDIAN_BIG;
+ else if (strcmp (optarg, "L") == 0)
+ endian = BFD_ENDIAN_LITTLE;
+ else
+ {
+ fprintf (stderr, "%s: unrecognized -E option\n", program_name);
+ usage (stderr, 1);
+ }
+ break;
+ case OPTION_ENDIAN:
+ if (strncmp (optarg, "big", strlen (optarg)) == 0)
+ endian = BFD_ENDIAN_BIG;
+ else if (strncmp (optarg, "little", strlen (optarg)) == 0)
+ endian = BFD_ENDIAN_LITTLE;
+ else
+ {
+ fprintf (stderr, "%s: unrecognized --endian type `%s'\n",
+ program_name, optarg);
+ usage (stderr, 1);
+ }
+ break;
default:
usage (stderr, 1);
}
+Sun Aug 4 22:25:40 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * binutils-all/objcopy.exp: Fix end of line matching in srec tests
+ to work with TCL 7.5.
+
+Sat Jun 29 12:51:30 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * binutils-all/objcopy.exp: Simple copy test works for i960 b.out
+ targets.
+
+Mon Jun 24 14:33:04 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * binutils-all/objcopy.exp: On OSF/1, the simple copy test will
+ succeed with gas, and fail with /bin/as, so mark it as an expected
+ failure only if it fails.
+
Tue Mar 26 16:55:08 1996 Jeffrey A Law (law@cygnus.com)
- * binutils-all/objcopy.exp: No longer expect adjust-sectin-vma
+ * binutils-all/objcopy.exp: No longer expect adjust-section-vma
test to fail for hppa*-*-proelf*.
Mon Mar 11 08:25:14 1996 Jeffrey A Law (law@cygnus.com)
setup_xfail "i*86-*-sysv3" "i*86-*-isc*" "i*86-*-sco*" "i*86-*-coff"
setup_xfail "i*86-*-aix*" "i*86-*-go32*"
setup_xfail "a29k-*-udi" "a29k-*-coff" "a29k-*-vxworks*"
- setup_xfail "i960-*-vxworks*" "i960-*-coff"
+ setup_xfail "i960-*-coff"
setup_xfail "h8300-*-hms" "h8300-*-coff"
setup_xfail "h8500-*-hms" "h8500-*-coff"
setup_xfail "hppa*-*-*"
send_log "$exec_output\n"
verbose "$exec_output" 1
+ # On OSF/1, this succeeds with gas and fails with /bin/as.
+ setup_xfail "alpha*-*-osf*"
+
+ # This fails for COFF i960-vxworks targets.
+ setup_xfail "i960-*-vxworks*"
+
fail "objcopy (simple copy)"
}
}
gets $file line
send_log "$line\n"
verbose $line
- if ![string match $line "S0130000746D706469722F636F70792E7372656397\r"] {
+ if ![string match "S0130000746D706469722F636F70792E7372656397*" $line] {
send_log "bad header\n"
fail "objcopy -O srec"
} else {
while {[gets $file line] != -1 \
- && [regexp "^S\[123\]\[0-9a-fA-F\]+\r$" $line]} {
+ && [regexp "^S\[123\]\[0-9a-fA-F\]+\[\r\n\]*$" $line]} {
send_log "$line\n"
verbose $line
set line "**EOF**"
}
send_log "$line\n"
verbose $line
- if ![regexp "^S\[789\]\[0-9a-fA-F\]+\r$" $line] then {
+ if ![regexp "^S\[789\]\[0-9a-fA-F\]+\[\r\n\]*$" $line] then {
send_log "bad trailer\n"
fail "objcopy -O srec"
} else {
case "${UNAME_MACHINE}" in
9000/31? ) HP_ARCH=m68000 ;;
9000/[34]?? ) HP_ARCH=m68k ;;
- 9000/7?? | 9000/8?[679] ) HP_ARCH=hppa1.1 ;;
+ 9000/7?? | 9000/8?[1679] ) HP_ARCH=hppa1.1 ;;
9000/8?? ) HP_ARCH=hppa1.0 ;;
esac
HPUX_REV=`echo ${UNAME_RELEASE}|sed -e 's/[^.]*.[0B]*//'`
# The BFD linker knows what the default object file format is, so
# first see if it will tell us.
ld_help_string=`ld --help 2>&1`
- if echo "$ld_help_string" | grep >/dev/null 2>&1 "supported emulations: elf_i[345]86"; then
+ if echo "$ld_help_string" | grep >/dev/null 2>&1 "supported emulations: elf_i[3456]86"; then
echo "${UNAME_MACHINE}-unknown-linux" ; exit 0
- elif echo "$ld_help_string" | grep >/dev/null 2>&1 "supported emulations: i[345]86linux"; then
+ elif echo "$ld_help_string" | grep >/dev/null 2>&1 "supported emulations: i[3456]86linux"; then
echo "${UNAME_MACHINE}-unknown-linuxaout" ; exit 0
- elif echo "$ld_help_string" | grep >/dev/null 2>&1 "supported emulations: i[345]86coff"; then
+ elif echo "$ld_help_string" | grep >/dev/null 2>&1 "supported emulations: i[3456]86coff"; then
echo "${UNAME_MACHINE}-unknown-linuxcoff" ; exit 0
elif echo "$ld_help_string" | grep >/dev/null 2>&1 "supported emulations: m68kelf"; then
echo "${UNAME_MACHINE}-unknown-linux" ; exit 0
elif echo "$ld_help_string" | grep >/dev/null 2>&1 "supported emulations: m68klinux"; then
echo "${UNAME_MACHINE}-unknown-linuxaout" ; exit 0
+ elif echo "$ld_help_string" | grep >/dev/null 2>&1 "supported emulations: elf32ppc"; then
+ echo "powerpc-unknown-linux" ; exit 0
elif test "${UNAME_MACHINE}" = "alpha" ; then
echo alpha-unknown-linux ; exit 0
elif test "${UNAME_MACHINE}" = "sparc" ; then
# Each alternative MUST END IN A *, to match a version number.
# -sysv* is not here because it comes later, after sysvr4.
-gnu* | -bsd* | -mach* | -minix* | -genix* | -ultrix* | -irix* \
- | -vms* | -sco* | -esix* | -isc* | -aix* | -sunos | -sunos[3456]* \
+ | -*vms* | -sco* | -esix* | -isc* | -aix* | -sunos | -sunos[3456]* \
| -hpux* | -unos* | -osf* | -luna* | -dgux* | -solaris* | -sym* \
| -amigados* | -msdos* | -moss* | -newsos* | -unicos* | -aos* | -aof* \
| -nindy* | -mon960* | -vxworks* | -ebmon* | -hms* | -mvs* | -clix* \
# CYGNUS LOCAL
-sim | -es1800* | -hms* | -xray | -os68k* | -none* | -v88r* \
| -windows* | -osx | -abug | -netware* | -proelf | -os9* \
- | -macos* | -mpw* | -magic*)
+ | -macos* | -mpw* | -magic* | -rtems*)
;;
-mac*)
os=`echo $os | sed -e 's|mac|macos|'`
+Sat Aug 17 04:56:25 1996 Geoffrey Noer <noer@skaro.cygnus.com>
+
+ * mh-cygwin32: don't -D_WIN32 here anymore
+
+Thu Aug 15 19:46:44 1996 Stan Shebs <shebs@andros.cygnus.com>
+
+ * mpw-mh-mpw (SEGFLAG_68K, SEGFLAG_PPC): Remove.
+ (EXTRALIBS_PPC): Add libgcc.xcoff.
+
+Thu Aug 8 14:51:47 1996 Michael Meissner <meissner@tiktok.cygnus.com>
+
+ * mt-ppc: New file, add -mrelocatable-lib and -mno-eabi to all
+ target builds for PowerPC eabi targets.
+
+Fri Jul 12 12:06:01 1996 Stan Shebs <shebs@andros.cygnus.com>
+
+ * mpw: New subdir, Mac MPW configuration support bits.
+
+Mon Jul 8 17:30:52 1996 Jim Wilson <wilson@cygnus.com>
+
+ * mh-irix6: New file.
+
+Mon Jul 8 15:15:37 1996 Jason Merrill <jason@yorick.cygnus.com>
+
+ * mt-sparcpic (PICFLAG_FOR_TARGET): Use -fPIC.
+
+Fri Jul 5 11:49:02 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * mh-irix4 (RANLIB): Don't define; Irix 4 does have ranlib.
+
+Sun Jun 23 22:59:25 1996 Geoffrey Noer <noer@cygnus.com>
+
+ * mh-cygwin32: new file. Like mh-go32 without the CFLAGS entry.
+ * .Sanitize: listed new file
+
Tue Mar 26 14:10:41 1996 Ian Lance Taylor <ian@cygnus.com>
* mh-go32 (CFLAGS): Define.
CC_MWCPPC = MWCPPC -d MPW -enum int -mpw_chars -sym on -w off
+# Note that GCC does *not* wire in a definition of "pascal", so that
+# it can be handled in another way if desired.
+
CC_68K_GCC = gC -Dpascal= -DANSI_PROTOTYPES -DMPW
CC_PPC_GCC = gC -Dpowerc=1 -Dpascal= -DANSI_PROTOTYPES -DMPW
CFLAGS =
-# These two definitions must *not* have any trailing blanks.
-
-SEGFLAG_68K = -s
-
-SEGFLAG_PPC = -d dumdum_
-
# Tool to use for making libraries/archives.
AR_LIB = Lib
"{PPCLibraries}"MathLib.xcoff \Option-d
"{PPCLibraries}"StdCLib.xcoff \Option-d
"{PPCLibraries}"PPCToolLibs.o \Option-d
- "{PPCLibraries}"PPCCRuntime.o
+ "{PPCLibraries}"PPCCRuntime.o \Option-d
+ "{GCCPPCLibraries}"libgcc.xcoff
EXTRALIBS_MWCPPC = \Option-d
"{MWPPCLibraries}"MWStdCRuntime.Lib \Option-d
target_alias=NOTARGET
target_makefile_frag=
undefs=NOUNDEFS
-version="$Revision: 1.2 $"
+version="$Revision: 1.3 $"
x11=default
### we might need to use some other shell than /bin/sh for running subshells
# Neither --host option nor undefs were present.
# Call config.guess.
guesssys=`echo ${progname} | sed 's/configure$/config.guess/'`
- if host_alias=`${guesssys}`
+ if host_alias=`${config_shell} ${guesssys}`
then
# If the string we are going to use for
# the target is a prefix of the string
moveifchange=`echo ${progname} | sed 's/configure$/move-if-change/'`
# this is a hack. sun4 must always be a valid host alias or this will fail.
-if ${configsub} sun4 >/dev/null 2>&1 ; then
+if ${config_shell} ${configsub} sun4 >/dev/null 2>&1 ; then
true
else
echo '***' cannot find config.sub. 1>&2
fi
touch config.junk
-if ${moveifchange} config.junk config.trash ; then
+if ${config_shell} ${moveifchange} config.junk config.trash ; then
true
else
echo '***' cannot find move-if-change. 1>&2
case "$host" in
*go32*)
enable_gdbtk=no ;;
+ *cygwin32*)
+ enable_gdbtk=no ;;
esac
# Determine whether gdb needs tk/tcl or not.
# these tools are built for the host environment
#
host_tools="texinfo byacc flex bison binutils ld gas gcc gdb make patch
- prms send-pr gprof gdbtest tgas etc expect dejagnu sim
- m4 autoconf ispell grep diff rcs cvs fileutils shellutils
+ prms send-pr gprof gdbtest tgas etc expect dejagnu sim bash
+ m4 autoconf ispell grep diff rcs cvs fileutils shellutils time
textutils wdiff find emacs emacs19 uudecode hello tar gzip indent
- recode release sed utils guile perl apache inet"
+ recode release sed utils guile perl apache inet gawk"
# these libraries are built for the target environment, and are built after
# directories to be built in the native environment only
#
-native_only="autoconf cvs emacs emacs19 fileutils find grep gzip hello
+native_only="autoconf cvs emacs emacs19 fileutils find gawk grep gzip hello
indent ispell m4 rcs recode sed shellutils tar textutils gash
- uudecode wdiff gprof target-groff guile perl apache inet"
+ uudecode wdiff gprof target-groff guile perl apache inet time
+ bash prms"
# directories to be built in a cross environment only
#
m88k-motorola-sysv*) host_makefile_frag=config/mh-delta88;;
mips*-dec-ultrix*) host_makefile_frag=config/mh-decstation ;;
mips*-nec-sysv4*) host_makefile_frag=config/mh-necv4 ;;
- mips*-sgi-irix[56]*) host_makefile_frag=config/mh-irix5 ;;
+ mips*-sgi-irix6*) host_makefile_frag=config/mh-irix6 ;;
+ mips*-sgi-irix5*) host_makefile_frag=config/mh-irix5 ;;
mips*-sgi-irix4*) host_makefile_frag=config/mh-irix4 ;;
mips*-sgi-irix3*) host_makefile_frag=config/mh-sysv ;;
mips*-*-sysv4*) host_makefile_frag=config/mh-sysv4 ;;
mips*-*-sysv*) host_makefile_frag=config/mh-riscos ;;
- i[345]86-ncr-sysv4.3) host_makefile_frag=config/mh-ncrsvr43 ;;
- i[345]86-ncr-sysv4*) host_makefile_frag=config/mh-ncr3000 ;;
- i[345]86-*-sco3.2v5*) host_makefile_frag=config/mh-sysv ;;
- i[345]86-*-sco*) host_makefile_frag=config/mh-sco ;;
- i[345]86-*-isc*) host_makefile_frag=config/mh-sysv ;;
- i[345]86-*-linux*) host_makefile_frag=config/mh-linux ;;
- i[345]86-*-solaris2*) host_makefile_frag=config/mh-sysv4 ;;
- i[345]86-*-aix*) host_makefile_frag=config/mh-aix386 ;;
- i[345]86-*-go32*) host_makefile_frag=config/mh-go32 ;;
+ i[3456]86-*-dgux*) host_makefile_frag=config/mh-sysv4 ;;
+ i[3456]86-ncr-sysv4.3) host_makefile_frag=config/mh-ncrsvr43 ;;
+ i[3456]86-ncr-sysv4*) host_makefile_frag=config/mh-ncr3000 ;;
+ i[3456]86-*-sco3.2v5*) host_makefile_frag=config/mh-sysv ;;
+ i[3456]86-*-sco*) host_makefile_frag=config/mh-sco ;;
+ i[3456]86-*-isc*) host_makefile_frag=config/mh-sysv ;;
+ i[3456]86-*-linux*) host_makefile_frag=config/mh-linux ;;
+ i[3456]86-*-solaris2*) host_makefile_frag=config/mh-sysv4 ;;
+ i[3456]86-*-aix*) host_makefile_frag=config/mh-aix386 ;;
+ i[3456]86-*-go32*) host_makefile_frag=config/mh-go32 ;;
+ *-cygwin32*) host_makefile_frag=config/mh-cygwin32 ;;
vax-*-ultrix2*) host_makefile_frag=config/mh-vaxult2 ;;
*-*-solaris2*) host_makefile_frag=config/mh-solaris ;;
m68k-sun-sunos*) host_makefile_frag=config/mh-sun3 ;;
waugh=
case "${host}" in
hppa*) waugh=config/mh-papic ;;
- i[345]86-*) waugh=config/mh-x86pic ;;
+ i[3456]86-*) waugh=config/mh-x86pic ;;
sparc64-*) waugh=config/mh-sparcpic ;;
*) waugh=config/mh-${host_cpu}pic ;;
esac
case "${target}" in
v810*) target_makefile_frag=config/mt-v810 ;;
- i[345]86-*-netware*) target_makefile_frag=config/mt-netware ;;
+ i[3456]86-*-netware*) target_makefile_frag=config/mt-netware ;;
powerpc-*-netware*) target_makefile_frag=config/mt-netware ;;
+ powerpc*-*-eabi* | \
+ powerpc*-*-elf* | \
+ powerpc*-*-linux* | \
+ powerpc*-*-rtem* | \
+ powerpc*-*-sysv* | \
+ powerpc*-*-solaris*) target_makefile_frag=config/mt-ppc ;;
esac
skipdirs=
# Default to using --with-stabs for certain targets.
if [ x${with_stabs} = x ]; then
case "${target}" in
- mips*-*-* | alpha*-*-osf* | i[345]86*-*-sysv4* | i[345]86*-*-unixware*)
+ mips*-*-* | alpha*-*-osf* | i[3456]86*-*-sysv4* | i[3456]86*-*-unixware*)
with_stabs=yes;
withoptions="${withoptions} --with-stabs"
;;
# Configure extra directories which are host specific
case "${host}" in
- i[345]86-*-go32*)
+ i[3456]86-*-go32*)
+ configdirs="$configdirs dosrel" ;;
+ *-cygwin32*)
configdirs="$configdirs dosrel" ;;
esac
noconfigdirs=""
case "${host}" in
- i[345]86-*-vsta)
+ i[3456]86-*-vsta)
noconfigdirs="tcl expect dejagnu make texinfo bison patch flex byacc send-pr gprof uudecode dejagnu diff guile perl apache inet"
;;
- i[345]86-*-go32)
+ i[3456]86-*-go32)
noconfigdirs="tcl tk expect dejagnu make texinfo bison patch flex byacc send-pr gprof uudecode dejagnu diff guile perl apache inet"
;;
*-*-cygwin32)
- noconfigdirs="patch diff tk tcl expect dejagnu cvs autoconf texinfo bison send-pr gprof rcs guile perl apache inet"
+ noconfigdirs="tk tcl expect dejagnu cvs autoconf bison send-pr gprof rcs guile perl texinfo apache inet"
;;
ppc*-*-pe)
noconfigdirs="patch diff make tk tcl expect dejagnu cvs autoconf texinfo bison send-pr gprof rcs guile perl apache inet"
*-*-vxworks*)
noconfigdirs="$noconfigdirs target-newlib target-libgloss"
;;
- *-*-ose)
- noconfigdirs="$noconfigdirs target-libgloss"
- ;;
alpha-dec-osf*)
# ld works, but does not support shared libraries. emacs doesn't
# work. newlib is not 64 bit ready. I'm not sure about fileutils or grep.
# gas doesn't generate exception information.
noconfigdirs="$noconfigdirs gas ld emacs fileutils grep target-newlib target-libgloss"
;;
+ alpha*-*-*vms*)
+ noconfigdirs="$noconfigdirs gdb ld target-newlib target-libgloss"
+ ;;
alpha*-*-*)
# newlib is not 64 bit ready
noconfigdirs="$noconfigdirs target-newlib target-libgloss"
esac
noconfigdirs="$noconfigdirs ld shellutils"
;;
- i[345]86-*-go32)
+ i[3456]86-*-go32)
# but don't build gdb
noconfigdirs="$noconfigdirs gdb target-libg++ target-libstdc++ target-libio target-librx"
;;
skipdirs=`echo " ${skipdirs} " | sed -e 's/ target-newlib / /'`
# Can't build gdb for cygwin32 if not native.
- case "${host}:${build}" in
- *-*-cygwin32 | *-*-cygwin32:*-*-cygwin32) ;; # keep gdb
+ case "${host}" in
+ *-*-cygwin32) ;; # keep gdb
*) noconfigdirs="$noconfigdirs gdb"
esac
;;
- i[345]86-*-pe)
+ i[3456]86-*-pe)
noconfigdirs="$noconfigdirs target-libg++ target-libstdc++ target-libio target-librx target-libgloss"
;;
- i[345]86-*-sco3.2v5*)
+ i[3456]86-*-sco3.2v5*)
# The linker does not yet know about weak symbols in COFF,
# and is not configured to handle mixed ELF and COFF.
noconfigdirs="$noconfigdirs gprof ld target-libgloss"
;;
- i[345]86-*-sco*)
+ i[3456]86-*-sco*)
noconfigdirs="$noconfigdirs gprof target-libgloss"
;;
- i[345]86-*-solaris2*)
+ i[3456]86-*-solaris2*)
# The linker does static linking correctly, but the Solaris C library
# has bugs such that some important functions won't work when statically
# linked. (See man pages for getpwuid, for example.)
noconfigdirs="$noconfigdirs ld target-libgloss"
;;
- i[345]86-*-sysv4*)
+ i[3456]86-*-sysv4*)
# The SYSV4 C compiler doesn't handle Emacs correctly
case "${CC}" in
"" | cc*) noconfigdirs="$noconfigdirs emacs emacs19" ;;
# emacs is emacs 18, which does not work on Irix 5 (emacs19 does work)
noconfigdirs="$noconfigdirs ld gprof emacs target-libgloss"
;;
+ mips*-*-irix6*)
+ # The GNU linker does not support shared libraries.
+ # emacs is emacs 18, which does not work on Irix 5 (emacs19 does work)
+ # BFD does not have Irix 6 support yet.
+ noconfigdirs="$noconfigdirs bfd binutils ld gas opcodes gdb readline mmalloc sim gprof emacs target-libgloss"
+ ;;
mips*-dec-bsd*)
noconfigdirs="$noconfigdirs gprof target-libgloss"
;;
;;
sh-*-*)
case "${host}" in
- i[345]86-*-vsta) ;; # don't add gprof back in
- i[345]86-*-go32) ;; # don't add gprof back in
+ i[3456]86-*-vsta) ;; # don't add gprof back in
+ i[3456]86-*-go32) ;; # don't add gprof back in
*) skipdirs=`echo " ${skipdirs} " | sed -e 's/ gprof / /'` ;;
esac
noconfigdirs="$noconfigdirs target-libgloss"
# If we are building a Canadian Cross, discard tools that can not be built
# using a cross compiler. FIXME: These tools should be fixed.
if [ "${build}" != "${host}" ]; then
- noconfigdirs="$noconfigdirs expect dejagnu make texinfo diff"
+ noconfigdirs="$noconfigdirs tcl tk expect dejagnu"
fi
# Make sure we don't let GNU ld be added if we didn't want it.
if [ x${shared} = xyes ]; then
case "${target}" in
hppa*) target_makefile_frag=config/mt-papic ;;
- i[345]86-*) target_makefile_frag=config/mt-x86pic ;;
+ i[3456]86-*) target_makefile_frag=config/mt-x86pic ;;
*) target_makefile_frag=config/mt-${target_cpu}pic ;;
esac
fi
+Fri Aug 30 18:12:00 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ Add SH ELF support.
+ * configure.in (sh-*-elf*): New target.
+ * config/tc-sh.h (TARGET_ARCH): Define.
+ (WORKING_DOT_WORD): Define.
+ (TC_COFF_FIX2RTYPE): Only define if OBJ_COFF.
+ (BFD_ARCH, COFF_MAGIC, TC_COUNT_RELOC): Likewise.
+ (TC_RELOC_MANGLE, tc_coff_symbol_emit_hook): Likewise.
+ (DO_NOT_STRIP, NEED_FX_R_TYPE, TC_KEEP_FX_OFFSET): Likewise.
+ (TC_COFF_SIZEMACHDEP, tc_frob_file): Likewise.
+ (SUB_SEGMENT_ALIGN): Likewise.
+ (RELOC_32): Don't define.
+ (tc_frob_file_before_adjust): Define if BFD_ASSEMBLER.
+ (target_big_endian): Declare if OBJ_ELF.
+ (TARGET_FORMAT): Define if OBJ_ELF.
+ * config/tc-sh.c: Use BFD reloc codes instead of SH COFF reloc
+ numbers throughout.
+ (tc_crawl_symbol_chain): Only define if OBJ_COFF.
+ (tc_headers_hook, tc_coff_sizemachdep): Likewise.
+ (struct sh_count_relocs): Define.
+ (sh_count_relocs): New static function, broken out of
+ sh_frob_file. Add BFD_ASSEMBLER code.
+ (sh_frob_section): Likewise.
+ (sh_frob_file): Call sh_frob_section.
+ (md_convert_frag): If BFD_ASSEMBLER, change type of headers, and
+ call section_symbol rather than seg_info (seg)->dot.
+ (md_section_align): Add OBJ_ELF version.
+ (SWITCH_TABLE_CONS): Define.
+ (SWITCH_TABLE): Use SWITCH_TABLE_CONS.
+ (md_apply_fix): Change parameter types if BFD_ASSEMBLER. Only
+ handle fx_r_type == 0 if not BFD_ASSEMBLER. Return 0 if
+ BFD_ASSEMBLER.
+ (struct reloc_map): Define if not BFD_ASSEMBLER.
+ (coff_reloc_map): Likewise.
+ (sh_coff_reloc_mangle): Use coff_reloc_map to convert fx_r_type.
+ (tc_gen_reloc): New function if BFD_ASSEMBLER.
+ * write.c (write_relocs): Ifdef out fx_where test which triggers
+ inappropriately for SH ELF.
+ (write_object_file): Call tc_frob_file_before_adjust and
+ obj_frob_file_before_adjust if they are defined.
+
+ * write.c (write_object_file): Use BFD_RELOC_16, not
+ BFD_RELOC_NONE, when calling fix_new_exp for a broken word.
+
+ * read.c (emit_expr): Fix conversion of byte count to BFD reloc
+ code.
+
+Tue Aug 27 13:53:22 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * expr.c (operand): If md_parse_name is defined, call it before
+ calling symbol_find_or_make.
+ * config/tc-ppc.h (md_parse_name): Define.
+ (ppc_parse_name): Declare.
+ * config/tc-ppc.c (reg_name_search): Add regs and regcount
+ parameters.
+ (register_name): Update call to reg_name_search.
+ (cr_operand): New static variable.
+ (cr_names): New static const array.
+ (ppc_parse_name): New function.
+ (md_assemble): If PPC_OPERAND_CR is set in the operand flags, set
+ cr_operand before calling expression.
+
+Tue Aug 27 09:05:50 1996 Jeffrey A Law (law@cygnus.com)
+
+ * config/tc-hppa.c (tc_gen_reloc): Add new argument to
+ hppa_gen_reloc_type call.
+
+Mon Aug 26 14:38:22 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * ecoff.c (init_file): Initialize fMerge to 1.
+ (add_file): Restore old file merging code, but only merge files if
+ fMerge is set.
+ (ecoff_directive_loc): Clear fMerge field of current file.
+ (ecoff_generate_asm_lineno): Likewise.
+
+Thu Aug 22 10:20:30 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * configure.in: Set and substitute HLDENV.
+ * configure: Rebuild.
+ * Makefile.in (HLDENV): New variable.
+ (as.new): Use $(HLDENV).
+
+ * ecoff.c (ecoff_directive_endef): Avoid a division by zero error
+ if an array dimension is not known.
+
+Mon Aug 19 14:41:36 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * config/obj-coff.c (fixup_segment): Adjust PC relative reloc by
+ section address for the i960 as is done for the i386.
+
+Thu Aug 15 16:37:59 1996 Stan Shebs <shebs@andros.cygnus.com>
+
+ * mpw-config.in: Add wildcards for config matching, add mips-*-*
+ case, forward-include bfd/elf-bfd.h.
+
+Thu Aug 15 17:01:31 1996 James G. Smith <jsmith@cygnus.co.uk>
+
+ * config/tc-arm.c: Major changes to add Thumb support, with lots
+ of change input from <rearnsha@armltd.co.uk>.
+ Reverted to INSN_SIZE macro, rather than insn_size variable.
+ (insns): Added ARM "bx" instruction support.
+ (tinsns): Added Thumb instruction definition structure.
+ (arm_tops_hsh): Added hash structure for Thumb opcodes.
+ (md_pseudo_table): Added ".arm", ".thumb" and ".code" pseudo-ops.
+ (opcode_select,s_arm,s_thumb,s_code): Added.
+ (decode_shift): Allow upper-case RRX.
+ (do_ldst): Simpler halfword support.
+ (do_ldmstm): Improved.
+ (reg_list, do_bx, thumb_reg, thumb_add_sub, thumb_shift,
+ thumb_mov_compare, thumb_load_store, do_t_arit, do_t_add,
+ do_t_asr, do_t_branch, do_t_bx, do_t_compare, do_t_ldmstm,
+ do_t_ldrb, do_t_ldrh, do_t_lds, do_t_lsl, do_t_lsr, do_t_mov,
+ do_t_push_pop, do_t_str, do_t_strb, do_t_strh, do_t_sub, do_t_swi,
+ do_t_adr): Added.
+ (md_apply_fix3): Add support for BFD_RELOC_ARM_THUMB_* relocations.
+ (md_parse_option): Add support for -mthumb.
+ (md_show_usage): Updated to reflect new command line option.
+ (arm_data_in_code, arm_canonicalize_symbol_name): Added.
+ * config/tc-arm.h: Provide TC_FIX_TYPE to allow private ARM
+ fragment information to be held.
+
+Thu Aug 15 16:12:00 1996 Richard Earnshaw (rearnsha@armltd.co.uk)
+
+ * tc-arm.c (md_apply_fix3): Also set fixP->fx_done if fx_addsy is
+ non-null, but is a constant.
+ (fix_new_arm): Call make_expr_symbol to make the expression symbol
+ so that error reporting will work correctly.
+
+Wed Aug 14 10:37:21 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * config/tc-i386.c (tc_i386_fix_adjustable): Don't adjust relocs
+ against weak symbols.
+
+Tue Aug 13 17:39:24 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * config/tc-ppc.h (TC_FORCE_RELOCTION): Define if OBJ_XCOFF.
+ (ppc_force_relocation): Declare if OBJ_XCOFF.
+ * config/tc-ppc.c (ppc_force_relocation): New function if
+ OBJ_XCOFF.
+
+Mon Aug 12 16:49:43 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * config/tc-mips.h (BYTE_ORDER): Don't define. No longer used.
+
+Fri Aug 9 14:16:14 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * config/tc-sh.c (sh_do_align): If not BFD_ASSEMBLER, always align
+ with nops if not in data_section or bss_section.
+
+Thu Aug 8 12:32:56 1996 Klaus Kaempf <kkaempf@progis.de>
+
+ Add support for openVMS/Alpha.
+ * as.h (PRINTF_LIKE): Don't define if VMS, for now.
+ * config/obj-evax.c: New file.
+ * config/obj-evax.h: New file.
+ * config/tc-alpha.c: Add support for EVAX format if OBJ_EVAX is
+ defined.
+ * config/tc-alpha.h: Add support for EVAX format if OBJ_EVAX is
+ defined. Add case for bfd_target_evax_flavour.
+ * config/vms-a-conf.h: New file.
+ * conf-a-gas.com: New file.
+ * configure.in: Add target alpha-*-*vms*.
+ * configure: Rebuild.
+ * makefile.vms: New file.
+ * read.c (s_lcomm): Align bss_seg on 8 byte boundary if OBJ_EVAX.
+ Don't call ffs on openVMS/Alpha.
+
+Wed Aug 7 14:19:03 1996 Philippe De Muyter <phdm@info.ucl.ac.be>
+
+ * configure.in: Make GAS_CHECK_DECL_NEEDED include <string.h> or
+ <strings.h> if they exist. Call GAS_CHECK_DECL_NEEDED on strstr
+ and sbrk.
+ * acconfig.h (NEED_DECLARATION_STRSTR): New macro.
+ (NEED_DECLARATION_SBRK): New macro.
+ * configure, conf.in: Rebuild.
+ * as.h: Only include <strings.h> if HAVE_STRINGS_H.
+ (strstr): Declare if NEED_DECLARATION_STRSTR.
+ * as.c: If HAVE_SBRK and NEED_DECLARATION_SBRK, declare sbrk.
+
+Wed Aug 7 11:50:26 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * symbols.c (resolve_symbol_value): Handle addition or subtraction
+ by a constant before entering the main switch. Reject attempts to
+ apply an arithmetic function to non-absolute symbols, except for
+ the special case of subtraction of two symbols in the same
+ section.
+
+ * config/tc-mips.c (md_section_align): Do align if OBJ_ELF, but
+ not to more than a 16 byte boundary.
+
+ * config/tc-i386.c (tc_gen_reloc): Accept all relocs; remove
+ #ifndef OBJ_ELF lines. From Eric Valette <valette@crf.canon.fr>.
+ (tc_gen_reloc): If out of memory call as_fatal rather than
+ assert. If no howto found, call as_bad_where rather than
+ as_fatal. Change the error message slightly. Set howto to a
+ non-NULL value in order to keep going.
+
+Tue Aug 6 11:15:26 1996 Jeffrey A Law (law@cygnus.com)
+
+ * config/tc-h8300.c (get_specific): New operand "size" derived
+ from ".b", ".w" and ".l" extensions. All callers changed. If
+ the base instruction has no operands, then use the size to
+ determine which specific instruction to use.
+
+Mon Aug 5 14:21:10 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * config/tc-i960.c (mem_fmt): Call parse_expr before emit.
+
+Fri Aug 2 11:23:31 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * config/tc-mips.c (md_section_align): Don't change addr if
+ OBJ_ELF.
+
+Thu Aug 1 23:51:52 1996 Jeffrey A Law (law@cygnus.com)
+
+ * config/tc-hppa.c: Revert yesterday's changes.
+
+Wed Jul 31 16:27:19 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * config/tc-m68k.c (m68k_ip): Set ok_arch for every instruction,
+ not just the ones that don't match.
+
+Wed Jul 31 15:41:42 1996 James G. Smith <jsmith@cygnus.co.uk>
+
+ * config/tc-arm.c: Changed INSN_SIZE to variable insn_size, as
+ pre-cursor to adding Thumb support. Also added cpu_variant flag
+ information to each of the asm_flg structures.
+ (md_parse_option): Updated ARM7 parsing to allow 't' for
+ thumb/halfword support, aswell as 'm' for long multiply.
+ (md_show_usage): Updated help message.
+ (md_assemble): Check that instruction flags are applicated to the
+ current cpu variant.
+ (md_apply_fix3, tc_gen_reloc): Add BFD_RELOC_ARM_OFFSET_IMM8 and
+ BFD_RELOC_ARM_HWLITERAL relocation support for new halfword and
+ signextension instructions.
+ (do_ldst): Generate halfword and signextension variants if
+ mnemonic flags match.
+ (ldst_extend): Do not allow shifts in the offset field of halfword
+ or signextension instructions.
+ (validate_offset_imm): Provide check on halfword and signextension
+ immediate range.
+ (add_to_lit_pool): Merge identical literal pool values.
+
+Tue Jul 30 14:28:23 1996 Jeffrey A Law (law@cygnus.com)
+
+ * config/tc-hppa.c (selector_table): Add 'E' selector.
+ (cons_fix_new_hppa): Don't coke on e_esel.
+ (tc_gen_reloc, SOM version): Handle R_COMP2 when used
+ to help generate exception handling tables.
+ (md_apply_fix): Don't try to apply fixups with an e_esel
+ selector.
+ (hppa_fix_adjustable): Fixups with e_esel selectors
+ are not adjustable.
+
+Tue Jul 30 15:51:41 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * config/tc-sparc.c (md_pseudo_table): Add 2byte, 4byte, and 8byte
+ pseudo-ops.
+
+Fri Jul 26 11:56:08 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * symbols.c (S_SET_EXTERNAL): Let .weak override.
+ (S_CLEAR_EXTERNAL): Likewise.
+ (S_SET_WEAK): Remove error; just let .weak override.
+
+Mon Jul 22 14:01:33 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * config/tc-mips.c (tc_gen_reloc): BFD_RELOC_PCREL_HI16_S and
+ BFD_RELOC_PCREL_LO16 are expected to be PC relative.
+
+Mon Jul 22 12:46:55 1996 Richard Henderson <rth@tamu.edu>
+
+ * tc-alpha.c: Patches to track current minimum alignment to reduce
+ the number of fragments created with frag_align.
+ (alpha_current_align): New static variable.
+ (s_alpha_text): Reset alignment to 0.
+ (s_alpha_data, s_alpha_rdata, s_alpha_sdata): Likewise.
+ (s_alpha_stringer, s_alpha_space): New functions.
+ (s_alpha_cons, alpha_flush_pending_output): Remove functions.
+ (alpha_cons_align): New function to replace both of them.
+ (emit_insn): Only align if alpha_current_align is less than 2;
+ reset alpha_current_align to 2.
+ (s_alpha_gprel32): Likewise.
+ (s_alpha_section): New function. Basically duplicate the other
+ alpha section change hooks. Only define for ELF.
+ (s_alpha_float_cons): Simplify alignment handling.
+ (md_pseudo_table): Only define "rdata" and "sdata" if OBJ_ECOFF.
+ If OBJ_ELF, define "section", "section.s", "sect", and "sect.s".
+ Don't define the s_alpha_cons pseudo-ops. Do define
+ s_alpha_stringer and s_alpha_space pseudo-ops.
+ (alpha_align): Skip if less than current default alignment. Set
+ default alignment.
+ * tc-alpha.h (md_flush_pending_output): Remove.
+ (md_cons_align): Add.
+
+ * tc-alpha.c: Add oodles of function description comments.
+ (md_bignum_to_chars): Remove; there are no callers.
+ (md_show_usage): Mention some more variants.
+
+Thu Jul 18 15:54:54 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ From Andrew Gierth <ANDREWG@microlise.co.uk>:
+ * configure.in (sparc-*-sysv4*): New target.
+ * configure: Rebuild.
+
+ * config/tc-sparc.c (md_pseudo_table): Change uahalf, uaword, and
+ uaxword to use s_uacons.
+ (sparc_no_align_cons): New static variable.
+ (s_uacons): New static function.
+ (sparc_cons_align): If sparc_no_align_cons is set, just clear it
+ and return.
+
+ * config/tc-sparc.c (s_common): Remove unused label allocate_bss.
+
+ * configure.in: Add mips-*-irix6* target. Handle Irix 6 like Irix
+ 5 with regard to shared libraries.
+ * configure: Rebuild.
+
+ * config/tc-m68k.c (m68k_ip): Use the correct length when
+ allocating space for the unsupported architecture error message.
+
+
+Fri Jul 12 20:54:19 1996 Michael Meissner <meissner@tiktok.cygnus.com>
+
+ * config/tc-ppc.c (md_parse_option): Recognize -K PIC.
+
+Wed Jul 10 12:39:08 1996 Richard Henderson <rth@tamu.edu>
+
+ * config/tc-alpha.c (alpha_align): Change fill parameter
+ to a pointer. Take NULL as 0 or nop depending on section. Change
+ all callers.
+ (s_alpha_align): Rename local variables.
+
+ * doc/as.texinfo (.align): Document action of omitted
+ fill parameter.
+
+Wed Jul 10 00:23:30 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * config/tc-ppc.c (md_apply_fix3): Give a useful error message
+ when an unsupported PC relative reloc is seen, rather than calling
+ abort.
+
+ * app.c (do_scrub_chars): Remove not_cpp_line local variable.
+ Instead, check state when '#' comment is seen.
+
+Mon Jul 8 14:11:49 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * config/tc-mips.c (mips_regmask_frag): Only define if OBJ_ELF or
+ OBJ_MAYBE_ELF.
+ (tc_gen_reloc): If fixup was changed to be PC relative, change
+ reloc type accordingly. Use name of reloc in error message.
+
+ * as.h: Don't define const or volatile.
+ * flonum.h: Don't define const.
+
+ * config/tc-m68k.c (tc_gen_reloc): Change the code appropriately
+ if fx_pcrel is set. Correct setting the addend case in the
+ OBJ_ELF case (from Andreas Schwab
+ <schwab@issan.informatik.uni-dortmund.de>).
+ (md_show_usage): Correct -mfc5200 to -m5200.
+
+Fri Jul 5 10:32:58 1996 J.T. Conklin <jtc@rtl.cygnus.com>
+
+ * doc/c-m68k.texi: Document -m5200 flag.
+ * doc/as.texinfo: Likewise.
+
+ * config/tc-m68k.c (m68k_ip): The coldfire does not support 8x
+ scale factor.
+
+Fri Jul 5 11:07:24 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * symbols.c (S_SET_EXTERNAL): Change as_warn to as_bad.
+ (S_CLEAR_EXTERNAL, S_SET_WEAK): Likewise.
+
+Thu Jul 4 11:59:46 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * Makefile.in (VERSION): Set to cygnus-2.7.1.
+
+ * Released binutils 2.7.
+
+Thu Jul 4 10:11:33 1996 James G. Smith <jsmith@cygnus.co.uk>
+
+ * config/tc-mips.c (mips_ip): Only perform range check when
+ dealing with O_constant expressions.
+
+Wed Jul 3 15:02:21 1996 J.T. Conklin <jtc@rtl.cygnus.com>
+
+ * m68k-parse.h (m68k_register): Add new coldfile control
+ registers.
+
+ * config/tc-m68k.c (mcf5200_control_regs): New variable,
+ array of control registers for the coldfire.
+ (cpu_of_arch): Added mcf5200.
+ (archs): Added mcf5200.
+ (init_table): Add new control registers.
+ (m68k_ip): Added support for new control registers.
+ (m68k_init_after_args): Likewise.
+
+ * config/tc-m68k.c (md_show_usage): Add -m5200 to usage text.
+
+Wed Jul 3 16:05:50 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * read.h (is_it_end_of_statement): Declare.
+ * read.c (is_it_end_of_statement): Remove declaration.
+
+ * config/tc-ppc.c (ppc_elf_suffix): Correct parenthesization of ||
+ within &&.
+ (md_assemble): Fix handling of @l with an unsigned constant. Add
+ default case to reloc switch.
+
+ * config/tc-i386.h (AOUT_MACHTYPE): Define as 0 if TE_386BSD.
+
+ Based on patches from Tom Quiggle <quiggle@sgi.com>:
+ * ecoff.c (last_lineno): New static variable.
+ (add_procedure): Set last_lineno.
+ (ecoff_directive_loc): Likewise.
+ (ecoff_generate_asm_lineno): Likewise.
+ (ecoff_fix_loc): New function.
+ * ecoff.h (ecoff_fix_loc): Declare.
+ * config/tc-mips.c (append_insn): When inserting nops, and using
+ ECOFF debugging, call ecoff_fix_loc.
+
+Tue Jul 2 23:02:12 1996 Jeffrey A Law (law@cygnus.com)
+
+ * config/tc-h8300.c (build_bytes): If an operand type is
+ marked as SRC_IN_DST retrieve it from the "destination" op.
+
+Sat Jun 29 13:38:31 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * configure.in (arm-*-riscix*): Set emulation to riscix.
+ * configure: Rebuild.
+ * config/te-riscix.h: New file to define TE_RISCIX.
+
+ * config/tc-sh.h (SUB_SEGMENT_ALIGN): Define.
+
+Fri Jun 28 15:14:31 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * Makefile.in (config.status): Just run config.status as other
+ tools do.
+
+Fri Jun 28 11:09:38 1996 Stan Shebs <shebs@andros.cygnus.com>
+
+ * mpw-config.in (TARGET_OS): Add definition to conf.
+
+Thu Jun 27 20:39:40 1996 James G. Smith <jsmith@cygnus.co.uk>
+
+ * config/tc-mips.c (append_insn): Parenthesize
+ cop_interlocks expressions.
+
+Thu Jun 27 12:18:26 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * listing.c (listing_print): Close the listing file if it is not
+ stdout. Close the other files opened for the listing.
+
+ * config/tc-sparc.h (md_cons_align): Define.
+ (sparc_cons_align): Declare.
+ (HANDLE_ALIGN): Define.
+ (sparc_handle_align): Declare.
+ * config/tc-sparc.c (sparc_cons_align): New function.
+ (sparc_handle_align): New function.
+ * read.c (cons_worker): Call md_cons_align if it is defined.
+
+ * as.h (struct frag): Add fr_file and fr_line fields.
+ * frags.c (frag_new): Set fr_file and fr_line.
+ (frag_var): Likewise.
+ (frag_variant): Likewise.
+
+ * as.h (struct frag): Remove unused align_mask and align_offset
+ fields.
+
+ * listing.c (calc_hex): Offset by fr_fix when examining fr_var.
+ From <uddeborg@carmen.se>.
+
+Wed Jun 26 13:21:34 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * configure.in (mips-*-osf*): New target.
+ * configure: Rebuild.
+
+ * config/tc-m68k.c: Add 68ec060 as a synonym for 68060.
+
+Wed Jun 26 16:23:08 1996 James G. Smith <jsmith@cygnus.co.uk>
+
+ * config/tc-mips.c: Added cop_interlocks, to avoid NOP insertion
+ between co-processor comparisons and branches for the VR4300.
+
+Mon Jun 24 18:02:50 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
+
+ * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
+ INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
+ (docdir): Removed.
+ * configure.in (AC_PREREQ): autoconf 2.5 or higher.
+ * doc/Makefile.in (bindir, libdir, datadir, mandir, infodir,
+ includedir): Use autoconf set values.
+ (docdir): Removed.
+
+Mon Jun 24 11:58:14 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * listing.c (listing_eject): Don't do anything if listing is 0.
+ (listing_list): Likewise.
+ (listing_source_line): Likewise.
+ (listing_title): Don't save title if listing is 0.
+ (listing_source_file): Check listing rather than listing_tail.
+
+ * configure.in: On alpha*-*-osf*, link against libbfd.a if not
+ using shared libraries.
+ * configure: Rebuild.
+
+Fri Jun 21 18:22:23 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * config/tc-mips.c (mips_ip): In case 'i'/'j', don't require an
+ absolute expression if a relocation type was specified.
+
+Fri Jun 21 17:40:16 1996 Joel Sherrill <joel@merlin.gcs.redstone.army.mil>
+
+ * configure.in: Add support for *-*-rtems* configurations.
+ * configure: Rebuild.
+
+Fri Jun 21 16:01:18 1996 Richard Henderson <rth@tamu.edu>
+
+ * configure.in: Add alpha-*-linuxecoff* target. Use elf for
+ alpha-*-linux* target. Force bfd_gas for alpha-*. Require
+ opcodes library for alpha.
+ * configure: Rebuild with autoconf 2.10.
+ * config/tc-alpha.c: Substantial rewrite to add ELF support and
+ use new opcode table.
+ * config/tc-alpha.h (md_undefined_symbol): Don't define.
+ (LOCAL_LABEL): Define differently if OBJ_ELF.
+ (FAKE_LABEL_NAME): Define if OBJ_ELF.
+ * config/alpha-opcode.h: Remove.
+ * config/obj-elf.h: If TC_ALPHA, define ECOFF_DEBUGGING.
+ * Makefile.in (TARG_CPU_DEP_alpha): Depend upon
+ include/opcode/alpha.h rather than config/alpha-opcode.h.
+
+Thu Jun 20 19:10:28 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * config/obj-aout.c (obj_emit_relocations): Give an error if the
+ relocation symbol was not resolved.
+ * config/obj-coff.c (do_relocs_for): Likewise.
+
+ * write.c (adjust_reloc_syms): Refetch the symbol section after
+ calling S_GET_VALUE, since it may have changed.
+
+ * expr.c (struct expr_symbol_line): Define.
+ (expr_symbol_lines): New static variable.
+ (make_expr_symbol): Add entry to expr_symbol_lines.
+ (expr_symbol_where): New function.
+ * expr.h: Use extern on function declarations.
+ (expr_symbol_where): Declare.
+ * symbols.c (resolve_symbol_value): Try to use expr_symbol_where
+ rather than printing the meaningless name of an expression
+ symbol.
+
+Thu Jun 20 15:57:41 1996 Ken Raeburn <raeburn@cygnus.com>
+
+ * config/tc-i386.c (md_number_to_chars): Deleted.
+ * config/tc-i386.h (md_number_to_chars): New macro.
+
+ * config/tc-alpha.c (build_operate_n, build_mem): Moved earlier in
+ the file.
+ (load_symbol_address, load_expression): Use build_mem.
+ (build_operate): New function.
+ (emit_addq_r): Use it.
+
+ Wed Mar 13 22:14:14 1996 Pat Rankin <rankin@eql.caltech.edu>
+
+ * symbols.c (colon): #if VMS, use S_SET_OTHER to store `const_flag'.
+
+ Tue Mar 5 14:31:45 1996 Pat Rankin <rankin@eql.caltech.edu>
+
+ * config/tc-vax.h (NOP_OPCODE): Define.
+
+ Sun Feb 4 21:01:03 1996 Pat Rankin <rankin@eql.caltech.edu>
+
+ * config/obj-vms.h (S_IS_COMMON): Define.
+ (S_IS_LOCAL): Check for \002 as well as \001.
+ (LONGWORD_ALIGNMENT): New macro.
+ (SUB_SEGMENT_ALIGN): Use it.
+
+ Fri Jan 26 17:44:09 1996 Pat Rankin <rankin@eql.caltech.edu>
+
+ * config/vms-conf.h: Reconcile with conf.in.
+
+Wed Jun 19 11:31:50 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * write.c (is_dnrange): Only define if TC_GENERIC_RELAX_TABLE is
+ defined.
+
+ * doc/as.texinfo: Document that any number of hex digits can
+ follow \x.
+
+ * as.c (struct defsym_list): Define.
+ (defsyms): New static variable.
+ (parse_args): Just put --defsym arguments on defsyms list, rather
+ than defining them.
+ (main): Define defsyms after output file is created.
+
+ * config/tc-m68k.c (m68k_ip): Reject PRE and POST indexing mode on
+ cpu32. From Eric Norum <Eric.Norum@usask.ca>.
+
+ * config/tc-mips.c (mips_ip): In cases 'I', 'i', and 'j', set
+ insn_error rather than calling check_absolute_expr.
+
+ * as.c (emulation_name): Remove unused static variable.
+ (default_emul_bfd_name): Add return NULL to avoid warning.
+ * ecoff.c (ecoff_stab): Remove unused variables name and
+ name_end.
+ * frags.c (frag_new): Remove unused variable tmp.
+ * hash.c (hash_grow): Parenthesize + within <<.
+ (hash_print_statistics): Use %lu, not %d, to print unsigned
+ long variables.
+ * messages.c: Include "libiberty.h".
+ (fprint_value): Add cast to avoid printf warning.
+ (sprint_value): Likewise.
+ * read.c: Include "ecoff.h".
+ (emit_expr): Add casts to avoid printf warnings.
+ * read.h: Use extern for function declarations.
+ (pop_insert): Declare.
+ * stabs.c: Include "ecoff.h".
+ * subsegs.c (subseg_set_rest): Remove unused variables tmp,
+ former_last_fragP, and new_fragP.
+ * subsegs.h (subsegs_print_statistics): Declare.
+ * symbols.c (debug_verify_symchain): Change macro to discard
+ arguments.
+ * write.c (dump_section_relocs): Likewise.
+ * write.h: Use extern for function declarations.
+ (write_print_statistics): Declare.
+ * config/e-mipsecoff.c (mipsecoff_bfd_name): Return NULL to avoid
+ warning.
+ * config/e-mipself.c (mipself_bfd_name): Likewise.
+ * config/obj-elf.h (elf_ecoff_set_ext): Declare.
+
+ * config/tc-sparc.h (TC_RELOC_RTSYM_LOC_FIXUP): If OBJ_ELF, always
+ emit relocations against external symbols.
+
+ * config/tc-alpha.c (tc_gen_reloc): Output a sensible error
+ message if bfd_reloc_type_lookup fails, rather than calling
+ assert.
+
+ * config/tc-alpha.c (alpha_force_relocation): Add
+ BFD_RELOC_12_PCREL to switch.
+
+Tue Jun 18 20:29:57 1996 Doug Evans <dje@canuck.cygnus.com>
+
+ * config/tc-i386.h (LOCAL_LABEL,FAKE_LABEL_NAME): Use defaults for
+ TE_PE (Lfoo, not .Lfoo).
+
+Tue Jun 18 17:13:33 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * read.c (s_fill): Don't warn about a zero repeat count.
+
+ * config/tc-mips.c (mips_ip): Don't warn about using AT as a
+ coprocessor register.
+
+ * config/tc-i386.c (md_assemble): When checking the size of a
+ register to set the size of an instruction, do a bitwise and with
+ Reg8 and Reg16 rather than requiring the type to be exactly Reg8
+ or Reg16.
+
+Tue Jun 18 13:19:51 1996 Jeffrey A. Law <law@rtl.cygnus.com>
+
+ * config/tc-h8300.c (parse_reg): Tweak error messages.
+ (build_bytes): Likewise.
+ (skip_colonthing): Handle :32 suffix.
+ (get_specific): Promote L_24 to L_32 if it makes a match.
+ Don't always promote L_8 to L_16.
+ (do_a_fix_imm): Clean up L_32 and L_24 handling.
+
+ * config/tc-h8300.c (Smode): New variable.
+ (h8300hmode): Turn off Hmode.
+ (h8300smode): New function. Turn on Smode and Hmode.
+ (md_pseudo_table): New ".h8300s" pseudo-op.
+ (parse_reg): Handle "exr" register.
+ (get_operand): Handle bizarre syntax for "stm.l" and "ldm.l".
+ Handle "mach" and "machl" operands for ldmac.
+ (get_specific): Handle "stm.l" and "ldm.l".
+ (build_bytes): Handle "stm.l" and "ldm.l"; handle MACREG operands.
+ * config/tc-h8300.h (COFF_MAGIC): Handle H8/S magic number.
+ (Smode): Declare.
+
+Mon Jun 17 15:50:53 1996 J.T. Conklin <jtc@rtl.cygnus.com>
+
+ * doc/as.texinfo: Reorder chapter of machine dependent options so
+ that it is sorted by chip name.
+
+ * doc/as.texinfo: Use consistant spelling of Vax.
+ * doc/c-vax.texi: Likewise.
+
+Mon Jun 17 11:26:56 1996 Jeffrey A. Law <law@rtl.cygnus.com>
+
+ * config/tc-hppa.c (md_pseudo_table): Add ".begin_try" and ".end_try"
+ pseudo ops.
+ (tc_gen_reloc, SOM version): Handle R_BEGIN_TRY and R_END_TRY.
+ (md_apply_fix): Likewise.
+ (pa_try): New function.
+ (hppa_force_relocation): Force relocs for BEGIN_TRY and END_TRY.
+
+Sun Jun 16 22:57:47 1996 Jeffrey A. Law <law@rtl.cygnus.com>
+
+ * config/tc-hppa.c (md_pseudo_table): Add ".level" pseudo op.
+ (pa_level): New function.
+
+Fri Jun 14 20:06:44 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * listing.c (listing_newline): Don't do anything if listing is 0.
+
+Thu Jun 13 17:50:54 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * subsegs.c (section_symbol): If symbol_table_frozen is set, call
+ symbol_create, not symbol_new.
+
+Wed Jun 12 14:10:44 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * write.c (adjust_reloc_syms): Don't set sy_used_in_reloc for an
+ absolute symbol unless TC_FORCE_RELOCATION returns true.
+
+ * config/obj-coff.c (previous_file_symbol): Remove BFD_ASSEMBLER
+ version.
+ (c_dot_file_symbol): BFD_ASSEMBLER version: Don't set the value of
+ the symbol to a pointer. Don't set previous_file_symbol.
+ Simplify symbol list rearrangement.
+ (coff_frob_symbol): Don't do anything with C_FILE symbols.
+ (coff_adjust_symtab): Don't check previous_file_symbol.
+
+Mon Jun 10 14:52:29 1996 Michael Meissner <meissner@tiktok.cygnus.com>
+
+ * config/tc-ppc.c (ppc_elf_lcomm): New function for .lcomm
+ directive.
+ (md_pseudo_table): Add ppc_elf_lcomm.
+
+Mon Jun 10 11:45:51 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * config/tc-m68k.c (m68k_ip): Accept ABSL for 'O', so that `bfextu
+ d0{24:1},d0' works without an immediate prefix on the bit numbers.
+ (md_begin): Add digits to alt_notend_table.
+ (md_parse_option): Make s a const pointer.
+
+ * config/tc-sparc.c (md_pseudo_table): Add "empty".
+ (s_empty): New static function.
+
+ * config/obj-coff.c (struct filename_list): Only define if not
+ BFD_ASSEMBLER.
+ (filename_list_head, filename_list_tail): Likewise.
+ (c_section_symbol): Remove unused BFD_ASSEMBLER version.
+ (obj_coff_endef, BFD_ASSEMBLER version): Don't set the debugging
+ flag for C_MOS, C_MOE, C_MOU, or C_EOS symbols, since they should
+ have a section of N_ABS rather than N_DEBUG. If we do a merge,
+ remove the new symbol from the list.
+ (obj_coff_endef, both versions): Call tag_insert even if there is
+ an old symbol with the same name, if the old symbol does not
+ happen to be a tag.
+ (coff_frob_symbol): Check SF_GET_TAG, C_EOF, and C_FILE outside of
+ the SF_GET_DEBUG condition. Don't call SA_SET_SYM_ENDNDX with a
+ symbol that will be moved to the end of the symbol list.
+ (coff_adjust_section_syms): Always call section_symbol for .text,
+ .data, and .bss.
+ (coff_frob_section): Likewise. Also, remove unused variable
+ strname.
+
+ * config/tc-ns32k.c (convert_iif): Call frag_grow rather than
+ manipulating frags directly.
+ (md_number_to_field): Adjust mem_ptr correctly if ENDIAN is
+ defined.
+
+ * app.c (do_scrub_chars): If '/' is LINE_COMMENT_START, check
+ whether the next character is '*' before checking whether we are
+ at the start of a line. Permit LINE_COMMENT_START to start a
+ comment in state 1 (seen some whitespace) as well, to match the
+ documentation.
+
+ * gasp.c (do_align): Permit a fill value for .align.
+
Wed Jun 5 17:09:26 1996 Ian Lance Taylor <ian@cygnus.com>
* read.c (next_char_of_string): Warn if a newline is seen in the
* mac-as.r: Fix copyright and version strings.
(cfrg): Use PROG_NAME instead of literal name.
-
Mon Dec 11 14:14:08 1995 Ian Lance Taylor <ian@cygnus.com>
* read.c (read_a_source_file): If tc_unrecognized_line is defined,
program_transform_name = @program_transform_name@
exec_prefix = @exec_prefix@
-bindir = $(exec_prefix)/bin
-libdir = $(exec_prefix)/lib
+bindir = @bindir@
+libdir = @libdir@
tooldir = $(exec_prefix)/$(target_alias)
-datadir = $(prefix)/lib
-mandir = $(prefix)/man
+datadir = @datadir@
+mandir = @mandir@
man1dir = $(mandir)/man1
man2dir = $(mandir)/man2
man3dir = $(mandir)/man3
man7dir = $(mandir)/man7
man8dir = $(mandir)/man8
man9dir = $(mandir)/man9
-infodir = $(prefix)/info
-includedir = $(prefix)/include
-docdir = $(datadir)/doc
+infodir = @infodir@
+includedir = @includedir@
-VERSION=cygnus-2.6
+VERSION=cygnus-2.7.1
SHELL = /bin/sh
INSTALL = $${srcroot}/install.sh -c
-INSTALL_PROGRAM = $(INSTALL)
-INSTALL_DATA = $(INSTALL)
+INSTALL_PROGRAM = @INSTALL_PROGRAM@
+INSTALL_DATA = @INSTALL_DATA@
INSTALL_XFORM = $(INSTALL) -t='$(program_transform_name)'
INSTALL_XFORM1= $(INSTALL_XFORM) -b=.1
CFLAGS = -g
LDFLAGS =
HLDFLAGS = @HLDFLAGS@
+HLDENV = @HLDENV@
RPATH_ENVVAR = @RPATH_ENVVAR@
MAKEOVERRIDES=
$(OBJS): @ALL_OBJ_DEPS@
as.new: $(OBJS) $(LIBDEPS)
- $(CC) $(HLDFLAGS) $(ALL_CFLAGS) $(LDFLAGS) -o as.new $(OBJS) $(LIBS) $(LOADLIBES)
+ $(HLDENV) $(CC) $(HLDFLAGS) $(ALL_CFLAGS) $(LDFLAGS) -o as.new $(OBJS) $(LIBS) $(LOADLIBES)
$(OBJS): config.h as.h targ-env.h obj-format.h targ-cpu.h flonum.h expr.h \
struc-symbol.h write.h frags.h hash.h read.h symbols.h tc.h obj.h \
$(RUNTEST) --tool gas --srcdir $${srcdir}/testsuite $(RUNTESTFLAGS)
config.status: configure
- if [ -r config.status ]; then \
- sh ./config.status --recheck ; \
- else \
- echo You must configure gas. Look at the INSTALL file for details. ; \
- exit 1 ; \
- fi
+ $(SHELL) config.status --recheck
config.h: config-stamp ; @true
config-stamp: Makefile conf
# Compiling object files from source files.
TARG_CPU_DEP_a29k =
-TARG_CPU_DEP_alpha = $(srcdir)/config/alpha-opcode.h subsegs.h
+TARG_CPU_DEP_alpha = $(srcdir)/../include/opcode/alpha.h subsegs.h
TARG_CPU_DEP_arm = subsegs.h
TARG_CPU_DEP_generic =
TARG_CPU_DEP_h8300 = $(srcdir)/../include/opcode/h8300.h
-*- text -*-
+Changes since 2.7:
+
+Motorola ColdFire 5200 support added (configure for m68k and use -m5200).
+
+Alpha/VMS support added.
+
Changes since 2.6:
The PowerPC assembler now allows the use of symbolic register names (r0, etc.)
if -mregnames is used. Symbolic names preceded by a '%' (%r0, etc.) can be
used any time. PowerPC 860 move to/from SPR instructions have been added.
+Alpha Linux (ELF) support added.
+
+PowerPC ELF support added.
+
+m68k Linux (ELF) support added.
+
+i960 Hx/Jx support added.
+
+i386/PowerPC gnu-win32 support added.
+
+SCO ELF support added. For OpenServer 5 targets (i386-unknown-sco3.2v5) the
+default is to build COFF-only support. To get a set of tools that generate ELF
+(they'll understand both COFF and ELF), you must configure with
+target=i386-unknown-sco3.2v5elf.
+
+m88k-motorola-sysv* support added.
+
Changes since 2.5:
Gas now directly supports macros, without requiring GASP.
#undef TARGET_OS
#undef TARGET_VENDOR
+/* Sometimes the system header files don't declare strstr. */
+#undef NEED_DECLARATION_STRSTR
+
/* Sometimes the system header files don't declare malloc and realloc. */
#undef NEED_DECLARATION_MALLOC
/* Sometimes the system header files don't declare free. */
#undef NEED_DECLARATION_FREE
+/* Sometimes the system header files don't declare sbrk. */
+#undef NEED_DECLARATION_SBRK
+
/* Sometimes errno.h doesn't declare errno itself. */
#undef NEED_DECLARATION_ERRNO
char *fromend;
int fromlen;
register int ch, ch2 = 0;
- int not_cpp_line = 0;
/*State 0: beginning of normal line
1: After first whitespace on line (flush more white)
|| ch == '/'
|| IS_LINE_SEPARATOR (ch))
{
- /* cpp never outputs a leading space before the #, so
- try to avoid being confused. */
- not_cpp_line = 1;
if (scrub_m68k_mri)
{
/* In MRI mode, we keep these spaces. */
break;
case LEX_IS_LINE_COMMENT_START:
- if (state == 0) /* Only comment at start of line. */
+ /* FIXME-someday: The two character comment stuff was badly
+ thought out. On i386, we want '/' as line comment start
+ AND we want C style comments. hence this hack. The
+ whole lexical process should be reworked. xoxorich. */
+ if (ch == '/')
{
- /* FIXME-someday: The two character comment stuff was
- badly thought out. On i386, we want '/' as line
- comment start AND we want C style comments. hence
- this hack. The whole lexical process should be
- reworked. xoxorich. */
- if (ch == '/')
+ ch2 = GET ();
+ if (ch2 == '*')
{
- ch2 = GET ();
- if (ch2 == '*')
- {
- state = -2;
- break;
- }
- else
- {
- UNGET (ch2);
- }
- } /* bad hack */
+ state = -2;
+ break;
+ }
+ else
+ {
+ UNGET (ch2);
+ }
+ } /* bad hack */
+
+ if (state == 0 || state == 1) /* Only comment at start of line. */
+ {
+ int startch;
- if (ch != '#')
- not_cpp_line = 1;
+ startch = ch;
do
{
PUT ('\n');
break;
}
- if (ch < '0' || ch > '9' || not_cpp_line)
+ if (ch < '0' || ch > '9' || state != 0 || startch != '#')
{
- /* Non-numerics: Eat whole comment line */
+ /* Not a cpp line. */
while (ch != EOF && !IS_NEWLINE (ch))
ch = GET ();
if (ch == EOF)
PUT ('\n');
break;
}
- /* Numerics begin comment. Perhaps CPP `# 123 "filename"' */
+ /* Loks like `# 123 "filename"' from cpp. */
UNGET (ch);
old_state = 4;
state = -1;
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
- along with GAS; see the file COPYING. If not, write to
- the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+ along with GAS; see the file COPYING. If not, write to the Free
+ Software Foundation, 59 Temple Place - Suite 330, Boston, MA
+ 02111-1307, USA. */
/*
* Main program for AS; a 32-bit assembler of GNU.
#include "sb.h"
#include "macro.h"
+#ifdef HAVE_SBRK
+#ifdef NEED_DECLARATION_SBRK
+extern PTR sbrk ();
+#endif
+#endif
+
static void perform_an_assembly_pass PARAMS ((int argc, char **argv));
static int macro_expr PARAMS ((const char *, int, sb *, int *));
Then the chunk sizes for gas and bfd will be reduced. */
int debug_memory = 0;
+/* We build a list of defsyms as we read the options, and then define
+ them after we have initialized everything. */
+
+struct defsym_list
+{
+ struct defsym_list *next;
+ char *name;
+ valueT value;
+};
+
+static struct defsym_list *defsyms;
\f
void
print_version_id ()
extern struct emulation mipsbelf, mipslelf, mipself;
extern struct emulation mipsbecoff, mipslecoff, mipsecoff;
-static const char *emulation_name;
static struct emulation *const emulations[] = { EMULATIONS };
static const int n_emulations = sizeof (emulations) / sizeof (emulations[0]);
default_emul_bfd_name ()
{
abort ();
+ return NULL;
}
void
{
char *s;
long i;
- symbolS *sym;
+ struct defsym_list *n;
for (s = optarg; *s != '\0' && *s != '='; s++)
;
as_fatal ("bad defsym; format is --defsym name=value");
*s++ = '\0';
i = strtol (s, (char **) NULL, 0);
- sym = symbol_new (optarg, absolute_section, (valueT) i,
- &zero_address_frag);
- symbol_table_insert (sym);
+ n = (struct defsym_list *) xmalloc (sizeof *n);
+ n->next = defsyms;
+ n->name = optarg;
+ n->value = i;
+ defsyms = n;
}
break;
tc_init_after_args ();
#endif
+ /* Now that we have fully initialized, and have created the output
+ file, define any symbols requested by --defsym command line
+ arguments. */
+ while (defsyms != NULL)
+ {
+ symbolS *sym;
+ struct defsym_list *next;
+
+ sym = symbol_new (defsyms->name, absolute_section, defsyms->value,
+ &zero_address_frag);
+ symbol_table_insert (sym);
+ next = defsyms->next;
+ free (defsyms);
+ defsyms = next;
+ }
+
PROGRESS (1);
perform_an_assembly_pass (argc, argv); /* Assemble it. */
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
- along with GAS; see the file COPYING. If not, write to
- the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+ along with GAS; see the file COPYING. If not, write to the Free
+ Software Foundation, 59 Temple Place - Suite 330, Boston, MA
+ 02111-1307, USA. */
#ifndef GAS
#define GAS 1
#ifdef HAVE_STRING_H
#include <string.h>
#else
+#ifdef HAVE_STRINGS_H
#include <strings.h>
#endif
+#endif
#ifdef HAVE_STDLIB_H
#include <stdlib.h>
#endif
#endif /* !__MWERKS__ */
/* Other stuff from config.h. */
+#ifdef NEED_DECLARATION_STRSTR
+extern char *strstr ();
+#endif
#ifdef NEED_DECLARATION_MALLOC
extern PTR malloc ();
extern PTR realloc ();
#define __FILE__ "unknown"
#endif /* __FILE__ */
-#ifndef __STDC__
-#ifndef const
-#define const
-#endif
-#ifndef volatile
-#define volatile
-#endif
-#endif /* ! __STDC__ */
-
#ifndef FOPEN_WB
#ifdef GO32
#include "fopen-bin.h"
as_fatal("Case value %ld unexpected at line %d of file \"%s\"\n", \
(long) val, __LINE__, __FILE__); \
}
-
-/* Version 2.1 of Solaris had problems with this declaration, but I
- think that bug has since been fixed. If it causes problems on your
- system, just delete it. */
-extern char *strstr ();
\f
#include "flonum.h"
relax_stateT fr_type;
relax_substateT fr_subtype;
- /* Track the alignment and offset of the current frag. With this,
- sometimes we can avoid creating new frags for .align directives. */
- unsigned short align_mask;
- unsigned short align_offset;
-
/* These are needed only on the NS32K machines. But since we don't
include targ-cpu.h until after this structure has been defined,
we can't really conditionalize it. This code should be
create a union here. */
char fr_pcrel_adjust, fr_bsr;
+ /* Where the frag was created, or where it became a variant frag. */
+ char *fr_file;
+ unsigned int fr_line;
+
/* Data begins here. */
char fr_literal[1];
};
#endif
#ifdef USE_STDARG
-#if __GNUC__ >= 2
+#if (__GNUC__ >= 2) && !defined(VMS)
/* for use with -Wformat */
#define PRINTF_LIKE(FCN) void FCN (const char *format, ...) \
__attribute__ ((format (printf, 1, 2)))
#undef TARGET_OS
#undef TARGET_VENDOR
+/* Sometimes the system header files don't declare strstr. */
+#undef NEED_DECLARATION_STRSTR
+
/* Sometimes the system header files don't declare malloc and realloc. */
#undef NEED_DECLARATION_MALLOC
/* Sometimes the system header files don't declare free. */
#undef NEED_DECLARATION_FREE
+/* Sometimes the system header files don't declare sbrk. */
+#undef NEED_DECLARATION_SBRK
+
/* Sometimes errno.h doesn't declare errno itself. */
#undef NEED_DECLARATION_ERRNO
URP,
BUSCR, /* 68060 added these */
PCR,
-#define last_movec_reg PCR
+ ROMBAR, /* mcf5200 added these */
+ RAMBAR0,
+ RAMBAR1,
+ MBAR,
+#define last_movec_reg MBAR
/* end of movec ordering constraints */
FPI,
sym = sym->sy_value.X_add_symbol;
fixP->fx_addsy = sym;
+ if (! sym->sy_resolved && ! S_IS_DEFINED (sym))
+ {
+ char *file;
+ unsigned int line;
+
+ if (expr_symbol_where (sym, &file, &line))
+ as_bad_where (file, line, "unresolved relocation");
+ else
+ as_bad ("bad relocation: symbol `%s' not in symbol table",
+ S_GET_NAME (sym));
+ }
+
tc_aout_fix_to_chars (*where, fixP, segment_address_in_file);
*where += md_reloc_size;
}
#define KEEP_RELOC_INFO
#endif
-
-/* structure used to keep the filenames which
- are too long around so that we can stick them
- into the string table */
-struct filename_list
-{
- char *filename;
- struct filename_list *next;
-};
-
-static struct filename_list *filename_list_head;
-static struct filename_list *filename_list_tail;
-
const char *s_get_name PARAMS ((symbolS * s));
static symbolS *def_symbol_in_progress;
SF_SET_DEBUG_FIELD (normal, SF_GET_DEBUG_FIELD (debug));
}
-static symbolS *previous_file_symbol;
void
c_dot_file_symbol (filename)
char *filename;
}
#endif
- S_SET_VALUE (symbolP, (long) previous_file_symbol);
-
- previous_file_symbol = symbolP;
-
/* Make sure that the symbol is first on the symbol chain */
if (symbol_rootP != symbolP)
{
- if (symbolP == symbol_lastP)
- {
- symbol_lastP = symbol_lastP->sy_previous;
- } /* if it was the last thing on the list */
-
symbol_remove (symbolP, &symbol_rootP, &symbol_lastP);
symbol_insert (symbolP, symbol_rootP, &symbol_rootP, &symbol_lastP);
- symbol_rootP = symbolP;
} /* if not first on the list */
}
-/*
- * Build a 'section static' symbol.
- */
-
-char *
-c_section_symbol (name, value, length, nreloc, nlnno)
- char *name;
- long value;
- long length;
- unsigned short nreloc;
- unsigned short nlnno;
-{
- symbolS *symbolP;
-
- symbolP = symbol_new (name,
- (name[1] == 't'
- ? text_section
- : name[1] == 'd'
- ? data_section
- : bss_section),
- value,
- &zero_address_frag);
-
- S_SET_STORAGE_CLASS (symbolP, C_STAT);
- S_SET_NUMBER_AUXILIARY (symbolP, 1);
-
- SA_SET_SCN_SCNLEN (symbolP, length);
- SA_SET_SCN_NRELOC (symbolP, nreloc);
- SA_SET_SCN_NLINNO (symbolP, nlnno);
-
- SF_SET_STATICS (symbolP);
-
- return (char *) symbolP;
-}
-
/* Line number handling */
struct line_no {
#endif /* C_AUTOARG */
case C_AUTO:
case C_REG:
- case C_MOS:
- case C_MOE:
- case C_MOU:
case C_ARG:
case C_REGPARM:
case C_FIELD:
- case C_EOS:
SF_SET_DEBUG (def_symbol_in_progress);
S_SET_SEGMENT (def_symbol_in_progress, absolute_section);
break;
+ case C_MOS:
+ case C_MOE:
+ case C_MOU:
+ case C_EOS:
+ S_SET_SEGMENT (def_symbol_in_progress, absolute_section);
+ break;
+
case C_EXT:
case C_STAT:
case C_LABEL:
previous definition. */
c_symbol_merge (def_symbol_in_progress, symbolP);
- /* FIXME-SOON Should *def_symbol_in_progress be free'd? xoxorich. */
+ symbol_remove (def_symbol_in_progress, &symbol_rootP, &symbol_lastP);
+
def_symbol_in_progress = symbolP;
if (SF_GET_FUNCTION (def_symbol_in_progress)
}
}
- if (SF_GET_TAG (def_symbol_in_progress)
- && symbol_find_base (S_GET_NAME (def_symbol_in_progress), DO_NOT_STRIP) == NULL)
+ if (SF_GET_TAG (def_symbol_in_progress))
{
- tag_insert (S_GET_NAME (def_symbol_in_progress), def_symbol_in_progress);
+ symbolS *oldtag;
+
+ oldtag = symbol_find_base (S_GET_NAME (def_symbol_in_progress),
+ DO_NOT_STRIP);
+ if (oldtag == NULL || ! SF_GET_TAG (oldtag))
+ tag_insert (S_GET_NAME (def_symbol_in_progress),
+ def_symbol_in_progress);
}
if (SF_GET_FUNCTION (def_symbol_in_progress))
coff_last_function = 0;
}
}
- else if (SF_GET_TAG (symp))
- last_tagP = symp;
- else if (S_GET_STORAGE_CLASS (symp) == C_EOS)
- next_set_end = last_tagP;
- else if (S_GET_STORAGE_CLASS (symp) == C_FILE)
- {
- if (S_GET_VALUE (symp))
- {
- S_SET_VALUE ((symbolS *) S_GET_VALUE (symp), 0xdeadbeef);
- S_SET_VALUE (symp, 0);
- }
- }
if (S_IS_EXTERNAL (symp))
S_SET_STORAGE_CLASS (symp, C_EXT);
else if (SF_GET_LOCAL (symp))
/* more ... */
}
+ if (SF_GET_TAG (symp))
+ last_tagP = symp;
+ else if (S_GET_STORAGE_CLASS (symp) == C_EOS)
+ next_set_end = last_tagP;
+
#ifdef OBJ_XCOFF
/* This is pretty horrible, but we have to set *punt correctly in
order to call SA_SET_SYM_ENDNDX correctly. */
#endif
if (set_end != (symbolS *) NULL
- && ! *punt)
+ && ! *punt
+ && ((symp->bsym->flags & BSF_NOT_AT_END) != 0
+ || (S_IS_DEFINED (symp)
+ && ! S_IS_COMMON (symp)
+ && (! S_IS_EXTERNAL (symp) || SF_GET_FUNCTION (symp)))))
{
SA_SET_SYM_ENDNDX (set_end, symp);
set_end = NULL;
}
}
if (bfd_get_section_size_before_reloc (sec) == 0
- && nrelocs == 0 && nlnno == 0)
+ && nrelocs == 0
+ && nlnno == 0
+ && sec != text_section
+ && sec != data_section
+ && sec != bss_section)
return;
secsym = section_symbol (sec);
SA_SET_SCN_NRELOC (secsym, nrelocs);
{
if (symbol_rootP == NULL
|| S_GET_STORAGE_CLASS (symbol_rootP) != C_FILE)
- {
- assert (previous_file_symbol == 0);
- c_dot_file_symbol ("fake");
- }
+ c_dot_file_symbol ("fake");
}
void
segT sec;
{
segT strsec;
- char *strname, *p;
+ char *p;
fragS *fragp;
bfd_vma size, n_entries, mask;
/* If the section size is non-zero, the section symbol needs an aux
entry associated with it, indicating the size. We don't know
all the values yet; coff_frob_symbol will fill them in later. */
- if (size)
+ if (size != 0
+ || sec == text_section
+ || sec == data_section
+ || sec == bss_section)
{
symbolS *secsym = section_symbol (sec);
int function_lineoff = -1; /* Offset in line#s where the last function
started (the odd entry for line #0) */
+/* structure used to keep the filenames which
+ are too long around so that we can stick them
+ into the string table */
+struct filename_list
+{
+ char *filename;
+ struct filename_list *next;
+};
+
+static struct filename_list *filename_list_head;
+static struct filename_list *filename_list_tail;
+
static symbolS *last_line_symbol;
/* Add 4 to the real value to get the index and compensate the
/* Turn the segment of the symbol into an offset. */
if (symbol_ptr)
{
+ if (! symbol_ptr->sy_resolved)
+ {
+ char *file;
+ unsigned int line;
+
+ if (expr_symbol_where (symbol_ptr, &file, &line))
+ as_bad_where (file, line,
+ "unresolved relocation");
+ else
+ as_bad ("bad relocation: symbol `%s' not in symbol table",
+ S_GET_NAME (symbol_ptr));
+ }
dot = segment_info[S_GET_SEGMENT (symbol_ptr)].dot;
if (dot)
{
} /* if function */
} /* normal or mergable */
- if (SF_GET_TAG (def_symbol_in_progress)
- && symbol_find_base (S_GET_NAME (def_symbol_in_progress), DO_NOT_STRIP) == NULL)
+ if (SF_GET_TAG (def_symbol_in_progress))
{
- tag_insert (S_GET_NAME (def_symbol_in_progress), def_symbol_in_progress);
+ symbolS *oldtag;
+
+ oldtag = symbol_find_base (S_GET_NAME (def_symbol_in_progress),
+ DO_NOT_STRIP);
+ if (oldtag == NULL || ! SF_GET_TAG (oldtag))
+ tag_insert (S_GET_NAME (def_symbol_in_progress),
+ def_symbol_in_progress);
}
if (SF_GET_FUNCTION (def_symbol_in_progress))
add_number += S_GET_VALUE (add_symbolP);
add_number -= md_pcrel_from (fixP);
-#if defined (TC_I386) || defined (TE_LYNX)
- /* On the 386 we must adjust by the segment
- vaddr as well. Ian Taylor. */
+#if defined (TC_I386) || defined (TE_LYNX) || defined (TC_I960)
+ /* On the 386 we must adjust by the segment vaddr as
+ well. Ian Taylor. I changed the i960 to work this
+ way as well. This is compatible with the current GNU
+ linker behaviour. I do not know what other i960 COFF
+ assemblers do. This is not a common case: normally,
+ only assembler code will contain a PC relative reloc,
+ and only branches which do not originate in the .text
+ section will have a non-zero address. */
add_number -= segP->scnhdr.s_vaddr;
#endif
pcrel = 0; /* Lie. Don't want further pcrel processing. */
{
fixP->fx_addsy = &abs_symbol;
} /* if there's an add_symbol */
-#if defined (TC_I386) || defined (TE_LYNX)
- /* On the 386 we must adjust by the segment vaddr
- as well. Ian Taylor. */
+#if defined (TC_I386) || defined (TE_LYNX) || defined (TC_I960)
+ /* On the 386 we must adjust by the segment vaddr as well.
+ Ian Taylor. As noted above, I made the i960 work this
+ way as well. */
add_number -= segP->scnhdr.s_vaddr;
#endif
} /* if pcrel */
/* ELF object file format.
- Copyright (C) 1992, 1993 Free Software Foundation, Inc.
+ Copyright (C) 1992, 93, 94, 95, 1996 Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
- along with GAS; see the file COPYING. If not, write to
- the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+ along with GAS; see the file COPYING. If not, write to the Free
+ Software Foundation, 59 Temple Place - Suite 330, Boston, MA
+ 02111-1307, USA. */
/* HP PA-RISC support was contributed by the Center for Software Science
extern void obj_elf_init_stab_section PARAMS ((segT));
#define INIT_STAB_SECTION(seg) obj_elf_init_stab_section (seg)
+/* For now, always set ECOFF_DEBUGGING for an Alpha target. */
+#ifdef TC_ALPHA
+#define ECOFF_DEBUGGING 1
+#endif
+
/* For now, always set ECOFF_DEBUGGING for a MIPS target. */
#ifdef TC_MIPS
#define ECOFF_DEBUGGING 1
#ifndef OBJ_MAYBE_ELF
#define obj_ecoff_set_ext elf_ecoff_set_ext
+extern void elf_ecoff_set_ext ();
#endif
#endif /* _OBJ_ELF_H */
-/* tc-alpha.c - Processor-specific code for the DEC Alpha CPU.
- Copyright (C) 1989, 1993, 1994 Free Software Foundation, Inc.
+/* tc-alpha.c - Processor-specific code for the DEC Alpha AXP CPU.
+ Copyright (C) 1989, 93, 94, 95, 1996 Free Software Foundation, Inc.
Contributed by Carnegie Mellon University, 1993.
Written by Alessandro Forin, based on earlier gas-1.38 target CPU files.
Modified by Ken Raeburn for gas-2.x and ECOFF support.
+ Modified by Richard Henderson for ELF support.
+ Modified by Klaus Kaempf for EVAX (openVMS/Alpha) support.
This file is part of GAS, the GNU Assembler.
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
- along with GAS; see the file COPYING. If not, write to
- the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+ along with GAS; see the file COPYING. If not, write to the Free
+ Software Foundation, 59 Temple Place - Suite 330, Boston, MA
+ 02111-1307, USA. */
/*
* Mach Operating System
* any improvements or extensions that they make and grant Carnegie the
* rights to redistribute these changes.
*/
-/*
- * HISTORY
- * 5-Oct-93 Alessandro Forin (af) at Carnegie-Mellon University
- * First Checkin
- *
- * Author: Alessandro Forin, Carnegie Mellon University
- * Date: Jan 1993
- */
-
-#include <ctype.h>
#include "as.h"
-#include "alpha-opcode.h"
#include "subsegs.h"
-/* The OSF/1 V2.0 Alpha compiler can't compile this file with inline
- functions. */
-#ifndef __GNUC__
-#undef inline
-#define inline
+#include "opcode/alpha.h"
+
+#ifdef OBJ_ELF
+#include "elf/alpha.h"
#endif
-/* @@ Will a simple 0x8000 work here? If not, why not? */
-#define GP_ADJUSTMENT (0x8000 - 0x10)
+#include <ctype.h>
-/* These are exported to relaxing code, even though we don't do any
- relaxing on this processor currently. */
-int md_short_jump_size = 4;
-int md_long_jump_size = 4;
+\f
+/* Local types */
-/* handle of the OPCODE hash table */
-static struct hash_control *op_hash;
+#define MAX_INSN_FIXUPS 2
+#define MAX_INSN_ARGS 5
-/* Sections and symbols we'll want to keep track of. */
-static segT lita_sec, rdata, sdata, lit8_sec, lit4_sec;
-static symbolS *lit8_sym, *lit4_sym;
+struct alpha_fixup
+{
+ expressionS exp;
+ bfd_reloc_code_real_type reloc;
+};
-/* Setting for ".set [no]{at,macro}". */
-static int at_ok = 1, macro_ok = 1;
+struct alpha_insn
+{
+ unsigned insn;
+ int nfixups;
+ struct alpha_fixup fixups[MAX_INSN_FIXUPS];
+};
-/* Keep track of global pointer. */
-valueT alpha_gp_value;
-static symbolS *gp;
+enum alpha_macro_arg
+{
+ MACRO_EOA = 1, MACRO_IR, MACRO_PIR, MACRO_CPIR, MACRO_FPR, MACRO_EXP
+};
-/* We'll probably be using this relocation frequently, and we
- will want to compare for it. */
-static reloc_howto_type *gpdisp_hi16_howto;
+struct alpha_macro
+{
+ const char *name;
+ void (*emit) PARAMS((const expressionS *, int, void *));
+ void *arg;
+ enum alpha_macro_arg argsets[16];
+};
-/* These are exported to ECOFF code. */
-unsigned long alpha_gprmask, alpha_fprmask;
+/* Two extra symbols we want to see in our input. This is a blatent
+ misuse of the expressionS.X_op field. */
-/* Used for LITUSE relocations. */
-static expressionS lituse_basereg, lituse_byteoff, lituse_jsr;
+#define O_pregister (O_max+1) /* O_register, but in parentheses */
+#define O_cpregister (O_pregister+1) /* + a leading comma */
-/* Address size: In OSF/1 1.3, an undocumented "-32addr" option will
- cause all addresses to be treated as 32-bit values in memory. (The
- in-register versions are all sign-extended to 64 bits, of course.)
- Some other systems may want this option too. */
-static int addr32;
+/* Macros for extracting the type and number of encoded register tokens */
-/* Symbol labelling the current insn. When the Alpha gas sees
- foo:
- .quad 0
- and the section happens to not be on an eight byte boundary, it
- will align both the symbol and the .quad to an eight byte boundary. */
-static symbolS *insn_label;
+#define is_ir_num(x) (((x) & 32) == 0)
+#define is_fpr_num(x) (((x) & 32) != 0)
+#define regno(x) ((x) & 31)
-/* Whether we should automatically align data generation pseudo-ops.
- .align 0 will turn this off. */
-static int auto_align = 1;
-
-/* Imported functions -- they should be defined in header files somewhere. */
-extern segT subseg_get ();
-extern PTR bfd_alloc_by_size_t ();
-extern void s_globl (), s_long (), s_short (), s_space (), cons (), s_text (),
- s_data (), float_cons ();
-
-/* Static functions, needing forward declarations. */
-static void s_base (), s_proc (), s_alpha_set ();
-static void s_gprel32 (), s_rdata (), s_sdata (), s_alpha_comm ();
-static void s_alpha_text PARAMS ((int));
-static void s_alpha_data PARAMS ((int));
-static void s_alpha_align PARAMS ((int));
-static void s_alpha_cons PARAMS ((int));
-static void s_alpha_float_cons PARAMS ((int));
-static int alpha_ip ();
-
-static void emit_unaligned_io PARAMS ((char *, int, valueT, int));
-static void emit_load_unal PARAMS ((int, valueT, int));
-static void emit_store_unal PARAMS ((int, valueT, int));
-static void emit_byte_manip_r PARAMS ((char *, int, int, int, int, int));
-static void emit_extract_r PARAMS ((int, int, int, int, int));
-static void emit_insert_r PARAMS ((int, int, int, int, int));
-static void emit_mask_r PARAMS ((int, int, int, int, int));
-static void emit_sign_extend PARAMS ((int, int));
-static void emit_bis_r PARAMS ((int, int, int));
-static int build_mem PARAMS ((int, int, int, bfd_signed_vma));
-static int build_operate_n PARAMS ((int, int, int, int, int));
-static void emit_sll_n PARAMS ((int, int, int));
-static void emit_ldah_num PARAMS ((int, bfd_vma, int));
-static void emit_addq_r PARAMS ((int, int, int));
-static void emit_lda_n PARAMS ((int, bfd_vma, int));
-static void emit_add64 PARAMS ((int, int, bfd_vma));
-static int in_range_signed PARAMS ((bfd_vma, int));
-static void alpha_align PARAMS ((int, int, symbolS *));
+/* Something odd inherited from the old assembler */
-const pseudo_typeS md_pseudo_table[] =
-{
- {"common", s_comm, 0}, /* is this used? */
- {"comm", s_alpha_comm, 0}, /* osf1 compiler does this */
- {"text", s_alpha_text, 0},
- {"data", s_alpha_data, 0},
- {"rdata", s_rdata, 0},
- {"sdata", s_sdata, 0},
- {"gprel32", s_gprel32, 0},
- {"t_floating", s_alpha_float_cons, 'd'},
- {"s_floating", s_alpha_float_cons, 'f'},
- {"f_floating", s_alpha_float_cons, 'F'},
- {"g_floating", s_alpha_float_cons, 'G'},
- {"d_floating", s_alpha_float_cons, 'D'},
+#define note_gpreg(R) (alpha_gprmask |= (1 << (R)))
+#define note_fpreg(R) (alpha_fprmask |= (1 << (R)))
- {"proc", s_proc, 0},
- {"aproc", s_proc, 1},
- {"set", s_alpha_set, 0},
- {"reguse", s_ignore, 0},
- {"livereg", s_ignore, 0},
- {"base", s_base, 0}, /*??*/
- {"option", s_ignore, 0},
- {"prologue", s_ignore, 0},
- {"aent", s_ignore, 0},
- {"ugen", s_ignore, 0},
+/* Predicates for 16- and 32-bit ranges */
- {"align", s_alpha_align, 0},
- {"byte", s_alpha_cons, 0},
- {"hword", s_alpha_cons, 1},
- {"int", s_alpha_cons, 2},
- {"long", s_alpha_cons, 2},
- {"octa", s_alpha_cons, 4},
- {"quad", s_alpha_cons, 3},
- {"short", s_alpha_cons, 1},
- {"word", s_alpha_cons, 1},
- {"double", s_alpha_float_cons, 'd'},
- {"float", s_alpha_float_cons, 'f'},
- {"single", s_alpha_float_cons, 'f'},
+#define range_signed_16(x) ((offsetT)(x) >= -(offsetT)0x8000 && \
+ (offsetT)(x) <= (offsetT)0x7FFF)
+#define range_signed_32(x) ((offsetT)(x) >= -(offsetT)0x80000000 && \
+ (offsetT)(x) <= (offsetT)0x7FFFFFFF)
-/* We don't do any optimizing, so we can safely ignore these. */
- {"noalias", s_ignore, 0},
- {"alias", s_ignore, 0},
+/* Macros for sign extending from 16- and 32-bits. */
+/* XXX: The cast macros will work on all the systems that I care about,
+ but really a predicate should be found to use the non-cast forms. */
- {NULL, 0, 0},
-};
+#if 1
+#define sign_extend_16(x) ((short)(x))
+#define sign_extend_32(x) ((int)(x))
+#else
+#define sign_extend_16(x) ((offsetT)(((x) & 0xFFFF) ^ 0x8000) - 0x8000)
+#define sign_extend_32(x) ((offsetT)(((x) & 0xFFFFFFFF) \
+ ^ 0x80000000) - 0x80000000)
+#endif
-#define SA 21 /* shift for register Ra */
-#define SB 16 /* shift for register Rb */
-#define SC 0 /* shift for register Rc */
-#define SN 13 /* shift for 8 bit immediate # */
-
-#define T9 23
-#define T10 24
-#define T11 25
-#define T12 26
-#define RA 26 /* note: same as T12 */
-#define PV 27
-#define AT 28
-#define GP 29
-#define SP 30
-#define ZERO 31
-
-#define OPCODE(X) (((X) >> 26) & 0x3f)
-#define OP_FCN(X) (((X) >> 5) & 0x7f)
-
-#ifndef FIRST_32BIT_QUADRANT
-#define FIRST_32BIT_QUADRANT 0
+/* Macros to build tokens */
+
+#define set_tok_reg(t, r) (memset(&(t), 0, sizeof(t)), \
+ (t).X_op = O_register, \
+ (t).X_add_number = (r))
+#define set_tok_preg(t, r) (memset(&(t), 0, sizeof(t)), \
+ (t).X_op = O_pregister, \
+ (t).X_add_number = (r))
+#define set_tok_cpreg(t, r) (memset(&(t), 0, sizeof(t)), \
+ (t).X_op = O_cpregister, \
+ (t).X_add_number = (r))
+#define set_tok_freg(t, r) (memset(&(t), 0, sizeof(t)), \
+ (t).X_op = O_register, \
+ (t).X_add_number = (r)+32)
+#define set_tok_sym(t, s, a) (memset(&(t), 0, sizeof(t)), \
+ (t).X_op = O_symbol, \
+ (t).X_add_symbol = (s), \
+ (t).X_add_number = (a))
+#define set_tok_const(t, n) (memset(&(t), 0, sizeof(t)), \
+ (t).X_op = O_constant, \
+ (t).X_add_number = (n))
+
+\f
+/* Prototypes for all local functions */
+
+static int tokenize_arguments PARAMS((char *, expressionS*, int));
+static const struct alpha_opcode *find_opcode_match
+ PARAMS((const struct alpha_opcode*, const expressionS*, int*, int*));
+static const struct alpha_macro *find_macro_match
+ PARAMS((const struct alpha_macro*, const expressionS*, int*));
+static unsigned insert_operand PARAMS((unsigned, const struct alpha_operand*,
+ offsetT, char *, unsigned));
+static void assemble_insn PARAMS((const struct alpha_opcode*,
+ const expressionS*, int,
+ struct alpha_insn*));
+static void emit_insn PARAMS((struct alpha_insn *));
+static void assemble_tokens_to_insn PARAMS((const char *, const expressionS*,
+ int, struct alpha_insn *));
+static void assemble_tokens PARAMS((const char *, const expressionS*,
+ int, int));
+
+static int load_expression PARAMS((int, const expressionS*, int *,
+ expressionS*));
+
+static void emit_ldgp PARAMS((const expressionS*, int, void*));
+static void emit_division PARAMS((const expressionS*, int, void*));
+static void emit_lda PARAMS((const expressionS*, int, void*));
+static void emit_ir_load PARAMS((const expressionS*, int, void*));
+static void emit_loadstore PARAMS((const expressionS*, int, void*));
+static void emit_jsrjmp PARAMS((const expressionS*, int, void*));
+
+static void s_alpha_text PARAMS((int));
+static void s_alpha_data PARAMS((int));
+#ifndef OBJ_ELF
+static void s_alpha_comm PARAMS((int));
+#endif
+#if defined (OBJ_ECOFF) || defined (OBJ_EVAX)
+static void s_alpha_rdata PARAMS((int));
+#endif
+#ifdef OBJ_ECOFF
+static void s_alpha_sdata PARAMS((int));
+#endif
+#ifdef OBJ_ELF
+static void s_alpha_section PARAMS((int));
#endif
+static void s_alpha_gprel32 PARAMS((int));
+static void s_alpha_float_cons PARAMS((int));
+static void s_alpha_proc PARAMS((int));
+static void s_alpha_set PARAMS((int));
+static void s_alpha_base PARAMS((int));
+static void s_alpha_align PARAMS((int));
+static void s_alpha_stringer PARAMS((int));
+static void s_alpha_space PARAMS((int));
+
+static void create_literal_section PARAMS((const char *, segT*, symbolS**));
+#ifndef OBJ_ELF
+static void select_gp_value PARAMS((void));
+#endif
+static void alpha_align PARAMS((int, char *, symbolS *));
-int first_32bit_quadrant = FIRST_32BIT_QUADRANT;
-int base_register = FIRST_32BIT_QUADRANT ? ZERO : GP;
+\f
+/* Generic assembler global variables which must be defined by all
+ targets. */
-int no_mixed_code = 0;
-int nofloats = 0;
+/* These are exported to relaxing code, even though we don't do any
+ relaxing on this processor currently. */
+int md_short_jump_size = 4;
+int md_long_jump_size = 4;
-/* This array holds the chars that always start a comment. If the
- pre-processor is disabled, these aren't very useful */
+/* Characters which always start a comment. */
const char comment_chars[] = "#";
-/* This array holds the chars that only start a comment at the beginning of
- a line. If the line seems to have the form '# 123 filename'
- .line and .file directives will appear in the pre-processed output */
-/* Note that input_file.c hand checks for '#' at the beginning of the
- first line of the input file. This is because the compiler outputs
- #NO_APP at the beginning of its output. */
-/* Also note that C style comments are always recognized. */
-const char line_comment_chars[] = "#!";
+/* Characters which start a comment at the beginning of a line. */
+const char line_comment_chars[] = "#";
-/* Chars that can be used to separate mant from exp in floating point nums */
-const char EXP_CHARS[] = "eE";
+/* Characters which may be used to separate multiple commands on a
+ single line. */
+const char line_separator_chars[] = ";";
-const char line_separator_chars[1];
+/* Characters which are used to indicate an exponent in a floating
+ point number. */
+const char EXP_CHARS[] = "eE";
-/* Chars that mean this number is a floating point constant, as in
- "0f12.456" or "0d1.2345e12". */
-/* @@ Do all of these really get used on the alpha?? */
+/* Characters which mean that a number is a floating point constant,
+ as in 0d1.0. */
+#if 0
+const char FLT_CHARS[] = "dD";
+#else
+/* XXX: Do all of these really get used on the alpha?? */
char FLT_CHARS[] = "rRsSfFdDxXpP";
+#endif
-/* Also be aware that MAXIMUM_NUMBER_OF_CHARS_FOR_FLOAT may have to be
- changed in read.c. Ideally it shouldn't have to know about it at all,
- but nothing is ideal around here. */
+const char *md_shortopts = "Fm:g";
-struct reloc_data {
- expressionS exp;
- int pcrel;
- bfd_reloc_code_real_type code;
+struct option md_longopts[] = {
+#define OPTION_32ADDR (OPTION_MD_BASE)
+ { "32addr", no_argument, NULL, OPTION_32ADDR },
+ { NULL, no_argument, NULL, 0 }
};
-/* Occasionally, two relocations will be desired for one address.
- Mainly only in cases like "jsr $r,foo" where we want both a LITUSE
- and a HINT reloc. */
-#define MAX_RELOCS 2
+size_t md_longopts_size = sizeof(md_longopts);
-struct alpha_it {
- unsigned long opcode; /* need at least 32 bits */
- struct reloc_data reloc[MAX_RELOCS];
-};
+\f
+/* The cpu for which we are generating code */
+static unsigned alpha_target = AXP_OPCODE_ALL;
+static const char *alpha_target_name = "<all>";
-static void getExpression (char *str, struct alpha_it *insn);
-static char *expr_end;
+/* Forward declaration of the table of macros */
+static const struct alpha_macro alpha_macros[];
+static const int alpha_num_macros;
-#define note_gpreg(R) (alpha_gprmask |= (1 << (R)))
-#define note_fpreg(R) (alpha_fprmask |= (1 << (R)))
+/* The hash table of instruction opcodes */
+static struct hash_control *alpha_opcode_hash;
-int
-tc_get_register (frame)
- int frame;
-{
- int framereg = SP;
+/* The hash table of macro opcodes */
+static struct hash_control *alpha_macro_hash;
- SKIP_WHITESPACE ();
- if (*input_line_pointer == '$')
- {
- input_line_pointer++;
- if (input_line_pointer[0] == 's'
- && input_line_pointer[1] == 'p')
- {
- input_line_pointer += 2;
- framereg = SP;
- }
- else
- framereg = get_absolute_expression ();
- framereg &= 31; /* ? */
- }
- else
- as_warn ("frame reg expected, using $%d.", framereg);
+#ifdef OBJ_ECOFF
+/* The $gp relocation symbol */
+static symbolS *alpha_gp_symbol;
- note_gpreg (framereg);
- return framereg;
-}
+/* XXX: what is this, and why is it exported? */
+valueT alpha_gp_value;
+#endif
-/* Handle the .text pseudo-op. This is like the usual one, but it
- clears insn_label and restores auto alignment. */
+/* The current $gp register */
+static int alpha_gp_register = AXP_REG_GP;
-static void
-s_alpha_text (i)
- int i;
-{
- s_text (i);
- insn_label = NULL;
- auto_align = 1;
-}
+/* A table of the register symbols */
+static symbolS *alpha_register_table[64];
-/* Handle the .data pseudo-op. This is like the usual one, but it
- clears insn_label and restores auto alignment. */
+/* Constant sections, or sections of constants */
+#ifdef OBJ_ECOFF
+static segT alpha_lita_section;
+static segT alpha_lit4_section;
+#endif
+#ifdef OBJ_EVAX
+static segT alpha_link_section;
+#endif
+static segT alpha_lit8_section;
-static void
-s_alpha_data (i)
- int i;
-{
- s_data (i);
- insn_label = NULL;
- auto_align = 1;
-}
+/* Symbols referring to said sections. */
+#ifdef OBJ_ECOFF
+static symbolS *alpha_lita_symbol;
+static symbolS *alpha_lit4_symbol;
+#endif
+#ifdef OBJ_EVAX
+static symbolS *alpha_link_symbol;
+#endif
+static symbolS *alpha_lit8_symbol;
-static void
-s_rdata (ignore)
- int ignore;
-{
- int temp;
+/* Is the assembler not allowed to use $at? */
+static int alpha_noat_on = 0;
- temp = get_absolute_expression ();
-#if 0
- if (!rdata)
- rdata = subseg_get (".rdata", 0);
- subseg_set (rdata, (subsegT) temp);
-#else
- rdata = subseg_new (".rdata", 0);
-#endif
- demand_empty_rest_of_line ();
- insn_label = NULL;
- auto_align = 1;
-}
+/* Are macros enabled? */
+static int alpha_macros_on = 1;
-static void
-s_sdata (ignore)
- int ignore;
-{
- int temp;
+/* Are floats disabled? */
+static int alpha_nofloats_on = 0;
- temp = get_absolute_expression ();
-#if 0
- if (!sdata)
- sdata = subseg_get (".sdata", 0);
- subseg_set (sdata, (subsegT) temp);
-#else
- sdata = subseg_new (".sdata", 0);
+/* Are addresses 32 bit? */
+static int alpha_addr32_on = 0;
+
+/* Symbol labelling the current insn. When the Alpha gas sees
+ foo:
+ .quad 0
+ and the section happens to not be on an eight byte boundary, it
+ will align both the symbol and the .quad to an eight byte boundary. */
+static symbolS *alpha_insn_label;
+
+/* Whether we should automatically align data generation pseudo-ops.
+ .align 0 will turn this off. */
+static int alpha_auto_align_on = 1;
+
+/* The known current alignment of the current section. */
+static int alpha_current_align;
+
+/* These are exported to ECOFF code. */
+unsigned long alpha_gprmask, alpha_fprmask;
+
+#ifdef OBJ_EVAX
+/* Collect information about current procedure here. */
+static evaxProcT alpha_evax_proc;
#endif
- demand_empty_rest_of_line ();
- insn_label = NULL;
- auto_align = 1;
-}
+\f
+/* Public interface functions */
-static void
-s_alpha_comm (ignore)
- int ignore;
+/* This function is called once, at assembler startup time. It sets
+ up all the tables, etc. that the MD part of the assembler will
+ need, that can be determined before arguments are parsed. */
+
+void
+md_begin ()
{
- register char *name;
- register char c;
- register char *p;
- offsetT temp;
- register symbolS *symbolP;
+ unsigned int i = 0;
- name = input_line_pointer;
- c = get_symbol_end ();
- /* just after name is now '\0' */
- p = input_line_pointer;
- *p = c;
- SKIP_WHITESPACE ();
- /* Alpha OSF/1 compiler doesn't provide the comma, gcc does. */
- if (*input_line_pointer == ',')
+ /* Create the opcode hash table */
+
+ alpha_opcode_hash = hash_new ();
+ for (i = 0; i < alpha_num_opcodes; )
{
- input_line_pointer++;
- SKIP_WHITESPACE ();
+ const char *name, *retval;
+
+ name = alpha_opcodes[i].name;
+ retval = hash_insert (alpha_opcode_hash, name, (PTR)&alpha_opcodes[i]);
+ if (retval)
+ as_fatal ("internal error: can't hash opcode `%s': %s", name, retval);
+
+ while (++i < alpha_num_opcodes
+ && (alpha_opcodes[i].name == name
+ || !strcmp (alpha_opcodes[i].name, name)))
+ continue;
}
- if ((temp = get_absolute_expression ()) < 0)
+
+ /* Some opcodes include modifiers of various sorts with a "/mod" syntax,
+ like the architecture manual suggests. However, for use with gcc at
+ least, we also need access to those same opcodes without the "/". */
+ for (i = 0; i < alpha_num_opcodes; )
{
- as_warn (".COMMon length (%ld.) <0! Ignored.", (long) temp);
- ignore_rest_of_line ();
- return;
+ const char *name, *slash;
+ name = alpha_opcodes[i].name;
+ if ((slash = strchr(name, '/')) != NULL)
+ {
+ char *p = xmalloc (strlen (name));
+ memcpy(p, name, slash-name);
+ strcpy(p+(slash-name), slash+1);
+
+ (void)hash_insert(alpha_opcode_hash, p, (PTR)&alpha_opcodes[i]);
+ /* Ignore failures -- the opcode table does duplicate some
+ variants in different forms, like "hw_stq" and "hw_st/q". */
+ }
+
+ while (++i < alpha_num_opcodes
+ && (alpha_opcodes[i].name == name
+ || !strcmp (alpha_opcodes[i].name, name)))
+ continue;
}
- *p = 0;
- symbolP = symbol_find_or_make (name);
- *p = c;
- if (S_IS_DEFINED (symbolP))
+
+ /* Create the macro hash table */
+
+ alpha_macro_hash = hash_new ();
+ for (i = 0; i < alpha_num_macros; )
{
- as_bad ("Ignoring attempt to re-define symbol");
- ignore_rest_of_line ();
- return;
+ const char *name, *retval;
+
+ name = alpha_macros[i].name;
+ retval = hash_insert (alpha_macro_hash, name, (PTR)&alpha_macros[i]);
+ if (retval)
+ as_fatal ("internal error: can't hash macro `%s': %s", name, retval);
+
+ while (++i < alpha_num_macros
+ && (alpha_macros[i].name == name
+ || !strcmp (alpha_macros[i].name, name)))
+ continue;
}
- if (S_GET_VALUE (symbolP))
+
+ /* Construct symbols for each of the registers */
+
+ for (i = 0; i < 32; ++i)
{
- if (S_GET_VALUE (symbolP) != (valueT) temp)
- as_bad ("Length of .comm \"%s\" is already %ld. Not changed to %ld.",
- S_GET_NAME (symbolP),
- (long) S_GET_VALUE (symbolP),
- (long) temp);
+ char name[4];
+ sprintf(name, "$%d", i);
+ alpha_register_table[i] = symbol_create(name, reg_section, i,
+ &zero_address_frag);
}
- else
+ for (; i < 64; ++i)
{
- S_SET_VALUE (symbolP, (valueT) temp);
- S_SET_EXTERNAL (symbolP);
+ char name[5];
+ sprintf(name, "$f%d", i-32);
+ alpha_register_table[i] = symbol_create(name, reg_section, i,
+ &zero_address_frag);
}
- know (symbolP->sy_frag == &zero_address_frag);
- demand_empty_rest_of_line ();
-}
+ /* Create the special symbols and sections we'll be using */
-arelent *
-tc_gen_reloc (sec, fixp)
- asection *sec;
- fixS *fixp;
-{
- arelent *reloc;
+ /* So .sbss will get used for tiny objects. */
+ bfd_set_gp_size (stdoutput, 8);
- reloc = (arelent *) bfd_alloc_by_size_t (stdoutput, sizeof (arelent));
- reloc->sym_ptr_ptr = &fixp->fx_addsy->bsym;
- reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
+#ifdef OBJ_ECOFF
+ create_literal_section (".lita", &alpha_lita_section, &alpha_lita_symbol);
- if (fixp->fx_r_type > BFD_RELOC_UNUSED)
- abort ();
+ /* For handling the GP, create a symbol that won't be output in the
+ symbol table. We'll edit it out of relocs later. */
+ alpha_gp_symbol = symbol_create ("<GP value>", alpha_lita_section, 0x8000,
+ &zero_address_frag);
+#endif
- if (fixp->fx_r_type == BFD_RELOC_ALPHA_GPDISP_HI16)
- {
- if (!gpdisp_hi16_howto)
- gpdisp_hi16_howto = bfd_reloc_type_lookup (stdoutput,
- fixp->fx_r_type);
- reloc->howto = gpdisp_hi16_howto;
- }
- else
- reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
- assert (reloc->howto != 0);
- if (!fixp->fx_pcrel != !reloc->howto->pc_relative)
+#ifdef OBJ_EVAX
+ create_literal_section (".link", &alpha_link_section, &alpha_link_symbol);
+#endif
+
+#ifdef OBJ_ELF
+ if (ECOFF_DEBUGGING)
{
- as_fatal ("internal error? cannot generate `%s' relocation",
- bfd_get_reloc_code_name (fixp->fx_r_type));
+ segT sec;
+
+ sec = subseg_new(".mdebug", (subsegT)0);
+ bfd_set_section_flags(stdoutput, sec, SEC_HAS_CONTENTS|SEC_READONLY);
+ bfd_set_section_alignment(stdoutput, sec, 3);
+
+#ifdef ERIC_neverdef
+ sec = subseg_new(".reginfo", (subsegT)0);
+ /* The ABI says this section should be loaded so that the running
+ program can access it. */
+ bfd_set_section_flags(stdoutput, sec,
+ SEC_ALLOC|SEC_LOAD|SEC_READONLY|SEC_DATA);
+ bfd_set_section_alignement(stdoutput, sec, 3);
+#endif
}
- assert (!fixp->fx_pcrel == !reloc->howto->pc_relative);
+#endif /* OBJ_ELF */
- if (fixp->fx_r_type == BFD_RELOC_ALPHA_LITERAL)
+ subseg_set(text_section, 0);
+}
+
+/* The public interface to the instruction assembler. */
+
+void
+md_assemble (str)
+ char *str;
+{
+ char opname[32]; /* current maximum is 13 */
+ expressionS tok[MAX_INSN_ARGS];
+ int ntok, opnamelen, trunclen;
+
+ /* split off the opcode */
+ opnamelen = strspn (str, "abcdefghijklmnopqrstuvwxyz_/48");
+ trunclen = (opnamelen < sizeof (opname) - 1
+ ? opnamelen
+ : sizeof (opname) - 1);
+ memcpy (opname, str, trunclen);
+ opname[trunclen] = '\0';
+
+ /* tokenize the rest of the line */
+ if ((ntok = tokenize_arguments (str + opnamelen, tok, MAX_INSN_ARGS)) < 0)
+ {
+ as_bad ("syntax error");
+ return;
+ }
+
+ /* finish it off */
+ assemble_tokens (opname, tok, ntok, alpha_macros_on);
+}
+
+/* Round up a section's size to the appropriate boundary. */
+
+valueT
+md_section_align (seg, size)
+ segT seg;
+ valueT size;
+{
+ int align = bfd_get_section_alignment(stdoutput, seg);
+ valueT mask = ((valueT)1 << align) - 1;
+
+ return (size + mask) & ~mask;
+}
+
+/* Turn a string in input_line_pointer into a floating point constant
+ of type type, and store the appropriate bytes in *litP. The number
+ of LITTLENUMS emitted is stored in *sizeP. An error message is
+ returned, or NULL on OK. */
+
+/* Equal to MAX_PRECISION in atof-ieee.c */
+#define MAX_LITTLENUMS 6
+
+char *
+md_atof (type, litP, sizeP)
+ char type;
+ char *litP;
+ int *sizeP;
+{
+ int prec;
+ LITTLENUM_TYPE words[MAX_LITTLENUMS];
+ LITTLENUM_TYPE *wordP;
+ char *t;
+ char *atof_ieee (), *vax_md_atof ();
+
+ switch (type)
+ {
+ /* VAX floats */
+ case 'G':
+ /* VAX md_atof doesn't like "G" for some reason. */
+ type = 'g';
+ case 'F':
+ case 'D':
+ return vax_md_atof (type, litP, sizeP);
+
+ /* IEEE floats */
+ case 'f':
+ prec = 2;
+ break;
+
+ case 'd':
+ prec = 4;
+ break;
+
+ case 'x':
+ case 'X':
+ prec = 6;
+ break;
+
+ case 'p':
+ case 'P':
+ prec = 6;
+ break;
+
+ default:
+ *sizeP = 0;
+ return "Bad call to MD_ATOF()";
+ }
+ t = atof_ieee (input_line_pointer, type, words);
+ if (t)
+ input_line_pointer = t;
+ *sizeP = prec * sizeof (LITTLENUM_TYPE);
+
+ for (wordP = words + prec - 1; prec--;)
+ {
+ md_number_to_chars (litP, (long) (*wordP--), sizeof (LITTLENUM_TYPE));
+ litP += sizeof (LITTLENUM_TYPE);
+ }
+
+ return 0;
+}
+
+/* Take care of the target-specific command-line options. */
+
+int
+md_parse_option (c, arg)
+ int c;
+ char *arg;
+{
+ switch (c)
+ {
+ case 'F':
+ alpha_nofloats_on = 1;
+ break;
+
+ case OPTION_32ADDR:
+ alpha_addr32_on = 1;
+ break;
+
+ case 'g':
+ /* Ignore `-g' so gcc can provide this option to the Digital
+ UNIX assembler, which otherwise would throw away info that
+ mips-tfile needs. */
+ break;
+
+ case 'm':
+ {
+ static const struct machine
+ {
+ const char *name;
+ unsigned flags;
+ } *p, m[] =
+ {
+ { "21064", AXP_OPCODE_EV4|AXP_OPCODE_ALL },
+ { "21066", AXP_OPCODE_EV4|AXP_OPCODE_ALL },
+ { "21164", AXP_OPCODE_EV5|AXP_OPCODE_ALL },
+ { "21164a", AXP_OPCODE_EV56|AXP_OPCODE_ALL },
+ { "ev4", AXP_OPCODE_EV4|AXP_OPCODE_ALL },
+ { "ev45", AXP_OPCODE_EV4|AXP_OPCODE_ALL },
+ { "ev5", AXP_OPCODE_EV5|AXP_OPCODE_ALL },
+ { "ev56", AXP_OPCODE_EV56|AXP_OPCODE_ALL },
+ { "all", AXP_OPCODE_ALL },
+ { 0 }
+ };
+
+ for (p = m; p->name; ++p)
+ if (strcmp(arg, p->name) == 0)
+ {
+ alpha_target_name = p->name, alpha_target = p->flags;
+ goto found;
+ }
+ as_warn("Unknown CPU identifier `%s'", arg);
+ found:;
+ }
+ break;
+
+ default:
+ return 0;
+ }
+
+ return 1;
+}
+
+/* Print a description of the command-line options that we accept. */
+
+void
+md_show_usage (stream)
+ FILE *stream;
+{
+ fputs("\
+Alpha options:\n\
+-32addr treat addresses as 32-bit values\n\
+-F lack floating point instructions support\n\
+-m21064 | -m21066 | -m21164 | -m21164a\n\
+-mev4 | -mev45 | -mev5 | -mev56 | -mall\n\
+ specify variant of Alpha architecture\n",
+ stream);
+}
+
+/* Decide from what point a pc-relative relocation is relative to,
+ relative to the pc-relative fixup. Er, relatively speaking. */
+
+long
+md_pcrel_from (fixP)
+ fixS *fixP;
+{
+ valueT addr = fixP->fx_where + fixP->fx_frag->fr_address;
+ switch (fixP->fx_r_type)
+ {
+ case BFD_RELOC_ALPHA_GPDISP:
+ case BFD_RELOC_ALPHA_GPDISP_HI16:
+ case BFD_RELOC_ALPHA_GPDISP_LO16:
+ return addr;
+ default:
+ return fixP->fx_size + addr;
+ }
+}
+
+/* Attempt to simplify or even eliminate a fixup. The return value is
+ ignored; perhaps it was once meaningful, but now it is historical.
+ To indicate that a fixup has been eliminated, set fixP->fx_done.
+
+ For ELF, here it is that we transform the GPDISP_HI16 reloc we used
+ internally into the GPDISP reloc used externally. We had to do
+ this so that we'd have the GPDISP_LO16 reloc as a tag to compute
+ the distance to the "lda" instruction for setting the addend to
+ GPDISP. */
+
+int
+md_apply_fix (fixP, valueP)
+ fixS *fixP;
+ valueT *valueP;
+{
+ char * const fixpos = fixP->fx_frag->fr_literal + fixP->fx_where;
+ valueT value = *valueP;
+ unsigned image, size;
+
+ switch (fixP->fx_r_type)
+ {
+ /* The GPDISP relocations are processed internally with a symbol
+ referring to the current function; we need to drop in a value
+ which, when added to the address of the start of the function,
+ gives the desired GP. */
+ case BFD_RELOC_ALPHA_GPDISP_HI16:
+ {
+ fixS *next = fixP->fx_next;
+ assert (next->fx_r_type == BFD_RELOC_ALPHA_GPDISP_LO16);
+
+ fixP->fx_offset = (next->fx_frag->fr_address + next->fx_where
+ - fixP->fx_frag->fr_address - fixP->fx_where);
+
+ value = (value - sign_extend_16 (value)) >> 16;
+ }
+#ifdef OBJ_ELF
+ fixP->fx_r_type = BFD_RELOC_ALPHA_GPDISP;
+#endif
+ goto do_reloc_gp;
+
+ case BFD_RELOC_ALPHA_GPDISP_LO16:
+ value = sign_extend_16 (value);
+ fixP->fx_offset = 0;
+#ifdef OBJ_ELF
+ fixP->fx_done = 1;
+#endif
+
+ do_reloc_gp:
+ fixP->fx_addsy = section_symbol (absolute_section);
+ md_number_to_chars (fixpos, value, 2);
+ break;
+
+ case BFD_RELOC_16:
+ size = 2;
+ goto do_reloc_xx;
+ case BFD_RELOC_32:
+ size = 4;
+ goto do_reloc_xx;
+ case BFD_RELOC_64:
+ size = 8;
+ do_reloc_xx:
+ if (fixP->fx_pcrel == 0 && fixP->fx_addsy == 0)
+ {
+ md_number_to_chars (fixpos, value, size);
+ goto done;
+ }
+ return 1;
+
+#ifdef OBJ_ECOFF
+ case BFD_RELOC_GPREL32:
+ assert (fixP->fx_subsy == alpha_gp_symbol);
+ fixP->fx_subsy = 0;
+ /* FIXME: inherited this obliviousness of `value' -- why? */
+ md_number_to_chars (fixpos, -alpha_gp_value, 4);
+ break;
+#endif
+#ifdef OBJ_ELF
+ case BFD_RELOC_GPREL32:
+ return 1;
+#endif
+
+ case BFD_RELOC_23_PCREL_S2:
+ if (fixP->fx_pcrel == 0 && fixP->fx_addsy == 0)
+ {
+ image = bfd_getl32(fixpos);
+ image = (image & ~0x1FFFFF) | ((value >> 2) & 0x1FFFFF);
+ goto write_done;
+ }
+ return 1;
+
+ case BFD_RELOC_ALPHA_HINT:
+ if (fixP->fx_pcrel == 0 && fixP->fx_addsy == 0)
+ {
+ image = bfd_getl32(fixpos);
+ image = (image & ~0x3FFF) | ((value >> 2) & 0x3FFF);
+ goto write_done;
+ }
+ return 1;
+
+#ifdef OBJ_ECOFF
+ case BFD_RELOC_ALPHA_LITERAL:
+ md_number_to_chars (fixpos, value, 2);
+ return 1;
+
+ case BFD_RELOC_ALPHA_LITUSE:
+ return 1;
+#endif
+#ifdef OBJ_ELF
+ case BFD_RELOC_ALPHA_LITERAL:
+ case BFD_RELOC_ALPHA_LITUSE:
+ return 1;
+#endif
+#ifdef OBJ_EVAX
+ case BFD_RELOC_ALPHA_LINKAGE:
+ return 1;
+#endif
+
+ default:
+ {
+ const struct alpha_operand *operand;
+
+ if (fixP->fx_r_type <= BFD_RELOC_UNUSED)
+ as_fatal ("unhandled relocation type %s",
+ bfd_get_reloc_code_name (fixP->fx_r_type));
+
+ assert (fixP->fx_r_type < BFD_RELOC_UNUSED + alpha_num_operands);
+ operand = &alpha_operands[fixP->fx_r_type - BFD_RELOC_UNUSED];
+
+ /* The rest of these fixups only exist internally during symbol
+ resolution and have no representation in the object file.
+ Therefore they must be completely resolved as constants. */
+
+ if (fixP->fx_addsy != 0
+ && fixP->fx_addsy->bsym->section != absolute_section)
+ as_bad_where (fixP->fx_file, fixP->fx_line,
+ "non-absolute expression in constant field");
+
+ image = bfd_getl32(fixpos);
+ image = insert_operand(image, operand, (offsetT)value,
+ fixP->fx_file, fixP->fx_line);
+ }
+ goto write_done;
+ }
+
+ if (fixP->fx_addsy != 0 || fixP->fx_pcrel != 0)
+ return 1;
+ else
+ {
+ as_warn_where(fixP->fx_file, fixP->fx_line,
+ "type %d reloc done?\n", fixP->fx_r_type);
+ goto done;
+ }
+
+write_done:
+ md_number_to_chars(fixpos, image, 4);
+
+done:
+ fixP->fx_done = 1;
+ return 0;
+}
+
+/*
+ * Look for a register name in the given symbol.
+ */
+
+symbolS *
+md_undefined_symbol(name)
+ char *name;
+{
+ if (*name == '$')
+ {
+ int is_float = 0, num;
+
+ switch (*++name)
+ {
+ case 'f':
+ if (name[1] == 'p' && name[2] == '\0')
+ return alpha_register_table[AXP_REG_FP];
+ is_float = 32;
+ /* FALLTHRU */
+
+ case 'r':
+ if (!isdigit(*++name))
+ break;
+ /* FALLTHRU */
+
+ case '0': case '1': case '2': case '3': case '4':
+ case '5': case '6': case '7': case '8': case '9':
+ if (name[1] == '\0')
+ num = name[0] - '0';
+ else if (name[0] != '0' && isdigit(name[1]) && name[2] == '\0')
+ {
+ num = (name[0] - '0')*10 + name[1] - '0';
+ if (num >= 32)
+ break;
+ }
+ else
+ break;
+
+ if (!alpha_noat_on && num == AXP_REG_AT)
+ as_warn("Used $at without \".set noat\"");
+ return alpha_register_table[num + is_float];
+
+ case 'a':
+ if (name[1] == 't' && name[2] == '\0')
+ {
+ if (!alpha_noat_on)
+ as_warn("Used $at without \".set noat\"");
+ return alpha_register_table[AXP_REG_AT];
+ }
+ break;
+
+ case 'g':
+ if (name[1] == 'p' && name[2] == '\0')
+ return alpha_register_table[alpha_gp_register];
+ break;
+
+ case 's':
+ if (name[1] == 'p' && name[2] == '\0')
+ return alpha_register_table[AXP_REG_SP];
+ break;
+ }
+ }
+ return NULL;
+}
+
+#ifdef OBJ_ECOFF
+/* @@@ Magic ECOFF bits. */
+
+void
+alpha_frob_ecoff_data ()
+{
+ select_gp_value ();
+ /* $zero and $f31 are read-only */
+ alpha_gprmask &= ~1;
+ alpha_fprmask &= ~1;
+}
+#endif
+
+/* Hook to remember a recently defined label so that the auto-align
+ code can adjust the symbol after we know what alignment will be
+ required. */
+
+void
+alpha_define_label (sym)
+ symbolS *sym;
+{
+ alpha_insn_label = sym;
+}
+
+/* Return true if we must always emit a reloc for a type and false if
+ there is some hope of resolving it a assembly time. */
+
+int
+alpha_force_relocation (f)
+ fixS *f;
+{
+ switch (f->fx_r_type)
+ {
+ case BFD_RELOC_ALPHA_GPDISP_HI16:
+ case BFD_RELOC_ALPHA_GPDISP_LO16:
+ case BFD_RELOC_ALPHA_GPDISP:
+ case BFD_RELOC_ALPHA_LITERAL:
+ case BFD_RELOC_ALPHA_LITUSE:
+ case BFD_RELOC_GPREL32:
+#ifdef OBJ_EVAX
+ case BFD_RELOC_ALPHA_LINKAGE:
+#endif
+ return 1;
+
+ case BFD_RELOC_23_PCREL_S2:
+ case BFD_RELOC_32:
+ case BFD_RELOC_64:
+ case BFD_RELOC_ALPHA_HINT:
+ return 0;
+
+ default:
+ assert(f->fx_r_type > BFD_RELOC_UNUSED &&
+ f->fx_r_type < BFD_RELOC_UNUSED + alpha_num_operands);
+ return 0;
+ }
+}
+
+/* Return true if we can partially resolve a relocation now. */
+
+int
+alpha_fix_adjustable (f)
+ fixS *f;
+{
+#ifdef OBJ_ELF
+ /* Prevent all adjustments to global symbols */
+ if (S_IS_EXTERN (f->fx_addsy))
+ return 0;
+#endif
+
+ /* Are there any relocation types for which we must generate a reloc
+ but we can adjust the values contained within it? */
+ switch (f->fx_r_type)
+ {
+ case BFD_RELOC_GPREL32:
+ return 1;
+ default:
+ return !alpha_force_relocation (f);
+ }
+ /*NOTREACHED*/
+}
+
+/* Generate the BFD reloc to be stuck in the object file from the
+ fixup used internally in the assembler. */
+
+arelent *
+tc_gen_reloc (sec, fixp)
+ asection *sec;
+ fixS *fixp;
+{
+ arelent *reloc;
+
+ reloc = (arelent *) bfd_alloc_by_size_t (stdoutput, sizeof (arelent));
+ reloc->sym_ptr_ptr = &fixp->fx_addsy->bsym;
+ reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
+
+ /* Make sure none of our internal relocations make it this far.
+ They'd better have been fully resolved by this point. */
+ assert (fixp->fx_r_type < BFD_RELOC_UNUSED);
+
+ reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
+ if (reloc->howto == NULL)
+ {
+ as_bad_where (fixp->fx_file, fixp->fx_line,
+ "cannot represent `%s' relocation in object file",
+ bfd_get_reloc_code_name (fixp->fx_r_type));
+ return NULL;
+ }
+
+ if (!fixp->fx_pcrel != !reloc->howto->pc_relative)
+ {
+ as_fatal ("internal error? cannot generate `%s' relocation",
+ bfd_get_reloc_code_name (fixp->fx_r_type));
+ }
+ assert (!fixp->fx_pcrel == !reloc->howto->pc_relative);
+
+#ifdef OBJ_ECOFF
+ if (fixp->fx_r_type == BFD_RELOC_ALPHA_LITERAL)
+ {
+ /* fake out bfd_perform_relocation. sigh */
+ reloc->addend = -alpha_gp_value;
+ }
+ else
+#endif
+ {
+ reloc->addend = fixp->fx_offset;
+#ifdef OBJ_ELF
+ /*
+ * Ohhh, this is ugly. The problem is that if this is a local global
+ * symbol, the relocation will entirely be performed at link time, not
+ * at assembly time. bfd_perform_reloc doesn't know about this sort
+ * of thing, and as a result we need to fake it out here.
+ */
+ if (S_IS_EXTERN (fixp->fx_addsy) && !S_IS_COMMON(fixp->fx_addsy))
+ reloc->addend -= fixp->fx_addsy->bsym->value;
+#endif
+ }
+
+ return reloc;
+}
+
+/* Parse a register name off of the input_line and return a register
+ number. Gets md_undefined_symbol above to do the register name
+ matching for us.
+
+ Only called as a part of processing the ECOFF .frame directive. */
+
+int
+tc_get_register (frame)
+ int frame;
+{
+ int framereg = AXP_REG_SP;
+
+ SKIP_WHITESPACE ();
+ if (*input_line_pointer == '$')
+ {
+ char *s = input_line_pointer;
+ char c = get_symbol_end ();
+ symbolS *sym = md_undefined_symbol (s);
+
+ *strchr(s, '\0') = c;
+ if (sym && (framereg = S_GET_VALUE (sym)) <= 31)
+ goto found;
+ }
+ as_warn ("frame reg expected, using $%d.", framereg);
+
+found:
+ note_gpreg (framereg);
+ return framereg;
+}
+
+\f
+/* Parse the arguments to an opcode. */
+
+static int
+tokenize_arguments (str, tok, ntok)
+ char *str;
+ expressionS tok[];
+ int ntok;
+{
+ expressionS *end_tok = tok + ntok;
+ char *old_input_line_pointer;
+ int saw_comma = 0, saw_arg = 0;
+
+ memset (tok, 0, sizeof(*tok)*ntok);
+
+ /* Save and restore input_line_pointer around this function */
+ old_input_line_pointer = input_line_pointer;
+ input_line_pointer = str;
+
+ while (tok < end_tok && *input_line_pointer)
+ {
+ SKIP_WHITESPACE ();
+ switch (*input_line_pointer)
+ {
+ case '\0':
+ goto fini;
+
+ case ',':
+ ++input_line_pointer;
+ if (saw_comma || !saw_arg)
+ goto err;
+ saw_comma = 1;
+ break;
+
+ case '(':
+ {
+ char *hold = input_line_pointer++;
+
+ /* First try for parenthesized register ... */
+ expression (tok);
+ if (*input_line_pointer == ')' && tok->X_op == O_register)
+ {
+ tok->X_op = (saw_comma ? O_cpregister : O_pregister);
+ saw_comma = 0;
+ saw_arg = 1;
+ ++input_line_pointer;
+ ++tok;
+ break;
+ }
+
+ /* ... then fall through to plain expression */
+ input_line_pointer = hold;
+ }
+
+ default:
+ if (saw_arg && !saw_comma)
+ goto err;
+ expression (tok);
+ if (tok->X_op == O_illegal || tok->X_op == O_absent)
+ goto err;
+
+ saw_comma = 0;
+ saw_arg = 1;
+ ++tok;
+ break;
+ }
+ }
+
+fini:
+ if (saw_comma)
+ goto err;
+ input_line_pointer = old_input_line_pointer;
+ return ntok - (end_tok - tok);
+
+err:
+ input_line_pointer = old_input_line_pointer;
+ return -1;
+}
+
+/* Search forward through all variants of an opcode looking for a
+ syntax match. */
+
+static const struct alpha_opcode *
+find_opcode_match(first_opcode, tok, pntok, pcpumatch)
+ const struct alpha_opcode *first_opcode;
+ const expressionS *tok;
+ int *pntok;
+ int *pcpumatch;
+{
+ const struct alpha_opcode *opcode = first_opcode;
+ int ntok = *pntok;
+ int got_cpu_match = 0;
+
+ do
+ {
+ const unsigned char *opidx;
+ int tokidx = 0;
+
+ /* Don't match opcodes that don't exist on this architecture */
+ if (!(opcode->flags & alpha_target))
+ goto match_failed;
+
+ got_cpu_match = 1;
+
+ for (opidx = opcode->operands; *opidx; ++opidx)
+ {
+ const struct alpha_operand *operand = &alpha_operands[*opidx];
+
+ /* only take input from real operands */
+ if (operand->flags & AXP_OPERAND_FAKE)
+ continue;
+
+ /* when we expect input, make sure we have it */
+ if (tokidx >= ntok)
+ {
+ if ((operand->flags & AXP_OPERAND_OPTIONAL_MASK) == 0)
+ goto match_failed;
+ continue;
+ }
+
+ /* match operand type with expression type */
+ switch (operand->flags & AXP_OPERAND_TYPECHECK_MASK)
+ {
+ case AXP_OPERAND_IR:
+ if (tok[tokidx].X_op != O_register
+ || !is_ir_num(tok[tokidx].X_add_number))
+ goto match_failed;
+ break;
+ case AXP_OPERAND_FPR:
+ if (tok[tokidx].X_op != O_register
+ || !is_fpr_num(tok[tokidx].X_add_number))
+ goto match_failed;
+ break;
+ case AXP_OPERAND_IR|AXP_OPERAND_PARENS:
+ if (tok[tokidx].X_op != O_pregister
+ || !is_ir_num(tok[tokidx].X_add_number))
+ goto match_failed;
+ break;
+ case AXP_OPERAND_IR|AXP_OPERAND_PARENS|AXP_OPERAND_COMMA:
+ if (tok[tokidx].X_op != O_cpregister
+ || !is_ir_num(tok[tokidx].X_add_number))
+ goto match_failed;
+ break;
+
+ case AXP_OPERAND_RELATIVE:
+ case AXP_OPERAND_SIGNED:
+ case AXP_OPERAND_UNSIGNED:
+ switch (tok[tokidx].X_op)
+ {
+ case O_illegal:
+ case O_absent:
+ case O_register:
+ case O_pregister:
+ case O_cpregister:
+ goto match_failed;
+ }
+ break;
+
+ default:
+ /* everything else should have been fake */
+ abort();
+ }
+ ++tokidx;
+ }
+
+ /* possible match -- did we use all of our input? */
+ if (tokidx == ntok)
+ {
+ *pntok = ntok;
+ return opcode;
+ }
+
+ match_failed:;
+ }
+ while (++opcode-alpha_opcodes < alpha_num_opcodes
+ && !strcmp(opcode->name, first_opcode->name));
+
+ if (*pcpumatch)
+ *pcpumatch = got_cpu_match;
+
+ return NULL;
+}
+
+/* Search forward through all variants of a macro looking for a syntax
+ match. */
+
+static const struct alpha_macro *
+find_macro_match(first_macro, tok, pntok)
+ const struct alpha_macro *first_macro;
+ const expressionS *tok;
+ int *pntok;
+{
+ const struct alpha_macro *macro = first_macro;
+ int ntok = *pntok;
+
+ do
{
- /* fake out bfd_perform_relocation. sigh */
- reloc->addend = -alpha_gp_value;
+ const enum alpha_macro_arg *arg = macro->argsets;
+ int tokidx = 0;
+
+ while (*arg)
+ {
+ switch (*arg)
+ {
+ case MACRO_EOA:
+ if (tokidx == ntok)
+ return macro;
+ else
+ tokidx = 0;
+ break;
+
+ case MACRO_IR:
+ if (tokidx >= ntok || tok[tokidx].X_op != O_register
+ || !is_ir_num(tok[tokidx].X_add_number))
+ goto match_failed;
+ ++tokidx;
+ break;
+ case MACRO_PIR:
+ if (tokidx >= ntok || tok[tokidx].X_op != O_pregister
+ || !is_ir_num(tok[tokidx].X_add_number))
+ goto match_failed;
+ ++tokidx;
+ break;
+ case MACRO_CPIR:
+ if (tokidx >= ntok || tok[tokidx].X_op != O_cpregister
+ || !is_ir_num(tok[tokidx].X_add_number))
+ goto match_failed;
+ ++tokidx;
+ break;
+ case MACRO_FPR:
+ if (tokidx >= ntok || tok[tokidx].X_op != O_register
+ || !is_fpr_num(tok[tokidx].X_add_number))
+ goto match_failed;
+ ++tokidx;
+ break;
+
+ case MACRO_EXP:
+ if (tokidx >= ntok)
+ goto match_failed;
+ switch (tok[tokidx].X_op)
+ {
+ case O_illegal:
+ case O_absent:
+ case O_register:
+ case O_pregister:
+ case O_cpregister:
+ goto match_failed;
+ }
+ ++tokidx;
+ break;
+
+ match_failed:
+ while (*arg != MACRO_EOA)
+ ++arg;
+ tokidx = 0;
+ break;
+ }
+ ++arg;
+ }
+ }
+ while (++macro-alpha_macros < alpha_num_macros
+ && !strcmp(macro->name, first_macro->name));
+
+ return NULL;
+}
+
+/* Insert an operand value into an instruction. */
+
+static unsigned
+insert_operand(insn, operand, val, file, line)
+ unsigned insn;
+ const struct alpha_operand *operand;
+ offsetT val;
+ char *file;
+ unsigned line;
+{
+ if (operand->bits != 32 && !(operand->flags & AXP_OPERAND_NOOVERFLOW))
+ {
+ offsetT min, max;
+
+ if (operand->flags & AXP_OPERAND_SIGNED)
+ {
+ max = (1 << (operand->bits - 1)) - 1;
+ min = -(1 << (operand->bits - 1));
+ }
+ else
+ {
+ max = (1 << operand->bits) - 1;
+ min = 0;
+ }
+
+ if (val < min || val > max)
+ {
+ const char *err =
+ "operand out of range (%s not between %d and %d)";
+ char buf[sizeof(val)*3+2];
+
+ sprint_value(buf, val);
+ if (file)
+ as_warn_where(file, line, err, buf, min, max);
+ else
+ as_warn(err, buf, min, max);
+ }
+ }
+
+ if (operand->insert)
+ {
+ const char *errmsg = NULL;
+
+ insn = (*operand->insert)(insn, val, &errmsg);
+ if (errmsg)
+ as_warn(errmsg);
+ }
+ else
+ insn |= ((val & ((1 << operand->bits) - 1)) << operand->shift);
+
+ return insn;
+}
+
+/*
+ * Turn an opcode description and a set of arguments into
+ * an instruction and a fixup.
+ */
+
+static void
+assemble_insn(opcode, tok, ntok, insn)
+ const struct alpha_opcode *opcode;
+ const expressionS *tok;
+ int ntok;
+ struct alpha_insn *insn;
+{
+ const unsigned char *argidx;
+ unsigned image;
+ int tokidx = 0;
+
+ memset(insn, 0, sizeof(*insn));
+ image = opcode->opcode;
+
+ for (argidx = opcode->operands; *argidx; ++argidx)
+ {
+ const struct alpha_operand *operand = &alpha_operands[*argidx];
+ const expressionS *t;
+
+ if (operand->flags & AXP_OPERAND_FAKE)
+ {
+ /* fake operands take no value and generate no fixup */
+ image = insert_operand(image, operand, 0, NULL, 0);
+ continue;
+ }
+
+ if (tokidx >= ntok)
+ {
+ switch (operand->flags & AXP_OPERAND_OPTIONAL_MASK)
+ {
+ case AXP_OPERAND_DEFAULT_FIRST:
+ t = &tok[0];
+ break;
+ case AXP_OPERAND_DEFAULT_SECOND:
+ t = &tok[1];
+ break;
+ case AXP_OPERAND_DEFAULT_ZERO:
+ {
+ static const expressionS zero_exp = { 0, 0, 0, O_constant, 1 };
+ t = &zero_exp;
+ }
+ break;
+ default:
+ abort();
+ }
+ }
+ else
+ t = &tok[tokidx++];
+
+ switch (t->X_op)
+ {
+ case O_register:
+ case O_pregister:
+ case O_cpregister:
+ image = insert_operand(image, operand, regno(t->X_add_number),
+ NULL, 0);
+ break;
+
+ case O_constant:
+ image = insert_operand(image, operand, t->X_add_number, NULL, 0);
+ break;
+
+ default:
+ {
+ struct alpha_fixup *fixup;
+
+ if (insn->nfixups >= MAX_INSN_FIXUPS)
+ as_fatal("too many fixups");
+
+ fixup = &insn->fixups[insn->nfixups++];
+
+ fixup->exp = *t;
+ fixup->reloc = operand->default_reloc;
+ }
+ break;
+ }
+ }
+
+ insn->insn = image;
+}
+
+/*
+ * Actually output an instruction with its fixup.
+ */
+
+static void
+emit_insn (insn)
+ struct alpha_insn *insn;
+{
+ char *f;
+ int i;
+
+ /* Take care of alignment duties */
+ if (alpha_auto_align_on && alpha_current_align < 2)
+ alpha_align (2, (char *) NULL, alpha_insn_label);
+ if (alpha_current_align > 2)
+ alpha_current_align = 2;
+ alpha_insn_label = NULL;
+
+ /* Write out the instruction. */
+ f = frag_more (4);
+ md_number_to_chars (f, insn->insn, 4);
+
+ /* Apply the fixups in order */
+ for (i = 0; i < insn->nfixups; ++i)
+ {
+ struct alpha_fixup *fixup = &insn->fixups[i];
+ int size, pcrel;
+ fixS *fixP;
+
+ /* Some fixups are only used internally and so have no howto */
+ if (fixup->reloc > BFD_RELOC_UNUSED)
+ size = 4, pcrel = 0;
+#ifdef OBJ_ELF
+ /* These relocation types are only used internally. */
+ else if (fixup->reloc == BFD_RELOC_ALPHA_GPDISP_HI16
+ || fixup->reloc == BFD_RELOC_ALPHA_GPDISP_LO16)
+ {
+ size = 2, pcrel = 0;
+ }
+#endif
+ else
+ {
+ reloc_howto_type *reloc_howto
+ = bfd_reloc_type_lookup (stdoutput, fixup->reloc);
+ assert (reloc_howto);
+
+ size = bfd_get_reloc_size (reloc_howto);
+ pcrel = reloc_howto->pc_relative;
+ }
+ assert (size >= 1 && size <= 4);
+
+ fixP = fix_new_exp (frag_now, f - frag_now->fr_literal, size,
+ &fixup->exp, pcrel, fixup->reloc);
+
+ /* Turn off complaints that the addend is too large for some fixups */
+ switch (fixup->reloc)
+ {
+ case BFD_RELOC_ALPHA_GPDISP_LO16:
+ case BFD_RELOC_ALPHA_LITERAL:
+ case BFD_RELOC_GPREL32:
+ fixP->fx_no_overflow = 1;
+ break;
+ default:
+ break;
+ }
+ }
+}
+
+/* Given an opcode name and a pre-tokenized set of arguments, assemble
+ the insn, but do not emit it.
+
+ Note that this implies no macros allowed, since we can't store more
+ than one insn in an insn structure. */
+
+static void
+assemble_tokens_to_insn(opname, tok, ntok, insn)
+ const char *opname;
+ const expressionS *tok;
+ int ntok;
+ struct alpha_insn *insn;
+{
+ const struct alpha_opcode *opcode;
+
+ /* search opcodes */
+ opcode = (const struct alpha_opcode *) hash_find (alpha_opcode_hash, opname);
+ if (opcode)
+ {
+ int cpumatch;
+ opcode = find_opcode_match (opcode, tok, &ntok, &cpumatch);
+ if (opcode)
+ {
+ assemble_insn (opcode, tok, ntok, insn);
+ return;
+ }
+ else if (cpumatch)
+ as_bad ("inappropriate arguments for opcode `%s'", opname);
+ else
+ as_bad ("opcode `%s' not supported for target %s", opname,
+ alpha_target_name);
+ }
+ else
+ as_bad ("unknown opcode `%s'", opname);
+}
+
+/* Given an opcode name and a pre-tokenized set of arguments, take the
+ opcode all the way through emission. */
+
+static void
+assemble_tokens (opname, tok, ntok, local_macros_on)
+ const char *opname;
+ const expressionS *tok;
+ int ntok;
+ int local_macros_on;
+{
+ int found_something = 0;
+ const struct alpha_opcode *opcode;
+ const struct alpha_macro *macro;
+ int cpumatch = 1;
+
+ /* search macros */
+ if (local_macros_on)
+ {
+ macro = ((const struct alpha_macro *)
+ hash_find (alpha_macro_hash, opname));
+ if (macro)
+ {
+ found_something = 1;
+ macro = find_macro_match (macro, tok, &ntok);
+ if (macro)
+ {
+ (*macro->emit) (tok, ntok, macro->arg);
+ return;
+ }
+ }
+ }
+
+ /* search opcodes */
+ opcode = (const struct alpha_opcode *) hash_find (alpha_opcode_hash, opname);
+ if (opcode)
+ {
+ found_something = 1;
+ opcode = find_opcode_match (opcode, tok, &ntok, &cpumatch);
+ if (opcode)
+ {
+ struct alpha_insn insn;
+ assemble_insn (opcode, tok, ntok, &insn);
+ emit_insn (&insn);
+ return;
+ }
+ }
+
+ if (found_something)
+ if (cpumatch)
+ as_bad ("inappropriate arguments for opcode `%s'", opname);
+ else
+ as_bad ("opcode `%s' not supported for target %s", opname,
+ alpha_target_name);
+ else
+ as_bad ("unknown opcode `%s'", opname);
+}
+
+\f
+/* Some instruction sets indexed by lg(size) */
+static const char * const sextX_op[] = { "sextb", "sextw", "sextl", NULL };
+static const char * const insXl_op[] = { "insbl", "inswl", "insll", "insql" };
+static const char * const insXh_op[] = { NULL, "inswh", "inslh", "insqh" };
+static const char * const extXl_op[] = { "extbl", "extwl", "extll", "extql" };
+static const char * const extXh_op[] = { NULL, "extwh", "extlh", "extqh" };
+static const char * const mskXl_op[] = { "mskbl", "mskwl", "mskll", "mskql" };
+static const char * const mskXh_op[] = { NULL, "mskwh", "msklh", "mskqh" };
+
+/* Implement the ldgp macro. */
+
+static void
+emit_ldgp (tok, ntok, unused)
+ const expressionS *tok;
+ int ntok;
+ void *unused;
+{
+#ifdef OBJ_AOUT
+FIXME
+#endif
+#if defined(OBJ_ECOFF) || defined(OBJ_ELF)
+ /* from "ldgp r1,n(r2)", generate "ldah r1,X(R2); lda r1,Y(r1)"
+ with appropriate constants and relocations. */
+ struct alpha_insn insn;
+ expressionS newtok[3];
+ expressionS addend;
+
+ /* We're going to need this symbol in md_apply_fix(). */
+ (void) section_symbol (absolute_section);
+
+#ifdef OBJ_ECOFF
+ if (regno (tok[2].X_add_number) == AXP_REG_PV)
+ ecoff_set_gp_prolog_size (0);
+#endif
+
+ newtok[0] = tok[0];
+ set_tok_const (newtok[1], 0);
+ newtok[2] = tok[2];
+
+ assemble_tokens_to_insn ("ldah", newtok, 3, &insn);
+
+ addend = tok[1];
+
+#ifdef OBJ_ECOFF
+ assert (addend.X_op == O_constant);
+ addend.X_op = O_symbol;
+ addend.X_add_symbol = alpha_gp_symbol;
+#endif
+
+ insn.nfixups = 1;
+ insn.fixups[0].exp = addend;
+ insn.fixups[0].reloc = BFD_RELOC_ALPHA_GPDISP_HI16;
+
+ emit_insn (&insn);
+
+ set_tok_preg (newtok[2], tok[0].X_add_number);
+
+ assemble_tokens_to_insn ("lda", newtok, 3, &insn);
+
+#ifdef OBJ_ECOFF
+ addend.X_add_number += 4;
+#endif
+
+ insn.nfixups = 1;
+ insn.fixups[0].exp = addend;
+ insn.fixups[0].reloc = BFD_RELOC_ALPHA_GPDISP_LO16;
+
+ emit_insn (&insn);
+#endif /* OBJ_ECOFF || OBJ_ELF */
+}
+
+#ifdef OBJ_EVAX
+
+/* Add symbol+addend to link pool.
+ Return offset from basesym to entry in link pool.
+
+ Add new fixup only if offset isn't 16bit. */
+
+valueT
+add_to_link_pool (basesym, sym, addend)
+ symbolS *basesym;
+ symbolS *sym;
+ offsetT addend;
+{
+ segT current_section = now_seg;
+ int current_subsec = now_subseg;
+ valueT offset;
+ bfd_reloc_code_real_type reloc_type;
+ char *p;
+ segment_info_type *seginfo = seg_info (alpha_link_section);
+ fixS *fixp;
+
+ offset = -basesym->sy_obj;
+
+ /* @@ This assumes all entries in a given section will be of the same
+ size... Probably correct, but unwise to rely on. */
+ /* This must always be called with the same subsegment. */
+
+ if (seginfo->frchainP)
+ for (fixp = seginfo->frchainP->fix_root;
+ fixp != (fixS *) NULL;
+ fixp = fixp->fx_next, offset += 8)
+ {
+ if (fixp->fx_addsy == sym && fixp->fx_offset == addend)
+ {
+ if (range_signed_16 (offset))
+ {
+ return offset;
+ }
+ }
+ }
+
+ /* Not found in 16bit signed range. */
+
+ subseg_set (alpha_link_section, 0);
+ p = frag_more (8);
+ memset (p, 0, 8);
+
+ fix_new (frag_now, p - frag_now->fr_literal, 8, sym, addend, 0,
+ BFD_RELOC_64);
+
+ subseg_set (current_section, current_subsec);
+ seginfo->literal_pool_size += 8;
+ return offset;
+}
+
+#endif /* OBJ_EVAX */
+
+/* Load a (partial) expression into a target register.
+
+ If poffset is not null, after the call it will either contain
+ O_constant 0, or a 16-bit offset appropriate for any MEM format
+ instruction. In addition, pbasereg will be modified to point to
+ the base register to use in that MEM format instruction.
+
+ In any case, *pbasereg should contain a base register to add to the
+ expression. This will normally be either AXP_REG_ZERO or
+ alpha_gp_register. Symbol addresses will always be loaded via $gp,
+ so "foo($0)" is interpreted as adding the address of foo to $0;
+ i.e. "ldq $targ, LIT($gp); addq $targ, $0, $targ". Odd, perhaps,
+ but this is what OSF/1 does.
+
+ Finally, the return value is true if the calling macro may emit a
+ LITUSE reloc if otherwise appropriate. */
+
+static int
+load_expression (targreg, exp, pbasereg, poffset)
+ int targreg;
+ const expressionS *exp;
+ int *pbasereg;
+ expressionS *poffset;
+{
+ int emit_lituse = 0;
+ offsetT addend = exp->X_add_number;
+ int basereg = *pbasereg;
+ struct alpha_insn insn;
+ expressionS newtok[3];
+
+ switch (exp->X_op)
+ {
+ case O_symbol:
+ {
+#ifdef OBJ_ECOFF
+ offsetT lit;
+
+ /* attempt to reduce .lit load by splitting the offset from
+ its symbol when possible, but don't create a situation in
+ which we'd fail. */
+ if (!range_signed_32 (addend) &&
+ (alpha_noat_on || targreg == AXP_REG_AT))
+ {
+ lit = add_to_literal_pool (exp->X_add_symbol, addend,
+ alpha_lita_section, 8);
+ addend = 0;
+ }
+ else
+ {
+ lit = add_to_literal_pool (exp->X_add_symbol, 0,
+ alpha_lita_section, 8);
+ }
+
+ if (lit >= 0x8000)
+ as_fatal ("overflow in literal (.lita) table");
+
+ /* emit "ldq r, lit(gp)" */
+
+ if (basereg != alpha_gp_register && targreg == basereg)
+ {
+ if (alpha_noat_on)
+ as_bad ("macro requires $at register while noat in effect");
+ if (targreg == AXP_REG_AT)
+ as_bad ("macro requires $at while $at in use");
+
+ set_tok_reg (newtok[0], AXP_REG_AT);
+ }
+ else
+ set_tok_reg (newtok[0], targreg);
+ set_tok_sym (newtok[1], alpha_lita_symbol, lit);
+ set_tok_preg (newtok[2], alpha_gp_register);
+
+ assemble_tokens_to_insn ("ldq", newtok, 3, &insn);
+
+ assert (insn.nfixups == 1);
+ insn.fixups[0].reloc = BFD_RELOC_ALPHA_LITERAL;
+#endif /* OBJ_ECOFF */
+#ifdef OBJ_ELF
+ /* emit "ldq r, gotoff(gp)" */
+
+ if (basereg != alpha_gp_register && targreg == basereg)
+ {
+ if (alpha_noat_on)
+ as_bad ("macro requires $at register while noat in effect");
+ if (targreg == AXP_REG_AT)
+ as_bad ("macro requires $at while $at in use");
+
+ set_tok_reg (newtok[0], AXP_REG_AT);
+ }
+ else
+ set_tok_reg (newtok[0], targreg);
+
+ if (!range_signed_32 (addend)
+ && (alpha_noat_on || targreg == AXP_REG_AT))
+ {
+ newtok[1] = *exp;
+ addend = 0;
+ }
+ else
+ {
+ set_tok_sym (newtok[1], exp->X_add_symbol, 0);
+ }
+
+ set_tok_preg (newtok[2], alpha_gp_register);
+
+ assemble_tokens_to_insn ("ldq", newtok, 3, &insn);
+
+ assert (insn.nfixups == 1);
+ insn.fixups[0].reloc = BFD_RELOC_ALPHA_LITERAL;
+#endif /* OBJ_ELF */
+#ifdef OBJ_EVAX
+ offsetT link;
+
+ /* Find symbol or symbol pointer in link section. */
+
+ if (exp->X_add_symbol == alpha_evax_proc.symbol)
+ {
+ if (range_signed_16 (addend))
+ {
+ set_tok_reg (newtok[0], targreg);
+ set_tok_const (newtok[1], addend);
+ set_tok_preg (newtok[2], basereg);
+ assemble_tokens_to_insn ("lda", newtok, 3, &insn);
+ addend = 0;
+ }
+ else
+ {
+ set_tok_reg (newtok[0], targreg);
+ set_tok_const (newtok[1], 0);
+ set_tok_preg (newtok[2], basereg);
+ assemble_tokens_to_insn ("lda", newtok, 3, &insn);
+ }
+ }
+ else
+ {
+ if (!range_signed_32 (addend))
+ {
+ link = add_to_link_pool (alpha_evax_proc.symbol,
+ exp->X_add_symbol, addend);
+ addend = 0;
+ }
+ else
+ {
+ link = add_to_link_pool (alpha_evax_proc.symbol,
+ exp->X_add_symbol, 0);
+ }
+ set_tok_reg (newtok[0], targreg);
+ set_tok_const (newtok[1], link);
+ set_tok_preg (newtok[2], basereg);
+ assemble_tokens_to_insn ("ldq", newtok, 3, &insn);
+ }
+#endif /* OBJ_EVAX */
+
+ emit_insn(&insn);
+#ifndef OBJ_EVAX
+ emit_lituse = 1;
+
+ if (basereg != alpha_gp_register && basereg != AXP_REG_ZERO)
+ {
+ /* emit "addq r, base, r" */
+
+ set_tok_reg (newtok[1], basereg);
+ set_tok_reg (newtok[2], targreg);
+ assemble_tokens ("addq", newtok, 3, 0);
+ }
+#endif
+ basereg = targreg;
+ }
+ break;
+
+ case O_constant:
+ break;
+
+ case O_subtract:
+ /* Assume that this difference expression will be resolved to an
+ absolute value and that that value will fit in 16 bits. */
+
+ set_tok_reg (newtok[0], targreg);
+ newtok[1] = *exp;
+ set_tok_preg (newtok[2], basereg);
+ assemble_tokens ("lda", newtok, 3, 0);
+
+ if (poffset)
+ set_tok_const (*poffset, 0);
+ return 0;
+
+ default:
+ abort();
+ }
+
+ if (!range_signed_32 (addend))
+ {
+ offsetT lit;
+
+ /* for 64-bit addends, just put it in the literal pool */
+
+#ifdef OBJ_EVAX
+
+ /* emit "ldq targreg, lit(basereg)" */
+ lit = add_to_link_pool (alpha_evax_proc.symbol,
+ section_symbol (absolute_section), addend);
+ set_tok_reg (newtok[0], targreg);
+ set_tok_const (newtok[1], lit);
+ set_tok_preg (newtok[2], alpha_gp_register);
+ assemble_tokens ("ldq", newtok, 3, 0);
+
+#else
+
+ if (alpha_lit8_section == NULL)
+ {
+ create_literal_section (".lit8",
+ &alpha_lit8_section,
+ &alpha_lit8_symbol);
+ }
+
+ lit = add_to_literal_pool (NULL, addend, alpha_lit8_section, 8) - 0x8000;
+ if (lit >= 0x8000)
+ as_fatal ("overflow in literal (.lit8) table");
+
+ /* emit "ldq litreg, .lit8+lit" */
+
+ if (targreg == basereg)
+ {
+ if (alpha_noat_on)
+ as_bad ("macro requires $at register while noat in effect");
+ if (targreg == AXP_REG_AT)
+ as_bad ("macro requires $at while $at in use");
+
+ set_tok_reg (newtok[0], AXP_REG_AT);
+ }
+ else
+ set_tok_reg (newtok[0], targreg);
+ set_tok_sym (newtok[1], alpha_lit8_symbol, lit);
+
+ assemble_tokens ("ldq", newtok, 2, 1); /* note this does recurse */
+
+ /* emit "addq litreg, base, target" */
+
+ if (basereg != AXP_REG_ZERO)
+ {
+ set_tok_reg (newtok[1], basereg);
+ set_tok_reg (newtok[2], targreg);
+ assemble_tokens ("addq", newtok, 3, 0);
+ }
+#endif /* !OBJ_EVAX */
+
+ if (poffset)
+ set_tok_const (*poffset, 0);
+ *pbasereg = targreg;
}
- else if (reloc->howto->pc_relative && reloc->howto->pcrel_offset)
+ else
{
- reloc->addend = fixp->fx_offset - reloc->address;
+ offsetT low, high, extra, tmp;
+
+ /* for 32-bit operands, break up the addend */
+
+ low = sign_extend_16 (addend);
+ tmp = addend - low;
+ high = sign_extend_16 (tmp >> 16);
+
+ if (tmp - (high << 16))
+ {
+ extra = 0x4000;
+ tmp -= 0x40000000;
+ high = sign_extend_16 (tmp >> 16);
+ }
+ else
+ extra = 0;
+
+ set_tok_reg (newtok[0], targreg);
+ set_tok_preg (newtok[2], basereg);
+
+ if (extra)
+ {
+ /* emit "ldah r, extra(r) */
+ set_tok_const (newtok[1], extra);
+ assemble_tokens ("ldah", newtok, 3, 0);
+ set_tok_preg (newtok[2], basereg = targreg);
+ }
+
+ if (high)
+ {
+ /* emit "ldah r, high(r) */
+ set_tok_const (newtok[1], high);
+ assemble_tokens ("ldah", newtok, 3, 0);
+ basereg = targreg;
+ set_tok_preg (newtok[2], basereg);
+ }
+
+ if ((low && !poffset) || (!poffset && basereg != targreg))
+ {
+ /* emit "lda r, low(base)" */
+ set_tok_const (newtok[1], low);
+ assemble_tokens ("lda", newtok, 3, 0);
+ basereg = targreg;
+ low = 0;
+ }
+
+ if (poffset)
+ set_tok_const (*poffset, low);
+ *pbasereg = basereg;
}
- else
- reloc->addend = fixp->fx_offset;
- return reloc;
+
+ return emit_lituse;
}
+/* The lda macro differs from the lda instruction in that it handles
+ most simple expressions, particualrly symbol address loads and
+ large constants. */
+
static void
-s_base ()
+emit_lda (tok, ntok, unused)
+ const expressionS *tok;
+ int ntok;
+ void *unused;
{
- if (first_32bit_quadrant)
- {
- /* not fatal, but it might not work in the end */
- as_warn ("File overrides no-base-register option.");
- first_32bit_quadrant = 0;
- }
+ int basereg;
- SKIP_WHITESPACE ();
- if (*input_line_pointer == '$')
- { /* $rNN form */
- input_line_pointer++;
- if (*input_line_pointer == 'r')
- input_line_pointer++;
- }
+ if (ntok == 2)
+ basereg = (tok[1].X_op == O_constant ? AXP_REG_ZERO : alpha_gp_register);
+ else
+ basereg = tok[2].X_add_number;
- base_register = get_absolute_expression ();
- if (base_register < 0 || base_register > 31)
- {
- base_register = GP;
- as_warn ("Bad base register, using $%d.", base_register);
- }
- demand_empty_rest_of_line ();
+ (void) load_expression (tok[0].X_add_number, &tok[1], &basereg, NULL);
}
-static int in_range_signed (val, nbits)
- bfd_vma val;
- int nbits;
+/* The ldah macro differs from the ldah instruction in that it has $31
+ as an implied base register. */
+
+static void
+emit_ldah (tok, ntok, unused)
+ const expressionS *tok;
+ int ntok;
+ void *unused;
{
- /* Look at top bit of value that would be stored, figure out how it
- would be extended by the hardware, and see if that matches the
- original supplied value. */
- bfd_vma mask;
- bfd_vma one = 1;
- bfd_vma top_bit, stored_value, missing_bits;
+ expressionS newtok[3];
- mask = (one << nbits) - 1;
- stored_value = val & mask;
- top_bit = stored_value & (one << (nbits - 1));
- missing_bits = val & ~mask;
- /* will sign-extend */
- if (top_bit)
- {
- /* all remaining bits beyond mask should be one */
- missing_bits |= mask;
- return missing_bits + 1 == 0;
- }
- else
- {
- /* all other bits should be zero */
- return missing_bits == 0;
- }
-}
+ newtok[0] = tok[0];
+ newtok[1] = tok[1];
+ set_tok_preg (newtok[2], AXP_REG_ZERO);
-#if 0
-static int in_range_unsigned (val, nbits)
- bfd_vma val;
- int nbits;
-{
- /* Look at top bit of value that would be stored, figure out how it
- would be extended by the hardware, and see if that matches the
- original supplied value. */
- bfd_vma mask;
- bfd_vma one = 1;
- bfd_vma top_bit, stored_value, missing_bits;
-
- mask = (one << nbits) - 1;
- stored_value = val & mask;
- top_bit = stored_value & (one << nbits - 1);
- missing_bits = val & ~mask;
- return missing_bits == 0;
+ assemble_tokens ("ldah", newtok, 3, 0);
}
-#endif
+
+/* Handle all "simple" integer register loads -- ldq, ldq_l, ldq_u,
+ etc. They differ from the real instructions in that they do simple
+ expressions like the lda macro. */
static void
-s_gprel32 ()
+emit_ir_load (tok, ntok, opname)
+ const expressionS *tok;
+ int ntok;
+ void *opname;
{
- expressionS e;
- char *p;
+ int basereg, lituse;
+ expressionS newtok[3];
+ struct alpha_insn insn;
- SKIP_WHITESPACE ();
- expression (&e);
- switch (e.X_op)
+ if (ntok == 2)
+ basereg = (tok[1].X_op == O_constant ? AXP_REG_ZERO : alpha_gp_register);
+ else
+ basereg = tok[2].X_add_number;
+
+ lituse = load_expression (tok[0].X_add_number, &tok[1], &basereg,
+ &newtok[1]);
+
+ newtok[0] = tok[0];
+ set_tok_preg (newtok[2], basereg);
+
+ assemble_tokens_to_insn ((const char *)opname, newtok, 3, &insn);
+
+ if (lituse)
{
- case O_constant:
- e.X_add_symbol = section_symbol (absolute_section);
- /* fall through */
- case O_symbol:
- e.X_op = O_subtract;
- e.X_op_symbol = gp;
- break;
- default:
- abort ();
+ assert (insn.nfixups < MAX_INSN_FIXUPS);
+ if (insn.nfixups > 0)
+ {
+ memmove (&insn.fixups[1], &insn.fixups[0],
+ sizeof(struct alpha_fixup) * insn.nfixups);
+ }
+ insn.nfixups++;
+ insn.fixups[0].reloc = BFD_RELOC_ALPHA_LITUSE;
+ insn.fixups[0].exp.X_op = O_constant;
+ insn.fixups[0].exp.X_add_number = 1;
}
- if (auto_align)
- alpha_align (2, 0, insn_label);
- p = frag_more (4);
- memset (p, 0, 4);
- fix_new_exp (frag_now, p - frag_now->fr_literal, 4, &e, 0,
- BFD_RELOC_GPREL32);
- insn_label = NULL;
+
+ emit_insn (&insn);
}
+/* Handle fp register loads, and both integer and fp register stores.
+ Again, we handle simple expressions. */
+
static void
-create_literal_section (secp, name)
- segT *secp;
- const char *name;
+emit_loadstore (tok, ntok, opname)
+ const expressionS *tok;
+ int ntok;
+ void *opname;
{
- segT current_section = now_seg;
- int current_subsec = now_subseg;
- segT new_sec;
+ int basereg, lituse;
+ expressionS newtok[3];
+ struct alpha_insn insn;
+
+ if (ntok == 2)
+ basereg = (tok[1].X_op == O_constant ? AXP_REG_ZERO : alpha_gp_register);
+ else
+ basereg = tok[2].X_add_number;
- *secp = new_sec = subseg_new (name, 0);
- subseg_set (current_section, current_subsec);
- bfd_set_section_alignment (stdoutput, new_sec, 3);
- bfd_set_section_flags (stdoutput, new_sec,
- SEC_RELOC | SEC_ALLOC | SEC_LOAD | SEC_READONLY
- | SEC_DATA);
-}
+ if (tok[1].X_op != O_constant || !range_signed_16(tok[1].X_add_number))
+ {
+ if (alpha_noat_on)
+ as_bad ("macro requires $at register while noat in effect");
-static valueT
-get_lit8_offset (val)
- bfd_vma val;
-{
- valueT retval;
- if (lit8_sec == 0)
+ lituse = load_expression (AXP_REG_AT, &tok[1], &basereg, &newtok[1]);
+ }
+ else
{
- create_literal_section (&lit8_sec, ".lit8");
- lit8_sym = section_symbol (lit8_sec);
+ newtok[1] = tok[1];
+ lituse = 0;
}
- retval = add_to_literal_pool ((symbolS *) 0, val, lit8_sec, 8);
- if (retval >= 0xfff0)
- as_fatal ("overflow in fp literal (.lit8) table");
- return retval;
-}
-static valueT
-get_lit4_offset (val)
- bfd_vma val;
-{
- valueT retval;
- if (lit4_sec == 0)
+ newtok[0] = tok[0];
+ set_tok_preg (newtok[2], basereg);
+
+ assemble_tokens_to_insn ((const char *)opname, newtok, 3, &insn);
+
+ if (lituse)
{
- create_literal_section (&lit4_sec, ".lit4");
- lit4_sym = section_symbol (lit4_sec);
+ assert (insn.nfixups < MAX_INSN_FIXUPS);
+ if (insn.nfixups > 0)
+ {
+ memmove (&insn.fixups[1], &insn.fixups[0],
+ sizeof(struct alpha_fixup) * insn.nfixups);
+ }
+ insn.nfixups++;
+ insn.fixups[0].reloc = BFD_RELOC_ALPHA_LITUSE;
+ insn.fixups[0].exp.X_op = O_constant;
+ insn.fixups[0].exp.X_add_number = 1;
}
- retval = add_to_literal_pool ((symbolS *) 0, val, lit4_sec, 4);
- if (retval >= 0xfff0)
- as_fatal ("overflow in fp literal (.lit4) table");
- return retval;
+
+ emit_insn (&insn);
}
-static struct alpha_it clear_insn;
+/* Load a half-word or byte as an unsigned value. */
-/* This function is called once, at assembler startup time. It should
- set up all the tables, etc. that the MD part of the assembler will
- need, that can be determined before arguments are parsed. */
-void
-md_begin ()
+static void
+emit_ldXu (tok, ntok, vlgsize)
+ const expressionS *tok;
+ int ntok;
+ void *vlgsize;
{
- const char *retval, *name;
- unsigned int i = 0;
-
- op_hash = hash_new ();
-
- for (i = 0; i < NUMOPCODES; )
- {
- const char *name = alpha_opcodes[i].name;
- retval = hash_insert (op_hash, name, (PTR) &alpha_opcodes[i]);
- if (retval)
- as_fatal ("internal error: can't hash opcode `%s': %s",
- name, retval);
+ expressionS newtok[3];
- do
- i++;
- while (i < NUMOPCODES
- && (alpha_opcodes[i].name == name
- || !strcmp (alpha_opcodes[i].name, name)));
- }
- /* Some opcodes include modifiers of various sorts with a "/mod"
- syntax, like the architecture documentation suggests. However,
- for use with gcc at least, we also need to access those same
- opcodes without the "/". */
- for (i = 0; i < NUMOPCODES; )
- {
- name = alpha_opcodes[i].name;
+ if (alpha_noat_on)
+ as_bad ("macro requires $at register while noat in effect");
+
+ /* emit "lda $at, exp" */
- if (strchr (name, '/'))
- {
- char *p = xmalloc (strlen (name));
- const char *q = name;
- char *q2 = p;
+ memcpy (newtok, tok, sizeof(expressionS)*ntok);
+ newtok[0].X_add_number = AXP_REG_AT;
+ assemble_tokens ("lda", newtok, ntok, 1);
- for (; *q; q++)
- if (*q != '/')
- *q2++ = *q;
+ /* emit "ldq_u targ, 0($at)" */
- *q2++ = 0;
- retval = hash_insert (op_hash, p, (PTR) &alpha_opcodes[i]);
- /* Ignore failures -- the opcode table does duplicate some
- variants in different forms, like "hw_stq" and "hw_st/q".
- Maybe the variants can be eliminated, and this error
- checking restored. */
- }
+ newtok[0] = tok[0];
+ set_tok_const (newtok[1], 0);
+ set_tok_preg (newtok[2], AXP_REG_AT);
+ assemble_tokens ("ldq_u", newtok, 3, 1);
- do
- i++;
- while (i < NUMOPCODES
- && (alpha_opcodes[i].name == name
- || !strcmp (alpha_opcodes[i].name, name)));
- }
+ /* emit "extXl targ, $at, targ" */
- lituse_basereg.X_op = O_constant;
- lituse_basereg.X_add_number = 1;
- lituse_byteoff.X_op = O_constant;
- lituse_byteoff.X_add_number = 2;
- lituse_jsr.X_op = O_constant;
- lituse_jsr.X_add_number = 3;
+ set_tok_reg (newtok[1], AXP_REG_AT);
+ newtok[2] = newtok[0];
+ assemble_tokens (extXl_op[(long)vlgsize], newtok, 3, 1);
+}
- /* So .sbss will get used for tiny objects. */
- bfd_set_gp_size (stdoutput, 8);
- create_literal_section (&lita_sec, ".lita");
- /* For handling the GP, create a symbol that won't be output in the
- symbol table. We'll edit it out of relocs later. */
- gp = symbol_create ("<GP value>", lita_sec, 0x8000, &zero_address_frag);
+/* Load a half-word or byte as a signed value. */
- memset (&clear_insn, 0, sizeof (clear_insn));
- for (i = 0; i < MAX_RELOCS; i++)
- clear_insn.reloc[i].code = BFD_RELOC_NONE;
+static void
+emit_ldX (tok, ntok, vlgsize)
+ const expressionS *tok;
+ int ntok;
+ void *vlgsize;
+{
+ emit_ldXu (tok, ntok, vlgsize);
+ assemble_tokens (sextX_op[(long)vlgsize], tok, 1, 1);
}
-int optnum = 1;
+/* Load an integral value from an unaligned address as an unsigned
+ value. */
static void
-emit_insn (insn)
- struct alpha_it *insn;
+emit_uldXu (tok, ntok, vlgsize)
+ const expressionS *tok;
+ int ntok;
+ void *vlgsize;
{
- char *toP;
- int j;
+ long lgsize = (long)vlgsize;
+ expressionS newtok[3];
- toP = frag_more (4);
+ if (alpha_noat_on)
+ as_bad ("macro requires $at register while noat in effect");
- /* put out the opcode */
- md_number_to_chars (toP, insn->opcode, 4);
+ /* emit "lda $at, exp" */
- /* put out the symbol-dependent stuff */
- for (j = 0; j < MAX_RELOCS; j++)
- {
- struct reloc_data *r = &insn->reloc[j];
- fixS *f;
+ memcpy (newtok, tok, sizeof(expressionS)*ntok);
+ newtok[0].X_add_number = AXP_REG_AT;
+ assemble_tokens ("lda", newtok, ntok, 1);
- if (r->code != BFD_RELOC_NONE)
- {
- if (r->exp.X_op == O_constant)
- {
- r->exp.X_add_symbol = section_symbol (absolute_section);
- r->exp.X_op = O_symbol;
- }
- f = fix_new_exp (frag_now, (toP - frag_now->fr_literal), 4,
- &r->exp, r->pcrel, r->code);
- if (r->code == BFD_RELOC_ALPHA_GPDISP_LO16)
- {
- static bit_fixS cookie;
- /* @@ This'll make the range checking in write.c shut up. */
- f->fx_bit_fixP = &cookie;
- }
- }
- }
+ /* emit "ldq_u $t9, 0($at)" */
+
+ set_tok_reg (newtok[0], AXP_REG_T9);
+ set_tok_const (newtok[1], 0);
+ set_tok_preg (newtok[2], AXP_REG_AT);
+ assemble_tokens ("ldq_u", newtok, 3, 1);
+
+ /* emit "ldq_u $t10, size-1($at)" */
+
+ set_tok_reg (newtok[0], AXP_REG_T10);
+ set_tok_const (newtok[1], (1<<lgsize)-1);
+ assemble_tokens ("ldq_u", newtok, 3, 1);
+
+ /* emit "extXl $t9, $at, $t9" */
+
+ set_tok_reg (newtok[0], AXP_REG_T9);
+ set_tok_reg (newtok[1], AXP_REG_AT);
+ set_tok_reg (newtok[2], AXP_REG_T9);
+ assemble_tokens (extXl_op[lgsize], newtok, 3, 1);
+
+ /* emit "extXh $t10, $at, $t10" */
+
+ set_tok_reg (newtok[0], AXP_REG_T10);
+ set_tok_reg (newtok[2], AXP_REG_T10);
+ assemble_tokens (extXh_op[lgsize], newtok, 3, 1);
- insn_label = NULL;
+ /* emit "or $t9, $t10, targ" */
+
+ set_tok_reg (newtok[0], AXP_REG_T9);
+ set_tok_reg (newtok[1], AXP_REG_T10);
+ newtok[2] = tok[0];
+ assemble_tokens ("or", newtok, 3, 1);
}
+
+/* Load an integral value from an unaligned address as a signed value.
+ Note that quads should get funneled to the unsigned load since we
+ don't have to do the sign extension. */
-void
-md_assemble (str)
- char *str;
+static void
+emit_uldX (tok, ntok, vlgsize)
+ const expressionS *tok;
+ int ntok;
+ void *vlgsize;
{
- int i, count;
-#define MAX_INSNS 5
- struct alpha_it insns[MAX_INSNS];
+ emit_uldXu (tok, ntok, vlgsize);
+ assemble_tokens (sextX_op[(long)vlgsize], tok, 1, 1);
+}
- count = alpha_ip (str, insns);
- if (count <= 0)
- return;
+/* Implement the ldil macro. */
+
+static void
+emit_ldil (tok, ntok, unused)
+ const expressionS *tok;
+ int ntok;
+ void *unused;
+{
+ expressionS newtok[2];
- for (i = 0; i < count; i++)
- emit_insn (&insns[i]);
+ memcpy (newtok, tok, sizeof(newtok));
+ newtok[1].X_add_number = sign_extend_32 (tok[1].X_add_number);
+
+ assemble_tokens ("lda", newtok, ntok, 1);
}
-static inline void
-maybe_set_gp (sec)
- asection *sec;
+/* Store a half-word or byte. */
+
+static void
+emit_stX (tok, ntok, vlgsize)
+ const expressionS *tok;
+ void *vlgsize;
{
- bfd_vma vma;
- if (!sec)
- return;
- vma = bfd_get_section_vma (foo, sec);
- if (vma && vma < alpha_gp_value)
- alpha_gp_value = vma;
+ int lgsize = (int)(long)vlgsize;
+ expressionS newtok[3];
+
+ if (alpha_noat_on)
+ as_bad("macro requires $at register while noat in effect");
+
+ /* emit "lda $at, exp" */
+
+ memcpy (newtok, tok, sizeof(expressionS)*ntok);
+ newtok[0].X_add_number = AXP_REG_AT;
+ assemble_tokens ("lda", newtok, ntok, 1);
+
+ /* emit "ldq_u $t9, 0($at)" */
+
+ set_tok_reg (newtok[0], AXP_REG_T9);
+ set_tok_const (newtok[1], 0);
+ set_tok_preg (newtok[2], AXP_REG_AT);
+ assemble_tokens ("ldq_u", newtok, 3, 1);
+
+ /* emit "insXl src, $at, $t10" */
+
+ newtok[0] = tok[0];
+ set_tok_reg (newtok[1], AXP_REG_AT);
+ set_tok_reg (newtok[2], AXP_REG_T10);
+ assemble_tokens (insXl_op[lgsize], newtok, 3, 1);
+
+ /* emit "mskXl $t9, $at, $t9" */
+
+ set_tok_reg (newtok[0], AXP_REG_T9);
+ newtok[2] = newtok[0];
+ assemble_tokens (mskXl_op[lgsize], newtok, 3, 1);
+
+ /* emit "or $t9, $t10, $t9" */
+
+ set_tok_reg (newtok[1], AXP_REG_T10);
+ assemble_tokens ("or", newtok, 3, 1);
+
+ /* emit "stq_u $t9, 0($at) */
+
+ set_tok_const (newtok[1], 0);
+ set_tok_preg (newtok[2], AXP_REG_AT);
+ assemble_tokens ("stq_u", newtok, 3, 1);
}
+/* Store an integer to an unaligned address. */
+
static void
-select_gp_value ()
+emit_ustX (tok, ntok, vlgsize)
+ const expressionS *tok;
+ int ntok;
+ void *vlgsize;
{
- if (alpha_gp_value != 0)
- abort ();
+ int lgsize = (int)(long)vlgsize;
+ expressionS newtok[3];
- /* Get minus-one in whatever width... */
- alpha_gp_value = 0; alpha_gp_value--;
+ /* emit "lda $at, exp" */
- /* Select the smallest VMA of these existing sections. */
- maybe_set_gp (lita_sec);
-/* maybe_set_gp (sdata); Was disabled before -- should we use it? */
-#if 0
- maybe_set_gp (lit8_sec);
- maybe_set_gp (lit4_sec);
-#endif
+ memcpy (newtok, tok, sizeof(expressionS)*ntok);
+ newtok[0].X_add_number = AXP_REG_AT;
+ assemble_tokens ("lda", newtok, ntok, 1);
- alpha_gp_value += GP_ADJUSTMENT;
+ /* emit "ldq_u $9, 0($at)" */
- S_SET_VALUE (gp, alpha_gp_value);
+ set_tok_reg (newtok[0], AXP_REG_T9);
+ set_tok_const (newtok[1], 0);
+ set_tok_preg (newtok[2], AXP_REG_AT);
+ assemble_tokens ("ldq_u", newtok, 3, 1);
-#ifdef DEBUG1
- printf ("Chose GP value of %lx\n", alpha_gp_value);
-#endif
+ /* emit "ldq_u $10, size-1($at)" */
+
+ set_tok_reg (newtok[0], AXP_REG_T10);
+ set_tok_const (newtok[1], (1 << lgsize)-1);
+ assemble_tokens ("ldq_u", newtok, 3, 1);
+
+ /* emit "insXl src, $at, $t11" */
+
+ newtok[0] = tok[0];
+ set_tok_reg (newtok[1], AXP_REG_AT);
+ set_tok_reg (newtok[2], AXP_REG_T11);
+ assemble_tokens (insXl_op[lgsize], newtok, 3, 1);
+
+ /* emit "insXh src, $at, $t12" */
+
+ set_tok_reg (newtok[2], AXP_REG_T12);
+ assemble_tokens (insXh_op[lgsize], newtok, 3, 1);
+
+ /* emit "mskXl $t9, $at, $t9" */
+
+ set_tok_reg (newtok[0], AXP_REG_T9);
+ newtok[2] = newtok[0];
+ assemble_tokens (mskXl_op[lgsize], newtok, 3, 1);
+
+ /* emit "mskXh $t10, $at, $t10" */
+
+ set_tok_reg (newtok[0], AXP_REG_T10);
+ newtok[2] = newtok[0];
+ assemble_tokens (mskXh_op[lgsize], newtok, 3, 1);
+
+ /* emit "or $t9, $t11, $t9" */
+
+ set_tok_reg (newtok[0], AXP_REG_T9);
+ set_tok_reg (newtok[1], AXP_REG_T11);
+ newtok[2] = newtok[0];
+ assemble_tokens ("or", newtok, 3, 1);
+
+ /* emit "or $t10, $t12, $t10" */
+
+ set_tok_reg (newtok[0], AXP_REG_T10);
+ set_tok_reg (newtok[1], AXP_REG_T12);
+ newtok[2] = newtok[0];
+ assemble_tokens ("or", newtok, 3, 1);
+
+ /* emit "stq_u $t9, 0($at)" */
+
+ set_tok_reg (newtok[0], AXP_REG_T9);
+ set_tok_const (newtok[1], 0);
+ set_tok_preg (newtok[2], AXP_REG_AT);
+ assemble_tokens ("stq_u", newtok, 3, 1);
+
+ /* emit "stq_u $t10, size-1($at)" */
+
+ set_tok_reg (newtok[0], AXP_REG_T10);
+ set_tok_const (newtok[1], (1 << lgsize)-1);
+ assemble_tokens ("stq_u", newtok, 3, 1);
}
-int
-alpha_force_relocation (f)
- fixS *f;
+/* Sign extend a half-word or byte. The 32-bit sign extend is
+ implemented as "addl $31, $r, $t" in the opcode table. */
+
+static void
+emit_sextX (tok, ntok, vlgsize)
+ const expressionS *tok;
+ int ntok;
+ void *vlgsize;
{
- switch (f->fx_r_type)
- {
- case BFD_RELOC_ALPHA_GPDISP_HI16:
- case BFD_RELOC_ALPHA_GPDISP_LO16:
- case BFD_RELOC_ALPHA_LITERAL:
- case BFD_RELOC_ALPHA_LITUSE:
- case BFD_RELOC_GPREL32:
- return 1;
- case BFD_RELOC_ALPHA_HINT:
- case BFD_RELOC_64:
- case BFD_RELOC_32:
- case BFD_RELOC_16:
- case BFD_RELOC_8:
- case BFD_RELOC_23_PCREL_S2:
- case BFD_RELOC_14:
- case BFD_RELOC_26:
- return 0;
- default:
- abort ();
- return 0;
- }
+ int bitshift = 64 - 8*(1 << (long)vlgsize);
+ expressionS newtok[3];
+
+ /* emit "sll src,bits,dst" */
+
+ newtok[0] = tok[0];
+ set_tok_const (newtok[1], bitshift);
+ newtok[2] = tok[ntok - 1];
+ assemble_tokens ("sll", newtok, 3, 1);
+
+ /* emit "sra dst,bits,dst" */
+
+ newtok[0] = newtok[2];
+ assemble_tokens ("sra", newtok, 3, 1);
}
-int
-alpha_fix_adjustable (f)
- fixS *f;
+/* Implement the division and modulus macros. */
+
+#ifdef OBJ_EVAX
+
+/* Make register usage like in normal procedure call.
+ Don't clobber PV and RA. */
+
+static void
+emit_division (tok, ntok, symname)
+ const expressionS *tok;
+ int ntok;
+ void *symname;
{
- /* Are there any relocation types for which we must generate a reloc
- but we can adjust the values contained within it? */
- switch (f->fx_r_type)
+ /* DIVISION and MODULUS. Yech.
+ *
+ * Convert
+ * OP x,y,result
+ * to
+ * mov x,R16 # if x != R16
+ * mov y,R17 # if y != R17
+ * lda AT,__OP
+ * jsr AT,(AT),0
+ * mov R0,result
+ *
+ * with appropriate optimizations if R0,R16,R17 are the registers
+ * specified by the compiler.
+ */
+
+ int xr, yr, rr;
+ symbolS *sym;
+ expressionS newtok[3];
+
+ xr = regno (tok[0].X_add_number);
+ yr = regno (tok[1].X_add_number);
+
+ if (ntok < 3)
+ rr = xr;
+ else
+ rr = regno (tok[2].X_add_number);
+
+ /* Move the operands into the right place */
+ if (yr == AXP_REG_R16 && xr == AXP_REG_R17)
{
- case BFD_RELOC_ALPHA_GPDISP_HI16:
- case BFD_RELOC_ALPHA_GPDISP_LO16:
- return 0;
- case BFD_RELOC_GPREL32:
- return 1;
- default:
- return !alpha_force_relocation (f);
- }
- /*NOTREACHED*/
-}
+ /* They are in exactly the wrong order -- swap through AT */
-valueT
-md_section_align (seg, size)
- segT seg;
- valueT size;
-{
-#ifdef OBJ_ECOFF
- /* This should probably be handled within BFD, or by pulling the
- number from BFD at least. */
-#define MIN 15
- size += MIN;
- size &= ~MIN;
-#endif
- return size;
-}
+ if (alpha_noat_on)
+ as_bad ("macro requires $at register while noat in effect");
+
+ set_tok_reg (newtok[0], AXP_REG_R16);
+ set_tok_reg (newtok[1], AXP_REG_AT);
+ assemble_tokens ("mov", newtok, 2, 1);
+
+ set_tok_reg (newtok[0], AXP_REG_R17);
+ set_tok_reg (newtok[1], AXP_REG_R16);
+ assemble_tokens ("mov", newtok, 2, 1);
+
+ set_tok_reg (newtok[0], AXP_REG_AT);
+ set_tok_reg (newtok[1], AXP_REG_R17);
+ assemble_tokens ("mov", newtok, 2, 1);
+ }
+ else
+ {
+ if (yr == AXP_REG_R16)
+ {
+ set_tok_reg (newtok[0], AXP_REG_R16);
+ set_tok_reg (newtok[1], AXP_REG_R17);
+ assemble_tokens ("mov", newtok, 2, 1);
+ }
-/* Add this thing to the .lita section and produce a LITERAL reloc referring
- to it. */
+ if (xr != AXP_REG_R16)
+ {
+ set_tok_reg (newtok[0], xr);
+ set_tok_reg (newtok[1], AXP_REG_R16);
+ assemble_tokens ("mov", newtok, 2, 1);
+ }
-/* Are we currently eligible to emit a LITUSE reloc for the literal
- references just generated? */
-static int lituse_pending;
+ if (yr != AXP_REG_R16 && yr != AXP_REG_R17)
+ {
+ set_tok_reg (newtok[0], yr);
+ set_tok_reg (newtok[1], AXP_REG_R17);
+ assemble_tokens ("mov", newtok, 2, 1);
+ }
+ }
-static void
-load_symbol_address (reg, insn)
- int reg;
- struct alpha_it *insn;
-{
- static symbolS *lita_sym;
+ sym = symbol_find_or_make ((const char *)symname);
- int x;
- valueT retval;
+ set_tok_reg (newtok[0], AXP_REG_AT);
+ set_tok_sym (newtok[1], sym, 0);
+ assemble_tokens ("lda", newtok, 2, 1);
- if (!lita_sym)
+ /* Call the division routine */
+ set_tok_reg (newtok[0], AXP_REG_AT);
+ set_tok_cpreg (newtok[1], AXP_REG_AT);
+ set_tok_const (newtok[2], 0);
+ assemble_tokens ("jsr", newtok, 3, 1);
+
+ /* Move the result to the right place */
+ if (rr != AXP_REG_R0)
{
- lita_sym = section_symbol (lita_sec);
- S_CLEAR_EXTERNAL (lita_sym);
+ set_tok_reg (newtok[0], AXP_REG_R0);
+ set_tok_reg (newtok[1], rr);
+ assemble_tokens ("mov", newtok, 2, 1);
}
+}
- retval = add_to_literal_pool (insn->reloc[0].exp.X_add_symbol,
- insn->reloc[0].exp.X_add_number,
- lita_sec, 8);
-
- /* Now emit a LITERAL relocation for the original section. */
- insn->reloc[0].exp.X_op = O_symbol;
- insn->reloc[0].exp.X_add_symbol = lita_sym;
- insn->reloc[0].exp.X_add_number = retval;
- insn->reloc[0].code = BFD_RELOC_ALPHA_LITERAL;
- lituse_pending = 1;
+#else /* !OBJ_EVAX */
- if (retval == 0x8000)
- /* Overflow? */
- as_fatal ("overflow in literal (.lita) table");
- x = retval;
- if (addr32)
- insn->opcode = (0xa0000000 /* ldl */
- | (reg << SA)
- | (base_register << SB)
- | (x & 0xffff));
+static void
+emit_division (tok, ntok, symname)
+ const expressionS *tok;
+ int ntok;
+ void *symname;
+{
+ /* DIVISION and MODULUS. Yech.
+ * Convert
+ * OP x,y,result
+ * to
+ * lda pv,__OP
+ * mov x,t10
+ * mov y,t11
+ * jsr t9,(pv),__OP
+ * mov t12,result
+ *
+ * with appropriate optimizations if t10,t11,t12 are the registers
+ * specified by the compiler.
+ */
+
+ int xr, yr, rr;
+ symbolS *sym;
+ expressionS newtok[3];
+
+ xr = regno (tok[0].X_add_number);
+ yr = regno (tok[1].X_add_number);
+
+ if (ntok < 3)
+ rr = xr;
else
- insn->opcode = (0xa4000000 /* ldq */
- | (reg << SA)
- | (base_register << SB)
- | (x & 0xffff));
- note_gpreg (base_register);
-}
+ rr = regno (tok[2].X_add_number);
-/* To load an address with a single instruction,
- emit a LITERAL reloc in this section, and a REFQUAD
- for the .lita section, so that we'll be able to access
- it via $gp:
- lda REG, xx -> ldq REG, -32752(gp)
- lda REG, xx+4 -> ldq REG, -32752(gp)
- lda REG, 4(REG)
+ sym = symbol_find_or_make ((const char *)symname);
- The offsets need to start near -0x8000, and the generated LITERAL
- relocations should negate the offset. I don't completely grok the
- scheme yet. */
+ /* Move the operands into the right place */
+ if (yr == AXP_REG_T10 && xr == AXP_REG_T11)
+ {
+ /* They are in exactly the wrong order -- swap through AT */
-static int
-load_expression (reg, insn)
- int reg;
- struct alpha_it *insn;
-{
- valueT addend, addendhi, addendlo;
- int num_insns = 1;
+ if (alpha_noat_on)
+ as_bad ("macro requires $at register while noat in effect");
- if (insn->reloc[0].exp.X_add_symbol->bsym->flags & BSF_SECTION_SYM)
- {
- addend = 0;
+ set_tok_reg (newtok[0], AXP_REG_T10);
+ set_tok_reg (newtok[1], AXP_REG_AT);
+ assemble_tokens ("mov", newtok, 2, 1);
+
+ set_tok_reg (newtok[0], AXP_REG_T11);
+ set_tok_reg (newtok[1], AXP_REG_T10);
+ assemble_tokens ("mov", newtok, 2, 1);
+
+ set_tok_reg (newtok[0], AXP_REG_AT);
+ set_tok_reg (newtok[1], AXP_REG_T11);
+ assemble_tokens ("mov", newtok, 2, 1);
}
else
{
- addend = insn->reloc[0].exp.X_add_number;
- insn->reloc[0].exp.X_add_number = 0;
- }
- load_symbol_address (reg, insn);
- if (addend)
- {
- if ((addend & ~0x7fffffff) != 0
- && (addend & ~0x7fffffff) + 0x80000000 != 0)
+ if (yr == AXP_REG_T10)
{
- as_bad ("assembler not prepared to handle constants >32 bits yet");
- addend = 0;
+ set_tok_reg (newtok[0], AXP_REG_T10);
+ set_tok_reg (newtok[1], AXP_REG_T11);
+ assemble_tokens ("mov", newtok, 2, 1);
}
- addendlo = addend & 0xffff;
- addend -= addendlo;
- addendhi = addend >> 16;
- if (addendlo & 0x8000)
- addendhi++;
- /* It appears that the BASEREG LITUSE reloc should not be used on
- an LDAH instruction. */
- if (addendlo)
+
+ if (xr != AXP_REG_T10)
{
- insn[1].opcode = (0x20000000 /* lda */
- | (reg << SA)
- | (reg << SB)
- | (addendlo & 0xffff));
- insn[1].reloc[0].code = BFD_RELOC_ALPHA_LITUSE;
- insn[1].reloc[0].exp = lituse_basereg;
- num_insns++;
+ set_tok_reg (newtok[0], xr);
+ set_tok_reg (newtok[1], AXP_REG_T10);
+ assemble_tokens ("mov", newtok, 2, 1);
}
- if (addendhi)
+
+ if (yr != AXP_REG_T10 && yr != AXP_REG_T11)
{
- insn[num_insns].opcode = (0x24000000
- | (reg << SA)
- | (reg << SB)
- | (addendhi & 0xffff));
- num_insns++;
+ set_tok_reg (newtok[0], yr);
+ set_tok_reg (newtok[1], AXP_REG_T11);
+ assemble_tokens ("mov", newtok, 2, 1);
}
- if (num_insns == 1)
- abort ();
- lituse_pending = 0;
}
- return num_insns;
+
+ /* Call the division routine */
+ set_tok_reg (newtok[0], AXP_REG_T9);
+ set_tok_sym (newtok[1], sym, 0);
+ assemble_tokens ("jsr", newtok, 2, 1);
+
+ /* Reload the GP register */
+#ifdef OBJ_AOUT
+FIXME
+#endif
+#if defined(OBJ_ECOFF) || defined(OBJ_ELF)
+ set_tok_reg (newtok[0], alpha_gp_register);
+ set_tok_const (newtok[1], 0);
+ set_tok_preg (newtok[2], AXP_REG_T9);
+ assemble_tokens ("ldgp", newtok, 3, 1);
+#endif
+
+ /* Move the result to the right place */
+ if (rr != AXP_REG_T12)
+ {
+ set_tok_reg (newtok[0], AXP_REG_T12);
+ set_tok_reg (newtok[1], rr);
+ assemble_tokens ("mov", newtok, 2, 1);
+ }
}
-static inline void
-getExpression (str, this_insn)
- char *str;
- struct alpha_it *this_insn;
-{
- char *save_in;
- segT seg;
-
-#if 0 /* Not converted to bfd yet, and I don't think we need them
- for ECOFF. Re-adding a.out support will probably require
- them though. */
- static const struct am {
- char *name;
- bfd_reloc_code_real_type reloc;
- } macro[] = {
- { "hi", RELOC_48_63 },
- { "lo", RELOC_0_15 },
- { "ml", RELOC_16_31 },
- { "mh", RELOC_32_47 },
- { "uhi", RELOC_U_48_63 },
- { "uml", RELOC_U_16_31 },
- { "umh", RELOC_U_32_47 },
- { 0, }
- };
-
- /* Handle macros: "%macroname(expr)" */
- if (*str == '%')
- {
- struct am *m;
- char *p, *q;
-
- str++;
- m = ¯o[0];
- while (q = m->name)
- {
- p = str;
- while (*q && *p == *q)
- p++, q++;
- if (*q == 0)
- break;
- m++;
- }
- if (q)
+#endif /* !OBJ_EVAX */
+
+/* The jsr and jmp macros differ from their instruction counterparts
+ in that they can load the target address and default most
+ everything. */
+
+static void
+emit_jsrjmp (tok, ntok, vopname)
+ const expressionS *tok;
+ int ntok;
+ void *vopname;
+{
+ const char *opname = (const char *) vopname;
+ struct alpha_insn insn;
+ expressionS newtok[3];
+ int r, tokidx = 0, lituse = 0;
+
+ if (tokidx < ntok && tok[tokidx].X_op == O_register)
+ r = regno (tok[tokidx++].X_add_number);
+ else
+ r = strcmp (opname, "jmp") == 0 ? AXP_REG_ZERO : AXP_REG_RA;
+
+ set_tok_reg (newtok[0], r);
+
+ if (tokidx < ntok &&
+ (tok[tokidx].X_op == O_pregister || tok[tokidx].X_op == O_cpregister))
+ r = regno (tok[tokidx++].X_add_number);
+#ifdef OBJ_EVAX
+ /* keep register if jsr $n.<sym> */
+#else
+ else
+ {
+ int basereg = alpha_gp_register;
+ lituse = load_expression (r = AXP_REG_PV, &tok[tokidx], &basereg, NULL);
+ }
+#endif
+
+ set_tok_cpreg (newtok[1], r);
+
+#ifdef OBJ_EVAX
+ /* FIXME: Add hint relocs to BFD for evax. */
+#else
+ if (tokidx < ntok)
+ newtok[2] = tok[tokidx];
+ else
+#endif
+ set_tok_const (newtok[2], 0);
+
+ assemble_tokens_to_insn (opname, newtok, 3, &insn);
+
+ /* add the LITUSE fixup */
+ if (lituse)
+ {
+ assert (insn.nfixups < MAX_INSN_FIXUPS);
+ if (insn.nfixups > 0)
{
- str = p; /* keep the '(' */
- this_insn->reloc = m->reloc;
+ memmove (&insn.fixups[1], &insn.fixups[0],
+ sizeof(struct alpha_fixup) * insn.nfixups);
}
+ insn.nfixups++;
+ insn.fixups[0].reloc = BFD_RELOC_ALPHA_LITUSE;
+ insn.fixups[0].exp.X_op = O_constant;
+ insn.fixups[0].exp.X_add_number = 3;
}
-#endif
- save_in = input_line_pointer;
- input_line_pointer = str;
+ emit_insn (&insn);
- seg = expression (&this_insn->reloc[0].exp);
- /* XXX validate seg and exp, make sure they're reasonable */
- expr_end = input_line_pointer;
- input_line_pointer = save_in;
+#if OBJ_EVAX
+ /* reload PV from 0(FP) if it is our current base register. */
+ if (alpha_gp_register == AXP_REG_PV)
+ {
+ set_tok_reg (newtok[0], AXP_REG_PV);
+ set_tok_const (newtok[1], 0);
+ set_tok_preg (newtok[2], AXP_REG_FP);
+ assemble_tokens ("ldq", newtok, 3, 0);
+ }
+#endif
}
-static void
-emit_unaligned_io (dir, addr_reg, addr_offset, reg)
- char *dir;
- int addr_reg, reg;
- valueT addr_offset;
-{
- char buf[90];
- sprintf (buf, "%sq_u $%d,%ld($%d)", dir, reg, (long) addr_offset, addr_reg);
- md_assemble (buf);
-}
+/* The ret and jcr instructions differ from their instruction
+ counterparts in that everything can be defaulted. */
static void
-emit_load_unal (addr_reg, addr_offset, reg)
- int addr_reg, reg;
- valueT addr_offset;
+emit_retjcr (tok, ntok, vopname)
+ const expressionS *tok;
+ int ntok;
+ void *vopname;
{
- emit_unaligned_io ("ld", addr_reg, addr_offset, reg);
-}
+ const char *opname = (const char *)vopname;
+ expressionS newtok[3];
+ int r, tokidx = 0;
-static void
-emit_store_unal (addr_reg, addr_offset, reg)
- int addr_reg, reg;
- valueT addr_offset;
-{
- emit_unaligned_io ("st", addr_reg, addr_offset, reg);
-}
+ if (tokidx < ntok && tok[tokidx].X_op == O_register)
+ r = regno (tok[tokidx++].X_add_number);
+ else
+ r = AXP_REG_ZERO;
-static void
-emit_byte_manip_r (op, in, mask, out, mode, which)
- char *op;
- int in, mask, out, mode, which;
-{
- char buf[90];
- sprintf (buf, "%s%c%c $%d,$%d,$%d", op, mode, which, in, mask, out);
- md_assemble (buf);
+ set_tok_reg (newtok[0], r);
+
+ if (tokidx < ntok &&
+ (tok[tokidx].X_op == O_pregister || tok[tokidx].X_op == O_cpregister))
+ r = regno (tok[tokidx++].X_add_number);
+ else
+ r = AXP_REG_RA;
+
+ set_tok_cpreg (newtok[1], r);
+
+ if (tokidx < ntok)
+ newtok[2] = tok[tokidx];
+ else
+ set_tok_const (newtok[2], strcmp(opname, "ret") == 0);
+
+ assemble_tokens (opname, newtok, 3, 0);
}
+\f
+/* Assembler directives */
+
+/* Handle the .text pseudo-op. This is like the usual one, but it
+ clears alpha_insn_label and restores auto alignment. */
static void
-emit_extract_r (in, mask, out, mode, which)
- int in, mask, out, mode, which;
+s_alpha_text (i)
+ int i;
+
{
- emit_byte_manip_r ("ext", in, mask, out, mode, which);
-}
+ s_text (i);
+ alpha_insn_label = NULL;
+ alpha_auto_align_on = 1;
+ alpha_current_align = 0;
+}
+
+/* Handle the .data pseudo-op. This is like the usual one, but it
+ clears alpha_insn_label and restores auto alignment. */
static void
-emit_insert_r (in, mask, out, mode, which)
- int in, mask, out, mode, which;
+s_alpha_data (i)
+ int i;
{
- emit_byte_manip_r ("ins", in, mask, out, mode, which);
-}
+ s_data (i);
+ alpha_insn_label = NULL;
+ alpha_auto_align_on = 1;
+ alpha_current_align = 0;
+}
+
+#ifndef OBJ_ELF
+
+/* Handle the OSF/1 .comm pseudo quirks. */
static void
-emit_mask_r (in, mask, out, mode, which)
- int in, mask, out, mode, which;
+s_alpha_comm (ignore)
+ int ignore;
{
- emit_byte_manip_r ("msk", in, mask, out, mode, which);
+ register char *name;
+ register char c;
+ register char *p;
+ offsetT temp;
+ register symbolS *symbolP;
+
+ name = input_line_pointer;
+ c = get_symbol_end ();
+
+ /* just after name is now '\0' */
+ p = input_line_pointer;
+ *p = c;
+
+ SKIP_WHITESPACE ();
+
+ /* Alpha OSF/1 compiler doesn't provide the comma, gcc does. */
+ if (*input_line_pointer == ',')
+ {
+ input_line_pointer++;
+ SKIP_WHITESPACE ();
+ }
+ if ((temp = get_absolute_expression ()) < 0)
+ {
+ as_warn (".COMMon length (%ld.) <0! Ignored.", (long) temp);
+ ignore_rest_of_line ();
+ return;
+ }
+
+ *p = 0;
+ symbolP = symbol_find_or_make (name);
+ *p = c;
+
+ if (S_IS_DEFINED (symbolP))
+ {
+ as_bad ("Ignoring attempt to re-define symbol");
+ ignore_rest_of_line ();
+ return;
+ }
+
+#if OBJ_EVAX
+ {
+ /* Fill common area with zeros. */
+ char *pfrag;
+ segT current_seg = now_seg;
+ subsegT current_subseg = now_subseg;
+
+ subseg_set (bss_section, 1);
+ frag_align (3, 0);
+
+ symbolP->sy_frag = frag_now;
+ pfrag = frag_var (rs_org, 1, 1, (relax_substateT)0, symbolP,
+ temp, (char *)0);
+
+ *pfrag = 0;
+ S_SET_SEGMENT (symbolP, bss_section);
+
+ subseg_set (current_seg, current_subseg);
+ }
+#endif
+
+ if (S_GET_VALUE (symbolP))
+ {
+ if (S_GET_VALUE (symbolP) != (valueT) temp)
+ as_bad ("Length of .comm \"%s\" is already %ld. Not changed to %ld.",
+ S_GET_NAME (symbolP),
+ (long) S_GET_VALUE (symbolP),
+ (long) temp);
+ }
+ else
+ {
+ S_SET_VALUE (symbolP, (valueT) temp);
+ S_SET_EXTERNAL (symbolP);
+ }
+
+#ifndef OBJ_EVAX
+ know (symbolP->sy_frag == &zero_address_frag);
+#endif
+
+ demand_empty_rest_of_line ();
}
+#endif /* ! OBJ_ELF */
+
+#if defined (OBJ_ECOFF) || defined (OBJ_EVAX)
+
+/* Handle the .rdata pseudo-op. This is like the usual one, but it
+ clears alpha_insn_label and restores auto alignment. */
+
static void
-emit_sign_extend (reg, size)
- int reg, size;
+s_alpha_rdata (ignore)
+ int ignore;
{
- char buf[90];
- sprintf (buf, "sll $%d,0x%x,$%d", reg, 64 - size, reg);
- md_assemble (buf);
- sprintf (buf, "sra $%d,0x%x,$%d", reg, 64 - size, reg);
- md_assemble (buf);
+ int temp;
+
+ temp = get_absolute_expression ();
+ subseg_new (".rdata", 0);
+ demand_empty_rest_of_line ();
+ alpha_insn_label = NULL;
+ alpha_auto_align_on = 1;
+ alpha_current_align = 0;
}
+#endif
+
+#ifdef OBJ_ECOFF
+
+/* Handle the .sdata pseudo-op. This is like the usual one, but it
+ clears alpha_insn_label and restores auto alignment. */
+
static void
-emit_bis_r (in1, in2, out)
- int in1, in2, out;
+s_alpha_sdata (ignore)
+ int ignore;
{
- char buf[90];
- sprintf (buf, "bis $%d,$%d,$%d", in1, in2, out);
- md_assemble (buf);
-}
+ int temp;
-static int
-build_mem (opc, ra, rb, disp)
- int opc, ra, rb;
- bfd_signed_vma disp;
-{
- if ((disp >> 15) != 0
- && (disp >> 15) + 1 != 0)
- abort ();
- return ((opc << 26) | (ra << SA) | (rb << SB) | (disp & 0xffff));
+ temp = get_absolute_expression ();
+ subseg_new (".sdata", 0);
+ demand_empty_rest_of_line ();
+ alpha_insn_label = NULL;
+ alpha_auto_align_on = 1;
+ alpha_current_align = 0;
}
+#endif
-static int
-build_operate_n (opc, fn, ra, lit, rc)
- int opc, fn, ra, rc;
- int lit;
+#ifdef OBJ_ELF
+
+/* Handle the .section pseudo-op. This is like the usual one, but it
+ clears alpha_insn_label and restores auto alignment. */
+
+static void
+s_alpha_section (ignore)
+ int ignore;
{
- if (lit & ~0xff)
- abort ();
- return ((opc << 26) | (fn << 5) | (ra << SA) | (lit << SN) | (1 << 12) | (rc << SC));
+ obj_elf_section (ignore);
+
+ alpha_insn_label = NULL;
+ alpha_auto_align_on = 1;
+ alpha_current_align = 0;
}
+#endif
+
+#ifdef OBJ_EVAX
static void
-emit_sll_n (dest, disp, src)
- int dest, disp, src;
+s_alpha_link (ignore)
+ int ignore;
{
- struct alpha_it insn = clear_insn;
- insn.opcode = build_operate_n (0x12, 0x39, src, disp, dest);
- emit_insn (&insn);
+ int temp;
+
+ temp = get_absolute_expression ();
+ subseg_new (".link", 0);
+ demand_empty_rest_of_line ();
+ alpha_insn_label = NULL;
+ alpha_auto_align_on = 1;
+ alpha_current_align = 0;
}
+
+/* .prologue */
+
static void
-emit_ldah_num (dest, addend, src)
- int dest, src;
- bfd_vma addend;
+s_alpha_prologue (ignore)
+ int ignore;
{
- struct alpha_it insn = clear_insn;
- insn.opcode = build_mem (0x09, dest, src, addend);
- emit_insn (&insn);
+ demand_empty_rest_of_line ();
+
+ return;
}
+
+/* Parse .ent directives. */
+
static void
-emit_addq_r (in1, in2, out)
- int in1, in2, out;
+s_alpha_ent (ignore)
+ int ignore;
{
- struct alpha_it insn = clear_insn;
- insn.opcode = 0x40000400 | (in1 << SA) | (in2 << SB) | (out << SC);
- emit_insn (&insn);
+ symbolS *symbol;
+ expressionS symexpr;
+
+ alpha_evax_proc.pdsckind = 0;
+ alpha_evax_proc.framereg = -1;
+ alpha_evax_proc.framesize = 0;
+ alpha_evax_proc.rsa_offset = 0;
+ alpha_evax_proc.ra_save = AXP_REG_RA;
+ alpha_evax_proc.fp_save = -1;
+ alpha_evax_proc.imask = 0;
+ alpha_evax_proc.fmask = 0;
+ alpha_evax_proc.prologue = 0;
+ alpha_evax_proc.type = 0;
+
+ expression (&symexpr);
+
+ if (symexpr.X_op != O_symbol)
+ {
+ as_fatal (".ent directive has no symbol");
+ demand_empty_rest_of_line ();
+ return;
+ }
+
+ symbol = make_expr_symbol (&symexpr);
+ symbol->bsym->flags |= BSF_FUNCTION;
+ alpha_evax_proc.symbol = symbol;
+
+ demand_empty_rest_of_line ();
+ return;
}
+
+/* Parse .frame <framreg>,<framesize>,RA,<rsa_offset> directives. */
+
static void
-emit_lda_n (dest, addend, src)
- int dest, src;
- bfd_vma addend;
+s_alpha_frame (ignore)
+ int ignore;
{
- struct alpha_it insn = clear_insn;
- insn.opcode = build_mem (0x08, dest, src, addend);
- emit_insn (&insn);
+ long val;
+
+ alpha_evax_proc.framereg = tc_get_register (1);
+
+ SKIP_WHITESPACE ();
+ if (*input_line_pointer++ != ','
+ || get_absolute_expression_and_terminator (&val) != ',')
+ {
+ as_warn ("Bad .frame directive 1./2. param");
+ --input_line_pointer;
+ demand_empty_rest_of_line ();
+ return;
+ }
+
+ alpha_evax_proc.framesize = val;
+
+ (void) tc_get_register (1);
+ SKIP_WHITESPACE ();
+ if (*input_line_pointer++ != ',')
+ {
+ as_warn ("Bad .frame directive 3./4. param");
+ --input_line_pointer;
+ demand_empty_rest_of_line ();
+ return;
+ }
+ alpha_evax_proc.rsa_offset = get_absolute_expression ();
+
+ return;
}
static void
-emit_add64 (in, out, num)
- int in, out;
- bfd_vma num;
+s_alpha_pdesc (ignore)
+ int ignore;
{
- bfd_signed_vma snum = num;
+ char *name;
+ char name_end;
+ long val;
+ register char *p;
+ expressionS exp;
+ symbolS *entry_sym;
+ fixS *fixp;
+ segment_info_type *seginfo = seg_info (alpha_link_section);
- if (in_range_signed (num, 16))
+ if (now_seg != alpha_link_section)
{
- emit_lda_n (out, num, in);
+ as_bad (".pdesc directive not in link (.link) section");
+ demand_empty_rest_of_line ();
return;
}
- if ((num & 0xffff) == 0
- && in == ZERO
- && in_range_signed (snum >> 16, 16))
+
+ if ((alpha_evax_proc.symbol == 0)
+ || (!S_IS_DEFINED (alpha_evax_proc.symbol)))
{
- emit_ldah_num (out, snum >> 16, in);
+ as_fatal (".pdesc has no matching .ent");
+ demand_empty_rest_of_line ();
return;
}
- /* I'm not sure this one is getting invoked when it could. */
- if ((num & 1) == 0 && in == ZERO)
+
+ alpha_evax_proc.symbol->sy_obj = (valueT)seginfo->literal_pool_size;
+
+ expression (&exp);
+ if (exp.X_op != O_symbol)
{
- if (in_range_signed (snum >> 1, 16))
- {
- emit_lda_n (out, snum >> 1, in);
- emit_addq_r (out, out, out);
- return;
- }
- else if (num & 0x1fffe == 0
- && in_range_signed (snum >> 17, 16))
- {
- emit_ldah_num (out, snum >> 17, in);
- emit_addq_r (out, out, out);
- return;
- }
+ as_warn (".pdesc directive has no entry symbol");
+ demand_empty_rest_of_line ();
+ return;
+ }
+
+ entry_sym = make_expr_symbol (&exp);
+ /* Save bfd symbol of proc desc in function symbol. */
+ alpha_evax_proc.symbol->bsym->udata.p = (PTR)entry_sym->bsym;
+
+ SKIP_WHITESPACE ();
+ if (*input_line_pointer++ != ',')
+ {
+ as_warn ("No comma after .pdesc <entryname>");
+ demand_empty_rest_of_line ();
+ return;
+ }
+
+ SKIP_WHITESPACE ();
+ name = input_line_pointer;
+ name_end = get_symbol_end ();
+
+ if (strncmp(name, "stack", 5) == 0)
+ {
+ alpha_evax_proc.pdsckind = PDSC_S_K_KIND_FP_STACK;
+ }
+ else if (strncmp(name, "reg", 3) == 0)
+ {
+ alpha_evax_proc.pdsckind = PDSC_S_K_KIND_FP_REGISTER;
+ }
+ else if (strncmp(name, "null", 4) == 0)
+ {
+ alpha_evax_proc.pdsckind = PDSC_S_K_KIND_NULL;
}
- if (in_range_signed (num, 32))
+ else
{
- bfd_vma lo = num & 0xffff;
- if (lo & 0x8000)
- lo -= 0x10000;
- num -= lo;
- emit_ldah_num (out, snum >> 16, in);
- if (lo)
- emit_lda_n (out, lo, out);
+ as_fatal ("unknown procedure kind");
+ demand_empty_rest_of_line ();
return;
}
- if (in != ZERO && in != AT && out != AT && at_ok)
+ *input_line_pointer = name_end;
+ demand_empty_rest_of_line ();
+
+#ifdef md_flush_pending_output
+ md_flush_pending_output ();
+#endif
+
+ frag_align (3, 0);
+ p = frag_more (16);
+ fixp = fix_new (frag_now, p - frag_now->fr_literal, 8, 0, 0, 0, 0);
+ fixp->fx_done = 1;
+ seginfo->literal_pool_size += 16;
+
+ *p = alpha_evax_proc.pdsckind
+ | ((alpha_evax_proc.framereg == 29) ? PDSC_S_M_BASE_REG_IS_FP : 0);
+ *(p+1) = PDSC_S_M_NATIVE
+ | PDSC_S_M_NO_JACKET;
+
+ switch (alpha_evax_proc.pdsckind)
{
- emit_add64 (ZERO, AT, num);
- emit_addq_r (AT, in, out);
- return;
+ case PDSC_S_K_KIND_NULL:
+ *(p+2) = 0;
+ *(p+3) = 0;
+ break;
+ case PDSC_S_K_KIND_FP_REGISTER:
+ *(p+2) = alpha_evax_proc.fp_save;
+ *(p+3) = alpha_evax_proc.ra_save;
+ break;
+ case PDSC_S_K_KIND_FP_STACK:
+ md_number_to_chars (p+2, (valueT)alpha_evax_proc.rsa_offset, 2);
+ break;
+ default: /* impossible */
+ break;
}
- if (in != ZERO)
- as_bad ("load expression too complex to expand");
+ *(p+4) = 0;
+ *(p+5) = alpha_evax_proc.type & 0x0f;
- /* Could check also for loading 16- or 32-bit value and shifting by
- arbitrary displacement. */
+ /* Signature offset. */
+ md_number_to_chars (p+6, (valueT)0, 2);
- {
- bfd_vma lo = snum & 0xffffffff;
- if (lo & 0x80000000)
- lo -= ((bfd_vma)0x10000000 << 4);
- snum -= lo;
- emit_add64 (ZERO, out, snum >> 32);
- emit_sll_n (out, 32, out);
- if (lo != 0)
- emit_add64 (out, out, lo);
- }
-}
+ fix_new_exp (frag_now, p-frag_now->fr_literal+8, 8, &exp, 0, BFD_RELOC_64);
-static int
-alpha_ip (str, insns)
- char *str;
- struct alpha_it insns[];
-{
- char *s;
- const char *args;
- char c;
- unsigned long i;
- struct alpha_opcode *pattern;
- char *argsStart;
- unsigned int opcode;
- unsigned int mask = 0;
- int match = 0, num_gen = 1;
- int comma = 0;
- int do_add64, add64_in = 0, add64_out = 0;
- bfd_vma add64_addend = 0;
-
- for (s = str;
- islower (*s) || *s == '_' || *s == '/' || *s == '4' || *s == '8';
- ++s)
- ;
- switch (*s)
- {
-
- case '\0':
- break;
+ if (alpha_evax_proc.pdsckind == PDSC_S_K_KIND_NULL)
+ return;
- case ',':
- comma = 1;
+ /* Add dummy fix to make add_to_link_pool work. */
+ p = frag_more (8);
+ fixp = fix_new (frag_now, p - frag_now->fr_literal, 8, 0, 0, 0, 0);
+ fixp->fx_done = 1;
+ seginfo->literal_pool_size += 8;
- /*FALLTHROUGH*/
+ /* pdesc+16: Size. */
+ md_number_to_chars (p, (valueT)alpha_evax_proc.framesize, 4);
- case ' ':
- *s++ = '\0';
- break;
+ md_number_to_chars (p+4, (valueT)0, 2);
- default:
- as_fatal ("Unknown opcode: `%s'", str);
- }
- if ((pattern = (struct alpha_opcode *) hash_find (op_hash, str)) == NULL)
- {
- as_bad ("Unknown opcode: `%s'", str);
- return -1;
- }
- if (comma)
- *--s = ',';
+ /* Entry length. */
+ md_number_to_chars (p+6, alpha_evax_proc.prologue, 2);
- argsStart = s;
- for (;;)
- {
- do_add64 = 0;
- opcode = pattern->match;
- num_gen = 1;
- for (i = 0; i < MAX_INSNS; i++)
- insns[i] = clear_insn;
+ if (alpha_evax_proc.pdsckind == PDSC_S_K_KIND_FP_REGISTER)
+ return;
- /* Build the opcode, checking as we go to make sure that the
- operands match. */
- for (args = pattern->args;; ++args)
- {
- switch (*args)
- {
+ /* Add dummy fix to make add_to_link_pool work. */
+ p = frag_more (8);
+ fixp = fix_new (frag_now, p - frag_now->fr_literal, 8, 0, 0, 0, 0);
+ fixp->fx_done = 1;
+ seginfo->literal_pool_size += 8;
- case '\0': /* end of args */
- if (*s == '\0')
- {
- match = 1;
- }
- break;
+ /* pdesc+24: register masks. */
- case '+':
- if (*s == '+')
- {
- ++s;
- continue;
- }
- if (*s == '-')
- {
- continue;
- }
- break;
+ md_number_to_chars (p, alpha_evax_proc.imask, 4);
+ md_number_to_chars (p+4, alpha_evax_proc.fmask, 4);
- case '(': /* these must match exactly */
- case ')':
- case ',':
- case ' ':
- case '0':
- if (*s++ == *args)
- continue;
- break;
+ return;
+}
- case '1': /* next operand must be a register */
- case '2':
- case '3':
- case 'r':
- case 'R':
- if (*s++ == '$')
- {
- switch (c = *s++)
- {
-
- case 'a': /* $at: as temporary */
- if (*s++ != 't')
- goto error;
- mask = AT;
- break;
-
- case 'g': /* $gp: base register */
- if (*s++ != 'p')
- goto error;
- mask = base_register;
- break;
-
- case 's': /* $sp: stack pointer */
- if (*s++ != 'p')
- goto error;
- mask = SP;
- break;
-
-
- case 'r': /* any register */
- if (!isdigit (c = *s++))
- {
- goto error;
- }
- /* FALLTHROUGH */
- case '0':
- case '1':
- case '2':
- case '3':
- case '4':
- case '5':
- case '6':
- case '7':
- case '8':
- case '9':
- if (isdigit (*s))
- {
- if ((c = 10 * (c - '0') + (*s++ - '0')) >= 32)
- {
- goto error;
- }
- }
- else
- {
- c -= '0';
- }
- if ((c == GP) && first_32bit_quadrant)
- c = ZERO;
-
- mask = c;
- break;
-
- default:
- goto error;
- }
- note_gpreg (mask);
- /* Got the register, now figure out where it goes in
- the opcode. */
- doregister:
- switch (*args)
- {
-
- case '1':
- case 'e':
- opcode |= mask << SA;
- continue;
-
- case '2':
- case 'f':
- opcode |= mask << SB;
- continue;
-
- case '3':
- case 'g':
- opcode |= mask;
- continue;
-
- case 'r':
- opcode |= (mask << SA) | mask;
- continue;
-
- case 'R': /* ra and rb are the same */
- opcode |= (mask << SA) | (mask << SB);
- continue;
-
- case 'E':
- opcode |= (mask << SA) | (mask << SB) | (mask);
- continue;
- }
- }
- break;
- case 'e': /* next operand is a floating point register */
- case 'f':
- case 'g':
- case 'E':
- if (*s++ == '$' && *s++ == 'f' && isdigit (*s))
- {
- mask = *s++;
- if (isdigit (*s))
- {
- mask = 10 * (mask - '0') + (*s++ - '0');
- if (mask >= 32)
- {
- break;
- }
- }
- else
- {
- mask -= '0';
- }
- note_fpreg (mask);
- /* same encoding as gp registers */
- goto doregister;
- }
- break;
+static void
+s_alpha_linkage (ignore)
+ int ignore;
+{
+ expressionS exp;
+ char *p;
-#if 0
- case 'h': /* bits 16..31 */
- insns[0].reloc = RELOC_16_31;
- goto immediate;
+#ifdef md_flush_pending_output
+ md_flush_pending_output ();
#endif
- case 'l': /* bits 0..15 */
- insns[0].reloc[0].code = BFD_RELOC_16;
- goto immediate;
-
- case 'L': /* 21 bit PC relative immediate */
- insns[0].reloc[0].code = BFD_RELOC_23_PCREL_S2;
- insns[0].reloc[0].pcrel = 1;
- goto immediate;
-
- case 'i': /* 14 bit immediate */
- if (OPCODE (opcode) != 0x1a)
- /* Not a jmp variant?? */
- abort ();
- else if (opcode & 0x8000)
- /* ret or jsr_coroutine */
- {
- insns[0].reloc[0].code = BFD_RELOC_14;
- insns[0].reloc[0].pcrel = 0;
- }
- else
- /* jmp or jsr */
- {
- insns[0].reloc[0].code = BFD_RELOC_ALPHA_HINT;
- insns[0].reloc[0].pcrel = 1;
- }
- goto immediate;
-
- case 'b': /* 8 bit immediate */
- insns[0].reloc[0].code = BFD_RELOC_8;
- goto immediate;
-
- case 'I': /* 26 bit immediate, for PALcode */
- insns[0].reloc[0].code = BFD_RELOC_26;
- goto immediate;
-
- case 't': /* 12 bit displacement, for PALcode */
- insns[0].reloc[0].code = BFD_RELOC_12_PCREL;
- goto immediate;
-
- case '8': /* 8 bit 0...7 */
- insns[0].reloc[0].code = BFD_RELOC_8;
- goto immediate;
-
- immediate:
- if (*s == ' ')
- s++;
- getExpression (s, &insns[0]);
- s = expr_end;
- /* Handle overflow in certain instructions by converting
- to other instructions. */
- if (insns[0].reloc[0].code == BFD_RELOC_8
- && insns[0].reloc[0].exp.X_op == O_constant
- && (insns[0].reloc[0].exp.X_add_number < 0
- || insns[0].reloc[0].exp.X_add_number > 0xff))
- {
- if (OPCODE (opcode) == 0x10
- && (OP_FCN (opcode) == 0x00 /* addl */
- || OP_FCN (opcode) == 0x40 /* addl/v */
- || OP_FCN (opcode) == 0x20 /* addq */
- || OP_FCN (opcode) == 0x60 /* addq/v */
- || OP_FCN (opcode) == 0x09 /* subl */
- || OP_FCN (opcode) == 0x49 /* subl/v */
- || OP_FCN (opcode) == 0x29 /* subq */
- || OP_FCN (opcode) == 0x69 /* subq/v */
- || OP_FCN (opcode) == 0x02 /* s4addl */
- || OP_FCN (opcode) == 0x22 /* s4addq */
- || OP_FCN (opcode) == 0x0b /* s4subl */
- || OP_FCN (opcode) == 0x2b /* s4subq */
- || OP_FCN (opcode) == 0x12 /* s8addl */
- || OP_FCN (opcode) == 0x32 /* s8addq */
- || OP_FCN (opcode) == 0x1b /* s8subl */
- || OP_FCN (opcode) == 0x3b /* s8subq */
- )
- /* Can we make it fit by negating? */
- && -insns[0].reloc[0].exp.X_add_number < 0xff
- && -insns[0].reloc[0].exp.X_add_number > 0)
- {
- opcode ^= 0x120; /* convert add<=>sub */
- insns[0].reloc[0].exp.X_add_number *= -1;
- }
- else if (at_ok && macro_ok)
- {
- /* Constant value supplied, but it's too large. */
- do_add64 = 1;
- add64_in = ZERO;
- add64_out = AT;
- add64_addend = insns[0].reloc[0].exp.X_add_number;
- opcode &= ~ 0x1000;
- opcode |= (AT << SB);
- insns[0].reloc[0].code = BFD_RELOC_NONE;
- }
- else
- as_bad ("overflow in 8-bit literal field in `operate' format insn");
- }
- else if (insns[0].reloc[0].code == BFD_RELOC_16
- && insns[0].reloc[0].exp.X_op == O_constant
- && !in_range_signed (insns[0].reloc[0].exp.X_add_number,
- 16))
- {
- bfd_vma val = insns[0].reloc[0].exp.X_add_number;
- if (OPCODE (opcode) == 0x08)
- {
- do_add64 = 1;
- add64_in = ZERO;
- add64_out = AT;
- add64_addend = val;
- opcode &= ~0x1000;
- opcode |= (AT << SB);
- insns[0].reloc[0].code = BFD_RELOC_NONE;
- }
- else if (OPCODE (opcode) == 0x09
- && in_range_signed (val >> 16, 16))
- {
- /* ldah with high operand - convert to low */
- insns[0].reloc[0].exp.X_add_number >>= 16;
- }
- else
- as_bad ("I don't know how to handle 32+ bit constants here yet, sorry.");
- }
- else if (insns[0].reloc[0].code == BFD_RELOC_32
- && insns[0].reloc[0].exp.X_op == O_constant)
- {
- bfd_vma val = insns[0].reloc[0].exp.X_add_number;
- bfd_signed_vma sval = val;
- if (val >> 32 != 0
- && sval >> 32 != 0
- && sval >> 32 != -1)
- as_bad ("I don't know how to handle 64 bit constants here yet, sorry.");
- }
- continue;
-
- case 'F':
- {
- int format, length, mode, i;
- char temp[20 /*MAXIMUM_NUMBER_OF_CHARS_FOR_FLOAT*/];
- char *err;
- static const char formats[4] = "FGfd";
- bfd_vma bits, offset;
- char *old_input_line_pointer = input_line_pointer;
-
- input_line_pointer = s;
- SKIP_WHITESPACE ();
- memset (temp, 0, sizeof (temp));
- mode = (opcode >> 26) & 3;
- format = formats[mode];
- err = md_atof (format, temp, &length);
- if (err)
- {
- as_bad ("Bad floating literal: %s", err);
- bits = 0;
- }
- else
- {
- /* Generate little-endian number from byte sequence. */
- bits = 0;
- for (i = length - 1; i >= 0; i--)
- bits += ((bfd_vma)(temp[i] & 0xff)) << (i * 8);
- }
- switch (length)
- {
- case 8:
- offset = get_lit8_offset (bits) - 0x8000;
- insns[0].reloc[0].exp.X_add_symbol = lit8_sym;
- insns[0].reloc[0].exp.X_add_number = 0x8000;
- break;
- case 4:
- offset = get_lit4_offset (bits) - 0x8000;
- insns[0].reloc[0].exp.X_add_symbol = lit4_sym;
- insns[0].reloc[0].exp.X_add_number = 0x8000;
- break;
- default:
- abort ();
- }
- insns[0].reloc[0].exp.X_op = O_symbol;
- offset &= 0xffff;
- num_gen = load_expression (AT, &insns[0]);
- if (lituse_pending)
- {
- insns[num_gen].reloc[0].code = BFD_RELOC_ALPHA_LITUSE;
- insns[num_gen].reloc[0].exp = lituse_basereg;
- lituse_pending = 0;
- }
- insns[num_gen++].opcode = opcode | (AT << SB) | offset;
- opcode = insns[0].opcode;
- s = input_line_pointer;
- input_line_pointer = old_input_line_pointer;
- }
- continue;
+ expression (&exp);
+ if (exp.X_op != O_symbol)
+ {
+ as_fatal ("No symbol after .linkage");
+ }
+ else
+ {
+ p = frag_more (LKP_S_K_SIZE);
+ memset (p, 0, LKP_S_K_SIZE);
+ fix_new_exp (frag_now, p - frag_now->fr_literal, LKP_S_K_SIZE, &exp, 0,\
+ BFD_RELOC_ALPHA_LINKAGE);
+ }
+ demand_empty_rest_of_line ();
- /* The following two.. take advantage of the fact that
- opcode already contains most of what we need to know.
- We just prepend to the instr an "ldah
- $r,%ml(expr)($base)" and turn this one (done later
- after we return) into something like "stq
- $r,%lo(expr)(at)" or "ldq $r,%lo(expr)($r)".
-
- NOTE: This can fail later on at link time if the
- offset from $base actually turns out to be more than
- 2**31 or 2**47 if use_large_offsets is set. */
- case 'P': /* Addressing macros: PUT */
- mask = AT; /* register 'at' */
- /* fall through */
-
- case 'G': /* Addressing macros: GET */
- /* All it is missing is the expression, which is what we
- will get now */
-
- if (*s == ' ')
- s++;
- getExpression (s, &insns[0]);
- s = expr_end;
-
- /* Must check for "lda ..,number" too */
- if (insns[0].reloc[0].exp.X_op == O_big)
- {
- as_warn ("Sorry, not yet. Put bignums in .data section yourself.");
- return -1;
- }
- if (insns[0].reloc[0].exp.X_op == O_constant)
- {
- bfd_vma val = insns[0].reloc[0].exp.X_add_number;
- bfd_vma top, low;
-
- insns[0].reloc[0].code = BFD_RELOC_NONE;
- insns[1].reloc[0].code = BFD_RELOC_NONE;
-
- low = val & 0xffff;
- if (low & 0x8000)
- low -= 0x10000;
- top = val - low;
- if (top)
- {
- do_add64 = 1;
- add64_in = ZERO;
- add64_out = AT;
- add64_addend = top;
- opcode |= AT << SB;
- }
- else
- opcode |= ZERO << SB;
- opcode &= ~0x1000;
- opcode |= low & 0xffff;
- }
- else if (insns[0].reloc[0].exp.X_op == O_symbol)
- {
- unsigned long old_opcode = opcode;
- int tmp_reg = -1;
-
- if (!macro_ok)
- as_bad ("insn requires expansion but `nomacro' specified");
- else if (*args == 'G')
- tmp_reg = mask;
- else if (!at_ok)
- as_bad ("insn expansion requires AT use, but `noat' specified");
- else
- tmp_reg = AT;
- num_gen = load_expression (tmp_reg, insns);
- opcode = insns[0].opcode;
- /* lda is opcode 8, 0x20000000, and the macros that use
- this code have an opcode field of 0. The latter
- require further processing, and we don't have the
- true opcode here. */
- if (OPCODE (old_opcode) != 0
- && OPCODE (old_opcode) != 0x08)
- {
- struct alpha_it *i;
- i = &insns[num_gen++];
- i->opcode = old_opcode | (tmp_reg << SB);
-
- if (lituse_pending)
- {
- i->reloc[0].code = BFD_RELOC_ALPHA_LITUSE;
- i->reloc[0].exp = lituse_basereg;
- lituse_pending = 0;
- }
- }
- }
- else
- {
- /* Not a number */
- num_gen = 2;
- insns[1].reloc[0].exp = insns[0].reloc[0].exp;
+ return;
+}
- /* Generate: ldah REG,x1(GP); OP ?,x0(REG) */
- abort (); /* relocs need fixing */
-#if 0
- insns[1].reloc = RELOC_0_15;
- insns[1].opcode = opcode | mask << SB;
+static void
+s_alpha_fp_save (ignore)
+ int ignore;
+{
- insns[0].reloc = RELOC_16_31;
- opcode = 0x24000000 /*ldah*/ | mask << SA | (base_register << SB);
-#endif
- }
+ alpha_evax_proc.fp_save = tc_get_register (1);
- continue;
+ demand_empty_rest_of_line ();
+ return;
+}
- /* Same failure modes as above, actually most of the
- same code shared. */
- case 'B': /* Builtins */
- args++;
- switch (*args)
- {
- case 'a': /* ldgp */
-
- if (first_32bit_quadrant || no_mixed_code)
- return -1;
- switch (OUTPUT_FLAVOR)
- {
- case bfd_target_aout_flavour:
- /* this is cmu's a.out version */
- insns[0].reloc[0].code = BFD_RELOC_NONE;
- /* generate "zap %r,0xf,%r" to take high 32 bits */
- opcode |= 0x48001600 /* zap ?,#,?*/ | (0xf << SN);
- break;
- case bfd_target_ecoff_flavour:
- /* Given "ldgp R1,N(R2)", turn it into something
- like "ldah R1,###(R2) ; lda R1,###(R1)" with
- appropriate constants and relocations. */
- {
- unsigned long r1, r2;
- unsigned long addend = 0;
-
- num_gen = 2;
- r2 = mask;
- r1 = opcode & 0x3f;
- insns[0].reloc[0].code = BFD_RELOC_ALPHA_GPDISP_HI16;
- insns[0].reloc[0].pcrel = 1;
- insns[0].reloc[0].exp.X_op = O_symbol;
- insns[0].reloc[0].exp.X_add_symbol = gp;
- insns[0].reloc[0].exp.X_add_number = 0;
- insns[0].opcode = (0x24000000 /* ldah */
- | (r1 << SA)
- | (r2 << SB));
- insns[1].reloc[0].code = BFD_RELOC_ALPHA_GPDISP_LO16;
- insns[1].reloc[0].exp.X_op = O_symbol;
- insns[1].reloc[0].exp.X_add_symbol = gp;
- insns[1].reloc[0].exp.X_add_number = 4;
- insns[1].reloc[0].pcrel = 1;
- insns[1].opcode = 0x20000000 | (r1 << SA) | (r1 << SB);
- opcode = insns[0].opcode;
- /* merge in addend */
- insns[1].opcode |= addend & 0xffff;
- insns[0].opcode |= ((addend >> 16)
- + (addend & 0x8000 ? 1 : 0));
- if (r2 == PV)
- ecoff_set_gp_prolog_size (0);
- }
- break;
- default:
- abort ();
- }
- continue;
-
-
- case 'b': /* setgp */
- switch (OUTPUT_FLAVOR)
- {
- case bfd_target_aout_flavour:
- /* generate "zap %r,0xf,$gp" to take high 32 bits */
- opcode |= 0x48001600 /* zap ?,#,?*/
- | (0xf << SN) | (base_register);
- break;
- default:
- abort ();
- }
- continue;
-
- case 'c': /* jsr $r,foo becomes
- lda $27,foo
- jsr $r,($27),foo
- Register 27, t12, is used by convention
- here. */
- {
- struct alpha_it *jsr;
- expressionS etmp;
- struct reloc_data *r;
-
- /* We still have to parse the function name */
- if (*s == ' ')
- s++;
- getExpression (s, &insns[0]);
- etmp = insns[0].reloc[0].exp;
- s = expr_end;
- num_gen = load_expression (PV, &insns[0]);
- note_gpreg (PV);
-
- jsr = &insns[num_gen++];
- jsr->opcode = (pattern->match
- | (mask << SA)
- | (PV << SB)
- | 0);
- if (lituse_pending)
- {
- /* LITUSE wasn't emitted yet */
- jsr->reloc[0].code = BFD_RELOC_ALPHA_LITUSE;
- jsr->reloc[0].exp = lituse_jsr;
- r = &jsr->reloc[1];
- lituse_pending = 0;
- }
- else
- r = &jsr->reloc[0];
- r->exp = etmp;
- r->code = BFD_RELOC_ALPHA_HINT;
- r->pcrel = 1;
- opcode = insns[0].opcode;
- }
- continue;
-
- case 'd':
- /* Sub-word loads and stores. We load the address into
- $at, which might involve using the `P' parameter
- processing too, then emit a sequence to get the job
- done, using unaligned memory accesses and byte
- manipulation, with t9 and t10 as temporaries. */
- {
- /* Characteristics of access. */
- int is_load = 99, is_unsigned = 0, is_unaligned = 0;
- int mode_size, mode;
- /* Register operand. */
- int reg = -1;
- /* Addend for loads and stores. */
- valueT addend;
- /* Which register do we use for the address? */
- int addr;
-
- {
- /* Pick apart name and set flags. */
- const char *s = pattern->name;
-
- if (*s == 'u')
- {
- is_unaligned = 1;
- s++;
- }
-
- if (s[0] == 'l' && s[1] == 'd')
- is_load = 1;
- else if (s[0] == 's' && s[1] == 't')
- is_load = 0;
- else
- as_fatal ("unrecognized sub-word access insn `%s'",
- str);
- s += 2;
-
- mode = *s++;
- if (mode == 'b') mode_size = 1;
- else if (mode == 'w') mode_size = 2;
- else if (mode == 'l') mode_size = 4;
- else if (mode == 'q') mode_size = 8;
- else abort ();
-
- if (*s == 'u')
- {
- is_unsigned = 1;
- s++;
- }
-
- assert (*s == 0);
-
- /* Longwords are always kept sign-extended. */
- if (mode == 'l' && is_unsigned)
- abort ();
- /* There's no special unaligned byte handling. */
- if (mode == 'b' && is_unaligned)
- abort ();
- /* Stores don't care about signedness. */
- if (!is_load && is_unsigned)
- abort ();
- }
-
- if (args[-2] == 'P')
- {
- addr = AT;
- addend = 0;
- }
- else
- {
- /* foo r1,num(r2)
- r2 -> mask
- r1 -> (opcode >> SA) & 31
- num -> insns->reloc[0].*
-
- We want to emit "lda at,num(r2)", since these
- operations require the use of a single register
- with the starting address of the memory operand
- we want to access.
-
- We could probably get away without doing this
- (and use r2 below, with the addend for the
- actual reads and writes) in cases where the
- addend is known to be a multiple of 8. */
- int r2 = mask;
- int r1 = (opcode >> SA) & 31;
-
- if (insns[0].reloc[0].code == BFD_RELOC_NONE)
- addend = 0;
- else if (insns[0].reloc[0].code == BFD_RELOC_16)
- {
- if (insns[0].reloc[0].exp.X_op != O_constant)
- abort ();
- addend = insns[0].reloc[0].exp.X_add_number;
- }
- else
- abort ();
-
- if (addend + mode_size - 1 < 0x7fff
- && (addend % 8) == 0
- && (r2 < T9 || r2 > T12))
- {
- addr = r2;
- num_gen = 0;
- }
- else
- {
- /* Let later relocation processing deal
- with the addend field. */
- insns[num_gen-1].opcode = (0x20000000 /* lda */
- | (AT << SA)
- | (r2 << SB));
- addr = AT;
- addend = 0;
- }
- reg = r1;
- }
-
- /* Because the emit_* routines append directly to
- the current frag, we now need to flush any
- pending insns. */
- {
- int i;
- for (i = 0; i < num_gen; i++)
- emit_insn (&insns[i]);
- num_gen = 0;
- }
-
- if (is_load)
- {
- int reg2, reg3 = -1;
-
- if (is_unaligned)
- reg2 = T9, reg3 = T10;
- else
- reg2 = reg;
-
- emit_load_unal (addr, addend, T9);
- if (is_unaligned)
- emit_load_unal (addr, addend + mode_size - 1, T10);
- emit_extract_r (T9, addr, reg2, mode, 'l');
- if (is_unaligned)
- {
- emit_extract_r (T10, addr, reg3, mode, 'h');
- emit_bis_r (T9, T10, reg);
- }
- if (!is_unsigned)
- emit_sign_extend (reg, mode_size * 8);
- }
- else
- {
- /* The second word gets processed first
- because if the address does turn out to be
- aligned, the processing for the second word
- will be pushing around all-zeros, and the
- entire value will be handled as the `first'
- word. So we want to store the `first' word
- last. */
- /* Pair these up so that the memory loads get
- separated from each other, as well as being
- well in advance of the uses of the values
- loaded. */
- if (is_unaligned)
- {
- emit_load_unal (addr, addend + mode_size - 1, T11);
- emit_insert_r (reg, addr, T12, mode, 'h');
- }
- emit_load_unal (addr, addend, T9);
- emit_insert_r (reg, addr, T10, mode, 'l');
- if (is_unaligned)
- emit_mask_r (T12, addr, T12, mode, 'h');
- emit_mask_r (T10, addr, T10, mode, 'l');
- if (is_unaligned)
- emit_bis_r (T11, T12, T11);
- emit_bis_r (T9, T10, T9);
- if (is_unaligned)
- emit_store_unal (addr, addend + mode_size - 1, T11);
- emit_store_unal (addr, addend, T9);
- }
- }
- return 0;
-
- /* DIVISION and MODULUS. Yech.
- Convert OP x,y,result
- to mov x,t10
- mov y,t11
- jsr t9, __OP
- mov t12,result
-
- with appropriate optimizations if t10,t11,t12
- are the registers specified by the compiler.
- We are missing an obvious optimization
- opportunity here; if the ldq generated by the
- jsr assembly requires a cycle or two to make
- the value available, initiating it before one
- or two of the mov instructions would result in
- faster execution. */
- case '0': /* reml */
- case '1': /* divl */
- case '2': /* remq */
- case '3': /* divq */
- case '4': /* remlu */
- case '5': /* divlu */
- case '6': /* remqu */
- case '7': /* divqu */
- {
- static char func[8][6] = {
- "reml", "divl", "remq", "divq",
- "remlu", "divlu", "remqu", "divqu"
- };
- char expansion[64];
- int reg;
-
- /* All regs parsed, in opcode */
-
- /* Do the expansions, one instr at a time */
-
- reg = (opcode >> SA) & 31;
- if (reg != T10)
- {
- /* x->t10 */
- sprintf (expansion, "mov $%d,$%d", reg, T10);
- md_assemble (expansion);
- }
- reg = (opcode >> SB) & 31;
- if (reg == T10)
- /* we already overwrote it! */
- abort ();
- else if (reg != T11)
- {
- /* y->t11 */
- sprintf (expansion, "mov $%d,$%d", reg, T11);
- md_assemble (expansion);
- }
- sprintf (expansion, "lda $%d,__%s", PV, func[*args - '0']);
- md_assemble (expansion);
- sprintf (expansion, "jsr $%d,($%d),__%s", T9, PV,
- func[*args - '0']);
- md_assemble (expansion);
-#if 0 /* huh? */
- if (!first_32bit_quadrant)
- {
- sprintf (expansion,
- "zap $%d,0xf,$%d",
- T9, base_register);
- md_assemble (expansion);
- }
-#endif
- sprintf (expansion, "ldgp $%d,0($%d)",
- base_register, T9);
- md_assemble (expansion);
-
- /* Use insns[0] to get at the result */
- if ((reg = (opcode & 31)) != PV)
- opcode = (0x47e00400 /* or zero,zero,zero */
- | (PV << SB)
- | reg /* Rc */ ); /* pv->z */
- else
- num_gen = 0;
- }
- continue;
- }
- /* fall through */
+static void
+s_alpha_mask (ignore)
+ int ignore;
+{
+ long val;
- default:
- abort ();
- }
- break;
- }
- error:
- if (match == 0)
- {
- /* Args don't match. */
- if (&pattern[1] - alpha_opcodes < NUMOPCODES
- && !strcmp (pattern->name, pattern[1].name))
- {
- ++pattern;
- s = argsStart;
- continue;
- }
- else
- {
- as_warn ("Illegal operands");
- return -1;
- }
- }
- else
- {
- /* Args match, see if a float instructions and -nofloats */
- if (nofloats && pattern->isa_float)
- return -1;
- }
- break;
+ if (get_absolute_expression_and_terminator (&val) != ',')
+ {
+ as_warn ("Bad .mask directive");
+ --input_line_pointer;
}
-
- if (do_add64)
+ else
{
- /* If opcode represents an addq instruction, and the addend we
- are using fits in a 16 bit range, we can change the addq
- directly into an lda rather than emitting an lda followed by
- an addq. */
- if (OPCODE (opcode) == 0x10
- && OP_FCN (opcode) == 0x20 /* addq */
- && add64_in == ZERO
- && add64_out == AT
- && in_range_signed (add64_addend, 16))
- {
- opcode = (0x20000000 /* lda */
- | (((opcode >> SC) & 0x1f) << SA)
- | (((opcode >> SA) & 0x1f) << SB)
- | (add64_addend & 0xffff));
- }
- else
- emit_add64 (add64_in, add64_out, add64_addend);
+ alpha_evax_proc.imask = val;
+ (void)get_absolute_expression ();
}
+ demand_empty_rest_of_line ();
- insns[0].opcode = opcode;
- return num_gen;
+ return;
}
-/* Turn a string in input_line_pointer into a floating point constant
- of type type, and store the appropriate bytes in *litP. The number
- of LITTLENUMS emitted is stored in *sizeP. An error message is
- returned, or NULL on OK. */
-
-/* Equal to MAX_PRECISION in atof-ieee.c */
-#define MAX_LITTLENUMS 6
-char *
-md_atof (type, litP, sizeP)
- char type;
- char *litP;
- int *sizeP;
+static void
+s_alpha_fmask (ignore)
+ int ignore;
{
- int prec;
- LITTLENUM_TYPE words[MAX_LITTLENUMS];
- LITTLENUM_TYPE *wordP;
- char *t;
- char *atof_ieee (), *vax_md_atof ();
+ long val;
- switch (type)
+ if (get_absolute_expression_and_terminator (&val) != ',')
{
- /* VAX floats */
- case 'G':
- /* VAX md_atof doesn't like "G" for some reason. */
- type = 'g';
- case 'F':
- case 'D':
- return vax_md_atof (type, litP, sizeP);
+ as_warn ("Bad .fmask directive");
+ --input_line_pointer;
+ }
+ else
+ {
+ alpha_evax_proc.fmask = val;
+ (void) get_absolute_expression ();
+ }
+ demand_empty_rest_of_line ();
- /* IEEE floats */
- case 'f':
- prec = 2;
- break;
+ return;
+}
- case 'd':
- prec = 4;
- break;
+static void
+s_alpha_end (ignore)
+ int ignore;
+{
+ char c;
- case 'x':
- case 'X':
- prec = 6;
- break;
+ c = get_symbol_end ();
+ *input_line_pointer = c;
+ demand_empty_rest_of_line ();
+ alpha_evax_proc.symbol = 0;
- case 'p':
- case 'P':
- prec = 6;
- break;
+ return;
+}
- default:
- *sizeP = 0;
- return "Bad call to MD_ATOF()";
- }
- t = atof_ieee (input_line_pointer, type, words);
- if (t)
- input_line_pointer = t;
- *sizeP = prec * sizeof (LITTLENUM_TYPE);
- for (wordP = words + prec - 1; prec--;)
- {
- md_number_to_chars (litP, (long) (*wordP--), sizeof (LITTLENUM_TYPE));
- litP += sizeof (LITTLENUM_TYPE);
- }
+static void
+s_alpha_file (ignore)
+ int ignore;
+{
+ char* s;
+ int length;
+ extern char *demand_copy_string PARAMS ((int *lenP));
- return 0;
+ get_absolute_expression ();
+ s = demand_copy_string (&length);
+ demand_empty_rest_of_line ();
+
+ return;
}
+#endif /* OBJ_EVAX */
-void
-md_bignum_to_chars (buf, bignum, nchars)
- char *buf;
- LITTLENUM_TYPE *bignum;
- int nchars;
+/* Handle the .gprel32 pseudo op. */
+
+static void
+s_alpha_gprel32 (ignore)
+ int ignore;
{
- while (nchars)
- {
- LITTLENUM_TYPE work = *bignum++;
- int nb = CHARS_PER_LITTLENUM;
+ expressionS e;
+ char *p;
- do
- {
- *buf++ = work & ((1 << BITS_PER_CHAR) - 1);
- if (--nchars == 0)
- return;
- work >>= BITS_PER_CHAR;
- }
- while (--nb);
+ SKIP_WHITESPACE ();
+ expression (&e);
+
+#ifdef OBJ_ELF
+ switch (e.X_op)
+ {
+ case O_constant:
+ e.X_add_symbol = section_symbol(absolute_section);
+ e.X_op = O_symbol;
+ /* FALLTHRU */
+ case O_symbol:
+ break;
+ default:
+ abort();
}
+#else
+#ifdef OBJ_ECOFF
+ switch (e.X_op)
+ {
+ case O_constant:
+ e.X_add_symbol = section_symbol (absolute_section);
+ /* fall through */
+ case O_symbol:
+ e.X_op = O_subtract;
+ e.X_op_symbol = alpha_gp_symbol;
+ break;
+ default:
+ abort ();
+ }
+#endif
+#endif
+
+ if (alpha_auto_align_on && alpha_current_align < 2)
+ alpha_align (2, (char *) NULL, alpha_insn_label);
+ if (alpha_current_align > 2)
+ alpha_current_align = 2;
+ alpha_insn_label = NULL;
+
+ p = frag_more (4);
+ memset (p, 0, 4);
+ fix_new_exp (frag_now, p-frag_now->fr_literal, 4,
+ &e, 0, BFD_RELOC_GPREL32);
}
-\f
-CONST char *md_shortopts = "Fm:g";
-struct option md_longopts[] = {
-#define OPTION_32ADDR (OPTION_MD_BASE)
- {"32addr", no_argument, NULL, OPTION_32ADDR},
- {NULL, no_argument, NULL, 0}
-};
-size_t md_longopts_size = sizeof(md_longopts);
-int
-md_parse_option (c, arg)
- int c;
- char *arg;
+/* Handle floating point allocation pseudo-ops. This is like the
+ generic vresion, but it makes sure the current label, if any, is
+ correctly aligned. */
+
+static void
+s_alpha_float_cons (type)
+ int type;
{
- switch (c)
+ int log_size;
+
+ switch (type)
{
+ default:
+ case 'f':
case 'F':
- nofloats = 1;
+ log_size = 2;
break;
- case OPTION_32ADDR:
- addr32 = 1;
- break;
-
- case 'g':
- /* Ignore `-g' so gcc can provide this option to the Digital
- UNIX assembler, which otherwise would throw away info that
- mips-tfile needs. */
+ case 'd':
+ case 'D':
+ case 'G':
+ log_size = 3;
break;
- default:
- return 0;
+ case 'x':
+ case 'X':
+ case 'p':
+ case 'P':
+ log_size = 4;
+ break;
}
- return 1;
-}
+ if (alpha_auto_align_on && alpha_current_align < log_size)
+ alpha_align (log_size, (char *) NULL, alpha_insn_label);
+ if (alpha_current_align > log_size)
+ alpha_current_align = log_size;
+ alpha_insn_label = NULL;
-void
-md_show_usage (stream)
- FILE *stream;
-{
- fprintf(stream, "\
-Alpha options:\n\
--32addr treat addresses as 32-bit values\n\
--F lack floating point instructions support\n\
--m21064 | -m21066 | -m21164\n\
- specify variant of Alpha architecture\n");
+ float_cons (type);
}
-\f
+
+/* Handle the .proc pseudo op. We don't really do much with it except
+ parse it. */
+
static void
-s_proc (is_static)
+s_alpha_proc (is_static)
int is_static;
{
- /* XXXX Align to cache linesize XXXXX */
char *name;
char c;
char *p;
demand_empty_rest_of_line ();
}
+/* Handle the .set pseudo op. This is used to turn on and off most of
+ the assembler features. */
+
static void
s_alpha_set (x)
int x;
if (!strcmp ("reorder", s))
/* ignore */ ;
else if (!strcmp ("at", s))
- at_ok = yesno;
+ alpha_noat_on = !yesno;
else if (!strcmp ("macro", s))
- macro_ok = yesno;
+ alpha_macros_on = yesno;
else if (!strcmp ("move", s))
/* ignore */ ;
else if (!strcmp ("volatile", s))
/* ignore */ ;
else
as_warn ("Tried to .set unrecognized mode `%s'", name);
+
*input_line_pointer = ch;
demand_empty_rest_of_line ();
}
-/* @@ Is this right?? */
-long
-md_pcrel_from (fixP)
- fixS *fixP;
+/* Handle the .base pseudo op. This changes the assembler's notion of
+ the $gp register. */
+
+static void
+s_alpha_base (ignore)
+ int ignore;
{
- valueT addr = fixP->fx_where + fixP->fx_frag->fr_address;
- switch (fixP->fx_r_type)
+#if 0
+ if (first_32bit_quadrant)
{
- case BFD_RELOC_ALPHA_GPDISP_HI16:
- case BFD_RELOC_ALPHA_GPDISP_LO16:
- return addr;
- default:
- return fixP->fx_size + addr;
+ /* not fatal, but it might not work in the end */
+ as_warn ("File overrides no-base-register option.");
+ first_32bit_quadrant = 0;
+ }
+#endif
+
+ SKIP_WHITESPACE ();
+ if (*input_line_pointer == '$')
+ { /* $rNN form */
+ input_line_pointer++;
+ if (*input_line_pointer == 'r')
+ input_line_pointer++;
+ }
+
+ alpha_gp_register = get_absolute_expression ();
+ if (alpha_gp_register < 0 || alpha_gp_register > 31)
+ {
+ alpha_gp_register = AXP_REG_GP;
+ as_warn ("Bad base register, using $%d.", alpha_gp_register);
}
+
+ demand_empty_rest_of_line ();
}
/* Handle the .align pseudo-op. This aligns to a power of two. It
s_alpha_align (ignore)
int ignore;
{
- register int temp;
- register long temp_fill;
+ int align;
+ char fill, *pfill;
long max_alignment = 15;
- temp = get_absolute_expression ();
- if (temp > max_alignment)
- as_bad ("Alignment too large: %d. assumed.", temp = max_alignment);
- else if (temp < 0)
+ align = get_absolute_expression ();
+ if (align > max_alignment)
{
- as_warn ("Alignment negative: 0 assumed.");
- temp = 0;
+ align = max_alignment;
+ as_bad ("Alignment too large: %d. assumed", align);
+ }
+ else if (align < 0)
+ {
+ as_warn ("Alignment negative: 0 assumed");
+ align = 0;
}
+
if (*input_line_pointer == ',')
{
input_line_pointer++;
- temp_fill = get_absolute_expression ();
+ fill = get_absolute_expression ();
+ pfill = &fill;
}
else
- temp_fill = 0;
- if (temp)
+ pfill = NULL;
+
+ if (align != 0)
{
- auto_align = 1;
- alpha_align (temp, (int) temp_fill, insn_label);
+ alpha_auto_align_on = 1;
+ alpha_align (align, pfill, alpha_insn_label);
}
else
{
- auto_align = 0;
+ alpha_auto_align_on = 0;
}
demand_empty_rest_of_line ();
}
+/* Hook the normal string processor to reset known alignment. */
+
static void
-alpha_align (n, fill, label)
- int n;
- int fill;
- symbolS *label;
+s_alpha_stringer (terminate)
+ int terminate;
{
- if (fill == 0
- && (now_seg == text_section
- || !strcmp (now_seg->name, ".init")
- || !strcmp (now_seg->name, ".fini"))
- && n > 2)
- {
- static const unsigned char nop_pattern[] = { 0x1f, 0x04, 0xff, 0x47 };
- /* First, make sure we're on a four-byte boundary, in case
- someone has been putting .byte values into the text section.
- The DEC assembler silently fills with unaligned no-op
- instructions. This will zero-fill, then nop-fill with proper
- alignment. */
- frag_align (2, fill);
- frag_align_pattern (n, nop_pattern, sizeof (nop_pattern));
- }
- else
- frag_align (n, fill);
-
- if (label != NULL)
- {
- assert (S_GET_SEGMENT (label) == now_seg);
- label->sy_frag = frag_now;
- S_SET_VALUE (label, (valueT) frag_now_fix ());
- }
+ alpha_current_align = 0;
+ alpha_insn_label = NULL;
+ stringer (terminate);
}
-/* This function is called just before the generic pseudo-ops output
- something. It just clears insn_label. */
+/* Hook the normal space processing to reset known alignment. */
-void
-alpha_flush_pending_output ()
+static void
+s_alpha_space (ignore)
+ int ignore;
{
- insn_label = NULL;
+ alpha_current_align = 0;
+ alpha_insn_label = NULL;
+ s_space (ignore);
}
-/* Handle data allocation pseudo-ops. This is like the generic
- version, but it makes sure the current label, if any, is correctly
- aligned. */
+/* Hook into cons for auto-alignment. */
-static void
-s_alpha_cons (log_size)
- int log_size;
+void
+alpha_cons_align (size)
+ int size;
{
- if (log_size > 0 && auto_align)
- alpha_align (log_size, 0, insn_label);
- insn_label = NULL;
- cons (1 << log_size);
+ int log_size;
+
+ log_size = 0;
+ while ((size >>= 1) != 0)
+ ++log_size;
+
+ if (alpha_auto_align_on && alpha_current_align < log_size)
+ alpha_align (log_size, (char *) NULL, alpha_insn_label);
+ if (alpha_current_align > log_size)
+ alpha_current_align = log_size;
+ alpha_insn_label = NULL;
}
+\f
+/* The macro table */
+
+const struct alpha_macro alpha_macros[] = {
+/* Load/Store macros */
+ { "lda", emit_lda, NULL,
+ { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
+ MACRO_IR, MACRO_EXP, MACRO_EOA } },
+ { "ldah", emit_ldah, NULL,
+ { MACRO_IR, MACRO_EXP, MACRO_EOA } },
+
+ { "ldl", emit_ir_load, "ldl",
+ { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
+ MACRO_IR, MACRO_EXP, MACRO_EOA } },
+ { "ldl_l", emit_ir_load, "ldl_l",
+ { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
+ MACRO_IR, MACRO_EXP, MACRO_EOA } },
+ { "ldq", emit_ir_load, "ldq",
+ { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
+ MACRO_IR, MACRO_EXP, MACRO_EOA } },
+ { "ldq_l", emit_ir_load, "ldq_l",
+ { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
+ MACRO_IR, MACRO_EXP, MACRO_EOA } },
+ { "ldq_u", emit_ir_load, "ldq_u",
+ { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
+ MACRO_IR, MACRO_EXP, MACRO_EOA } },
+ { "ldf", emit_loadstore, "ldf",
+ { MACRO_FPR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
+ MACRO_FPR, MACRO_EXP, MACRO_EOA } },
+ { "ldg", emit_loadstore, "ldg",
+ { MACRO_FPR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
+ MACRO_FPR, MACRO_EXP, MACRO_EOA } },
+ { "lds", emit_loadstore, "lds",
+ { MACRO_FPR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
+ MACRO_FPR, MACRO_EXP, MACRO_EOA } },
+ { "ldt", emit_loadstore, "ldt",
+ { MACRO_FPR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
+ MACRO_FPR, MACRO_EXP, MACRO_EOA } },
+
+ { "ldb", emit_ldX, (void *)0,
+ { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
+ MACRO_IR, MACRO_EXP, MACRO_EOA } },
+ { "ldbu", emit_ldXu, (void *)0,
+ { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
+ MACRO_IR, MACRO_EXP, MACRO_EOA } },
+ { "ldw", emit_ldX, (void *)1,
+ { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
+ MACRO_IR, MACRO_EXP, MACRO_EOA } },
+ { "ldwu", emit_ldXu, (void *)1,
+ { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
+ MACRO_IR, MACRO_EXP, MACRO_EOA } },
+
+ { "uldw", emit_uldX, (void*)1,
+ { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
+ MACRO_IR, MACRO_EXP, MACRO_EOA } },
+ { "uldwu", emit_uldXu, (void*)1,
+ { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
+ MACRO_IR, MACRO_EXP, MACRO_EOA } },
+ { "uldl", emit_uldX, (void*)2,
+ { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
+ MACRO_IR, MACRO_EXP, MACRO_EOA } },
+ { "uldlu", emit_uldXu, (void*)2,
+ { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
+ MACRO_IR, MACRO_EXP, MACRO_EOA } },
+ { "uldq", emit_uldXu, (void*)3,
+ { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
+ MACRO_IR, MACRO_EXP, MACRO_EOA } },
+
+ { "ldgp", emit_ldgp, NULL,
+ { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA } },
+
+ { "ldi", emit_lda, NULL,
+ { MACRO_IR, MACRO_EXP, MACRO_EOA } },
+ { "ldil", emit_ldil, NULL,
+ { MACRO_IR, MACRO_EXP, MACRO_EOA } },
+ { "ldiq", emit_lda, NULL,
+ { MACRO_IR, MACRO_EXP, MACRO_EOA } },
+#if 0
+ { "ldif" emit_ldiq, NULL,
+ { MACRO_FPR, MACRO_EXP, MACRO_EOA } },
+ { "ldid" emit_ldiq, NULL,
+ { MACRO_FPR, MACRO_EXP, MACRO_EOA } },
+ { "ldig" emit_ldiq, NULL,
+ { MACRO_FPR, MACRO_EXP, MACRO_EOA } },
+ { "ldis" emit_ldiq, NULL,
+ { MACRO_FPR, MACRO_EXP, MACRO_EOA } },
+ { "ldit" emit_ldiq, NULL,
+ { MACRO_FPR, MACRO_EXP, MACRO_EOA } },
+#endif
-/* Handle floating point allocation pseudo-ops. This is like the
- generic vresion, but it makes sure the current label, if any, is
- correctly aligned. */
+ { "stl", emit_loadstore, "stl",
+ { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
+ MACRO_IR, MACRO_EXP, MACRO_EOA } },
+ { "stl_c", emit_loadstore, "stl_c",
+ { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
+ MACRO_IR, MACRO_EXP, MACRO_EOA } },
+ { "stq", emit_loadstore, "stq",
+ { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
+ MACRO_IR, MACRO_EXP, MACRO_EOA } },
+ { "stq_c", emit_loadstore, "stq_c",
+ { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
+ MACRO_IR, MACRO_EXP, MACRO_EOA } },
+ { "stq_u", emit_loadstore, "stq_u",
+ { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
+ MACRO_IR, MACRO_EXP, MACRO_EOA } },
+ { "stf", emit_loadstore, "stf",
+ { MACRO_FPR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
+ MACRO_FPR, MACRO_EXP, MACRO_EOA } },
+ { "stg", emit_loadstore, "stg",
+ { MACRO_FPR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
+ MACRO_FPR, MACRO_EXP, MACRO_EOA } },
+ { "sts", emit_loadstore, "sts",
+ { MACRO_FPR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
+ MACRO_FPR, MACRO_EXP, MACRO_EOA } },
+ { "stt", emit_loadstore, "stt",
+ { MACRO_FPR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
+ MACRO_FPR, MACRO_EXP, MACRO_EOA } },
+
+ { "stb", emit_stX, (void*)0,
+ { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
+ MACRO_IR, MACRO_EXP, MACRO_EOA } },
+ { "stw", emit_stX, (void*)1,
+ { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
+ MACRO_IR, MACRO_EXP, MACRO_EOA } },
+ { "ustw", emit_ustX, (void*)1,
+ { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
+ MACRO_IR, MACRO_EXP, MACRO_EOA } },
+ { "ustl", emit_ustX, (void*)2,
+ { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
+ MACRO_IR, MACRO_EXP, MACRO_EOA } },
+ { "ustq", emit_ustX, (void*)3,
+ { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
+ MACRO_IR, MACRO_EXP, MACRO_EOA } },
+
+/* Arithmetic macros */
+#if 0
+ { "absl" emit_absl, 1, { IR } },
+ { "absl" emit_absl, 2, { IR, IR } },
+ { "absl" emit_absl, 2, { EXP, IR } },
+ { "absq" emit_absq, 1, { IR } },
+ { "absq" emit_absq, 2, { IR, IR } },
+ { "absq" emit_absq, 2, { EXP, IR } },
+#endif
-static void
-s_alpha_float_cons (type)
- int type;
+ { "sextb", emit_sextX, (void *)0,
+ { MACRO_IR, MACRO_IR, MACRO_EOA,
+ MACRO_IR, MACRO_EOA,
+ /* MACRO_EXP, MACRO_IR, MACRO_EOA */ } },
+ { "sextw", emit_sextX, (void *)1,
+ { MACRO_IR, MACRO_IR, MACRO_EOA,
+ MACRO_IR, MACRO_EOA,
+ /* MACRO_EXP, MACRO_IR, MACRO_EOA */ } },
+
+ { "divl", emit_division, "__divl",
+ { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
+ MACRO_IR, MACRO_IR, MACRO_EOA,
+ /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
+ MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
+ { "divlu", emit_division, "__divlu",
+ { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
+ MACRO_IR, MACRO_IR, MACRO_EOA,
+ /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
+ MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
+ { "divq", emit_division, "__divq",
+ { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
+ MACRO_IR, MACRO_IR, MACRO_EOA,
+ /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
+ MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
+ { "divqu", emit_division, "__divqu",
+ { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
+ MACRO_IR, MACRO_IR, MACRO_EOA,
+ /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
+ MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
+ { "reml", emit_division, "__reml",
+ { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
+ MACRO_IR, MACRO_IR, MACRO_EOA,
+ /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
+ MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
+ { "remlu", emit_division, "__remlu",
+ { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
+ MACRO_IR, MACRO_IR, MACRO_EOA,
+ /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
+ MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
+ { "remq", emit_division, "__remq",
+ { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
+ MACRO_IR, MACRO_IR, MACRO_EOA,
+ /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
+ MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
+ { "remqu", emit_division, "__remqu",
+ { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
+ MACRO_IR, MACRO_IR, MACRO_EOA,
+ /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
+ MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
+
+ { "jsr", emit_jsrjmp, "jsr",
+ { MACRO_PIR, MACRO_EXP, MACRO_EOA,
+ MACRO_PIR, MACRO_EOA,
+ MACRO_IR, MACRO_EXP, MACRO_EOA,
+ MACRO_EXP, MACRO_EOA } },
+ { "jmp", emit_jsrjmp, "jmp",
+ { MACRO_PIR, MACRO_EXP, MACRO_EOA,
+ MACRO_PIR, MACRO_EOA,
+ MACRO_IR, MACRO_EXP, MACRO_EOA,
+ MACRO_EXP, MACRO_EOA } },
+ { "ret", emit_retjcr, "ret",
+ { MACRO_IR, MACRO_EXP, MACRO_EOA,
+ MACRO_IR, MACRO_EOA,
+ MACRO_PIR, MACRO_EXP, MACRO_EOA,
+ MACRO_PIR, MACRO_EOA,
+ MACRO_EXP, MACRO_EOA,
+ MACRO_EOA } },
+ { "jcr", emit_retjcr, "jcr",
+ { MACRO_IR, MACRO_EXP, MACRO_EOA,
+ MACRO_IR, MACRO_EOA,
+ MACRO_PIR, MACRO_EXP, MACRO_EOA,
+ MACRO_PIR, MACRO_EOA,
+ MACRO_EXP, MACRO_EOA,
+ MACRO_EOA } },
+ { "jsr_coroutine", emit_retjcr, "jcr",
+ { MACRO_IR, MACRO_EXP, MACRO_EOA,
+ MACRO_IR, MACRO_EOA,
+ MACRO_PIR, MACRO_EXP, MACRO_EOA,
+ MACRO_PIR, MACRO_EOA,
+ MACRO_EXP, MACRO_EOA,
+ MACRO_EOA } },
+};
+
+static const int alpha_num_macros
+ = sizeof(alpha_macros) / sizeof(*alpha_macros);
+
+/* The target specific pseudo-ops which we support. */
+
+const pseudo_typeS md_pseudo_table[] =
{
- if (auto_align)
- {
- int log_size;
+ {"common", s_comm, 0}, /* is this used? */
+#ifndef OBJ_ELF
+ {"comm", s_alpha_comm, 0}, /* osf1 compiler does this */
+#endif
+ {"text", s_alpha_text, 0},
+ {"data", s_alpha_data, 0},
+#if defined (OBJ_ECOFF) || defined (OBJ_EVAX)
+ {"rdata", s_alpha_rdata, 0},
+#endif
+#ifdef OBJ_ECOFF
+ {"sdata", s_alpha_sdata, 0},
+#endif
+#ifdef OBJ_ELF
+ {"section", s_alpha_section, 0},
+ {"section.s", s_alpha_section, 0},
+ {"sect", s_alpha_section, 0},
+ {"sect.s", s_alpha_section, 0},
+#endif
+#ifdef OBJ_EVAX
+ { "pdesc", s_alpha_pdesc, 0},
+ { "linkage", s_alpha_linkage, 0},
+ { "ent", s_alpha_ent, 0},
+ { "frame", s_alpha_frame, 0},
+ { "fp_save", s_alpha_fp_save, 0},
+ { "mask", s_alpha_mask, 0},
+ { "fmask", s_alpha_fmask, 0},
+ { "link", s_alpha_link, 0},
+ { "end", s_alpha_end, 0},
+ { "file", s_alpha_file, 0},
+#endif
+ {"gprel32", s_alpha_gprel32, 0},
+ {"t_floating", s_alpha_float_cons, 'd'},
+ {"s_floating", s_alpha_float_cons, 'f'},
+ {"f_floating", s_alpha_float_cons, 'F'},
+ {"g_floating", s_alpha_float_cons, 'G'},
+ {"d_floating", s_alpha_float_cons, 'D'},
- switch (type)
- {
- default:
- case 'f':
- case 'F':
- log_size = 2;
- break;
+ {"proc", s_alpha_proc, 0},
+ {"aproc", s_alpha_proc, 1},
+ {"set", s_alpha_set, 0},
+ {"reguse", s_ignore, 0},
+ {"livereg", s_ignore, 0},
+ {"base", s_alpha_base, 0}, /*??*/
+ {"option", s_ignore, 0},
+ {"prologue", s_ignore, 0},
+ {"aent", s_ignore, 0},
+ {"ugen", s_ignore, 0},
+ {"eflag", s_ignore, 0},
- case 'd':
- case 'D':
- case 'G':
- log_size = 3;
- break;
+ {"align", s_alpha_align, 0},
+ {"double", s_alpha_float_cons, 'd'},
+ {"float", s_alpha_float_cons, 'f'},
+ {"single", s_alpha_float_cons, 'f'},
+ {"ascii", s_alpha_stringer, 0},
+ {"asciz", s_alpha_stringer, 1},
+ {"string", s_alpha_stringer, 1},
+ {"space", s_alpha_space, 0},
+ {"skip", s_alpha_space, 0},
+ {"zero", s_alpha_space, 0},
- case 'x':
- case 'X':
- case 'p':
- case 'P':
- log_size = 4;
- break;
- }
+/* We don't do any optimizing, so we can safely ignore these. */
+ {"noalias", s_ignore, 0},
+ {"alias", s_ignore, 0},
- alpha_align (log_size, 0, insn_label);
- }
+ {NULL, 0, 0},
+};
- insn_label = NULL;
- float_cons (type);
+\f
+/* Build a BFD section with its flags set appropriately for the .lita,
+ .lit8, or .lit4 sections. */
+
+static void
+create_literal_section (name, secp, symp)
+ const char *name;
+ segT *secp;
+ symbolS **symp;
+{
+ segT current_section = now_seg;
+ int current_subsec = now_subseg;
+ segT new_sec;
+
+ *secp = new_sec = subseg_new (name, 0);
+ subseg_set (current_section, current_subsec);
+ bfd_set_section_alignment (stdoutput, new_sec, 4);
+ bfd_set_section_flags (stdoutput, new_sec,
+ SEC_RELOC | SEC_ALLOC | SEC_LOAD | SEC_READONLY
+ | SEC_DATA);
+
+ S_CLEAR_EXTERNAL (*symp = section_symbol (new_sec));
}
-/* This function is called whenever a label is defined. It is used to
- adjust the label when an automatic alignment occurs. */
+#ifdef OBJ_ECOFF
-void
-alpha_define_label (sym)
- symbolS *sym;
+/* @@@ GP selection voodoo. All of this seems overly complicated and
+ unnecessary; which is the primary reason it's for ECOFF only. */
+
+static inline void
+maybe_set_gp (sec)
+ asection *sec;
{
- insn_label = sym;
+ bfd_vma vma;
+ if (!sec)
+ return;
+ vma = bfd_get_section_vma (foo, sec);
+ if (vma && vma < alpha_gp_value)
+ alpha_gp_value = vma;
}
-int
-md_apply_fix (fixP, valueP)
- fixS *fixP;
- valueT *valueP;
+static void
+select_gp_value ()
{
- valueT value;
- int size;
- valueT addend;
- char *p = fixP->fx_frag->fr_literal + fixP->fx_where;
+ assert (alpha_gp_value == 0);
- value = *valueP;
+ /* Get minus-one in whatever width... */
+ alpha_gp_value = 0; alpha_gp_value--;
- switch (fixP->fx_r_type)
- {
- /* The GPDISP relocations are processed internally with a symbol
- referring to the current function; we need to drop in a value
- which, when added to the address of the start of the function,
- gives the desired GP. */
- case BFD_RELOC_ALPHA_GPDISP_HI16:
- case BFD_RELOC_ALPHA_GPDISP_LO16:
- addend = value;
- if (fixP->fx_r_type == BFD_RELOC_ALPHA_GPDISP_HI16)
- {
- assert (fixP->fx_next->fx_r_type == BFD_RELOC_ALPHA_GPDISP_LO16);
-#ifdef DEBUG1
- printf ("hi16: ");
- fprintf_vma (stdout, addend);
- printf ("\n");
-#endif
- if (addend & 0x8000)
- addend += 0x10000;
- addend >>= 16;
- fixP->fx_offset = 4; /* @@ Compute this using fx_next. */
- }
- else
- {
-#ifdef DEBUG1
- printf ("lo16: ");
- fprintf_vma (stdout, addend);
- printf ("\n");
+ /* Select the smallest VMA of these existing sections. */
+ maybe_set_gp (alpha_lita_section);
+#if 0
+ /* These were disabled before -- should we use them? */
+ maybe_set_gp (sdata);
+ maybe_set_gp (lit8_sec);
+ maybe_set_gp (lit4_sec);
#endif
- addend &= 0xffff;
- fixP->fx_offset = 0;
- }
- md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
- addend, 2);
- fixP->fx_addsy = section_symbol (absolute_section);
- fixP->fx_offset += fixP->fx_frag->fr_address + fixP->fx_where;
- break;
-
- case BFD_RELOC_8:
- /* Write 8 bits, shifted left 13 bit positions. */
- value &= 0xff;
- p++;
- *p &= 0x1f;
- *p |= (value << 5) & 0xe0;
- value >>= 3;
- p++;
- *p &= 0xe0;
- *p |= value;
- value >>= 5;
- fixP->fx_done = 1;
- if (value != 0)
- as_bad_where (fixP->fx_file, fixP->fx_line,
- "overflow in type-%d reloc", (int) fixP->fx_r_type);
- return 3;
-
- case BFD_RELOC_32:
- size = 4;
- goto do_it;
- case BFD_RELOC_64:
- size = 8;
- goto do_it;
- case BFD_RELOC_16:
- /* Don't want overflow checking. */
- size = 2;
- do_it:
- if (fixP->fx_pcrel == 0
- && fixP->fx_addsy == 0)
- {
- md_number_to_chars (p, value, size);
- /* @@ Overflow checks?? */
- goto done;
- }
- break;
- case BFD_RELOC_26:
- if (fixP->fx_addsy != 0
- && fixP->fx_addsy->bsym->section != absolute_section)
- as_bad_where (fixP->fx_file, fixP->fx_line,
- "PALcode instructions require immediate constant function code");
- else if (value >> 26 != 0)
- as_bad_where (fixP->fx_file, fixP->fx_line,
- "overflow in 26-bit PALcode function field");
- *p++ = value & 0xff;
- value >>= 8;
- *p++ = value & 0xff;
- value >>= 8;
- *p++ = value & 0xff;
- value >>= 8;
- {
- char x = *p;
- x &= ~3;
- x |= (value & 3);
- *p++ = x;
- }
- goto done;
+/* @@ Will a simple 0x8000 work here? If not, why not? */
+#define GP_ADJUSTMENT (0x8000 - 0x10)
- case BFD_RELOC_14:
- if (fixP->fx_addsy != 0
- && fixP->fx_addsy->bsym->section != absolute_section)
- as_bad_where (fixP->fx_file, fixP->fx_line,
- "ret/jsr_coroutine requires constant in displacement field");
- else if (value >> 14 != 0)
- as_bad_where (fixP->fx_file, fixP->fx_line,
- "overflow in 14-bit operand field of ret or jsr_coroutine");
- *p++ = value & 0xff;
- value >>= 8;
- *p = (*p & 0xc0) | (value & 0x3f);
- goto done;
+ alpha_gp_value += GP_ADJUSTMENT;
- case BFD_RELOC_23_PCREL_S2:
- /* Write 21 bits only. */
- value >>= 2;
- *p++ = value & 0xff;
- value >>= 8;
- *p++ = value & 0xff;
- value >>= 8;
- *p &= 0xe0;
- *p |= (value & 0x1f);
- goto done;
+ S_SET_VALUE (alpha_gp_symbol, alpha_gp_value);
- case BFD_RELOC_12_PCREL:
- *p++ = value & 0xff;
- value >>= 8;
- *p &= 0xf0;
- *p |= (value & 0x0f);
- goto done;
+#ifdef DEBUG1
+ printf ("Chose GP value of %lx\n", alpha_gp_value);
+#endif
+}
+#endif /* OBJ_ECOFF */
- case BFD_RELOC_ALPHA_LITERAL:
- case BFD_RELOC_ALPHA_LITUSE:
- return 2;
+/* Called internally to handle all alignment needs. This takes care
+ of eliding calls to frag_align if'n the cached current alignment
+ says we've already got it, as well as taking care of the auto-align
+ feature wrt labels. */
- case BFD_RELOC_GPREL32:
- assert (fixP->fx_subsy == gp);
- value = - alpha_gp_value; /* huh? this works... */
- fixP->fx_subsy = 0;
- md_number_to_chars (p, value, 4);
- break;
+static void
+alpha_align (n, pfill, label)
+ int n;
+ char *pfill;
+ symbolS *label;
+{
+ if (alpha_current_align >= n)
+ return;
- case BFD_RELOC_ALPHA_HINT:
- if (fixP->fx_addsy == 0 && fixP->fx_pcrel == 0)
+ if (pfill == NULL)
+ {
+ if (n > 2
+ && (bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE) != 0)
{
- size = 2;
- goto do_it;
+ static char const nop[4] = { 0x1f, 0x04, 0xff, 0x47 };
+
+ /* First, make sure we're on a four-byte boundary, in case
+ someone has been putting .byte values into the text
+ section. The DEC assembler silently fills with unaligned
+ no-op instructions. This will zero-fill, then nop-fill
+ with proper alignment. */
+ if (alpha_current_align < 2)
+ frag_align (2, 0);
+ frag_align_pattern (n, nop, sizeof nop);
}
- return 2;
-
- default:
- as_fatal ("unhandled relocation type %s",
- bfd_get_reloc_code_name (fixP->fx_r_type));
- return 9;
+ else
+ frag_align (n, 0);
}
+ else
+ frag_align (n, *pfill);
+
+ alpha_current_align = n;
- if (fixP->fx_addsy == 0 && fixP->fx_pcrel == 0)
+ if (label != NULL)
{
- printf ("type %d reloc done?\n", fixP->fx_r_type);
- done:
- fixP->fx_done = 1;
- return 42;
+ assert (S_GET_SEGMENT (label) == now_seg);
+ label->sy_frag = frag_now;
+ S_SET_VALUE (label, (valueT) frag_now_fix ());
}
- return 0x12345678;
-}
-
-void
-alpha_frob_ecoff_data ()
-{
- select_gp_value ();
- /* $zero and $f31 are read-only */
- alpha_gprmask &= ~1;
- alpha_fprmask &= ~1;
+ record_alignment(now_seg, n);
}
/* The Alpha has support for some VAX floating point types, as well as for
/* Types of processor to assemble for. */
#define ARM_1 0x00000001
#define ARM_2 0x00000002
-#define ARM_250 0x00000002 /* Checkme, should this be = ARM_3? */
#define ARM_3 0x00000004
+#define ARM_250 ARM_3
#define ARM_6 0x00000008
-#define ARM_7 0x00000008
-#define ARM_7DM 0x00000010
+#define ARM_7 ARM_6 /* same core instruction set */
+
+/* The following bitmasks control CPU extensions (ARM7 onwards): */
+#define ARM_LONGMUL 0x00000010 /* allow long multiplies */
+#define ARM_ARCH4 0x00000020
+#define ARM_THUMB ARM_ARCH4
/* Some useful combinations: */
#define ARM_ANY 0x00ffffff
#define ARM_2UP 0x00fffffe
#define ARM_ALL ARM_2UP /* Not arm1 only */
#define ARM_3UP 0x00fffffc
-#define ARM_6UP 0x00fffff8
-#define ARM_LONGMUL 0x00000010 /* Don't know which will have this. */
+#define ARM_6UP 0x00fffff8 /* Includes ARM7 */
#define FPU_CORE 0x80000000
#define FPU_FPA10 0x40000000
CONST char FLT_CHARS[] = "rRsSfFdDxXeEpP";
-const int md_reloc_size = 8; /* Size of relocation record */
+CONST int md_reloc_size = 8; /* Size of relocation record */
+
+static int thumb_mode = 0; /* non-zero if assembling thumb instructions */
+
+typedef struct arm_fix
+{
+ int thumb_mode;
+} arm_fix_data;
struct arm_it
{
CONST char *error;
unsigned long instruction;
int suffix;
+ int size;
struct
{
bfd_reloc_code_real_type type;
#define CP_T_UD 0x00800000
#define CP_T_WB 0x00200000
+#define CONDS_BIT (0x00100000)
+#define LOAD_BIT (0x00100000)
#define TRANS_BIT (0x00200000)
struct asm_cond
{"nv", 0xf0000000}
};
-
+/* Warning: If the top bit of the set_bits is set, then the standard
+ instruction bitmask is ignored, and the new bitmask is taken from
+ the set_bits: */
struct asm_flg
{
CONST char *template; /* Basic flag string */
static CONST struct asm_flg s_flag[] =
{
- {"s", 0x00100000},
+ {"s", CONDS_BIT},
+ {NULL, 0}
+};
+
+static CONST struct asm_flg ldr_flags[] =
+{
+ {"b", 0x00400000},
+ {"t", TRANS_BIT},
+ {"bt", 0x00400000 | TRANS_BIT},
+ {"h", 0x801000b0},
+ {"sh", 0x801000f0},
+ {"sb", 0x801000d0},
{NULL, 0}
};
-static CONST struct asm_flg ldst_flags[] =
+static CONST struct asm_flg str_flags[] =
{
{"b", 0x00400000},
{"t", TRANS_BIT},
{"bt", 0x00400000 | TRANS_BIT},
+ {"h", 0x800000b0},
{NULL, 0}
};
static CONST struct asm_flg cmp_flags[] =
{
- {"s", 0x00100000},
+ {"s", CONDS_BIT},
{"p", 0x0010f000},
{NULL, 0}
};
{NULL, 0}
};
+/* The implementation of the FIX instruction is broken on some assemblers,
+ in that it accepts a precision specifier as well as a rounding specifier,
+ despite the fact that this is meaningless. To be more compatible, we
+ accept it as well, though of course it does not set any bits. */
+static CONST struct asm_flg fix_flags[] =
+{
+ {"p", 0x00000020},
+ {"m", 0x00000040},
+ {"z", 0x00000060},
+ {"sp", 0x00000020},
+ {"sm", 0x00000040},
+ {"sz", 0x00000060},
+ {"dp", 0x00000020},
+ {"dm", 0x00000040},
+ {"dz", 0x00000060},
+ {"ep", 0x00000020},
+ {"em", 0x00000040},
+ {"ez", 0x00000060},
+ {NULL, 0}
+};
+
static CONST struct asm_flg except_flag[] =
{
{"e", 0x00400000},
/* ARM 6 */
static void do_msr PARAMS ((char *operands, unsigned long flags));
static void do_mrs PARAMS ((char *operands, unsigned long flags));
-/* ARM 7DM */
+/* ARM 7M */
static void do_mull PARAMS ((char *operands, unsigned long flags));
+/* ARM THUMB */
+static void do_bx PARAMS ((char *operands, unsigned long flags));
+
/* Coprocessor Instructions */
static void do_cdp PARAMS ((char *operands, unsigned long flags));
static void do_lstc PARAMS ((char *operands, unsigned long flags));
static int arm_reg_parse PARAMS ((char **ccp));
static int arm_psr_parse PARAMS ((char **ccp));
-/* All instructions take 4 bytes in the object file */
-
-#define INSN_SIZE 4
+/* ARM instructions take 4bytes in the object file, Thumb instructions
+ take 2: */
+#define INSN_SIZE 4
/* LONGEST_INST is the longest basic instruction name without conditions or
* flags.
- * ARM7DM has 4 of length 5
+ * ARM7M has 4 of length 5
*/
#define LONGEST_INST 5
{"cmn", 0x01600000, NULL, cmp_flags, ARM_ANY, do_cmp},
{"mov", 0x01a00000, NULL, s_flag, ARM_ANY, do_mov},
{"mvn", 0x01e00000, NULL, s_flag, ARM_ANY, do_mov},
- {"str", 0x04000000, NULL, ldst_flags, ARM_ANY, do_ldst},
- {"ldr", 0x04100000, NULL, ldst_flags, ARM_ANY, do_ldst},
+ {"str", 0x04000000, NULL, str_flags, ARM_ANY, do_ldst},
+ {"ldr", 0x04100000, NULL, ldr_flags, ARM_ANY, do_ldst},
{"stm", 0x08000000, NULL, stm_flags, ARM_ANY, do_ldmstm},
{"ldm", 0x08100000, NULL, ldm_flags, ARM_ANY, do_ldmstm},
{"swi", 0x0f000000, NULL, NULL, ARM_ANY, do_swi},
- {"bl", 0x0b000000, NULL, NULL, ARM_ANY, do_branch},
- {"b", 0x0a000000, NULL, NULL, ARM_ANY, do_branch},
+ {"bl", 0x0bfffffe, NULL, NULL, ARM_ANY, do_branch},
+ {"b", 0x0afffffe, NULL, NULL, ARM_ANY, do_branch},
/* Pseudo ops */
{"adr", 0x028f0000, NULL, NULL, ARM_ANY, do_adr},
{"mrs", 0x010f0000, NULL, NULL, ARM_6UP, do_mrs},
{"msr", 0x0128f000, NULL, NULL, ARM_6UP, do_msr},
-/* ARM 7DM long multiplies - need signed/unsigned flags! */
+/* ARM 7M long multiplies - need signed/unsigned flags! */
{"smull", 0x00c00090, NULL, s_flag, ARM_LONGMUL, do_mull},
{"umull", 0x00800090, NULL, s_flag, ARM_LONGMUL, do_mull},
{"smlal", 0x00e00090, NULL, s_flag, ARM_LONGMUL, do_mull},
{"umlal", 0x00a00090, NULL, s_flag, ARM_LONGMUL, do_mull},
+/* ARM THUMB interworking */
+ {"bx", 0x012fff10, NULL, NULL, ARM_THUMB, do_bx},
+
/* Floating point instructions */
{"wfs", 0x0e200110, NULL, NULL, FPU_ALL, do_fp_ctrl},
{"rfs", 0x0e300110, NULL, NULL, FPU_ALL, do_fp_ctrl},
{"cmfe", 0x0ed0f110, NULL, NULL, FPU_ALL, do_fp_cmp},
{"cnfe", 0x0ef0f110, NULL, NULL, FPU_ALL, do_fp_cmp},
{"flt", 0x0e000110, "sde", round_flags, FPU_ALL, do_fp_from_reg},
- {"fix", 0x0e100110, NULL, round_flags, FPU_ALL, do_fp_to_reg},
+ {"fix", 0x0e100110, NULL, fix_flags, FPU_ALL, do_fp_to_reg},
/* Generic copressor instructions */
- {"cdp", 0x0e000000, NULL, NULL, ARM_ANY, do_cdp},
- {"ldc", 0x0c100000, NULL, cplong_flag, ARM_ANY, do_lstc},
- {"stc", 0x0c000000, NULL, cplong_flag, ARM_ANY, do_lstc},
- {"mcr", 0x0e000010, NULL, NULL, ARM_ANY, do_co_reg},
- {"mrc", 0x0e100010, NULL, NULL, ARM_ANY, do_co_reg},
+ {"cdp", 0x0e000000, NULL, NULL, ARM_2UP, do_cdp},
+ {"ldc", 0x0c100000, NULL, cplong_flag, ARM_2UP, do_lstc},
+ {"stc", 0x0c000000, NULL, cplong_flag, ARM_2UP, do_lstc},
+ {"mcr", 0x0e000010, NULL, NULL, ARM_2UP, do_co_reg},
+ {"mrc", 0x0e100010, NULL, NULL, ARM_2UP, do_co_reg},
};
/* defines for various bits that we will want to toggle */
#define INST_IMMEDIATE 0x02000000
#define OFFSET_REG 0x02000000
+#define HWOFFSET_IMM 0x00400000
#define SHIFT_BY_REG 0x00000010
#define PRE_INDEX 0x01000000
#define INDEX_UP 0x00800000
#define OPCODE_BIC 14
#define OPCODE_MVN 15
+static void do_t_arit PARAMS ((char *operands));
+static void do_t_add PARAMS ((char *operands));
+static void do_t_asr PARAMS ((char *operands));
+static void do_t_branch PARAMS ((char *operands));
+static void do_t_bx PARAMS ((char *operands));
+static void do_t_compare PARAMS ((char *operands));
+static void do_t_ldmstm PARAMS ((char *operands));
+static void do_t_ldr PARAMS ((char *operands));
+static void do_t_ldrb PARAMS ((char *operands));
+static void do_t_ldrh PARAMS ((char *operands));
+static void do_t_lds PARAMS ((char *operands));
+static void do_t_lsl PARAMS ((char *operands));
+static void do_t_lsr PARAMS ((char *operands));
+static void do_t_mov PARAMS ((char *operands));
+static void do_t_push_pop PARAMS ((char *operands));
+static void do_t_str PARAMS ((char *operands));
+static void do_t_strb PARAMS ((char *operands));
+static void do_t_strh PARAMS ((char *operands));
+static void do_t_sub PARAMS ((char *operands));
+static void do_t_swi PARAMS ((char *operands));
+static void do_t_adr PARAMS ((char *operands));
+
+#define T_OPCODE_MUL 0x4340
+#define T_OPCODE_TST 0x4200
+#define T_OPCODE_CMN 0x42c0
+#define T_OPCODE_NEG 0x4240
+#define T_OPCODE_MVN 0x43c0
+
+#define T_OPCODE_ADD_R3 0x1800
+#define T_OPCODE_SUB_R3 0x1a00
+#define T_OPCODE_ADD_HI 0x4400
+#define T_OPCODE_ADD_ST 0xb000
+#define T_OPCODE_SUB_ST 0xb080
+#define T_OPCODE_ADD_SP 0xa800
+#define T_OPCODE_ADD_PC 0xa000
+#define T_OPCODE_ADD_I8 0x3000
+#define T_OPCODE_SUB_I8 0x3800
+#define T_OPCODE_ADD_I3 0x1c00
+#define T_OPCODE_SUB_I3 0x1e00
+
+#define T_OPCODE_ASR_R 0x4100
+#define T_OPCODE_LSL_R 0x4080
+#define T_OPCODE_LSR_R 0x40c0
+#define T_OPCODE_ASR_I 0x1000
+#define T_OPCODE_LSL_I 0x0000
+#define T_OPCODE_LSR_I 0x0800
+
+#define T_OPCODE_MOV_I8 0x2000
+#define T_OPCODE_CMP_I8 0x2800
+#define T_OPCODE_CMP_LR 0x4280
+#define T_OPCODE_MOV_HR 0x4600
+#define T_OPCODE_CMP_HR 0x4500
+
+#define T_OPCODE_LDR_PC 0x4800
+#define T_OPCODE_LDR_SP 0x9800
+#define T_OPCODE_STR_SP 0x9000
+#define T_OPCODE_LDR_IW 0x6800
+#define T_OPCODE_STR_IW 0x6000
+#define T_OPCODE_LDR_IH 0x8800
+#define T_OPCODE_STR_IH 0x8000
+#define T_OPCODE_LDR_IB 0x7800
+#define T_OPCODE_STR_IB 0x7000
+#define T_OPCODE_LDR_RW 0x5800
+#define T_OPCODE_STR_RW 0x5000
+#define T_OPCODE_LDR_RH 0x5a00
+#define T_OPCODE_STR_RH 0x5200
+#define T_OPCODE_LDR_RB 0x5c00
+#define T_OPCODE_STR_RB 0x5400
+
+#define T_OPCODE_PUSH 0xb400
+#define T_OPCODE_POP 0xbc00
+
+#define T_OPCODE_BRANCH 0xe7fe
+
+static int thumb_reg PARAMS ((char **str, int hi_lo));
+
+#define THUMB_SIZE 2 /* Size of thumb instruction */
+#define THUMB_REG_LO 0x1
+#define THUMB_REG_HI 0x2
+#define THUMB_REG_ANY 0x3
+
+#define THUMB_H1 0x0080
+#define THUMB_H2 0x0040
+
+#define THUMB_ASR 0
+#define THUMB_LSL 1
+#define THUMB_LSR 2
+
+#define THUMB_MOVE 0
+#define THUMB_COMPARE 1
+
+#define THUMB_LOAD 0
+#define THUMB_STORE 1
+
+#define THUMB_PP_PC_LR 0x0100
+
+/* These three are used for immediate shifts, do not alter */
+#define THUMB_WORD 2
+#define THUMB_HALFWORD 1
+#define THUMB_BYTE 0
+
+struct thumb_opcode
+{
+ CONST char *template; /* Basic string to match */
+ unsigned long value; /* Basic instruction code */
+ int size;
+ void (*parms)(); /* Function to call to parse args */
+};
+
+static CONST struct thumb_opcode tinsns[] =
+{
+ {"adc", 0x4140, 2, do_t_arit},
+ {"add", 0x0000, 2, do_t_add},
+ {"and", 0x4000, 2, do_t_arit},
+ {"asr", 0x0000, 2, do_t_asr},
+ {"b", T_OPCODE_BRANCH, 2, do_t_branch},
+ {"beq", 0xd0fe, 2, do_t_branch},
+ {"bne", 0xd1fe, 2, do_t_branch},
+ {"bcs", 0xd2fe, 2, do_t_branch},
+ {"bhs", 0xd2fe, 2, do_t_branch},
+ {"bcc", 0xd3fe, 2, do_t_branch},
+ {"bul", 0xd3fe, 2, do_t_branch},
+ {"blo", 0xd3fe, 2, do_t_branch},
+ {"bmi", 0xd4fe, 2, do_t_branch},
+ {"bpl", 0xd5fe, 2, do_t_branch},
+ {"bvs", 0xd6fe, 2, do_t_branch},
+ {"bvc", 0xd7fe, 2, do_t_branch},
+ {"bhi", 0xd8fe, 2, do_t_branch},
+ {"bls", 0xd9fe, 2, do_t_branch},
+ {"bge", 0xdafe, 2, do_t_branch},
+ {"blt", 0xdbfe, 2, do_t_branch},
+ {"bgt", 0xdcfe, 2, do_t_branch},
+ {"ble", 0xddfe, 2, do_t_branch},
+ {"bic", 0x4380, 2, do_t_arit},
+ {"bl", 0xf7fffffe, 4, do_t_branch},
+ {"bx", 0x4700, 2, do_t_bx},
+ {"cmn", T_OPCODE_CMN, 2, do_t_arit},
+ {"cmp", 0x0000, 2, do_t_compare},
+ {"eor", 0x4040, 2, do_t_arit},
+ {"ldmia", 0xc800, 2, do_t_ldmstm},
+ {"ldr", 0x0000, 2, do_t_ldr},
+ {"ldrb", 0x0000, 2, do_t_ldrb},
+ {"ldrh", 0x0000, 2, do_t_ldrh},
+ {"ldrsb", 0x5600, 2, do_t_lds},
+ {"ldrsh", 0x5e00, 2, do_t_lds},
+ {"ldsb", 0x5600, 2, do_t_lds},
+ {"ldsh", 0x5e00, 2, do_t_lds},
+ {"lsl", 0x0000, 2, do_t_lsl},
+ {"lsr", 0x0000, 2, do_t_lsr},
+ {"mov", 0x0000, 2, do_t_mov},
+ {"mul", T_OPCODE_MUL, 2, do_t_arit},
+ {"mvn", T_OPCODE_MVN, 2, do_t_arit},
+ {"neg", T_OPCODE_NEG, 2, do_t_arit},
+ {"orr", 0x4300, 2, do_t_arit},
+ {"pop", 0xbc00, 2, do_t_push_pop},
+ {"push", 0xb400, 2, do_t_push_pop},
+ {"ror", 0x41c0, 2, do_t_arit},
+ {"sbc", 0x4180, 2, do_t_arit},
+ {"stmia", 0xc000, 2, do_t_ldmstm},
+ {"str", 0x0000, 2, do_t_str},
+ {"strb", 0x0000, 2, do_t_strb},
+ {"strh", 0x0000, 2, do_t_strh},
+ {"swi", 0xdf00, 2, do_t_swi},
+ {"sub", 0x0000, 2, do_t_sub},
+ {"tst", T_OPCODE_TST, 2, do_t_arit},
+ /* Pseudo ops: */
+ {"adr", 0x0000, 2, do_t_adr},
+ {"nop", 0x0000, 2, do_nop},
+};
+
struct reg_entry
{
CONST char *name;
#define fp_register(reg) ((reg) >= 16 && (reg) <= 23)
#define REG_PC 15
+#define REG_LR 14
+#define REG_SP 13
/* These are the standard names; Users can add aliases with .req */
static CONST struct reg_entry reg_table[] =
{
/* Processor Register Numbers */
- {"r0", 0}, {"r1", 1}, {"r2", 2}, {"r3", 3},
- {"r4", 4}, {"r5", 5}, {"r6", 6}, {"r7", 7},
- {"r8", 8}, {"r9", 9}, {"r10", 10}, {"r11", 11},
- {"r12", 12}, {"r13", 13}, {"r14", 14}, {"r15", REG_PC},
+ {"r0", 0}, {"r1", 1}, {"r2", 2}, {"r3", 3},
+ {"r4", 4}, {"r5", 5}, {"r6", 6}, {"r7", 7},
+ {"r8", 8}, {"r9", 9}, {"r10", 10}, {"r11", 11},
+ {"r12", 12}, {"r13", REG_SP},{"r14", REG_LR},{"r15", REG_PC},
/* APCS conventions */
- {"a1", 0}, {"a2", 1}, {"a3", 2}, {"a4", 3},
- {"v1", 4}, {"v2", 5}, {"v3", 6}, {"v4", 7}, {"v5", 8},
- {"v6", 9}, {"sb", 9}, {"v7", 10}, {"sl", 10},
- {"fp", 11}, {"ip", 12}, {"sp", 13}, {"lr", 14}, {"pc", REG_PC},
+ {"a1", 0}, {"a2", 1}, {"a3", 2}, {"a4", 3},
+ {"v1", 4}, {"v2", 5}, {"v3", 6}, {"v4", 7}, {"v5", 8},
+ {"v6", 9}, {"sb", 9}, {"v7", 10}, {"sl", 10},
+ {"fp", 11}, {"ip", 12}, {"sp", REG_SP},{"lr", REG_LR},{"pc", REG_PC},
/* FP Registers */
{"f0", 16}, {"f1", 17}, {"f2", 18}, {"f3", 19},
{"f4", 20}, {"f5", 21}, {"f6", 22}, {"f7", 23},
static CONST char *bad_pc = "r15 not allowed here";
static struct hash_control *arm_ops_hsh = NULL;
+static struct hash_control *arm_tops_hsh = NULL;
static struct hash_control *arm_cond_hsh = NULL;
static struct hash_control *arm_shift_hsh = NULL;
static struct hash_control *arm_reg_hsh = NULL;
static void s_bss PARAMS ((int));
static void s_even PARAMS ((int));
static void s_ltorg PARAMS ((int));
+static void s_arm PARAMS ((int));
+static void s_thumb PARAMS ((int));
+static void s_code PARAMS ((int));
static int my_get_expression PARAMS ((expressionS *, char **));
{"req", s_req, 0}, /* Never called becasue '.req' does not start line */
{"bss", s_bss, 0},
{"align", s_align, 0},
+ {"arm", s_arm, 0},
+ {"thumb", s_thumb, 0},
+ {"code", s_code, 0},
{"even", s_even, 0},
{"ltorg", s_ltorg, 0},
{"pool", s_ltorg, 0},
static int
add_to_lit_pool ()
{
+ int lit_count = 0;
+
if (current_poolP == NULL)
current_poolP = symbol_make_empty();
- if (next_literal_pool_place > MAX_LITERAL_POOL_SIZE)
+ /* Check if this literal value is already in the pool: */
+ while (lit_count < next_literal_pool_place)
{
- inst.error = "Literal Pool Overflow\n";
- return FAIL;
+ if (literals[lit_count].exp.X_op == inst.reloc.exp.X_op
+ && inst.reloc.exp.X_op == O_constant
+ && literals[lit_count].exp.X_add_number == inst.reloc.exp.X_add_number
+ && literals[lit_count].exp.X_unsigned == inst.reloc.exp.X_unsigned)
+ break;
+ lit_count++;
+ }
+
+ if (lit_count == next_literal_pool_place) /* new entry */
+ {
+ if (next_literal_pool_place > MAX_LITERAL_POOL_SIZE)
+ {
+ inst.error = "Literal Pool Overflow\n";
+ return FAIL;
+ }
+
+ literals[next_literal_pool_place].exp = inst.reloc.exp;
+ lit_count = next_literal_pool_place++;
}
- literals[next_literal_pool_place].exp = inst.reloc.exp;
inst.reloc.exp.X_op = O_symbol;
- inst.reloc.exp.X_add_number = (next_literal_pool_place++)*4-8;
+ inst.reloc.exp.X_add_number = (lit_count)*4-8;
inst.reloc.exp.X_add_symbol = current_poolP;
return SUCCESS;
}
/* Can't use symbol_new here, so have to create a symbol and them at
- a later datete assign iot a value. Thats what these functions do */
+ a later date assign it a value. Thats what these functions do */
static void
symbol_locate (symbolP, name, segment, valu, frag)
symbolS *symbolP;
}
static int
-validate_offset_imm (val)
+validate_offset_imm (val, hwse)
int val;
+ int hwse;
{
- if (val < -4095 || val > 4095)
- as_bad ("bad immediate value for offset (%d)", val);
+ if ((hwse && (val < -255 || val > 255))
+ || (val < -4095 || val > 4095))
+ return FAIL;
return val;
}
current_poolP = NULL;
}
+#if 0 /* not used */
static void
arm_align (power, fill)
int power;
record_alignment (now_seg, power);
}
+#endif
static void
s_align (unused) /* Same as s_align_ptwo but align 0 => align 2 */
record_alignment (now_seg, temp);
}
+static void
+opcode_select (width)
+ int width;
+{
+ switch (width)
+ {
+ case 16:
+ if (! thumb_mode)
+ {
+ if (! (cpu_variant & ARM_THUMB))
+ as_bad ("selected processor does not support THUMB opcodes");
+ thumb_mode = 1;
+ /* No need to force the alignment, since we will have been
+ coming from ARM mode, which is word-aligned. */
+ record_alignment (now_seg, 1);
+ }
+ break;
+
+ case 32:
+ if (thumb_mode)
+ {
+ if ((cpu_variant & ARM_ANY) == ARM_THUMB)
+ as_bad ("selected processor does not support ARM opcodes");
+ thumb_mode = 0;
+ if (!need_pass_2)
+ frag_align (2, 0);
+ record_alignment (now_seg, 1);
+ }
+ break;
+
+ default:
+ as_bad ("invalid instruction size selected (%d)", width);
+ }
+}
+
+static void
+s_arm (ignore)
+ int ignore;
+{
+ opcode_select (32);
+ demand_empty_rest_of_line ();
+}
+
+static void
+s_thumb (ignore)
+ int ignore;
+{
+ opcode_select (16);
+ demand_empty_rest_of_line ();
+}
+
+static void
+s_code (unused)
+ int unused;
+{
+ register int temp;
+
+ temp = get_absolute_expression ();
+ switch (temp)
+ {
+ case 16:
+ case 32:
+ opcode_select(temp);
+ break;
+
+ default:
+ as_bad ("invalid operand to .code directive (%d)", temp);
+ }
+}
+
static void
end_of_line (str)
char *str;
*p = c;
if (shft)
{
- if (!strcmp (*str, "rrx"))
+ if (!strcmp (*str, "rrx")
+ || !strcmp (*str, "RRX"))
{
*str = p;
inst.instruction |= shft->value;
return FAIL;
/* Validate some simple #expressions */
- if (! inst.reloc.exp.X_add_symbol)
+ if (inst.reloc.exp.X_op == O_constant)
{
- int num = inst.reloc.exp.X_add_number;
- if (num < 0 || num > 32
- || (num == 32
- && (shft->value == 0 || shft->value == 0x60)))
+ unsigned num = inst.reloc.exp.X_add_number;
+
+ /* Reject operations greater than 32, or lsl #32 */
+ if (num > 32 || (num == 32 && shft->value == 0))
{
inst.error = "Invalid immediate shift";
return FAIL;
char *str;
unsigned long flags;
{
- /* This is a pseudo-op of the form "adr rd, label" to be converted into
- a relative address of the form add rd, pc, #label-.-8 */
+ /* This is a pseudo-op of the form "adr rd, label" to be converted
+ into a relative address of the form "add rd, pc, #label-.-8" */
while (*str == ' ')
str++;
inst.instruction |= flags;
if ((flags & 0x0000f000) == 0)
- inst.instruction |= 0x00100000;
+ inst.instruction |= CONDS_BIT;
end_of_line (str);
return;
}
static int
-ldst_extend (str)
+ldst_extend (str, hwse)
char **str;
+ int hwse;
{
int add = INDEX_UP;
{
int value = inst.reloc.exp.X_add_number;
- if (value < -4095 || value > 4095)
+ if ((hwse && (value < -255 || value > 255))
+ || (value < -4095 || value > 4095))
{
inst.error = "address offset too large";
return FAIL;
add = 0;
}
- inst.instruction |= add | value;
+ /* Halfword and signextension instructions have the
+ immediate value split across bits 11..8 and bits 3..0 */
+ if (hwse)
+ inst.instruction |= add | HWOFFSET_IMM | (value >> 4) << 8 | value & 0xF;
+ else
+ inst.instruction |= add | value;
}
else
{
- inst.reloc.type = BFD_RELOC_ARM_OFFSET_IMM;
+ if (hwse)
+ {
+ inst.instruction |= HWOFFSET_IMM;
+ inst.reloc.type = BFD_RELOC_ARM_OFFSET_IMM8;
+ }
+ else
+ inst.reloc.type = BFD_RELOC_ARM_OFFSET_IMM;
inst.reloc.pc_rel = 0;
}
return SUCCESS;
inst.error = "Register expected";
return FAIL;
}
- inst.instruction |= add | OFFSET_REG;
- if (skip_past_comma (str) == SUCCESS)
- return decode_shift (str, SHIFT_RESTRICT);
+
+ if (hwse)
+ inst.instruction |= add;
+ else
+ {
+ inst.instruction |= add | OFFSET_REG;
+ if (skip_past_comma (str) == SUCCESS)
+ return decode_shift (str, SHIFT_RESTRICT);
+ }
+
return SUCCESS;
}
}
char *str;
unsigned long flags;
{
+ int halfword = 0;
int pre_inc = 0;
int conflict_reg;
int value;
+ /* This is not ideal, but it is the simplest way of dealing with the
+ ARM7T halfword instructions (since they use a different
+ encoding, but the same mnemonic): */
+ if (halfword = ((flags & 0x80000000) != 0))
+ {
+ /* This is actually a load/store of a halfword, or a
+ signed-extension load */
+ if ((cpu_variant & ARM_ARCH4) == 0)
+ {
+ inst.error
+ = "Processor does not support halfwords or signed bytes\n";
+ return;
+ }
+
+ inst.instruction = (inst.instruction & COND_MASK)
+ | (flags & ~COND_MASK);
+
+ flags = 0;
+ }
+
while (*str == ' ')
str++;
}
conflict_reg = (((conflict_reg == reg)
- && (inst.instruction & 0x00100000))
+ && (inst.instruction & LOAD_BIT))
? 1 : 0);
while (*str == ' ')
if (skip_past_comma (&str) == SUCCESS)
{
/* [Rn],... (post inc) */
- if (ldst_extend (&str) == FAIL)
+ if (ldst_extend (&str, halfword) == FAIL)
return;
if (conflict_reg)
as_warn ("destination register same as write-back base\n");
else
{
/* [Rn] */
+ if (halfword)
+ inst.instruction |= HWOFFSET_IMM;
+
+ while (*str == ' ')
+ str++;
+
+ if (*str == '!')
+ {
+ if (conflict_reg)
+ as_warn ("destination register same as write-back base\n");
+ str++;
+ inst.instruction |= WRITE_BACK;
+ }
+
flags |= INDEX_UP;
if (! (flags & TRANS_BIT))
pre_inc = 1;
}
pre_inc = 1;
- if (ldst_extend (&str) == FAIL)
+ if (ldst_extend (&str, halfword) == FAIL)
return;
while (*str == ' ')
if (*str == '!')
{
if (conflict_reg)
- as_warn ("destination register same as write-back base\n");
+ as_tsktsk ("destination register same as write-back base\n");
str++;
inst.instruction |= WRITE_BACK;
}
}
/* Change the instruction exp to point to the pool */
- inst.reloc.type = BFD_RELOC_ARM_LITERAL;
+ if (halfword)
+ {
+ inst.instruction |= HWOFFSET_IMM;
+ inst.reloc.type = BFD_RELOC_ARM_HWLITERAL;
+ }
+ else
+ inst.reloc.type = BFD_RELOC_ARM_LITERAL;
inst.reloc.pc_rel = 1;
inst.instruction |= (REG_PC << 16);
pre_inc = 1;
if (my_get_expression (&inst.reloc.exp, &str))
return;
- inst.reloc.type = BFD_RELOC_ARM_OFFSET_IMM;
+ if (halfword)
+ {
+ inst.instruction |= HWOFFSET_IMM;
+ inst.reloc.type = BFD_RELOC_ARM_OFFSET_IMM8;
+ }
+ else
+ inst.reloc.type = BFD_RELOC_ARM_OFFSET_IMM;
inst.reloc.exp.X_add_number -= 8; /* PC rel adjust */
inst.reloc.pc_rel = 1;
inst.instruction |= (REG_PC << 16);
return;
}
-static void
-do_ldmstm (str, flags)
- char *str;
- unsigned long flags;
+static long
+reg_list (strp)
+ char **strp;
{
- int base_reg;
+ char *str = *strp;
+ long range = 0;
+ int another_range;
- while (*str == ' ')
- str++;
-
- if ((base_reg = reg_required_here (&str, 16)) == FAIL)
+ /* We come back here if we get ranges concatenated by '+' or '|' */
+ do
{
- if (!inst.error)
- inst.error = bad_args;
- return;
- }
+ another_range = 0;
- if (base_reg == REG_PC)
- {
- inst.error = "r15 not allowed as base register";
- return;
- }
+ if (*str == '{')
+ {
+ int in_range = 0;
+ int cur_reg = -1;
+
+ str++;
+ do
+ {
+ int reg;
+
+ while (*str == ' ')
+ str++;
- while (*str == ' ')
- str++;
- if (*str == '!')
- {
- flags |= WRITE_BACK;
- str++;
- }
+ if ((reg = arm_reg_parse (&str)) == FAIL || !int_register (reg))
+ {
+ inst.error = "Register expected";
+ return FAIL;
+ }
- if (skip_past_comma (&str) == FAIL)
- {
- inst.error = bad_args;
- return;
- }
+ if (in_range)
+ {
+ int i;
+
+ if (reg <= cur_reg)
+ {
+ inst.error = "Bad range in register list";
+ return FAIL;
+ }
- /* We come back here if we get ranges concatenated by '+' or '|' */
- another_range:
- if (*str == '{')
- {
- int in_range = 0;
- int cur_reg = -1;
-
- str++;
- do
- {
- int reg;
-
+ for (i = cur_reg + 1; i < reg; i++)
+ {
+ if (range & (1 << i))
+ as_tsktsk
+ ("Warning: Duplicated register (r%d) in register list",
+ i);
+ else
+ range |= 1 << i;
+ }
+ in_range = 0;
+ }
+
+ if (range & (1 << reg))
+ as_tsktsk ("Warning: Duplicated register (r%d) in register list",
+ reg);
+ else if (reg <= cur_reg)
+ as_tsktsk ("Warning: Register range not in ascending order");
+
+ range |= 1 << reg;
+ cur_reg = reg;
+ } while (skip_past_comma (&str) != FAIL
+ || (in_range = 1, *str++ == '-'));
+ str--;
while (*str == ' ')
str++;
- if ((reg = arm_reg_parse (&str)) == FAIL || !int_register (reg))
+ if (*str++ != '}')
{
- inst.error = "Register expected";
- return;
+ inst.error = "Missing `}'";
+ return FAIL;
}
+ }
+ else
+ {
+ expressionS expr;
+
+ if (my_get_expression (&expr, &str))
+ return FAIL;
- if (in_range)
+ if (expr.X_op == O_constant)
{
- int i;
-
- if (reg <= cur_reg)
+ if (expr.X_add_number
+ != (expr.X_add_number & 0x0000ffff))
{
- inst.error = "Bad range in register list";
- return;
+ inst.error = "invalid register mask";
+ return FAIL;
}
- for (i = cur_reg + 1; i < reg; i++)
+ if ((range & expr.X_add_number) != 0)
{
- if (flags & (1 << i))
- as_tsktsk
- ("Warning: Duplicated register (r%d) in register list",
- i);
- else
- flags |= 1 << i;
+ int regno = range & expr.X_add_number;
+
+ regno &= -regno;
+ regno = (1 << regno) - 1;
+ as_tsktsk
+ ("Warning: Duplicated register (r%d) in register list",
+ regno);
+ }
+
+ range |= expr.X_add_number;
+ }
+ else
+ {
+ if (inst.reloc.type != 0)
+ {
+ inst.error = "expression too complex";
+ return FAIL;
}
- in_range = 0;
+
+ memcpy (&inst.reloc.exp, &expr, sizeof (expressionS));
+ inst.reloc.type = BFD_RELOC_ARM_MULTI;
+ inst.reloc.pc_rel = 0;
}
+ }
- if (flags & (1 << reg))
- as_tsktsk ("Warning: Duplicated register (r%d) in register list",
- reg);
- else if (reg <= cur_reg)
- as_tsktsk ("Warning: Register range not in ascending order");
-
- flags |= 1 << reg;
- cur_reg = reg;
- } while (skip_past_comma (&str) != FAIL
- || (in_range = 1, *str++ == '-'));
- str--;
while (*str == ' ')
str++;
- if (*str++ != '}')
+ if (*str == '|' || *str == '+')
{
- inst.error = "Missing `}'";
- return;
+ str++;
+ another_range = 1;
}
- }
- else
- {
- expressionS expr;
+ } while (another_range);
- if (my_get_expression (&expr, &str))
- return;
-
- if (expr.X_op == O_constant)
- {
- if (expr.X_add_number
- != (expr.X_add_number & 0x0000ffff))
- {
- inst.error = "invalid register mask";
- return;
- }
+ *strp = str;
+ return range;
+}
- if ((flags & expr.X_add_number) != 0)
- {
- int regno = flags & expr.X_add_number;
+static void
+do_ldmstm (str, flags)
+ char *str;
+ unsigned long flags;
+{
+ int base_reg;
+ long range;
- regno &= -regno;
- regno = (1 << regno) - 1;
- as_tsktsk ("Warning: Duplicated register (r%d) in register list",
- regno);
- }
+ while (*str == ' ')
+ str++;
- flags |= expr.X_add_number;
- }
- else
- {
- if (inst.reloc.type != 0)
- {
- inst.error = "expression too complex";
- return;
- }
+ if ((base_reg = reg_required_here (&str, 16)) == FAIL)
+ {
+ if (!inst.error)
+ inst.error = bad_args;
+ return;
+ }
- memcpy (&inst.reloc.exp, &expr, sizeof (expressionS));
- inst.reloc.type = BFD_RELOC_ARM_MULTI;
- inst.reloc.pc_rel = 0;
- }
+ if (base_reg == REG_PC)
+ {
+ inst.error = "r15 not allowed as base register";
+ return;
}
while (*str == ' ')
str++;
-
- if (*str == '|' || *str == '+')
+ if (*str == '!')
{
+ flags |= WRITE_BACK;
str++;
- goto another_range;
+ }
+
+ if (skip_past_comma (&str) == FAIL
+ || (range = reg_list (&str)) == FAIL)
+ {
+ if (! inst.error)
+ inst.error = bad_args;
+ return;
}
if (*str == '^')
str++;
flags |= MULTI_SET_PSR;
}
- inst.instruction |= flags;
+
+ inst.instruction |= flags | range;
end_of_line (str);
return;
}
return;
inst.reloc.type = BFD_RELOC_ARM_PCREL_BRANCH;
inst.reloc.pc_rel = 1;
- inst.instruction |= flags | 0x00fffffe; /* PC-rel adjust */
+ end_of_line (str);
+ return;
+}
+
+static void
+do_bx (str, flags)
+ char *str;
+ unsigned long flags;
+{
+ int reg;
+
+ while (*str == ' ')
+ str++;
+
+ if ((reg = reg_required_here (&str, 0)) == FAIL)
+ return;
+
+ if (reg == REG_PC)
+ as_tsktsk ("Use of r15 in bx has undefined behaviour");
+
end_of_line (str);
return;
}
return;
}
-static void
-insert_reg (entry)
- int entry;
+/* Thumb specific routines */
+
+/* Parse and validate that a register is of the right form, this saves
+ repeated checking of this information in many similar cases.
+ Unlike the 32-bit case we do not insert the register into the opcode
+ here, since the position is often unknown until the full instruction
+ has been parsed. */
+static int
+thumb_reg (strp, hi_lo)
+ char **strp;
+ int hi_lo;
{
- int len = strlen (reg_table[entry].name) + 2;
- char *buf = (char *) xmalloc (len);
- char *buf2 = (char *) xmalloc (len);
- int i = 0;
+ int reg;
-#ifdef REGISTER_PREFIX
- buf[i++] = REGISTER_PREFIX;
-#endif
+ if ((reg = arm_reg_parse (strp)) == FAIL || ! int_register (reg))
+ {
+ inst.error = "Register expected";
+ return FAIL;
+ }
+
+ switch (hi_lo)
+ {
+ case THUMB_REG_LO:
+ if (reg > 7)
+ {
+ inst.error = "lo register required";
+ return FAIL;
+ }
+ break;
+
+ case THUMB_REG_HI:
+ if (reg < 8)
+ {
+ inst.error = "hi register required";
+ return FAIL;
+ }
+ break;
+
+ default:
+ break;
+ }
+
+ return reg;
+}
+
+/* Parse an add or subtract instruction, SUBTRACT is non-zero if the opcode
+ was SUB. */
+static void
+thumb_add_sub (str, subtract)
+ char *str;
+ int subtract;
+{
+ int Rd, Rs, Rn = FAIL;
+
+ while (*str == ' ')
+ str++;
+
+ if ((Rd = thumb_reg (&str, THUMB_REG_ANY)) == FAIL
+ || skip_past_comma (&str) == FAIL)
+ {
+ if (! inst.error)
+ inst.error = bad_args;
+ return;
+ }
+
+ if (*str == '#')
+ {
+ Rs = Rd;
+ str++;
+ if (my_get_expression (&inst.reloc.exp, &str))
+ return;
+ }
+ else
+ {
+ if ((Rs = thumb_reg (&str, THUMB_REG_ANY)) == FAIL)
+ return;
+
+ if (skip_past_comma (&str) == FAIL)
+ {
+ /* Two operand format, shuffle the registers and pretend there
+ are 3 */
+ Rn = Rs;
+ Rs = Rd;
+ }
+ else if (*str == '#')
+ {
+ str++;
+ if (my_get_expression (&inst.reloc.exp, &str))
+ return;
+ }
+ else if ((Rn = thumb_reg (&str, THUMB_REG_ANY)) == FAIL)
+ return;
+ }
+
+ /* We now have Rd and Rs set to registers, and Rn set to a register or FAIL;
+ for the latter case, EXPR contains the immediate that was found. */
+ if (Rn != FAIL)
+ {
+ /* All register format. */
+ if (Rd > 7 || Rs > 7 || Rd > 7)
+ {
+ if (Rs != Rd)
+ {
+ inst.error = "dest and source1 must be the same register";
+ return;
+ }
+
+ /* Can't do this for SUB */
+ if (subtract)
+ {
+ inst.error = "subtract valid only on lo regs";
+ return;
+ }
+
+ inst.instruction = (T_OPCODE_ADD_HI
+ | (Rd > 7 ? THUMB_H1 : 0)
+ | (Rn > 7 ? THUMB_H2 : 0));
+ inst.instruction |= (Rd & 7) | ((Rn & 7) << 3);
+ }
+ else
+ {
+ inst.instruction = subtract ? T_OPCODE_SUB_R3 : T_OPCODE_ADD_R3;
+ inst.instruction |= Rd | (Rs << 3) | (Rn << 6);
+ }
+ }
+ else
+ {
+ /* Immediate expression, now things start to get nasty. */
+
+ /* First deal with HI regs, only very restricted cases allowed:
+ Adjusting SP, and using PC or SP to get an address. */
+ if ((Rd > 7 && (Rd != REG_SP || Rs != REG_SP))
+ || (Rs > 7 && Rs != REG_SP && Rs != REG_PC))
+ {
+ inst.error = "invalid Hi register with immediate";
+ return;
+ }
+
+ if (inst.reloc.exp.X_op != O_constant)
+ {
+ /* Value isn't known yet, all we can do is store all the fragments
+ we know about in the instruction and let the reloc hacking
+ work it all out. */
+ inst.instruction = (subtract ? 0x8000 : 0) | (Rd << 4) | Rs;
+ inst.reloc.type = BFD_RELOC_ARM_THUMB_ADD;
+ }
+ else
+ {
+ int offset = inst.reloc.exp.X_add_number;
+
+ if (subtract)
+ offset = -offset;
+
+ if (offset < 0)
+ {
+ offset = -offset;
+ subtract = 1;
+
+ /* Quick check, in case offset is MIN_INT */
+ if (offset < 0)
+ {
+ inst.error = "immediate value out of range";
+ return;
+ }
+ }
+ else
+ subtract = 0;
+
+ if (Rd == REG_SP)
+ {
+ if (offset & ~0x1fc)
+ {
+ inst.error = "invalid immediate value for stack adjust";
+ return;
+ }
+ inst.instruction = subtract ? T_OPCODE_SUB_ST : T_OPCODE_ADD_ST;
+ inst.instruction |= offset >> 2;
+ }
+ else if (Rs == REG_PC || Rs == REG_SP)
+ {
+ if (subtract
+ || (offset & ~0x3fc))
+ {
+ inst.error = "invalid immediate for address calculation";
+ return;
+ }
+ inst.instruction = (Rs == REG_PC ? T_OPCODE_ADD_PC
+ : T_OPCODE_ADD_SP);
+ inst.instruction |= (Rd << 8) | (offset >> 2);
+ }
+ else if (Rs == Rd)
+ {
+ if (offset & ~0xff)
+ {
+ inst.error = "immediate value out of range";
+ return;
+ }
+ inst.instruction = subtract ? T_OPCODE_SUB_I8 : T_OPCODE_ADD_I8;
+ inst.instruction |= (Rd << 8) | offset;
+ }
+ else
+ {
+ if (offset & ~0x7)
+ {
+ inst.error = "immediate value out of range";
+ return;
+ }
+ inst.instruction = subtract ? T_OPCODE_SUB_I3 : T_OPCODE_ADD_I3;
+ inst.instruction |= Rd | (Rs << 3) | (offset << 6);
+ }
+ }
+ }
+ end_of_line (str);
+}
+
+static void
+thumb_shift (str, shift)
+ char *str;
+ int shift;
+{
+ int Rd, Rs, Rn = FAIL;
+
+ while (*str == ' ')
+ str++;
+
+ if ((Rd = thumb_reg (&str, THUMB_REG_LO)) == FAIL
+ || skip_past_comma (&str) == FAIL)
+ {
+ if (! inst.error)
+ inst.error = bad_args;
+ return;
+ }
+
+ if (*str == '#')
+ {
+ /* Two operand immediate format, set Rs to Rd. */
+ Rs = Rd;
+ str++;
+ if (my_get_expression (&inst.reloc.exp, &str))
+ return;
+ }
+ else
+ {
+ if ((Rs = thumb_reg (&str, THUMB_REG_LO)) == FAIL)
+ return;
+
+ if (skip_past_comma (&str) == FAIL)
+ {
+ /* Two operand format, shuffle the registers and pretend there
+ are 3 */
+ Rn = Rs;
+ Rs = Rd;
+ }
+ else if (*str == '#')
+ {
+ str++;
+ if (my_get_expression (&inst.reloc.exp, &str))
+ return;
+ }
+ else if ((Rn = thumb_reg (&str, THUMB_REG_LO)) == FAIL)
+ return;
+ }
+
+ /* We now have Rd and Rs set to registers, and Rn set to a register or FAIL;
+ for the latter case, EXPR contains the immediate that was found. */
+
+ if (Rn != FAIL)
+ {
+ if (Rs != Rd)
+ {
+ inst.error = "source1 and dest must be same register";
+ return;
+ }
+
+ switch (shift)
+ {
+ case THUMB_ASR: inst.instruction = T_OPCODE_ASR_R; break;
+ case THUMB_LSL: inst.instruction = T_OPCODE_LSL_R; break;
+ case THUMB_LSR: inst.instruction = T_OPCODE_LSR_R; break;
+ }
+
+ inst.instruction |= Rd | (Rn << 3);
+ }
+ else
+ {
+ switch (shift)
+ {
+ case THUMB_ASR: inst.instruction = T_OPCODE_ASR_I; break;
+ case THUMB_LSL: inst.instruction = T_OPCODE_LSL_I; break;
+ case THUMB_LSR: inst.instruction = T_OPCODE_LSR_I; break;
+ }
+
+ if (inst.reloc.exp.X_op != O_constant)
+ {
+ /* Value isn't known yet, create a dummy reloc and let reloc
+ hacking fix it up */
+
+ inst.reloc.type = BFD_RELOC_ARM_THUMB_SHIFT;
+ }
+ else
+ {
+ unsigned shift_value = inst.reloc.exp.X_add_number;
+
+ if (shift_value > 32 || (shift_value == 32 && shift == THUMB_LSL))
+ {
+ inst.error = "Invalid immediate for shift";
+ return;
+ }
+
+ /* Shifts of zero are handled by converting to LSL */
+ if (shift_value == 0)
+ inst.instruction = T_OPCODE_LSL_I;
+
+ /* Shifts of 32 are encoded as a shift of zero */
+ if (shift_value == 32)
+ shift_value = 0;
+
+ inst.instruction |= shift_value << 6;
+ }
+
+ inst.instruction |= Rd | (Rs << 3);
+ }
+ end_of_line (str);
+}
+
+static void
+thumb_mov_compare (str, move)
+ char *str;
+ int move;
+{
+ int Rd, Rs = FAIL;
+
+ while (*str == ' ')
+ str++;
+
+ if ((Rd = thumb_reg (&str, THUMB_REG_ANY)) == FAIL
+ || skip_past_comma (&str) == FAIL)
+ {
+ if (! inst.error)
+ inst.error = bad_args;
+ return;
+ }
+
+ if (*str == '#')
+ {
+ str++;
+ if (my_get_expression (&inst.reloc.exp, &str))
+ return;
+ }
+ else if ((Rs = thumb_reg (&str, THUMB_REG_ANY)) == FAIL)
+ return;
+
+ if (Rs != FAIL)
+ {
+ if (Rs < 8 && Rd < 8)
+ {
+ if (move == THUMB_MOVE)
+ /* A move of two lowregs is, by convention, encoded as
+ ADD Rd, Rs, #0 */
+ inst.instruction = T_OPCODE_ADD_I3;
+ else
+ inst.instruction = T_OPCODE_CMP_LR;
+ inst.instruction |= Rd | (Rs << 3);
+ }
+ else
+ {
+ if (move == THUMB_MOVE)
+ inst.instruction = T_OPCODE_MOV_HR;
+ else
+ inst.instruction = T_OPCODE_CMP_HR;
+
+ if (Rd > 7)
+ inst.instruction |= THUMB_H1;
+
+ if (Rs > 7)
+ inst.instruction |= THUMB_H2;
+
+ inst.instruction |= (Rd & 7) | ((Rs & 7) << 3);
+ }
+ }
+ else
+ {
+ if (Rd > 7)
+ {
+ inst.error = "only lo regs allowed with immediate";
+ return;
+ }
+
+ if (move == THUMB_MOVE)
+ inst.instruction = T_OPCODE_MOV_I8;
+ else
+ inst.instruction = T_OPCODE_CMP_I8;
+
+ inst.instruction |= Rd << 8;
+
+ if (inst.reloc.exp.X_op != O_constant)
+ inst.reloc.type = BFD_RELOC_ARM_THUMB_IMM;
+ else
+ {
+ unsigned value = inst.reloc.exp.X_add_number;
+
+ if (value > 255)
+ {
+ inst.error = "invalid immediate";
+ return;
+ }
+
+ inst.instruction |= value;
+ }
+ }
+
+ end_of_line (str);
+}
+
+static void
+thumb_load_store (str, load_store, size)
+ char *str;
+ int load_store;
+ int size;
+{
+ int Rd, Rb, Ro = FAIL;
+
+ while (*str == ' ')
+ str++;
+
+ if ((Rd = thumb_reg (&str, THUMB_REG_LO)) == FAIL
+ || skip_past_comma (&str) == FAIL)
+ {
+ if (! inst.error)
+ inst.error = bad_args;
+ return;
+ }
+
+ if (*str == '[')
+ {
+ str++;
+ if ((Rb = thumb_reg (&str, THUMB_REG_ANY)) == FAIL)
+ return;
+
+ if (skip_past_comma (&str) != FAIL)
+ {
+ if (*str == '#')
+ {
+ str++;
+ if (my_get_expression (&inst.reloc.exp, &str))
+ return;
+ }
+ else if ((Ro = thumb_reg (&str, THUMB_REG_LO)) == FAIL)
+ return;
+ }
+ else
+ {
+ inst.reloc.exp.X_op = O_constant;
+ inst.reloc.exp.X_add_number = 0;
+ }
+
+ if (*str != ']')
+ {
+ inst.error = "expected ']'";
+ return;
+ }
+ str++;
+ }
+ else if (*str == '=')
+ {
+ abort ();
+ }
+ else
+ {
+ if (my_get_expression (&inst.reloc.exp, &str))
+ return;
+
+ inst.instruction = T_OPCODE_LDR_PC | (Rd << 8);
+ inst.reloc.pc_rel = 1;
+ inst.reloc.exp.X_add_number -= 4; /* Pipeline offset */
+ inst.reloc.type = BFD_RELOC_ARM_THUMB_OFFSET;
+ end_of_line (str);
+ return;
+ }
+
+ if (Rb == REG_PC || Rb == REG_SP)
+ {
+ if (size != THUMB_WORD)
+ {
+ inst.error = "byte or halfword not valid for base register";
+ return;
+ }
+ else if (Rb == REG_PC && load_store != THUMB_LOAD)
+ {
+ inst.error = "R15 based store not allowed";
+ return;
+ }
+ else if (Ro != FAIL)
+ {
+ inst.error = "Invalid base register for register offset";
+ return;
+ }
+
+ if (Rb == REG_PC)
+ inst.instruction = T_OPCODE_LDR_PC;
+ else if (load_store == THUMB_LOAD)
+ inst.instruction = T_OPCODE_LDR_SP;
+ else
+ inst.instruction = T_OPCODE_STR_SP;
+
+ inst.instruction |= Rd << 8;
+ if (inst.reloc.exp.X_op == O_constant)
+ {
+ unsigned offset = inst.reloc.exp.X_add_number;
+
+ if (offset & ~0x3fc)
+ {
+ inst.error = "invalid offset";
+ return;
+ }
+
+ inst.instruction |= offset >> 2;
+ }
+ else
+ inst.reloc.type = BFD_RELOC_ARM_THUMB_OFFSET;
+ }
+ else if (Rb > 7)
+ {
+ inst.error = "invalid base register in load/store";
+ return;
+ }
+ else if (Ro == FAIL)
+ {
+ /* Immediate offset */
+ if (size == THUMB_WORD)
+ inst.instruction = (load_store == THUMB_LOAD
+ ? T_OPCODE_LDR_IW : T_OPCODE_STR_IW);
+ else if (size == THUMB_HALFWORD)
+ inst.instruction = (load_store == THUMB_LOAD
+ ? T_OPCODE_LDR_IH : T_OPCODE_STR_IH);
+ else
+ inst.instruction = (load_store == THUMB_LOAD
+ ? T_OPCODE_LDR_IB : T_OPCODE_STR_IB);
+
+ inst.instruction |= Rd | (Rb << 3);
+
+ if (inst.reloc.exp.X_op == O_constant)
+ {
+ unsigned offset = inst.reloc.exp.X_add_number;
+
+ if (offset & ~(0x1f << size))
+ {
+ inst.error = "Invalid offset";
+ return;
+ }
+ inst.instruction |= offset << 6;
+ }
+ else
+ inst.reloc.type = BFD_RELOC_ARM_THUMB_OFFSET;
+ }
+ else
+ {
+ /* Register offset */
+ if (size == THUMB_WORD)
+ inst.instruction = (load_store == THUMB_LOAD
+ ? T_OPCODE_LDR_RW : T_OPCODE_STR_RW);
+ else if (size == THUMB_HALFWORD)
+ inst.instruction = (load_store == THUMB_LOAD
+ ? T_OPCODE_LDR_RH : T_OPCODE_STR_RH);
+ else
+ inst.instruction = (load_store == THUMB_LOAD
+ ? T_OPCODE_LDR_RB : T_OPCODE_STR_RB);
+
+ inst.instruction |= Rd | (Rb << 3) | (Ro << 6);
+ }
+
+ end_of_line (str);
+}
+
+/* Handle the Format 4 instructions that do not have equivalents in other
+ formats. That is, ADC, AND, EOR, SBC, ROR, TST, NEG, CMN, ORR, MUL,
+ BIC and MVN. */
+static void
+do_t_arit (str)
+ char *str;
+{
+ int Rd, Rs, Rn;
+
+ while (*str == ' ')
+ str++;
+
+ if ((Rd = thumb_reg (&str, THUMB_REG_LO)) == FAIL)
+ return;
+
+ if (skip_past_comma (&str) == FAIL
+ || (Rs = thumb_reg (&str, THUMB_REG_LO)) == FAIL)
+ {
+ if (! inst.error)
+ inst.error = bad_args;
+ return;
+ }
+
+ if (skip_past_comma (&str) != FAIL)
+ {
+ /* Three operand format not allowed for TST, CMN, NEG and MVN.
+ (It isn't allowed for CMP either, but that isn't handled by this
+ function.) */
+ if (inst.instruction == T_OPCODE_TST
+ || inst.instruction == T_OPCODE_CMN
+ || inst.instruction == T_OPCODE_NEG
+ || inst.instruction == T_OPCODE_MVN)
+ {
+ inst.error = bad_args;
+ return;
+ }
+
+ if ((Rn = thumb_reg (&str, THUMB_REG_LO)) == FAIL)
+ return;
+
+ if (Rs != Rd)
+ {
+ inst.error = "dest and source1 one must be the same register";
+ return;
+ }
+ Rs = Rn;
+ }
+
+ if (inst.instruction == T_OPCODE_MUL
+ && Rs == Rd)
+ as_tsktsk ("Rs and Rd must be different in MUL");
+
+ inst.instruction |= Rd | (Rs << 3);
+ end_of_line (str);
+}
+
+static void
+do_t_add (str)
+ char *str;
+{
+ thumb_add_sub (str, 0);
+}
+
+static void
+do_t_asr (str)
+ char *str;
+{
+ thumb_shift (str, THUMB_ASR);
+}
+
+static void
+do_t_branch (str)
+ char *str;
+{
+ if (my_get_expression (&inst.reloc.exp, &str))
+ return;
+ inst.reloc.type = BFD_RELOC_ARM_PCREL_BRANCH;
+ inst.reloc.pc_rel = 1;
+ end_of_line (str);
+}
+
+static void
+do_t_bx (str)
+ char *str;
+{
+ int reg;
+
+ while (*str == ' ')
+ str++;
+
+ if ((reg = thumb_reg (&str, THUMB_REG_ANY)) == FAIL)
+ return;
+
+ /* This sets THUMB_H2 from the top bit of reg. */
+ inst.instruction |= reg << 3;
+
+ /* ??? FIXME: Should add a hacky reloc here if reg is REG_PC. The reloc
+ should cause the alignment to be checked once it is known. This is
+ because BX PC only works if the instruction is word aligned. */
+
+ end_of_line (str);
+}
+
+static void
+do_t_compare (str)
+ char *str;
+{
+ thumb_mov_compare (str, THUMB_COMPARE);
+}
+
+static void
+do_t_ldmstm (str)
+ char *str;
+{
+ int Rb;
+ long range;
+
+ while (*str == ' ')
+ str++;
+
+ if ((Rb = thumb_reg (&str, THUMB_REG_LO)) == FAIL)
+ return;
+
+ if (*str != '!')
+ as_warn ("Inserted missing '!': load/store multiple always writes back base register");
+ else
+ str++;
+
+ if (skip_past_comma (&str) == FAIL
+ || (range = reg_list (&str)) == FAIL)
+ {
+ if (! inst.error)
+ inst.error = bad_args;
+ return;
+ }
+
+ if (inst.reloc.type != BFD_RELOC_NONE)
+ {
+ /* This really doesn't seem worth it. */
+ inst.reloc.type = BFD_RELOC_NONE;
+ inst.error = "Expression too complex";
+ return;
+ }
+
+ if (range & ~0xff)
+ {
+ inst.error = "only lo-regs valid in load/store multiple";
+ return;
+ }
+
+ inst.instruction |= (Rb << 8) | range;
+ end_of_line (str);
+}
+
+static void
+do_t_ldr (str)
+ char *str;
+{
+ thumb_load_store (str, THUMB_LOAD, THUMB_WORD);
+}
+
+static void
+do_t_ldrb (str)
+ char *str;
+{
+ thumb_load_store (str, THUMB_LOAD, THUMB_BYTE);
+}
+
+static void
+do_t_ldrh (str)
+ char *str;
+{
+ thumb_load_store (str, THUMB_LOAD, THUMB_HALFWORD);
+}
+
+static void
+do_t_lds (str)
+ char *str;
+{
+ int Rd, Rb, Ro;
+
+ while (*str == ' ')
+ str++;
+
+ if ((Rd = thumb_reg (&str, THUMB_REG_LO)) == FAIL
+ || skip_past_comma (&str) == FAIL
+ || *str++ != '['
+ || (Rb = thumb_reg (&str, THUMB_REG_LO)) == FAIL
+ || skip_past_comma (&str) == FAIL
+ || (Ro = thumb_reg (&str, THUMB_REG_LO)) == FAIL
+ || *str++ != ']')
+ {
+ if (! inst.error)
+ inst.error = "Syntax: ldrs[b] Rd, [Rb, Ro]";
+ return;
+ }
+
+ inst.instruction |= Rd | (Rb << 3) | (Ro << 6);
+ end_of_line (str);
+}
+
+static void
+do_t_lsl (str)
+ char *str;
+{
+ thumb_shift (str, THUMB_LSL);
+}
+
+static void
+do_t_lsr (str)
+ char *str;
+{
+ thumb_shift (str, THUMB_LSR);
+}
+
+static void
+do_t_mov (str)
+ char *str;
+{
+ thumb_mov_compare (str, THUMB_MOVE);
+}
+
+static void
+do_t_push_pop (str)
+ char *str;
+{
+ long range;
+
+ while (*str == ' ')
+ str++;
+
+ if ((range = reg_list (&str)) == FAIL)
+ {
+ if (! inst.error)
+ inst.error = bad_args;
+ return;
+ }
+
+ if (inst.reloc.type != BFD_RELOC_NONE)
+ {
+ /* This really doesn't seem worth it. */
+ inst.reloc.type = BFD_RELOC_NONE;
+ inst.error = "Expression too complex";
+ return;
+ }
+
+ if (range & ~0xff)
+ {
+ if ((inst.instruction == T_OPCODE_PUSH
+ && (range & ~0xff) == 1 << REG_LR)
+ || (inst.instruction == T_OPCODE_POP
+ && (range & ~0xff) == 1 << REG_PC))
+ {
+ inst.instruction |= THUMB_PP_PC_LR;
+ range &= 0xff;
+ }
+ else
+ {
+ inst.error = "invalid register list to push/pop instruction";
+ return;
+ }
+ }
+
+ inst.instruction |= range;
+ end_of_line (str);
+}
+
+static void
+do_t_str (str)
+ char *str;
+{
+ thumb_load_store (str, THUMB_STORE, THUMB_WORD);
+}
+
+static void
+do_t_strb (str)
+ char *str;
+{
+ thumb_load_store (str, THUMB_STORE, THUMB_BYTE);
+}
+
+static void
+do_t_strh (str)
+ char *str;
+{
+ thumb_load_store (str, THUMB_STORE, THUMB_HALFWORD);
+}
+
+static void
+do_t_sub (str)
+ char *str;
+{
+ thumb_add_sub (str, 1);
+}
+
+static void
+do_t_swi (str)
+ char *str;
+{
+ while (*str == ' ')
+ str++;
+
+ if (my_get_expression (&inst.reloc.exp, &str))
+ return;
+
+ inst.reloc.type = BFD_RELOC_ARM_SWI;
+ end_of_line (str);
+ return;
+}
+
+static void
+do_t_adr (str)
+ char *str;
+{
+ /* This is a pseudo-op of the form "adr rd, label" to be converted
+ into a relative address of the form "add rd, pc, #label-.-8" */
+ while (*str == ' ')
+ str++;
+
+ if (reg_required_here (&str, 8) == FAIL
+ || skip_past_comma (&str) == FAIL
+ || my_get_expression (&inst.reloc.exp, &str))
+ {
+ if (!inst.error)
+ inst.error = bad_args;
+ return;
+ }
+
+ inst.reloc.type = BFD_RELOC_ARM_THUMB_ADD;
+ inst.reloc.exp.X_add_number -= 8; /* PC relative adjust */
+ inst.reloc.pc_rel = 1;
+ inst.instruction |= REG_PC; /* Rd is already placed into the instruction */
+ end_of_line (str);
+}
+
+static void
+insert_reg (entry)
+ int entry;
+{
+ int len = strlen (reg_table[entry].name) + 2;
+ char *buf = (char *) xmalloc (len);
+ char *buf2 = (char *) xmalloc (len);
+ int i = 0;
+
+#ifdef REGISTER_PREFIX
+ buf[i++] = REGISTER_PREFIX;
+#endif
strcpy (buf + i, reg_table[entry].name);
int i;
if ((arm_ops_hsh = hash_new ()) == NULL
+ || (arm_tops_hsh = hash_new ()) == NULL
|| (arm_cond_hsh = hash_new ()) == NULL
|| (arm_shift_hsh = hash_new ()) == NULL
|| (arm_reg_hsh = hash_new ()) == NULL
for (i = 0; i < sizeof (insns) / sizeof (struct asm_opcode); i++)
hash_insert (arm_ops_hsh, insns[i].template, (PTR) (insns + i));
+ for (i = 0; i < sizeof (tinsns) / sizeof (struct thumb_opcode); i++)
+ hash_insert (arm_tops_hsh, tinsns[i].template, (PTR) (tinsns + i));
for (i = 0; i < sizeof (conds) / sizeof (struct asm_cond); i++)
hash_insert (arm_cond_hsh, conds[i].template, (PTR) (conds + i));
for (i = 0; i < sizeof (shift) / sizeof (struct asm_shift); i++)
offsetT newval, temp;
int sign;
char *buf = fixP->fx_where + fixP->fx_frag->fr_literal;
+ arm_fix_data *arm_data = (arm_fix_data *) fixP->tc_fix_data;
assert (fixP->fx_r_type < BFD_RELOC_UNUSED);
md_number_to_chars (buf, newval, INSN_SIZE);
break;
- case BFD_RELOC_ARM_OFFSET_IMM:
+ case BFD_RELOC_ARM_OFFSET_IMM:
sign = value >= 0;
- value = validate_offset_imm (value); /* Should be OK ... but .... */
+ if ((value = validate_offset_imm (value, 0)) == FAIL)
+ {
+ as_bad ("bad immediate value for offset (%d)", val);
+ break;
+ }
if (value < 0)
value = -value;
newval = md_chars_to_number (buf, INSN_SIZE);
newval &= 0xff7ff000;
- newval |= value | (sign ? 0x00800000 : 0);
+ newval |= value | (sign ? INDEX_UP : 0);
+ md_number_to_chars (buf, newval, INSN_SIZE);
+ break;
+
+ case BFD_RELOC_ARM_OFFSET_IMM8:
+ case BFD_RELOC_ARM_HWLITERAL:
+ sign = value >= 0;
+ if ((value = validate_offset_imm (value, 1)) == FAIL)
+ {
+ if (fixP->fx_r_type == BFD_RELOC_ARM_HWLITERAL)
+ as_bad_where (fixP->fx_file, fixP->fx_line,
+ "invalid literal constant: pool needs to be closer\n");
+ else
+ as_bad ("bad immediate value for offset (%d)", value);
+ break;
+ }
+
+ if (value < 0)
+ value = -value;
+
+ newval = md_chars_to_number (buf, INSN_SIZE);
+ newval &= 0xff7ff0f0;
+ newval |= ((value >> 4) << 8) | value & 0xf | (sign ? INDEX_UP : 0);
md_number_to_chars (buf, newval, INSN_SIZE);
break;
if (value < 0)
value = -value;
- if ((value = validate_immediate (value)) == FAIL)
+ if ((value = validate_offset_imm (value, 0)) == FAIL)
{
as_bad_where (fixP->fx_file, fixP->fx_line,
"invalid literal constant: pool needs to be closer\n");
newval = md_chars_to_number (buf, INSN_SIZE);
newval &= 0xff7ff000;
- newval |= value | (sign ? 0x00800000 : 0);
+ newval |= value | (sign ? INDEX_UP : 0);
md_number_to_chars (buf, newval, INSN_SIZE);
break;
break;
case BFD_RELOC_ARM_SWI:
- if (((unsigned long) value) > 0x00ffffff)
- as_bad_where (fixP->fx_file, fixP->fx_line, "Invalid swi expression");
- newval = md_chars_to_number (buf, INSN_SIZE) & 0xff000000;
- newval |= value;
- md_number_to_chars (buf, newval , INSN_SIZE);
+ if (arm_data->thumb_mode)
+ {
+ if (((unsigned long) value) > 0xff)
+ as_bad_where (fixP->fx_file, fixP->fx_line,
+ "Invalid swi expression");
+ newval = md_chars_to_number (buf, THUMB_SIZE) & 0xff00;
+ newval |= value;
+ md_number_to_chars (buf, newval, THUMB_SIZE);
+ }
+ else
+ {
+ if (((unsigned long) value) > 0x00ffffff)
+ as_bad_where (fixP->fx_file, fixP->fx_line,
+ "Invalid swi expression");
+ newval = md_chars_to_number (buf, INSN_SIZE) & 0xff000000;
+ newval |= value;
+ md_number_to_chars (buf, newval , INSN_SIZE);
+ }
break;
case BFD_RELOC_ARM_MULTI:
break;
case BFD_RELOC_ARM_PCREL_BRANCH:
- value = (value >> 2) & 0x00ffffff;
- newval = md_chars_to_number (buf, INSN_SIZE);
- value = (value + (newval & 0x00ffffff)) & 0x00ffffff;
- newval = value | (newval & 0xff000000);
- md_number_to_chars (buf, newval, INSN_SIZE);
+ if (arm_data->thumb_mode)
+ {
+ unsigned long newval2;
+ newval = md_chars_to_number (buf, THUMB_SIZE);
+ if (fixP->fx_size == 4)
+ {
+ unsigned long diff;
+
+ newval2 = md_chars_to_number (buf, THUMB_SIZE);
+ diff = ((newval & 0x7ff) << 12) | ((newval2 & 0x7ff) << 1);
+ if (diff & 0x400000)
+ diff |= ~0x3fffff;
+ value += diff;
+ if ((value & 0x400000) && ((value & ~0x3fffff) != ~0x3fffff))
+ as_bad_where (fixP->fx_file, fixP->fx_line,
+ "Branch with link out of range");
+
+ newval = (newval & 0xf800) | ((value & 0x7fffff) >> 12);
+ newval2 = (newval2 & 0xf800) | ((value & 0xfff) >> 1);
+ md_number_to_chars (buf, newval, THUMB_SIZE);
+ md_number_to_chars (buf, newval2, THUMB_SIZE);
+ }
+ else
+ {
+ if (newval == T_OPCODE_BRANCH)
+ {
+ unsigned long diff = (newval & 0x7ff) << 1;
+ if (diff & 0x800)
+ diff |= ~0x7ff;
+
+ value += diff;
+ if ((value & 0x800) && ((value & ~0x7ff) != ~0x7ff))
+ as_bad_where (fixP->fx_file, fixP->fx_line,
+ "Branch out of range");
+ newval = (newval & 0xf800) | ((value & 0xfff) >> 1);
+ }
+ else
+ {
+ unsigned long diff = (newval & 0xff) << 1;
+ if (diff & 0x100)
+ diff |= ~0xff;
+
+ value += diff;
+ if ((value & 0x100) && ((value & ~0xff) != ~0xff))
+ as_bad_where (fixP->fx_file, fixP->fx_line,
+ "Branch out of range");
+ newval = (newval & 0xff00) | ((value & 0x1ff) >> 1);
+ }
+ md_number_to_chars (buf, newval, THUMB_SIZE);
+ }
+ }
+ else
+ {
+ value = (value >> 2) & 0x00ffffff;
+ newval = md_chars_to_number (buf, INSN_SIZE);
+ value = (value + (newval & 0x00ffffff)) & 0x00ffffff;
+ newval = value | (newval & 0xff000000);
+ md_number_to_chars (buf, newval, INSN_SIZE);
+ }
break;
case BFD_RELOC_8:
if (value < 0)
value = -value;
newval = md_chars_to_number (buf, INSN_SIZE) & 0xff7fff00;
- newval |= (value >> 2) | (sign ? 0x00800000 : 0);
+ newval |= (value >> 2) | (sign ? INDEX_UP : 0);
md_number_to_chars (buf, newval , INSN_SIZE);
break;
+ case BFD_RELOC_ARM_THUMB_OFFSET:
+ newval = md_chars_to_number (buf, THUMB_SIZE);
+ /* Exactly what ranges, and where the offset is inserted depends on
+ the type of instruction, we can establish this from the top 4 bits */
+ switch (newval >> 12)
+ {
+ case 4: /* PC load */
+ /* PC loads are somewhat odd, bit 2 of the PC is forced to zero
+ for these loads, so we may need to round up the offset if the
+ instruction is not word aligned since the final address must
+ be. */
+
+ if ((fixP->fx_frag->fr_address + fixP->fx_where + value) & 3)
+ as_bad_where (fixP->fx_file, fixP->fx_line,
+ "Invalid offset, target not word aligned");
+
+ if ((value + 2) & ~0x3fe)
+ as_bad_where (fixP->fx_file, fixP->fx_line,
+ "Invalid offset");
+ /* Round up, since pc will be rounded down. */
+ newval |= (value + 2) >> 2;
+ break;
+
+ case 9: /* SP load/store */
+ if (value & ~0x3fc)
+ as_bad_where (fixP->fx_file, fixP->fx_line,
+ "Invalid offset");
+ newval |= value >> 2;
+ break;
+
+ case 6: /* Word load/store */
+ if (value & ~0x7c)
+ as_bad_where (fixP->fx_file, fixP->fx_line,
+ "Invalid offset");
+ newval |= value << 4; /* 6 - 2 */
+ break;
+
+ case 7: /* Byte load/store */
+ if (value & ~0x1f)
+ as_bad_where (fixP->fx_file, fixP->fx_line,
+ "Invalid offset");
+ newval |= value << 6;
+ break;
+
+ case 8: /* Halfword load/store */
+ if (value & ~0x3e)
+ as_bad_where (fixP->fx_file, fixP->fx_line,
+ "Invalid offset");
+ newval |= value << 5; /* 6 - 1 */
+ break;
+
+ default:
+ abort ();
+ }
+ md_number_to_chars (buf, newval, THUMB_SIZE);
+ break;
+
+ case BFD_RELOC_ARM_THUMB_ADD:
+ /* This is a complicated relocation, since we use it for all of
+ the following immediate relocations:
+ 3bit ADD/SUB
+ 8bit ADD/SUB
+ 9bit ADD/SUB SP word-aligned
+ 10bit ADD PC/SP word-aligned
+
+ The type of instruction being processed is encoded in the
+ instruction field:
+ 0x8000 SUB
+ 0x00F0 Rd
+ 0x000F Rs
+ */
+ newval = md_chars_to_number (buf, THUMB_SIZE);
+ {
+ int rd = (newval >> 4) & 0xf;
+ int rs = newval & 0xf;
+ int subtract = newval & 0x8000;
+
+ if (rd == REG_SP)
+ {
+ if (value & ~0x1fc)
+ as_bad_where (fixP->fx_file, fixP->fx_line,
+ "Invalid immediate for stack address calculation");
+ newval = subtract ? T_OPCODE_SUB_ST : T_OPCODE_ADD_ST;
+ newval |= value >> 2;
+ }
+ else if (rs == REG_PC || rs == REG_SP)
+ {
+ if (subtract ||
+ value & ~0x3fc)
+ as_bad_where (fixP->fx_file, fixP->fx_line,
+ "Invalid immediate for address calculation (value = 0x%08X)", value);
+ newval = (rs == REG_PC ? T_OPCODE_ADD_PC : T_OPCODE_ADD_SP);
+ newval |= value >> 2;
+ }
+ else if (rs == rd)
+ {
+ if (value & ~0xff)
+ as_bad_where (fixP->fx_file, fixP->fx_line,
+ "Invalid 8bit immediate");
+ newval = subtract ? T_OPCODE_SUB_I8 : T_OPCODE_ADD_I8;
+ newval |= (rd << 8) | value;
+ }
+ else
+ {
+ if (value & ~0x7)
+ as_bad_where (fixP->fx_file, fixP->fx_line,
+ "Invalid 3bit immediate");
+ newval = subtract ? T_OPCODE_SUB_I3 : T_OPCODE_ADD_I3;
+ newval |= rd | (rs << 3) | (value << 6);
+ }
+ }
+ md_number_to_chars (buf, newval , THUMB_SIZE);
+ break;
+
+ case BFD_RELOC_ARM_THUMB_IMM:
+ newval = md_chars_to_number (buf, THUMB_SIZE);
+ switch (newval >> 11)
+ {
+ case 0x04: /* 8bit immediate MOV */
+ case 0x05: /* 8bit immediate CMP */
+ if (value < 0 || value > 255)
+ as_bad_where (fixP->fx_file, fixP->fx_line,
+ "Invalid immediate: %d is too large", value);
+ newval |= value;
+ break;
+
+ default:
+ abort ();
+ }
+ md_number_to_chars (buf, newval , THUMB_SIZE);
+ break;
+
+ case BFD_RELOC_ARM_THUMB_SHIFT:
+ /* 5bit shift value (0..31) */
+ if (value < 0 || value > 31)
+ as_bad_where (fixP->fx_file, fixP->fx_line,
+ "Illegal Thumb shift value: %d", value);
+ newval = md_chars_to_number (buf, THUMB_SIZE) & 0xf03f;
+ newval |= value << 6;
+ md_number_to_chars (buf, newval , THUMB_SIZE);
+ break;
+
case BFD_RELOC_NONE:
default:
as_bad_where (fixP->fx_file, fixP->fx_line,
break;
case BFD_RELOC_ARM_LITERAL:
+ case BFD_RELOC_ARM_HWLITERAL:
/* If this is called then the a literal has been referenced across
a section boundry - possibly due to an implicit dump */
as_bad ("Literal referenced across section boundry (Implicit dump?)");
, fixp->fx_r_type);
return NULL;
+ case BFD_RELOC_ARM_OFFSET_IMM8:
+ as_bad ("Internal_relocation (type %d) not fixed up (OFFSET_IMM8)"
+ , fixp->fx_r_type);
+ return NULL;
+
case BFD_RELOC_ARM_SHIFT_IMM:
as_bad ("Internal_relocation (type %d) not fixed up (SHIFT_IMM)"
, fixp->fx_r_type);
, fixp->fx_r_type);
return NULL;
+ case BFD_RELOC_ARM_THUMB_OFFSET:
+ as_bad ("Internal_relocation (type %d) not fixed up (THUMB_OFFSET)"
+ , fixp->fx_r_type);
+ return NULL;
+
default:
abort ();
}
return;
}
- to = frag_more (INSN_SIZE);
- md_number_to_chars (to, inst.instruction, INSN_SIZE);
+ to = frag_more (inst.size);
+ if (thumb_mode && (inst.size > 2))
+ {
+ md_number_to_chars (to, inst.instruction >> 16, 2);
+ to += 2;
+ inst.size = 2;
+ }
+
+ md_number_to_chars (to, inst.instruction, inst.size);
if (inst.reloc.type != BFD_RELOC_NONE)
fix_new_arm (frag_now, to - frag_now->fr_literal,
- 4, &inst.reloc.exp, inst.reloc.pc_rel,
+ inst.size, &inst.reloc.exp, inst.reloc.pc_rel,
inst.reloc.type);
return;
char *str;
{
char c;
- CONST struct asm_opcode *opcode;
char *p, *q, *start;
/* Align the instruction */
return;
}
- /* p now points to the end of the opcode, probably white space, but we have
- to break the opcode up in case it contains condionals and flags;
- keep trying with progressively smaller basic instructions until one
- matches, or we run out of opcode. */
- q = (p - str > LONGEST_INST) ? str + LONGEST_INST : p;
- for (; q != str; q--)
+ if (thumb_mode)
{
- c = *q;
- *q = '\0';
- opcode = (CONST struct asm_opcode *) hash_find (arm_ops_hsh, str);
- *q = c;
- if (opcode && opcode->template)
- {
- unsigned long flag_bits = 0;
- char *r;
-
- /* Check that this instruction is supported for this CPU */
- if ((opcode->variants & cpu_variant) == 0)
- goto try_shorter;
+ CONST struct thumb_opcode *opcode;
+ c = *p;
+ *p = '\0';
+ opcode = (CONST struct thumb_opcode *) hash_find (arm_tops_hsh, str);
+ *p = c;
+ if (opcode)
+ {
inst.instruction = opcode->value;
- if (q == p) /* Just a simple opcode */
+ inst.size = opcode->size;
+ (*opcode->parms)(p);
+ output_inst (start);
+ return;
+ }
+ }
+ else
+ {
+ CONST struct asm_opcode *opcode;
+
+ inst.size = INSN_SIZE;
+ /* p now points to the end of the opcode, probably white space, but we
+ have to break the opcode up in case it contains condionals and flags;
+ keep trying with progressively smaller basic instructions until one
+ matches, or we run out of opcode. */
+ q = (p - str > LONGEST_INST) ? str + LONGEST_INST : p;
+ for (; q != str; q--)
+ {
+ c = *q;
+ *q = '\0';
+ opcode = (CONST struct asm_opcode *) hash_find (arm_ops_hsh, str);
+ *q = c;
+ if (opcode && opcode->template)
{
- if (opcode->comp_suffix != 0)
- as_bad ("Opcode `%s' must have suffix from <%s>\n", str,
- opcode->comp_suffix);
- else
+ unsigned long flag_bits = 0;
+ char *r;
+
+ /* Check that this instruction is supported for this CPU */
+ if ((opcode->variants & cpu_variant) == 0)
+ goto try_shorter;
+
+ inst.instruction = opcode->value;
+ if (q == p) /* Just a simple opcode */
{
- inst.instruction |= COND_ALWAYS;
- (*opcode->parms)(q, 0);
+ if (opcode->comp_suffix != 0)
+ as_bad ("Opcode `%s' must have suffix from <%s>\n", str,
+ opcode->comp_suffix);
+ else
+ {
+ inst.instruction |= COND_ALWAYS;
+ (*opcode->parms)(q, 0);
+ }
+ output_inst (start);
+ return;
}
- output_inst (start);
- return;
- }
- /* Now check for a conditional */
- r = q;
- if (p - r >= 2)
- {
- CONST struct asm_cond *cond;
- char d = *(r + 2);
-
- *(r + 2) = '\0';
- cond = (CONST struct asm_cond *) hash_find (arm_cond_hsh, r);
- *(r + 2) = d;
- if (cond)
+ /* Now check for a conditional */
+ r = q;
+ if (p - r >= 2)
{
- if (cond->value == 0xf0000000)
- as_tsktsk
- ("Warning: Use of the 'nv' conditional is deprecated\n");
+ CONST struct asm_cond *cond;
+ char d = *(r + 2);
+
+ *(r + 2) = '\0';
+ cond = (CONST struct asm_cond *) hash_find (arm_cond_hsh, r);
+ *(r + 2) = d;
+ if (cond)
+ {
+ if (cond->value == 0xf0000000)
+ as_tsktsk (
+"Warning: Use of the 'nv' conditional is deprecated\n");
- inst.instruction |= cond->value;
- r += 2;
+ inst.instruction |= cond->value;
+ r += 2;
+ }
+ else
+ inst.instruction |= COND_ALWAYS;
}
else
inst.instruction |= COND_ALWAYS;
- }
- else
- inst.instruction |= COND_ALWAYS;
-
- /* if there is a compulsory suffix, it should come here, before
- any optional flags. */
- if (opcode->comp_suffix)
- {
- CONST char *s = opcode->comp_suffix;
- while (*s)
- {
- inst.suffix++;
- if (*r == *s)
- break;
- s++;
- }
-
- if (*s == '\0')
+ /* if there is a compulsory suffix, it should come here, before
+ any optional flags. */
+ if (opcode->comp_suffix)
{
- as_bad ("Opcode `%s' must have suffix from <%s>\n", str,
- opcode->comp_suffix);
- return;
- }
-
- r++;
- }
+ CONST char *s = opcode->comp_suffix;
- /* The remainder, if any should now be flags for the instruction;
- Scan these checking each one found with the opcode. */
- if (r != p)
- {
- char d;
- CONST struct asm_flg *flag = opcode->flags;
+ while (*s)
+ {
+ inst.suffix++;
+ if (*r == *s)
+ break;
+ s++;
+ }
- if (flag)
- {
- int flagno;
+ if (*s == '\0')
+ {
+ as_bad ("Opcode `%s' must have suffix from <%s>\n", str,
+ opcode->comp_suffix);
+ return;
+ }
- d = *p;
- *p = '\0';
+ r++;
+ }
+
+ /* The remainder, if any should now be flags for the instruction;
+ Scan these checking each one found with the opcode. */
+ if (r != p)
+ {
+ char d;
+ CONST struct asm_flg *flag = opcode->flags;
- for (flagno = 0; flag[flagno].template; flagno++)
+ if (flag)
{
- if (! strcmp (r, flag[flagno].template))
+ int flagno;
+
+ d = *p;
+ *p = '\0';
+
+ for (flagno = 0; flag[flagno].template; flagno++)
{
- flag_bits |= flag[flagno].set_bits;
- break;
+ if (! strcmp (r, flag[flagno].template))
+ {
+ flag_bits |= flag[flagno].set_bits;
+ break;
+ }
}
- }
- *p = d;
- if (! flag[flagno].template)
+ *p = d;
+ if (! flag[flagno].template)
+ goto try_shorter;
+ }
+ else
goto try_shorter;
}
- else
- goto try_shorter;
+
+ (*opcode->parms) (p, flag_bits);
+ output_inst (start);
+ return;
}
- (*opcode->parms) (p, flag_bits);
- output_inst (start);
- return;
+ try_shorter:
+ ;
}
-
- try_shorter:
- ;
}
+
/* It wasn't an instruction, but it might be a register alias of the form
alias .req reg
*/
* -m[arm]1 Currently not supported.
* -m[arm]2, -m[arm]250 Arm 2 and Arm 250 processor
* -m[arm]3 Arm 3 processor
- * -m[arm]6, -m[arm]7 Arm 6 and 7 processors
- * -m[arm]7dm Arm 7dm processors
+ * -m[arm]6, Arm 6 processors
+ * -m[arm]7[t][[d]m] Arm 7 processors
* -mall All (except the ARM1)
* FP variants:
* -mfpa10, -mfpa11 FPA10 and 11 co-processor instructions
#endif
{NULL, no_argument, NULL, 0}
};
-size_t md_longopts_size = sizeof(md_longopts);
+size_t md_longopts_size = sizeof (md_longopts);
int
md_parse_option (c, arg)
cpu_variant &= ~FPU_ALL;
break;
+ case 't':
+ /* Limit assembler to generating only Thumb instructions: */
+ if (! strcmp (str, "thumb"))
+ {
+ cpu_variant = (cpu_variant & ~ARM_ANY) | ARM_THUMB;
+ cpu_variant = (cpu_variant & ~FPU_ALL) | FPU_NONE;
+ thumb_mode = 1;
+ }
+ else
+ goto bad;
+ break;
+
default:
if (! strcmp (str, "all"))
{
break;
case '7':
- if (! strcmp (str, "7"))
- cpu_variant = (cpu_variant & ~ARM_ANY) | ARM_7;
- else if (! strcmp (str, "7dm"))
- cpu_variant = (cpu_variant & ~ARM_ANY) | ARM_7DM;
- else
- goto bad;
+ str++; /* eat the '7' */
+ cpu_variant = (cpu_variant & ~ARM_ANY) | ARM_7;
+ for (; *str; str++)
+ {
+ switch (*str)
+ {
+ case 't':
+ cpu_variant |= ARM_THUMB;
+ break;
+
+ case 'm':
+ cpu_variant |= ARM_LONGMUL;
+ break;
+
+ case 'd': /* debug */
+ case 'i': /* embedded ice */
+ /* Included for completeness in ARM processor
+ naming. */
+ break;
+
+ default:
+ goto bad;
+ }
+ }
break;
default:
FILE *fp;
{
fprintf (fp,
-"-m[arm]1, -m[arm]2, -m[arm]250,\n-m[arm]3, -m[arm]6, -m[arm]7, -m[arm]7dm\n\
-\t\t\tselect processor architecture\n\
+"-m[arm]1, -m[arm]2, -m[arm]250,\n-m[arm]3, -m[arm]6, -m[arm]7[t][[d]m]\n\
+-mthumb\t\t\tselect processor architecture\n\
-mall\t\t\tallow any instruction\n\
-mfpa10, -mfpa11\tselect floating point architecture\n\
-mfpe-old\t\tdon't allow floating-point multiple instructions\n\
int reloc;
{
fixS *new_fix;
+ arm_fix_data *arm_data;
switch (exp->X_op)
{
break;
}
+ /* Mark whether the fix is to a THUMB instruction, or an ARM instruction */
+ arm_data = (arm_fix_data *) obstack_alloc (¬es, sizeof (arm_fix_data));
+ new_fix->tc_fix_data = (PTR) arm_data;
+ arm_data->thumb_mode = thumb_mode;
+
return;
}
{
last_label_seen = sym;
}
+
+int
+arm_data_in_code ()
+{
+ if (thumb_mode && ! strncmp (input_line_pointer + 1, "data:", 5))
+ {
+ *input_line_pointer = '/';
+ input_line_pointer += 5;
+ *input_line_pointer = 0;
+ return 1;
+ }
+ return 0;
+}
+
+char *
+arm_canonicalize_symbol_name (name)
+ char *name;
+{
+ int len;
+
+ if (thumb_mode && (len = strlen (name)) > 5
+ && ! strcmp (name + len - 5, "/data"))
+ {
+ *(name + len - 5) = 0;
+ }
+
+ return name;
+}
#define obj_fix_adjustable(fixP) 0
+#define TC_FIX_TYPE PTR
+#define TC_INIT_FIX_DATA(FIXP) ((FIXP)->tc_fix_data = NULL)
+
+#define TC_START_LABEL(C,STR) \
+ (c == ':' || (c == '/' && arm_data_in_code ()))
+int arm_data_in_code PARAMS ((void));
+
+#define tc_canonicalize_symbol_name(str) \
+ arm_canonicalize_symbol_name (str);
+char *arm_canonicalize_symbol_name PARAMS ((char *));
+
#if 0 /* It isn't as simple as this */
#define tc_frob_symbol(sym,punt) \
{ if (S_IS_LOCAL (sym)) \
void cons ();
int Hmode;
+int Smode;
#define PSIZE (Hmode ? L_32 : L_16)
#define DMODE (L_16)
#define DSYMMODE (Hmode ? L_24 : L_16)
h8300hmode ()
{
Hmode = 1;
+ Smode = 0;
}
-
+void
+h8300smode ()
+{
+ Smode = 1;
+ Hmode = 1;
+}
void
sbranch (size)
int size;
{
{"h8300h", h8300hmode, 0},
+ {"h8300s", h8300smode, 0},
{"sbranch", sbranch, L_8},
{"lbranch", sbranch, L_16},
*reg = 0;
return 3;
}
+ if (src[0] == 'e' && src[1] == 'x' && src[2] == 'r')
+ {
+ *mode = EXR;
+ *reg = 0;
+ return 3;
+ }
if (src[0] == 'f' && src[1] == 'p')
{
*mode = PSIZE | REG | direction;
*mode = L_32 | REG | direction;
*reg = src[2] - '0';
if (!Hmode)
- as_warn ("Reg only legal for H8/300-H");
+ as_warn ("Reg not valid for H8/300");
return 3;
}
*mode = L_16 | REG | direction;
*reg = src[1] - '0' + 8;
if (!Hmode)
- as_warn ("Reg only legal for H8/300-H");
+ as_warn ("Reg not valid for H8/300");
return 2;
}
{
*mode |= L_24;
}
+ else if (*ptr == '3')
+ {
+ *mode |= L_32;
+ }
else if (*ptr == '1')
{
*mode |= L_16;
op->mode = E;
+ /* Gross. Gross. ldm and stm have a format not easily handled
+ by get_operand. We deal with it explicitly here. */
+ if (src[0] == 'e' && src[1] == 'r' && isdigit(src[2])
+ && src[3] == '-' && src[4] == 'e' && src[5] == 'r' && isdigit(src[6]))
+ {
+ int low, high;
+
+ low = src[2] - '0';
+ high = src[6] - '0';
+
+ if (high < low)
+ as_bad ("Invalid register list for ldm/stm\n");
+
+ if (low % 2)
+ as_bad ("Invalid register list for ldm/stm\n");
+
+ if (high - low > 4)
+ as_bad ("Invalid register list for ldm/stm\n");
+
+ if (high - low != 2
+ && low % 4)
+ as_bad ("Invalid register list for ldm/stm\n");
+
+ /* Even sicker. We encode two registers into op->reg. One
+ for the low register to save, the other for the high
+ register to save; we also set the high bit in op->reg
+ so we know this is "very special". */
+ op->reg = 0x80000000 | (high << 8) | low;
+ op->mode = REG;
+ *ptr = src + 7;
+ return;
+ }
+
len = parse_reg (src, &op->mode, &op->reg, direction);
if (len)
{
src = parse_exp (src, &op->exp);
*ptr = skip_colonthing (src, &op->exp, &op->mode);
+ return;
+ }
+ else if (strncmp (src, "mach", 4) == 0
+ || strncmp (src, "macl", 4) == 0)
+ {
+ op->reg = src[3] == 'l';
+ op->mode = MACREG;
+ *ptr = src + 4;
return;
}
else
*/
static
struct h8_opcode *
-get_specific (opcode, operands)
+get_specific (opcode, operands, size)
struct h8_opcode *opcode;
struct h8_op *operands;
+ int size;
{
struct h8_opcode *this_try = opcode;
int found = 0;
unsigned int this_index = opcode->idx;
+ /* There's only one ldm/stm and it's easier to just
+ get out quick for them. */
+ if (strcmp (opcode->name, "stm.l") == 0
+ || strcmp (opcode->name, "ldm.l") == 0)
+ return this_try;
+
while (this_index == opcode->idx && !found)
{
- unsigned int i;
found = 1;
this_try = opcode++;
- for (i = 0; i < this_try->noperands && found; i++)
+ if (this_try->noperands == 0)
{
- op_type op = this_try->args.nib[i];
- int x = operands[i].mode;
+ int this_size;
- if ((op & (DISP | REG)) == (DISP | REG)
- && ((x & (DISP | REG)) == (DISP | REG)))
- {
- dispreg = operands[i].reg;
- }
- else if (op & REG)
+ this_size = this_try->how & SN;
+ if (this_size != size && (this_size != SB || size != SN))
+ found = 0;
+ }
+ else
+ {
+ unsigned int i;
+
+ for (i = 0; i < this_try->noperands && found; i++)
{
- if (!(x & REG))
- found = 0;
+ op_type op = this_try->args.nib[i];
+ int x = operands[i].mode;
- if (x & L_P)
+ if ((op & (DISP | REG)) == (DISP | REG)
+ && ((x & (DISP | REG)) == (DISP | REG)))
{
- x = (x & ~L_P) | (Hmode ? L_32 : L_16);
+ dispreg = operands[i].reg;
}
- if (op & L_P)
+ else if (op & REG)
{
- op = (op & ~L_P) | (Hmode ? L_32 : L_16);
- }
+ if (!(x & REG))
+ found = 0;
- opsize = op & SIZE;
+ if (x & L_P)
+ x = (x & ~L_P) | (Hmode ? L_32 : L_16);
+ if (op & L_P)
+ op = (op & ~L_P) | (Hmode ? L_32 : L_16);
- /* The size of the reg is v important */
- if ((op & SIZE) != (x & SIZE))
- found = 0;
- }
- else if ((op & ABSJMP) && (x & ABS))
- {
- operands[i].mode &= ~ABS;
- operands[i].mode |= ABSJMP;
- /* But it may not be 24 bits long */
- if (!Hmode)
+ opsize = op & SIZE;
+
+ /* The size of the reg is v important */
+ if ((op & SIZE) != (x & SIZE))
+ found = 0;
+ }
+ else if ((op & ABSJMP) && (x & ABS))
{
- operands[i].mode &= ~SIZE;
- operands[i].mode |= L_16;
+ operands[i].mode &= ~ABS;
+ operands[i].mode |= ABSJMP;
+ /* But it may not be 24 bits long */
+ if (!Hmode)
+ {
+ operands[i].mode &= ~SIZE;
+ operands[i].mode |= L_16;
+ }
}
-
-
- }
- else if ((op & (KBIT | DBIT)) && (x & IMM))
- {
- /* This is ok if the immediate value is sensible */
-
- }
- else if (op & PCREL)
- {
-
- /* The size of the displacement is important */
- if ((op & SIZE) != (x & SIZE))
- found = 0;
-
- }
- else if ((op & (DISP | IMM | ABS))
- && (op & (DISP | IMM | ABS)) == (x & (DISP | IMM | ABS)))
- {
- /* Got a diplacement,will fit if no size or same size as try */
- if (op & ABS && op & L_8)
+ else if ((op & (KBIT | DBIT)) && (x & IMM))
{
- /* We want an 8 bit abs here, but one which looks like 16 bits will do fine */
- if (x & L_16)
- found= 1;
+ /* This is ok if the immediate value is sensible */
}
- else
- if ((x & SIZE) != 0
- && ((op & SIZE) != (x & SIZE)))
- found = 0;
- }
- else if ((op & MODE) != (x & MODE))
- {
- found = 0;
+ else if (op & PCREL)
+ {
+ /* The size of the displacement is important */
+ if ((op & SIZE) != (x & SIZE))
+ found = 0;
+ }
+ else if ((op & (DISP | IMM | ABS))
+ && (op & (DISP | IMM | ABS)) == (x & (DISP | IMM | ABS)))
+ {
+ /* Promote a L_24 to L_32 if it makes us match. */
+ if ((x & L_24) && (op & L_32))
+ {
+ x &= ~L_24;
+ x |= L_32;
+ }
+ /* Promote an L8 to L_16 if it makes us match. */
+ if (op & ABS && op & L_8 && op & DISP)
+ {
+ if (x & L_16)
+ found= 1;
+ }
+ else if ((x & SIZE) != 0
+ && ((op & SIZE) != (x & SIZE)))
+ found = 0;
+ }
+ else if ((op & MACREG) != (x & MACREG))
+ {
+ found = 0;
+ }
+ else if ((op & MODE) != (x & MODE))
+ {
+ found = 0;
+ }
}
-
}
}
if (found)
{
case L_24:
+ case L_32:
size = 4;
- where = -1;
+ where = (operand->mode & SIZE) == L_24 ? -1 : 0;
if (relaxmode == 2)
idx = R_MOV24B1;
else if (relaxmode == 1)
break;
default:
as_bad("Can't work out size of operand.\n");
- case L_32:
- size = 4;
- where = 0;
- idx = R_RELLONG;
- break;
case L_16:
size = 2;
where = 0;
char *p = asnibbles;
if (!(this_try->inbase || Hmode))
- {
- as_warn ("Opcode `%s' only available in this mode on H8/300-H",
- this_try->name);
- }
+ as_warn ("Opcode `%s' not available in H8/300 mode", this_try->name);
while (*nibble_ptr != E)
{
int d;
c = *nibble_ptr++;
- d = (c & DST) != 0;
+ d = (c & (DST | SRC_IN_DST)) != 0;
if (c < 16)
{
break;
case 4:
if (!Hmode)
- as_warn ("#4 only valid in h8/300 mode.");
+ as_warn ("#4 not valid on H8/300.");
nib = 9;
break;
{
nib |= 0x8;
}
+
+ if (c & MACREG)
+ {
+ nib = 2 + operand[d].reg;
+ }
}
nibble_count++;
*p++ = nib;
}
+ /* Disgusting. Why, oh why didn't someone ask us for advice
+ on the assembler format. */
+ if (strcmp (this_try->name, "stm.l") == 0
+ || strcmp (this_try->name, "ldm.l") == 0)
+ {
+ int high, low;
+ high = (operand[this_try->name[0] == 'l' ? 1 : 0].reg >> 8) & 0xf;
+ low = operand[this_try->name[0] == 'l' ? 1 : 0].reg & 0xf;
+
+ asnibbles[2] = high - low;
+ asnibbles[7] = (this_try->name[0] == 'l') ? high : low;
+ }
+
for (i = 0; i < this_try->length; i++)
{
output[i] = (asnibbles[i * 2] << 4) | asnibbles[i * 2 + 1];
char *dot = 0;
char c;
+ int size;
/* Drop leading whitespace */
while (*str == ' ')
*op_end = c;
prev_opcode = opcode;
- opcode = get_specific (opcode, operand);
+ size = SN;
+ if (dot)
+ {
+ switch (*dot)
+ {
+ case 'b':
+ size = SB;
+ break;
+
+ case 'w':
+ size = SW;
+ break;
+
+ case 'l':
+ size = SL;
+ break;
+ }
+ }
+ opcode = get_specific (opcode, operand, size);
if (opcode == 0)
{
static void pa_align PARAMS ((int));
static void pa_block PARAMS ((int));
static void pa_brtab PARAMS ((int));
+static void pa_try PARAMS ((int));
static void pa_call PARAMS ((int));
static void pa_call_args PARAMS ((struct call_desc *));
static void pa_callinfo PARAMS ((int));
static void pa_import PARAMS ((int));
static void pa_label PARAMS ((int));
static void pa_leave PARAMS ((int));
+static void pa_level PARAMS ((int));
static void pa_origin PARAMS ((int));
static void pa_proc PARAMS ((int));
static void pa_procend PARAMS ((int));
not the log2 of the requested alignment. */
{"align", pa_align, 8},
{"begin_brtab", pa_brtab, 1},
+ {"begin_try", pa_try, 1},
{"block", pa_block, 1},
{"blockz", pa_block, 0},
{"byte", pa_cons, 1},
{"double", pa_float_cons, 'd'},
{"end", pa_end, 0},
{"end_brtab", pa_brtab, 0},
+ {"end_try", pa_try, 0},
{"enter", pa_enter, 0},
{"entry", pa_entry, 0},
{"equ", pa_equ, 0},
{"label", pa_label, 0},
{"lcomm", pa_lcomm, 0},
{"leave", pa_leave, 0},
+ {"level", pa_level, 0},
{"long", pa_cons, 4},
{"lsym", pa_lsym, 0},
{"nsubspa", pa_subspace, 1},
fixp->fx_r_type,
hppa_fixp->fx_r_format,
hppa_fixp->fx_r_field,
- fixp->fx_subsy != NULL);
+ fixp->fx_subsy != NULL,
+ fixp->fx_addsy->bsym);
for (n_relocs = 0; codes[n_relocs]; n_relocs++)
;
case R_RSEL:
case R_BEGIN_BRTAB:
case R_END_BRTAB:
+ case R_BEGIN_TRY:
case R_N0SEL:
case R_N1SEL:
/* There is no symbol or addend associated with these fixups. */
relocs[i]->addend = 0;
break;
+ case R_END_TRY:
case R_ENTRY:
case R_EXIT:
/* There is no symbol associated with these fixups. */
if (fixP->fx_r_type == R_HPPA_ENTRY
|| fixP->fx_r_type == R_HPPA_EXIT
|| fixP->fx_r_type == R_HPPA_BEGIN_BRTAB
- || fixP->fx_r_type == R_HPPA_END_BRTAB)
+ || fixP->fx_r_type == R_HPPA_END_BRTAB
+ || fixP->fx_r_type == R_HPPA_BEGIN_TRY)
return 1;
+
+ /* Disgusting. We must set fx_offset ourselves -- R_HPPA_END_TRY
+ fixups are considered not adjustable, which in turn causes
+ adjust_reloc_syms to not set fx_offset. Ugh. */
+ if (fixP->fx_r_type == R_HPPA_END_TRY)
+ {
+ fixP->fx_offset = *valp;
+ return 1;
+ }
#endif
/* There should have been an HPPA specific fixup associated
demand_empty_rest_of_line ();
}
+/* Handle a .begin_try and .end_try pseudo-op. */
+
+static void
+pa_try (begin)
+ int begin;
+{
+#ifdef OBJ_SOM
+ expressionS exp;
+ char *where = frag_more (0);
+
+ if (! begin)
+ expression (&exp);
+
+ /* The TRY relocations are only availble in SOM (to denote
+ the beginning and end of exception handling regions). */
+
+ fix_new_hppa (frag_now, where - frag_now->fr_literal, 0,
+ NULL, (offsetT) 0, begin ? NULL : &exp,
+ 0, begin ? R_HPPA_BEGIN_TRY : R_HPPA_END_TRY,
+ e_fsel, 0, 0, NULL);
+#endif
+
+ demand_empty_rest_of_line ();
+}
+
/* Handle a .CALL pseudo-op. This involves storing away information
about where arguments are to be found so the linker can detect
(and correct) argument location mismatches between caller and callee. */
abort ();
}
+/* Handle a .LEVEL pseudo-op. */
+
+static void
+pa_level (unused)
+ int unused;
+{
+ char *level;
+
+ level = input_line_pointer;
+ if (strncmp (level, "1.0", 3) == 0)
+ {
+ input_line_pointer += 3;
+ if (!bfd_set_arch_mach (stdoutput, bfd_arch_hppa, 10))
+ as_warn ("could not set architecture and machine");
+ }
+ else if (strncmp (level, "1.1", 3) == 0)
+ {
+ input_line_pointer += 3;
+ if (!bfd_set_arch_mach (stdoutput, bfd_arch_hppa, 11))
+ as_warn ("could not set architecture and machine");
+ }
+ else
+ {
+ as_bad ("Unrecognized .LEVEL argument\n");
+ ignore_rest_of_line ();
+ }
+ demand_empty_rest_of_line ();
+}
+
/* Handle a .ORIGIN pseudo-op. */
static void
if (fixp->fx_r_type == R_HPPA_ENTRY || fixp->fx_r_type == R_HPPA_EXIT
|| fixp->fx_r_type == R_HPPA_BEGIN_BRTAB
|| fixp->fx_r_type == R_HPPA_END_BRTAB
+ || fixp->fx_r_type == R_HPPA_BEGIN_TRY
+ || fixp->fx_r_type == R_HPPA_END_TRY
|| (fixp->fx_addsy != NULL && fixp->fx_subsy != NULL
&& (hppa_fixp->segment->flags & SEC_CODE) != 0))
return 1;
/* i386.c -- Assemble code for the Intel 80386
- Copyright (C) 1989, 1991, 1992, 1993 Free Software Foundation.
+ Copyright (C) 1989, 91, 92, 93, 94, 95, 1996 Free Software Foundation.
This file is part of GAS, the GNU Assembler.
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
- along with GAS; see the file COPYING. If not, write to
- the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+ along with GAS; see the file COPYING. If not, write to the Free
+ Software Foundation, 59 Temple Place - Suite 330, Boston, MA
+ 02111-1307, USA. */
/*
Intel 80386 machine specific gas.
/* Prevent all adjustments to global symbols. */
if (S_IS_EXTERN (fixP->fx_addsy))
return 0;
-#endif
+#ifdef BFD_ASSEMBLER
+ if (S_IS_WEAK (fixP->fx_addsy))
+ return 0;
+#endif /* BFD_ASSEMBLER */
+#endif /* ! defined (OBJ_AOUT) */
#ifdef BFD_ASSEMBLER
/* adjust_reloc_syms doesn't know about the GOT */
if (fixP->fx_r_type == BFD_RELOC_386_GOTOFF
for (op = 0; op < MAX_OPERANDS; op++)
if (i.types[op] & Reg)
{
- i.suffix = ((i.types[op] == Reg8) ? BYTE_OPCODE_SUFFIX :
- (i.types[op] == Reg16) ? WORD_OPCODE_SUFFIX :
+ i.suffix = ((i.types[op] & Reg8) ? BYTE_OPCODE_SUFFIX :
+ (i.types[op] & Reg16) ? WORD_OPCODE_SUFFIX :
DWORD_OPCODE_SUFFIX);
}
}
}
}
\f
-void /* Knows about order of bytes in address. */
-md_number_to_chars (con, value, nbytes)
- char con[]; /* Return 'nbytes' of chars here. */
- valueT value; /* The value of the bits. */
- int nbytes; /* Number of bytes in the output. */
-{
- number_to_chars_littleendian (con, value, nbytes);
-}
-
-
/* Apply a fixup (fixS) to segment data, once it has been determined
by our caller that we have all the info we need to fix it up.
default:
switch (F (fixp->fx_size, fixp->fx_pcrel))
{
-#ifndef OBJ_ELF
MAP (1, 0, BFD_RELOC_8);
MAP (2, 0, BFD_RELOC_16);
-#endif
MAP (4, 0, BFD_RELOC_32);
-#ifndef OBJ_ELF
MAP (1, 1, BFD_RELOC_8_PCREL);
MAP (2, 1, BFD_RELOC_16_PCREL);
-#endif
MAP (4, 1, BFD_RELOC_32_PCREL);
default:
as_bad ("Can not do %d byte %srelocation", fixp->fx_size,
code = BFD_RELOC_386_GOTPC;
rel = (arelent *) bfd_alloc_by_size_t (stdoutput, sizeof (arelent));
- assert (rel != 0);
+ if (rel == NULL)
+ as_fatal ("Out of memory");
rel->sym_ptr_ptr = &fixp->fx_addsy->bsym;
rel->address = fixp->fx_frag->fr_address + fixp->fx_where;
if (fixp->fx_pcrel)
rel->addend = 0;
rel->howto = bfd_reloc_type_lookup (stdoutput, code);
- if (!rel->howto)
+ if (rel->howto == NULL)
{
- const char *name;
-
- name = S_GET_NAME (fixp->fx_addsy);
- if (name == NULL)
- name = "<unknown>";
- as_fatal ("Cannot generate relocation type for symbol %s, code %s",
- name, bfd_get_reloc_code_name (code));
+ as_bad_where (fixp->fx_file, fixp->fx_line,
+ "Cannot represent relocation type %s",
+ bfd_get_reloc_code_name (code));
+ /* Set howto to a garbage value so that we can keep going. */
+ rel->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_32);
+ assert (rel->howto != NULL);
}
return rel;
/* Need this for PIC relocations */
#define NEED_FX_R_TYPE
+
+#ifdef TE_386BSD
+/* The BSDI linker apparently rejects objects with a machine type of
+ M_386 (100). */
+#define AOUT_MACHTYPE 0
+#else
#define AOUT_MACHTYPE 100
+#endif
+
#undef REVERSE_SORT_RELOCS
#endif /* ! BFD_ASSEMBLER */
#define tc_coff_symbol_emit_hook(a) ; /* not used */
#ifndef OBJ_AOUT
+#ifndef TE_PE
/* Local labels starts with .L */
#define LOCAL_LABEL(name) (name[0] == '.' \
&& (name[1] == 'L' || name[1] == 'X' || name[1] == '.'))
#define FAKE_LABEL_NAME ".L0\001"
#endif
+#endif
#define LOCAL_LABELS_FB 1
#define tc_aout_pre_write_hook(x) {;} /* not used */
void i386_print_statistics PARAMS ((FILE *));
#define tc_print_statistics i386_print_statistics
+#define md_number_to_chars number_to_chars_littleendian
+
#ifdef SCO_ELF
#define tc_init_after_args() sco_id ()
extern void sco_id PARAMS ((void));
/* tc-i960.c - All the i80960-specific stuff
- Copyright (C) 1989, 1990, 1991, 1992, 1993 Free Software Foundation, Inc.
+ Copyright (C) 1989, 90, 91, 92, 93, 94, 95, 1996
+ Free Software Foundation, Inc.
This file is part of GAS.
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
- along with GAS; see the file COPYING. If not, write to
- the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+ along with GAS; see the file COPYING. If not, write to the Free
+ Software Foundation, 59 Temple Place - Suite 330, Boston, MA
+ 02111-1307, USA. */
/* See comment on md_parse_option for 80960-specific invocation options. */
}
}
+ /* Parse the displacement; this must be done before emitting the
+ opcode, in case it is an expression using `.'. */
+ parse_expr (instr.e, &expr);
+
/* Output opcode */
outP = emit (instr.opcode);
return;
}
- /* Parse and process the displacement */
- parse_expr (instr.e, &expr);
+ /* Process the displacement */
switch (expr.X_op)
{
case O_illegal:
USP, VBR, URP, SRP, PCR,
0
};
+static const enum m68k_register mcf5200_control_regs[] = {
+ CACR, TC, ITT0, ITT1, DTT0, DTT1, VBR, ROMBAR,
+ RAMBAR0, RAMBAR1, MBAR,
+ 0
+};
#define cpu32_control_regs m68010_control_regs
static const enum m68k_register *control_regs;
reloc[5]; /* Five is enough??? */
};
-#define cpu_of_arch(x) ((x) & m68000up)
+#define cpu_of_arch(x) ((x) & (m68000up|mcf5200))
#define float_of_arch(x) ((x) & mfloat)
#define mmu_of_arch(x) ((x) & mmmu)
{ cpu32, "cpu32", 0 },
{ m68881, "68881", 0 },
{ m68851, "68851", 0 },
+ { mcf5200, "5200", 0 },
/* Aliases (effectively, so far as gas is concerned) for the above
cpus. */
{ m68020, "68k", 1 },
{ m68020, "68ec020", 1 },
{ m68030, "68ec030", 1 },
{ m68040, "68ec040", 1 },
+ { m68060, "68ec060", 1 },
{ cpu32, "68330", 1 },
{ cpu32, "68331", 1 },
{ cpu32, "68332", 1 },
abort ();
if (fixp->fx_r_type != BFD_RELOC_NONE)
- code = fixp->fx_r_type;
+ {
+ code = fixp->fx_r_type;
+
+ /* Since DIFF_EXPR_OK is defined in tc-m68k.h, it is possible
+ that fixup_segment converted a non-PC relative reloc into a
+ PC relative reloc. In such a case, we need to convert the
+ reloc code. */
+ if (fixp->fx_pcrel)
+ {
+ switch (code)
+ {
+ case BFD_RELOC_8:
+ code = BFD_RELOC_8_PCREL;
+ break;
+ case BFD_RELOC_16:
+ code = BFD_RELOC_16_PCREL;
+ break;
+ case BFD_RELOC_32:
+ code = BFD_RELOC_32_PCREL;
+ break;
+ case BFD_RELOC_8_PCREL:
+ case BFD_RELOC_16_PCREL:
+ case BFD_RELOC_32_PCREL:
+ case BFD_RELOC_8_GOT_PCREL:
+ case BFD_RELOC_16_GOT_PCREL:
+ case BFD_RELOC_32_GOT_PCREL:
+ case BFD_RELOC_8_GOTOFF:
+ case BFD_RELOC_16_GOTOFF:
+ case BFD_RELOC_32_GOTOFF:
+ case BFD_RELOC_8_PLT_PCREL:
+ case BFD_RELOC_16_PLT_PCREL:
+ case BFD_RELOC_32_PLT_PCREL:
+ case BFD_RELOC_8_PLTOFF:
+ case BFD_RELOC_16_PLTOFF:
+ case BFD_RELOC_32_PLTOFF:
+ break;
+ default:
+ as_bad_where (fixp->fx_file, fixp->fx_line,
+ "Cannot make %s relocation PC relative",
+ bfd_get_reloc_code_name (code));
+ }
+ }
+ }
else
{
#define F(SZ,PCREL) (((SZ) << 1) + (PCREL))
#else
if (!fixp->fx_pcrel)
reloc->addend = fixp->fx_addnumber;
- else if ((fixp->fx_addsy->bsym->flags & BSF_SECTION_SYM) != 0)
+ else
reloc->addend = (section->vma
+ (fixp->fx_pcrel_adjust == 64
? -1 : fixp->fx_pcrel_adjust)
+ fixp->fx_addnumber
+ md_pcrel_from (fixp));
- else
- reloc->addend = (fixp->fx_offset
- + (fixp->fx_pcrel_adjust == 64
- ? -1 : fixp->fx_pcrel_adjust));
#endif
reloc->howto = bfd_reloc_type_lookup (stdoutput, code);
/* If we didn't get the right number of ops, or we have no
common model with this pattern then reject this pattern. */
+ ok_arch |= opcode->m_arch;
if (opsfound != opcode->m_opnum
|| ((opcode->m_arch & current_architecture) == 0))
- {
- ++losing;
- ok_arch |= opcode->m_arch;
- }
+ ++losing;
else
{
for (s = opcode->m_operands, opP = &the_ins.operands[0];
break;
case 'O':
- if (opP->mode != DREG && opP->mode != IMMED)
+ if (opP->mode != DREG
+ && opP->mode != IMMED
+ && opP->mode != ABSL)
losing++;
break;
&& !(ok_arch & current_architecture))
{
char buf[200], *cp;
- int len;
+
strcpy (buf,
"invalid instruction for this architecture; needs ");
cp = buf + strlen (buf);
}
}
}
- len = cp - buf + 1;
- cp = malloc (len);
+ cp = xmalloc (strlen (buf) + 1);
strcpy (cp, buf);
the_ins.error = cp;
}
|| opP->index.size == SIZE_LONG)
nextword |= 0x800;
- if (cpu_of_arch (current_architecture) < m68020)
+ if ((opP->index.scale != 1
+ && cpu_of_arch (current_architecture) < m68020)
+ || (opP->index.scale == 8
+ && current_architecture == mcf5200))
{
- if (opP->index.scale != 1)
- {
- opP->error =
- "scale factor invalid on this architecture; needs 68020 or higher";
- }
+ opP->error =
+ "scale factor invalid on this architecture; needs cpu32 or 68020 or higher";
}
switch (opP->index.scale)
/* Figure out innner displacement stuff */
if (opP->mode == POST || opP->mode == PRE)
{
+ if (cpu_of_arch (current_architecture) & cpu32)
+ opP->error = "invalid operand mode for this architecture; needs 68020 or higher";
switch (siz2)
{
case SIZE_UNSPEC:
case PCR:
tmpreg = 0x808;
break;
+ case ROMBAR:
+ tmpreg = 0xC00;
+ break;
+ case RAMBAR0:
+ tmpreg = 0xC04;
+ break;
+ case RAMBAR1:
+ tmpreg = 0xC05;
+ break;
+ case MBAR:
+ tmpreg = 0xC0F;
+ break;
default:
abort ();
}
{ "ccr", CCR },
{ "cc", CCR },
- { "usp", USP },
- { "isp", ISP },
- { "sfc", SFC },
+ /* control registers */
+ { "sfc", SFC }, /* Source Function Code */
{ "sfcr", SFC },
- { "dfc", DFC },
+ { "dfc", DFC }, /* Destination Function Code */
{ "dfcr", DFC },
- { "cacr", CACR },
- { "caar", CAAR },
-
- { "vbr", VBR },
-
- { "msp", MSP },
- { "itt0", ITT0 },
- { "itt1", ITT1 },
- { "dtt0", DTT0 },
- { "dtt1", DTT1 },
- { "mmusr", MMUSR },
- { "tc", TC },
- { "srp", SRP },
- { "urp", URP },
+ { "cacr", CACR }, /* Cache Control Register */
+ { "caar", CAAR }, /* Cache Address Register */
+
+ { "usp", USP }, /* User Stack Pointer */
+ { "vbr", VBR }, /* Vector Base Register */
+ { "msp", MSP }, /* Master Stack Pointer */
+ { "isp", ISP }, /* Interrupt Stack Pointer */
+
+ { "itt0", ITT0 }, /* Instruction Transparent Translation Reg 0 */
+ { "itt1", ITT1 }, /* Instruction Transparent Translation Reg 1 */
+ { "dtt0", DTT0 }, /* Data Transparent Translation Register 0 */
+ { "dtt1", DTT1 }, /* Data Transparent Translation Register 1 */
+
+ /* 68ec040 versions of same */
+ { "iacr0", ITT0 }, /* Instruction Access Control Register 0 */
+ { "iacr1", ITT1 }, /* Instruction Access Control Register 0 */
+ { "dacr0", DTT0 }, /* Data Access Control Register 0 */
+ { "dacr1", DTT1 }, /* Data Access Control Register 0 */
+
+ /* mcf5200 versions of same */
+ { "acr2", ITT0 }, /* Access Control Unit 2 */
+ { "acr3", ITT1 }, /* Access Control Unit 3 */
+ { "acr0", DTT0 }, /* Access Control Unit 0 */
+ { "acr1", DTT1 }, /* Access Control Unit 1 */
+
+ { "tc", TC }, /* MMU Translation Control Register */
+ { "tcr", TC },
+
+ { "mmusr", MMUSR }, /* MMU Status Register */
+ { "srp", SRP }, /* User Root Pointer */
+ { "urp", URP }, /* Supervisor Root Pointer */
+
{ "buscr", BUSCR },
{ "pcr", PCR },
+ { "rombar", ROMBAR }, /* ROM Base Address Register */
+ { "rambar0", RAMBAR0 }, /* ROM Base Address Register */
+ { "rambar1", RAMBAR1 }, /* ROM Base Address Register */
+ { "mbar", MBAR }, /* Module Base Address Register */
+ /* end of control registers */
+
{ "ac", AC },
{ "bc", BC },
{ "cal", CAL },
*/
alt_notend_table['@'] = 1;
+ /* We need to put digits in alt_notend_table to handle
+ bfextu %d0{24:1},%d0
+ */
+ alt_notend_table['0'] = 1;
+ alt_notend_table['1'] = 1;
+ alt_notend_table['2'] = 1;
+ alt_notend_table['3'] = 1;
+ alt_notend_table['4'] = 1;
+ alt_notend_table['5'] = 1;
+ alt_notend_table['6'] = 1;
+ alt_notend_table['7'] = 1;
+ alt_notend_table['8'] = 1;
+ alt_notend_table['9'] = 1;
+
#ifndef MIT_SYNTAX_ONLY
/* Insert pseudo ops, these have to go into the opcode table since
gas expects pseudo ops to start with a dot */
case cpu32:
control_regs = cpu32_control_regs;
break;
+ case mcf5200:
+ control_regs = mcf5200_control_regs;
+ break;
default:
abort ();
}
case OPTION_BITWISE_OR:
{
- char *n, *t, *s;
+ char *n, *t;
+ const char *s;
n = (char *) xmalloc (strlen (m68k_comment_chars) + 1);
t = n;
-l use 1 word for refs to undefined symbols [default 2]\n\
-m68000 | -m68008 | -m68010 | -m68020 | -m68030 | -m68040 | -m68060\n\
| -m68302 | -m68331 | -m68332 | -m68333 | -m68340 | -m68360\n\
- | -mcpu32\n\
+ | -mcpu32 | -m5200\n\
specify variant of 680X0 architecture [default 68020]\n\
-m68881 | -m68882 | -mno-68881 | -mno-68882\n\
target has/lacks floating-point coprocessor\n\
#include "ecoff.h"
+#if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
static char *mips_regmask_frag;
+#endif
#define AT 1
#define PIC_CALL_REG 25
require nops to be inserted. */
static int interlocks = -1;
+/* As with "interlocks" this is used by hardware that has FP
+ (co-processor) interlocks. */
+static int cop_interlocks = -1;
+
/* MIPS PIC level. */
enum mips_pic_level
if (mips_4100 < 0)
mips_4100 = 0;
- if (mips_4650 || mips_4010 || mips_4100)
+ if (mips_4650 || mips_4010 || mips_4100 || mips_cpu == 4300)
interlocks = 1;
else
interlocks = 0;
+ if (mips_cpu == 4300)
+ cop_interlocks = 1;
+ else
+ cop_interlocks = 0;
+
if (mips_isa < 2 && mips_trap)
as_bad ("trap exception not supported at ISA 1");
/* The previous insn might require a delay slot, depending upon
the contents of the current insn. */
if (mips_isa < 4
- && ((prev_pinfo & INSN_LOAD_COPROC_DELAY)
+ && (((prev_pinfo & INSN_LOAD_COPROC_DELAY)
+ && ! cop_interlocks)
|| (mips_isa < 2
&& (prev_pinfo & INSN_LOAD_MEMORY_DELAY))))
{
++nops;
}
else if (mips_isa < 4
- && ((prev_pinfo & INSN_COPROC_MOVE_DELAY)
+ && (((prev_pinfo & INSN_COPROC_MOVE_DELAY)
+ && ! cop_interlocks)
|| (mips_isa < 2
&& (prev_pinfo & INSN_COPROC_MEMORY_DELAY))))
{
}
}
else if (mips_isa < 4
- && (prev_pinfo & INSN_WRITE_COND_CODE))
+ && (prev_pinfo & INSN_WRITE_COND_CODE)
+ && ! cop_interlocks)
{
/* The previous instruction sets the coprocessor condition
codes, but does not require a general coprocessor delay
{
/* The previous instruction reads the LO register; if the
current instruction writes to the LO register, we must
- insert two NOPS. The R4650 and VR4100 have interlocks. */
+ insert two NOPS. The R4650, VR4100 and VR4300 have
+ interlocks. */
if (! interlocks
&& (mips_optimize == 0
|| (pinfo & INSN_WRITE_LO)))
{
/* The previous instruction reads the HI register; if the
current instruction writes to the HI register, we must
- insert a NOP. The R4650 and VR4100 have interlocks. */
+ insert a NOP. The R4650, VR4100 and VR4300 have
+ interlocks. */
if (! interlocks
&& (mips_optimize == 0
|| (pinfo & INSN_WRITE_HI)))
coprocessor instruction which requires a general coprocessor
delay and then reading the condition codes 2) reading the HI
or LO register and then writing to it (except on the R4650,
- and VR4100 which have interlocks). If we are not already
- emitting a NOP instruction, we must check for these cases
- compared to the instruction previous to the previous
+ VR4100, and VR4300 which have interlocks). If we are not
+ already emitting a NOP instruction, we must check for these
+ cases compared to the instruction previous to the previous
instruction. */
if (nops == 0
&& ((mips_isa < 4
&& (prev_prev_insn.insn_mo->pinfo & INSN_COPROC_MOVE_DELAY)
&& (prev_prev_insn.insn_mo->pinfo & INSN_WRITE_COND_CODE)
- && (pinfo & INSN_READ_COND_CODE))
+ && (pinfo & INSN_READ_COND_CODE)
+ && ! cop_interlocks)
|| ((prev_prev_insn.insn_mo->pinfo & INSN_READ_LO)
&& (pinfo & INSN_WRITE_LO)
&& ! interlocks)
/* Now emit the right number of NOP instructions. */
if (nops > 0)
{
+ fragS *old_frag;
+ unsigned long old_frag_offset;
int i;
+ old_frag = frag_now;
+ old_frag_offset = frag_now_fix ();
+
for (i = 0; i < nops; i++)
emit_nop ();
+
if (listing)
{
listing_prev_line ();
all needed nop instructions themselves. */
frag_grow (40);
}
+
if (insn_label != NULL)
{
assert (S_GET_SEGMENT (insn_label) == now_seg);
insn_label->sy_frag = frag_now;
S_SET_VALUE (insn_label, (valueT) frag_now_fix ());
}
+
+#ifndef NO_ECOFF_DEBUGGING
+ if (ECOFF_DEBUGGING)
+ ecoff_fix_loc (old_frag, old_frag_offset);
+#endif
}
}
nop = 0;
if ((mips_isa < 4
- && (prev_insn.insn_mo->pinfo
- & (INSN_LOAD_COPROC_DELAY
- | INSN_COPROC_MOVE_DELAY
- | INSN_WRITE_COND_CODE)))
+ && (! cop_interlocks
+ && (prev_insn.insn_mo->pinfo
+ & (INSN_LOAD_COPROC_DELAY
+ | INSN_COPROC_MOVE_DELAY
+ | INSN_WRITE_COND_CODE))))
|| (! interlocks
&& (prev_insn.insn_mo->pinfo
& (INSN_READ_LO
{
nop = 1;
if ((mips_isa < 4
- && (prev_insn.insn_mo->pinfo & INSN_WRITE_COND_CODE))
+ && (! cop_interlocks
+ && prev_insn.insn_mo->pinfo & INSN_WRITE_COND_CODE))
|| (! interlocks
&& ((prev_insn.insn_mo->pinfo & INSN_READ_HI)
|| (prev_insn.insn_mo->pinfo & INSN_READ_LO))))
emit_nop ();
}
else if ((mips_isa < 4
- && (prev_prev_insn.insn_mo->pinfo & INSN_WRITE_COND_CODE))
+ && (! cop_interlocks
+ && prev_prev_insn.insn_mo->pinfo & INSN_WRITE_COND_CODE))
|| (! interlocks
&& ((prev_prev_insn.insn_mo->pinfo & INSN_READ_HI)
|| (prev_prev_insn.insn_mo->pinfo & INSN_READ_LO))))
else
goto notreg;
}
- if (regno == AT && ! mips_noat)
+ if (regno == AT
+ && ! mips_noat
+ && *args != 'E'
+ && *args != 'G')
as_warn ("Used $at without \".set noat\"");
c = *args;
if (*s == ' ')
case 'I':
my_getExpression (&imm_expr, s);
- if (imm_expr.X_op != O_big)
- check_absolute_expr (ip, &imm_expr);
+ if (imm_expr.X_op != O_big
+ && imm_expr.X_op != O_constant)
+ insn_error = "absolute expression required";
s = expr_end;
continue;
case 'j': /* 16 bit signed immediate */
imm_reloc = BFD_RELOC_LO16;
c = my_getSmallExpression (&imm_expr, s);
- if (c)
+ if (c != '\0')
{
if (c != 'l')
{
imm_reloc = BFD_RELOC_HI16;
}
}
- else if (imm_expr.X_op != O_big)
- check_absolute_expr (ip, &imm_expr);
if (*args == 'i')
{
- if (imm_expr.X_op == O_big
- || imm_expr.X_add_number < 0
- || imm_expr.X_add_number >= 0x10000)
+ if ((c == '\0' && imm_expr.X_op != O_constant)
+ || ((imm_expr.X_add_number < 0
+ || imm_expr.X_add_number >= 0x10000)
+ && imm_expr.X_op == O_constant))
{
if (insn + 1 < &mips_opcodes[NUMOPCODES] &&
!strcmp (insn->name, insn[1].name))
break;
- as_bad ("16 bit expression not in range 0..65535");
+ if (imm_expr.X_op != O_constant
+ && imm_expr.X_op != O_big)
+ insn_error = "absolute expression required";
+ else
+ as_bad ("16 bit expression not in range 0..65535");
}
}
else
max = 0x8000;
else
max = 0x10000;
- if (imm_expr.X_op == O_big
- || imm_expr.X_add_number < -0x8000
- || imm_expr.X_add_number >= max
+ if ((c == '\0' && imm_expr.X_op != O_constant)
+ || ((imm_expr.X_add_number < -0x8000
+ || imm_expr.X_add_number >= max)
+ && imm_expr.X_op == O_constant)
|| (more
&& imm_expr.X_add_number < 0
&& mips_isa >= 3
{
if (more)
break;
- as_bad ("16 bit expression not in range -32768..32767");
+ if (imm_expr.X_op != O_constant
+ && imm_expr.X_op != O_big)
+ insn_error = "absolute expression required";
+ else
+ as_bad ("16 bit expression not in range -32768..32767");
}
}
s = expr_end;
{
int align = bfd_get_section_alignment (stdoutput, seg);
+#ifdef OBJ_ELF
+ /* We don't need to align ELF sections to the full alignment.
+ However, Irix 5 may prefer that we align them at least to a 16
+ byte boundary. */
+ if (align > 16)
+ align = 16;
+#endif
+
return ((addr + (1 << align) - 1) & (-1 << align));
}
{
static arelent *retval[4];
arelent *reloc;
+ bfd_reloc_code_real_type code;
reloc = retval[0] = (arelent *) xmalloc (sizeof (arelent));
retval[1] = NULL;
abort ();
}
+ /* Since DIFF_EXPR_OK is defined in tc-mips.h, it is possible that
+ fixup_segment converted a non-PC relative reloc into a PC
+ relative reloc. In such a case, we need to convert the reloc
+ code. */
+ code = fixp->fx_r_type;
+ if (fixp->fx_pcrel)
+ {
+ switch (code)
+ {
+ case BFD_RELOC_8:
+ code = BFD_RELOC_8_PCREL;
+ break;
+ case BFD_RELOC_16:
+ code = BFD_RELOC_16_PCREL;
+ break;
+ case BFD_RELOC_32:
+ code = BFD_RELOC_32_PCREL;
+ break;
+ case BFD_RELOC_8_PCREL:
+ case BFD_RELOC_16_PCREL:
+ case BFD_RELOC_32_PCREL:
+ case BFD_RELOC_16_PCREL_S2:
+ case BFD_RELOC_PCREL_HI16_S:
+ case BFD_RELOC_PCREL_LO16:
+ break;
+ default:
+ as_bad_where (fixp->fx_file, fixp->fx_line,
+ "Cannot make %s relocation PC relative",
+ bfd_get_reloc_code_name (code));
+ }
+ }
+
/* To support a PC relative reloc when generating embedded PIC code
for ECOFF, we use a Cygnus extension. We check for that here to
make sure that we don't let such a reloc escape normally. */
if (OUTPUT_FLAVOR == bfd_target_ecoff_flavour
- && fixp->fx_r_type == BFD_RELOC_16_PCREL_S2
+ && code == BFD_RELOC_16_PCREL_S2
&& mips_pic != EMBEDDED_PIC)
reloc->howto = NULL;
else
- reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
+ reloc->howto = bfd_reloc_type_lookup (stdoutput, code);
if (reloc->howto == NULL)
{
as_bad_where (fixp->fx_file, fixp->fx_line,
- "Can not represent relocation in this object file format");
+ "Can not represent %s relocation in this object file format",
+ bfd_get_reloc_code_name (code));
retval[0] = NULL;
}
#define TARGET_BYTES_BIG_ENDIAN 1
#endif
-#if TARGET_BYTES_BIG_ENDIAN
-#define BYTE_ORDER BIG_ENDIAN
-#else
-#define BYTE_ORDER LITTLE_ENDIAN
-#endif
-
/* The endianness of the target format may change based on command
line arguments. */
#define TARGET_FORMAT mips_target_format()
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
- along with GAS; see the file COPYING. If not, write to
- the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+ along with GAS; see the file COPYING. If not, write to the Free
+ Software Foundation, 59 Temple Place - Suite 330, Boston, MA
+ 02111-1307, USA. */
#include <stdio.h>
#include <ctype.h>
static bfd_reloc_code_real_type ppc_elf_suffix PARAMS ((char **));
static void ppc_elf_cons PARAMS ((int));
static void ppc_elf_rdata PARAMS ((int));
+static void ppc_elf_lcomm PARAMS ((int));
static void ppc_elf_validate_fix PARAMS ((fixS *, segT));
#endif
{ "short", ppc_elf_cons, 2 },
{ "rdata", ppc_elf_rdata, 0 },
{ "rodata", ppc_elf_rdata, 0 },
+ { "lcomm", ppc_elf_lcomm, 0 },
#endif
#ifdef TE_PE
/* Given NAME, find the register number associated with that name, return
the integer value associated with the given name or -1 on failure. */
-static int reg_name_search PARAMS ( (char * name) );
+static int reg_name_search
+ PARAMS ((const struct pd_reg *, int, const char * name));
static int
-reg_name_search (name)
- char *name;
+reg_name_search (regs, regcount, name)
+ const struct pd_reg *regs;
+ int regcount;
+ const char *name;
{
int middle, low, high;
int cmp;
low = 0;
- high = REG_NAME_CNT - 1;
+ high = regcount - 1;
do
{
middle = (low + high) / 2;
- cmp = strcasecmp (name, pre_defined_registers[middle].name);
+ cmp = strcasecmp (name, regs[middle].name);
if (cmp < 0)
high = middle - 1;
else if (cmp > 0)
low = middle + 1;
else
- return pre_defined_registers[middle].value;
+ return regs[middle].value;
}
while (low <= high);
return false;
c = get_symbol_end ();
- reg_number = reg_name_search (name);
+ reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
/* look to see if it's in the register table */
if (reg_number >= 0)
return false;
}
}
+\f
+/* This function is called for each symbol seen in an expression. It
+ handles the special parsing which PowerPC assemblers are supposed
+ to use for condition codes. */
+
+/* Whether to do the special parsing. */
+static boolean cr_operand;
+
+/* Names to recognize in a condition code. This table is sorted. */
+static const struct pd_reg cr_names[] =
+{
+ { "cr0", 0 },
+ { "cr1", 1 },
+ { "cr2", 2 },
+ { "cr3", 3 },
+ { "cr4", 4 },
+ { "cr5", 5 },
+ { "cr6", 6 },
+ { "cr7", 7 },
+ { "eq", 2 },
+ { "gt", 1 },
+ { "lt", 0 },
+ { "so", 3 },
+ { "un", 3 }
+};
+
+/* Parsing function. This returns non-zero if it recognized an
+ expression. */
+
+int
+ppc_parse_name (name, expr)
+ const char *name;
+ expressionS *expr;
+{
+ int val;
+ if (! cr_operand)
+ return 0;
+
+ val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0],
+ name);
+ if (val < 0)
+ return 0;
+
+ expr->X_op = O_constant;
+ expr->X_add_number = val;
+
+ return 1;
+}
\f
/* Local variables. */
#endif
\f
#ifdef OBJ_ELF
-CONST char *md_shortopts = "b:l:usm:VQ:";
+CONST char *md_shortopts = "b:l:usm:K:VQ:";
#else
CONST char *md_shortopts = "um:";
#endif
return 0;
break;
+
+ case 'K':
+ /* Recognize -K PIC */
+ if (strcmp (arg, "PIC") == 0)
+ {
+ mrelocatable = true;
+ ppc_flags |= EF_PPC_RELOCATABLE_LIB;
+ }
+ else
+ return 0;
+
+ break;
#endif
case 'm':
return insn;
}
+\f
#ifdef OBJ_ELF
/* Parse @got, etc. and return the desired relocation. */
static bfd_reloc_code_real_type
return BFD_RELOC_UNUSED;
for (ch = *str, str2 = ident;
- str2 < ident + sizeof(ident) - 1 && isalnum (ch) || ch == '@';
+ (str2 < ident + sizeof (ident) - 1
+ && (isalnum (ch) || ch == '@'));
ch = *++str)
{
*str2++ = (islower (ch)) ? ch : tolower (ch);
input_line_pointer = save_line;
}
+/* Pseudo op to make file scope bss items */
+static void
+ppc_elf_lcomm(xxx)
+ int xxx;
+{
+ register char *name;
+ register char c;
+ register char *p;
+ offsetT size;
+ register symbolS *symbolP;
+ offsetT align;
+ segT old_sec;
+ int old_subsec;
+ char *pfrag;
+ int align2;
+
+ name = input_line_pointer;
+ c = get_symbol_end ();
+
+ /* just after name is now '\0' */
+ p = input_line_pointer;
+ *p = c;
+ SKIP_WHITESPACE ();
+ if (*input_line_pointer != ',')
+ {
+ as_bad ("Expected comma after symbol-name: rest of line ignored.");
+ ignore_rest_of_line ();
+ return;
+ }
+
+ input_line_pointer++; /* skip ',' */
+ if ((size = get_absolute_expression ()) < 0)
+ {
+ as_warn (".COMMon length (%ld.) <0! Ignored.", (long) size);
+ ignore_rest_of_line ();
+ return;
+ }
+
+ /* The third argument to .lcomm is the alignment. */
+ if (*input_line_pointer != ',')
+ align = 3;
+ else
+ {
+ ++input_line_pointer;
+ align = get_absolute_expression ();
+ if (align <= 0)
+ {
+ as_warn ("ignoring bad alignment");
+ align = 3;
+ }
+ }
+
+ *p = 0;
+ symbolP = symbol_find_or_make (name);
+ *p = c;
+
+ if (S_IS_DEFINED (symbolP))
+ {
+ as_bad ("Ignoring attempt to re-define symbol `%s'.",
+ S_GET_NAME (symbolP));
+ ignore_rest_of_line ();
+ return;
+ }
+
+ if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
+ {
+ as_bad ("Length of .lcomm \"%s\" is already %ld. Not changed to %ld.",
+ S_GET_NAME (symbolP),
+ (long) S_GET_VALUE (symbolP),
+ (long) size);
+
+ ignore_rest_of_line ();
+ return;
+ }
+
+ /* allocate_bss: */
+ old_sec = now_seg;
+ old_subsec = now_subseg;
+ if (align)
+ {
+ /* convert to a power of 2 alignment */
+ for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
+ if (align != 1)
+ {
+ as_bad ("Common alignment not a power of 2");
+ ignore_rest_of_line ();
+ return;
+ }
+ }
+ else
+ align2 = 0;
+
+ record_alignment (bss_section, align2);
+ subseg_set (bss_section, 0);
+ if (align2)
+ frag_align (align2, 0);
+ if (S_GET_SEGMENT (symbolP) == bss_section)
+ symbolP->sy_frag->fr_symbol = 0;
+ symbolP->sy_frag = frag_now;
+ pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
+ (char *) 0);
+ *pfrag = 0;
+ S_SET_SIZE (symbolP, size);
+ S_SET_SEGMENT (symbolP, bss_section);
+ S_CLEAR_EXTERNAL (symbolP);
+ subseg_set (old_sec, old_subsec);
+ demand_empty_rest_of_line ();
+}
+
/* Validate any relocations emitted for -mrelocatable, possibly adding
fixups for word relocations in writable segments, so we can adjust
them at runtime. */
}
}
}
-
#endif /* OBJ_ELF */
-
+\f
#ifdef TE_PE
/*
*toc_kind = t; /* set return value */
return 1;
}
-
#endif
-
+\f
/* We need to keep a list of fixups. We can't simply generate them as
we go, because that would require us to first create the frag, and
else
#endif /* TE_PE */
- if (!register_name(&ex))
- expression (&ex);
+ {
+ if (! register_name (&ex))
+ {
+ if ((operand->flags & PPC_OPERAND_CR) != 0)
+ cr_operand = true;
+ expression (&ex);
+ cr_operand = false;
+ }
+ }
str = input_line_pointer;
input_line_pointer = hold;
break;
case BFD_RELOC_LO16:
- ex.X_add_number = ((ex.X_add_number & 0xffff) ^ 0x8000) - 0x8000;
+ if (ex.X_unsigned)
+ ex.X_add_number &= 0xffff;
+ else
+ ex.X_add_number = (((ex.X_add_number & 0xffff)
+ ^ 0x8000)
+ - 0x8000);
break;
case BFD_RELOC_HI16:
break;
case BFD_RELOC_HI16_S:
- ex.X_add_number = ((ex.X_add_number >> 16) & 0xffff)
- + ((ex.X_add_number >> 15) & 1);
+ ex.X_add_number = (((ex.X_add_number >> 16) & 0xffff)
+ + ((ex.X_add_number >> 15) & 1));
break;
}
#endif
/* For the absoulte forms of branchs, convert the PC relative form back into
the absolute. */
if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
- switch (reloc)
- {
- case BFD_RELOC_PPC_B26: reloc = BFD_RELOC_PPC_BA26; break;
- case BFD_RELOC_PPC_B16: reloc = BFD_RELOC_PPC_BA16; break;
- case BFD_RELOC_PPC_B16_BRTAKEN: reloc = BFD_RELOC_PPC_BA16_BRTAKEN; break;
- case BFD_RELOC_PPC_B16_BRNTAKEN: reloc = BFD_RELOC_PPC_BA16_BRNTAKEN; break;
- }
+ {
+ switch (reloc)
+ {
+ case BFD_RELOC_PPC_B26:
+ reloc = BFD_RELOC_PPC_BA26;
+ break;
+ case BFD_RELOC_PPC_B16:
+ reloc = BFD_RELOC_PPC_BA16;
+ break;
+ case BFD_RELOC_PPC_B16_BRTAKEN:
+ reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
+ break;
+ case BFD_RELOC_PPC_B16_BRNTAKEN:
+ reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
+ break;
+ default:
+ break;
+ }
+ }
/* We need to generate a fixup for this expression. */
if (fc >= MAX_INSN_FIXUPS)
return 0;
}
-#endif
+/* A reloc from one csect to another must be kept. The assembler
+ will, of course, keep relocs between sections, and it will keep
+ absolute relocs, but we need to force it to keep PC relative relocs
+ between two csects in the same section. */
+
+int
+ppc_force_relocation (fix)
+ fixS *fix;
+{
+ /* At this point fix->fx_addsy should already have been converted to
+ a csect symbol. If the csect does not include the fragment, then
+ we need to force the relocation. */
+ if (fix->fx_pcrel
+ && fix->fx_addsy != NULL
+ && fix->fx_addsy->sy_tc.subseg != 0
+ && (fix->fx_addsy->sy_frag->fr_address > fix->fx_frag->fr_address
+ || (fix->fx_addsy->sy_tc.next != NULL
+ && (fix->fx_addsy->sy_tc.next->sy_frag->fr_address
+ <= fix->fx_frag->fr_address))))
+ return 1;
+
+ return 0;
+}
+
+#endif /* OBJ_XCOFF */
/* See whether a symbol is in the TOC section. */
case BFD_RELOC_PPC_EMB_RELSDA:
case BFD_RELOC_PPC_TOC16:
if (fixp->fx_pcrel)
- abort ();
+ as_bad_where (fixp->fx_file, fixp->fx_line,
+ "cannot emit PC relative %s relocation%s%s",
+ bfd_get_reloc_code_name (fixp->fx_r_type),
+ fixp->fx_addsy != NULL ? " against " : "",
+ (fixp->fx_addsy != NULL
+ ? S_GET_NAME (fixp->fx_addsy)
+ : ""));
md_number_to_chars (fixp->fx_frag->fr_literal + fixp->fx_where,
value, 2);
/* tc-ppc.h -- Header file for tc-ppc.c.
- Copyright (C) 1994 Free Software Foundation, Inc.
+ Copyright (C) 1994, 1995, 1996 Free Software Foundation, Inc.
Written by Ian Lance Taylor, Cygnus Support.
This file is part of GAS, the GNU Assembler.
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
- along with GAS; see the file COPYING. If not, write to
- the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+ along with GAS; see the file COPYING. If not, write to the Free
+ Software Foundation, 59 Temple Place - Suite 330, Boston, MA
+ 02111-1307, USA. */
#define TC_PPC
#define tc_fix_adjustable(fixp) ppc_fix_adjustable (fixp)
extern int ppc_fix_adjustable PARAMS ((struct fix *));
+/* A relocation from one csect to another must be kept. */
+#define TC_FORCE_RELOCATION(FIXP) ppc_force_relocation (FIXP)
+extern int ppc_force_relocation PARAMS ((struct fix *));
+
/* We need to set the section VMA. */
#define tc_frob_section(sec) ppc_frob_section (sec)
extern void ppc_frob_section PARAMS ((asection *));
/* call md_pcrel_from_section, not md_pcrel_from */
#define MD_PCREL_FROM_SECTION(FIXP, SEC) md_pcrel_from_section(FIXP, SEC)
+#define md_parse_name(name, exp) ppc_parse_name (name, exp)
+extern int ppc_parse_name PARAMS ((const char *, struct expressionS *));
+
#define md_operand(x)
/* tc-sh.c -- Assemble code for the Hitachi Super-H
-
Copyright (C) 1993, 94, 95, 1996 Free Software Foundation.
This file is part of GAS, the GNU Assembler.
static void s_uses PARAMS ((int));
+static void sh_count_relocs PARAMS ((bfd *, segT, PTR));
+static void sh_frob_section PARAMS ((bfd *, segT, PTR));
+
/* This table describes all the machine specific pseudo-ops the assembler
has to support. The fields are:
pseudo-op name without dot
nbuf[index] = reg_b | 0x08;
break;
case DISP_4:
- insert (output + low_byte, R_SH_IMM4, 0);
+ insert (output + low_byte, BFD_RELOC_SH_IMM4, 0);
break;
case IMM_4BY4:
- insert (output + low_byte, R_SH_IMM4BY4, 0);
+ insert (output + low_byte, BFD_RELOC_SH_IMM4BY4, 0);
break;
case IMM_4BY2:
- insert (output + low_byte, R_SH_IMM4BY2, 0);
+ insert (output + low_byte, BFD_RELOC_SH_IMM4BY2, 0);
break;
case IMM_4:
- insert (output + low_byte, R_SH_IMM4, 0);
+ insert (output + low_byte, BFD_RELOC_SH_IMM4, 0);
break;
case IMM_8BY4:
- insert (output + low_byte, R_SH_IMM8BY4, 0);
+ insert (output + low_byte, BFD_RELOC_SH_IMM8BY4, 0);
break;
case IMM_8BY2:
- insert (output + low_byte, R_SH_IMM8BY2, 0);
+ insert (output + low_byte, BFD_RELOC_SH_IMM8BY2, 0);
break;
case IMM_8:
- insert (output + low_byte, R_SH_IMM8, 0);
+ insert (output + low_byte, BFD_RELOC_SH_IMM8, 0);
break;
case PCRELIMM_8BY4:
- insert (output, R_SH_PCRELIMM8BY4, 1);
+ insert (output, BFD_RELOC_SH_PCRELIMM8BY4, 1);
break;
case PCRELIMM_8BY2:
- insert (output, R_SH_PCRELIMM8BY2, 1);
+ insert (output, BFD_RELOC_SH_PCRELIMM8BY2, 1);
break;
default:
printf ("failed for %d\n", i);
{
/* Output a CODE reloc to tell the linker that the following
bytes are instructions, not data. */
- fix_new (frag_now, frag_now_fix (), 2, &abs_symbol, 0, 0, R_SH_CODE);
+ fix_new (frag_now, frag_now_fix (), 2, &abs_symbol, 0, 0,
+ BFD_RELOC_SH_CODE);
seg_info (now_seg)->tc_segment_info_data.in_code = 1;
}
}
/* This routine is called each time a label definition is seen. It
- emits a R_SH_LABEL reloc if necessary. */
+ emits a BFD_RELOC_SH_LABEL reloc if necessary. */
void
sh_frob_label ()
if (frag_now != last_label_frag
|| offset != last_label_offset)
{
- fix_new (frag_now, offset, 2, &abs_symbol, 0, 0, R_SH_LABEL);
+ fix_new (frag_now, offset, 2, &abs_symbol, 0, 0, BFD_RELOC_SH_LABEL);
last_label_frag = frag_now;
last_label_offset = offset;
}
}
/* This routine is called when the assembler is about to output some
- data. It emits a R_SH_DATA reloc if necessary. */
+ data. It emits a BFD_RELOC_SH_DATA reloc if necessary. */
void
sh_flush_pending_output ()
if (sh_relax
&& seg_info (now_seg)->tc_segment_info_data.in_code)
{
- fix_new (frag_now, frag_now_fix (), 2, &abs_symbol, 0, 0, R_SH_DATA);
+ fix_new (frag_now, frag_now_fix (), 2, &abs_symbol, 0, 0,
+ BFD_RELOC_SH_DATA);
seg_info (now_seg)->tc_segment_info_data.in_code = 0;
}
}
-void
-DEFUN (tc_crawl_symbol_chain, (headers),
- object_headers * headers)
-{
- printf ("call to tc_crawl_symbol_chain \n");
-}
-
symbolS *
DEFUN (md_undefined_symbol, (name),
char *name)
return 0;
}
+#ifdef OBJ_COFF
+
+void
+DEFUN (tc_crawl_symbol_chain, (headers),
+ object_headers * headers)
+{
+ printf ("call to tc_crawl_symbol_chain \n");
+}
+
void
DEFUN (tc_headers_hook, (headers),
object_headers * headers)
printf ("call to tc_headers_hook \n");
}
+#endif
+
/* Various routines to kill one day */
/* Equal to MAX_PRECISION in atof-ieee.c */
#define MAX_LITTLENUMS 6
return;
}
- fix_new_exp (frag_now, frag_now_fix (), 2, &ex, 1, R_SH_USES);
+ fix_new_exp (frag_now, frag_now_fix (), 2, &ex, 1, BFD_RELOC_SH_USES);
demand_empty_rest_of_line ();
}
as_fatal ("failed sanity check.");
}
-/* This is function is called after the symbol table has been
- completed, but before md_convert_frag has been called. If we have
- seen any .uses pseudo-ops, they point to an instruction which loads
- a register with the address of a function. We look through the
- fixups to find where the function address is being loaded from. We
- then generate a COUNT reloc giving the number of times that
- function address is referred to. The linker uses this information
- when doing relaxing, to decide when it can eliminate the stored
- function address entirely. */
+/* This struct is used to pass arguments to sh_count_relocs through
+ bfd_map_over_sections. */
-void
-sh_coff_frob_file ()
+struct sh_count_relocs
{
- int iseg;
+ /* Symbol we are looking for. */
+ symbolS *sym;
+ /* Count of relocs found. */
+ int count;
+};
- if (! sh_relax)
+/* Count the number of fixups in a section which refer to a particular
+ symbol. When using BFD_ASSEMBLER, this is called via
+ bfd_map_over_sections. */
+
+/*ARGSUSED*/
+static void
+sh_count_relocs (abfd, sec, data)
+ bfd *abfd;
+ segT sec;
+ PTR data;
+{
+ struct sh_count_relocs *info = (struct sh_count_relocs *) data;
+ segment_info_type *seginfo;
+ symbolS *sym;
+ fixS *fix;
+
+ seginfo = seg_info (sec);
+ if (seginfo == NULL)
return;
- for (iseg = SEG_E0; iseg < SEG_UNKNOWN; iseg++)
+ sym = info->sym;
+ for (fix = seginfo->fix_root; fix != NULL; fix = fix->fx_next)
{
- fixS *fix;
-
- for (fix = segment_info[iseg].fix_root; fix != NULL; fix = fix->fx_next)
+ if (fix->fx_addsy == sym)
{
- symbolS *sym;
- bfd_vma val;
- fixS *fscan;
- int iscan;
- int count;
-
- if (fix->fx_r_type != R_SH_USES)
- continue;
-
- /* The R_SH_USES reloc should refer to a defined local
- symbol in the same section. */
- sym = fix->fx_addsy;
- if (sym == NULL
- || fix->fx_subsy != NULL
- || fix->fx_addnumber != 0
- || S_GET_SEGMENT (sym) != iseg
- || S_GET_STORAGE_CLASS (sym) == C_EXT)
- {
- as_warn_where (fix->fx_file, fix->fx_line,
- ".uses does not refer to a local symbol in the same section");
- continue;
- }
+ ++info->count;
+ fix->fx_tcbit = 1;
+ }
+ }
+}
- /* Look through the fixups again, this time looking for one
- at the same location as sym. */
- val = S_GET_VALUE (sym);
- for (fscan = segment_info[iseg].fix_root;
- fscan != NULL;
- fscan = fscan->fx_next)
- if (val == fscan->fx_frag->fr_address + fscan->fx_where
- && fscan->fx_r_type != R_SH_ALIGN
- && fscan->fx_r_type != R_SH_CODE
- && fscan->fx_r_type != R_SH_DATA
- && fscan->fx_r_type != R_SH_LABEL)
- break;
- if (fscan == NULL)
- {
- as_warn_where (fix->fx_file, fix->fx_line,
- "can't find fixup pointed to by .uses");
- continue;
- }
+/* Handle the count relocs for a particular section. When using
+ BFD_ASSEMBLER, this is called via bfd_map_over_sections. */
- if (fscan->fx_tcbit)
- {
- /* We've already done this one. */
- continue;
- }
+/*ARGSUSED*/
+static void
+sh_frob_section (abfd, sec, ignore)
+ bfd *abfd;
+ segT sec;
+ PTR ignore;
+{
+ segment_info_type *seginfo;
+ fixS *fix;
- /* fscan should also be a fixup to a local symbol in the same
- section. */
- sym = fscan->fx_addsy;
- if (sym == NULL
- || fscan->fx_subsy != NULL
- || fscan->fx_addnumber != 0
- || S_GET_SEGMENT (sym) != iseg
- || S_GET_STORAGE_CLASS (sym) == C_EXT)
- {
- as_warn_where (fix->fx_file, fix->fx_line,
- ".uses target does not refer to a local symbol in the same section");
- continue;
- }
+ seginfo = seg_info (sec);
+ if (seginfo == NULL)
+ return;
- /* Now we look through all the fixups of all the sections,
- counting the number of times we find a reference to sym. */
- count = 0;
- for (iscan = SEG_E0; iscan < SEG_UNKNOWN; iscan++)
- {
- for (fscan = segment_info[iscan].fix_root;
- fscan != NULL;
- fscan = fscan->fx_next)
- {
- if (fscan->fx_addsy == sym)
- {
- ++count;
- fscan->fx_tcbit = 1;
- }
- }
- }
+ for (fix = seginfo->fix_root; fix != NULL; fix = fix->fx_next)
+ {
+ symbolS *sym;
+ bfd_vma val;
+ fixS *fscan;
+ struct sh_count_relocs info;
+
+ if (fix->fx_r_type != BFD_RELOC_SH_USES)
+ continue;
+
+ /* The BFD_RELOC_SH_USES reloc should refer to a defined local
+ symbol in the same section. */
+ sym = fix->fx_addsy;
+ if (sym == NULL
+ || fix->fx_subsy != NULL
+ || fix->fx_addnumber != 0
+ || S_GET_SEGMENT (sym) != sec
+#if ! defined (BFD_ASSEMBLER) && defined (OBJ_COFF)
+ || S_GET_STORAGE_CLASS (sym) == C_EXT
+#endif
+ || S_IS_EXTERNAL (sym))
+ {
+ as_warn_where (fix->fx_file, fix->fx_line,
+ ".uses does not refer to a local symbol in the same section");
+ continue;
+ }
- if (count < 1)
- abort ();
+ /* Look through the fixups again, this time looking for one
+ at the same location as sym. */
+ val = S_GET_VALUE (sym);
+ for (fscan = seginfo->fix_root;
+ fscan != NULL;
+ fscan = fscan->fx_next)
+ if (val == fscan->fx_frag->fr_address + fscan->fx_where
+ && fscan->fx_r_type != BFD_RELOC_SH_ALIGN
+ && fscan->fx_r_type != BFD_RELOC_SH_CODE
+ && fscan->fx_r_type != BFD_RELOC_SH_DATA
+ && fscan->fx_r_type != BFD_RELOC_SH_LABEL)
+ break;
+ if (fscan == NULL)
+ {
+ as_warn_where (fix->fx_file, fix->fx_line,
+ "can't find fixup pointed to by .uses");
+ continue;
+ }
+
+ if (fscan->fx_tcbit)
+ {
+ /* We've already done this one. */
+ continue;
+ }
- /* Generate a R_SH_COUNT fixup at the location of sym. We
- have already adjusted the value of sym to include the
- fragment address, so we undo that adjustment here. */
- subseg_change (iseg, 0);
- fix_new (sym->sy_frag, S_GET_VALUE (sym) - sym->sy_frag->fr_address,
- 4, &abs_symbol, count, 0, R_SH_COUNT);
+ /* fscan should also be a fixup to a local symbol in the same
+ section. */
+ sym = fscan->fx_addsy;
+ if (sym == NULL
+ || fscan->fx_subsy != NULL
+ || fscan->fx_addnumber != 0
+ || S_GET_SEGMENT (sym) != sec
+#if ! defined (BFD_ASSEMBLER) && defined (OBJ_COFF)
+ || S_GET_STORAGE_CLASS (sym) == C_EXT
+#endif
+ || S_IS_EXTERNAL (sym))
+ {
+ as_warn_where (fix->fx_file, fix->fx_line,
+ ".uses target does not refer to a local symbol in the same section");
+ continue;
}
+
+ /* Now we look through all the fixups of all the sections,
+ counting the number of times we find a reference to sym. */
+ info.sym = sym;
+ info.count = 0;
+#ifdef BFD_ASSEMBLER
+ bfd_map_over_sections (stdoutput, sh_count_relocs, (PTR) &info);
+#else
+ {
+ int iscan;
+
+ for (iscan = SEG_E0; iscan < SEG_UNKNOWN; iscan++)
+ sh_count_relocs ((bfd *) NULL, iscan, (PTR) &info);
+ }
+#endif
+
+ if (info.count < 1)
+ abort ();
+
+ /* Generate a BFD_RELOC_SH_COUNT fixup at the location of sym.
+ We have already adjusted the value of sym to include the
+ fragment address, so we undo that adjustment here. */
+ subseg_change (sec, 0);
+ fix_new (sym->sy_frag, S_GET_VALUE (sym) - sym->sy_frag->fr_address,
+ 4, &abs_symbol, info.count, 0, BFD_RELOC_SH_COUNT);
}
}
+/* This function is called after the symbol table has been completed,
+ but before the relocs or section contents have been written out.
+ If we have seen any .uses pseudo-ops, they point to an instruction
+ which loads a register with the address of a function. We look
+ through the fixups to find where the function address is being
+ loaded from. We then generate a COUNT reloc giving the number of
+ times that function address is referred to. The linker uses this
+ information when doing relaxing, to decide when it can eliminate
+ the stored function address entirely. */
+
+void
+sh_frob_file ()
+{
+ if (! sh_relax)
+ return;
+
+#ifdef BFD_ASSEMBLER
+ bfd_map_over_sections (stdoutput, sh_frob_section, (PTR) NULL);
+#else
+ {
+ int iseg;
+
+ for (iseg = SEG_E0; iseg < SEG_UNKNOWN; iseg++)
+ sh_frob_section ((bfd *) NULL, iseg, (PTR) NULL);
+ }
+#endif
+}
+
/* Called after relaxing. Set the correct sizes of the fragments, and
create relocs so that md_apply_fix will fill in the correct values. */
void
md_convert_frag (headers, seg, fragP)
+#ifdef BFD_ASSEMBLER
+ bfd *headers;
+#else
object_headers *headers;
+#endif
segT seg;
fragS *fragP;
{
case C (COND_JUMP, COND8):
subseg_change (seg, 0);
fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, fragP->fr_offset,
- 1, R_SH_PCDISP8BY2);
+ 1, BFD_RELOC_SH_PCDISP8BY2);
fragP->fr_fix += 2;
fragP->fr_var = 0;
break;
case C (UNCOND_JUMP, UNCOND12):
subseg_change (seg, 0);
fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, fragP->fr_offset,
- 1, R_SH_PCDISP);
+ 1, BFD_RELOC_SH_PCDISP12BY2);
fragP->fr_fix += 2;
fragP->fr_var = 0;
break;
fragP->fr_symbol,
fragP->fr_offset,
0,
- R_SH_IMM32);
+ BFD_RELOC_32);
fragP->fr_fix += UNCOND32_LENGTH;
fragP->fr_var = 0;
donerelax = 1;
/* Build a relocation to six bytes farther on. */
subseg_change (seg, 0);
fix_new (fragP, fragP->fr_fix, 2,
- segment_info[seg].dot,
+#ifdef BFD_ASSEMBLER
+ section_symbol (seg),
+#else
+ seg_info (seg)->dot,
+#endif
fragP->fr_address + fragP->fr_fix + 6,
- 1, R_SH_PCDISP8BY2);
+ 1, BFD_RELOC_SH_PCDISP8BY2);
/* Set up a jump instruction. */
buffer[highbyte + 2] = 0xa0;
buffer[lowbyte + 2] = 0;
fix_new (fragP, fragP->fr_fix + 2, 2, fragP->fr_symbol,
- fragP->fr_offset, 1, R_SH_PCDISP);
+ fragP->fr_offset, 1, BFD_RELOC_SH_PCDISP12BY2);
/* Fill in a NOP instruction. */
buffer[highbyte + 4] = 0x0;
fragP->fr_symbol,
fragP->fr_offset,
0,
- R_SH_IMM32);
+ BFD_RELOC_32);
fragP->fr_fix += COND32_LENGTH;
fragP->fr_var = 0;
donerelax = 1;
segT seg AND
valueT size)
{
+#ifdef BFD_ASSEMBLER
+#ifdef OBJ_ELF
+ return size;
+#else /* ! OBJ_ELF */
+ return ((size + (1 << bfd_get_section_alignment (stdoutput, seg)) - 1)
+ & (-1 << bfd_get_section_alignment (stdoutput, seg)));
+#endif /* ! OBJ_ELF */
+#else /* ! BFD_ASSEMBLER */
return ((size + (1 << section_alignment[(int) seg]) - 1)
& (-1 << section_alignment[(int) seg]));
-
+#endif /* ! BFD_ASSEMBLER */
}
/* When relaxing, we need to output a reloc for any .align directive
&& frag->fr_offset > 1
&& now_seg != bss_section)
fix_new (frag, frag->fr_fix, 2, &abs_symbol, frag->fr_offset, 0,
- R_SH_ALIGN);
+ BFD_RELOC_SH_ALIGN);
}
/* This macro decides whether a particular reloc is an entry in a
to know about all such entries so that it can adjust them if
necessary. */
+#ifdef BFD_ASSEMBLER
+#define SWITCH_TABLE_CONS(fix) (0)
+#else
+#define SWITCH_TABLE_CONS(fix) \
+ ((fix)->fx_r_type == 0 \
+ && ((fix)->fx_size == 2 \
+ || (fix)->fx_size == 4))
+#endif
+
#define SWITCH_TABLE(fix) \
((fix)->fx_addsy != NULL \
&& (fix)->fx_subsy != NULL \
&& S_GET_SEGMENT ((fix)->fx_addsy) == text_section \
&& S_GET_SEGMENT ((fix)->fx_subsy) == text_section \
- && ((fix)->fx_r_type == R_SH_IMM32 \
- || (fix)->fx_r_type == R_SH_IMM16 \
- || ((fix)->fx_r_type == 0 \
- && ((fix)->fx_size == 2 \
- || (fix)->fx_size == 4))))
+ && ((fix)->fx_r_type == BFD_RELOC_32 \
+ || (fix)->fx_r_type == BFD_RELOC_16 \
+ || SWITCH_TABLE_CONS (fix)))
/* See whether we need to force a relocation into the output file.
This is used to force out switch and PC relative relocations when
return (fix->fx_pcrel
|| SWITCH_TABLE (fix)
- || fix->fx_r_type == R_SH_COUNT
- || fix->fx_r_type == R_SH_ALIGN
- || fix->fx_r_type == R_SH_CODE
- || fix->fx_r_type == R_SH_DATA
- || fix->fx_r_type == R_SH_LABEL);
+ || fix->fx_r_type == BFD_RELOC_SH_COUNT
+ || fix->fx_r_type == BFD_RELOC_SH_ALIGN
+ || fix->fx_r_type == BFD_RELOC_SH_CODE
+ || fix->fx_r_type == BFD_RELOC_SH_DATA
+ || fix->fx_r_type == BFD_RELOC_SH_LABEL);
}
/* Apply a fixup to the object file. */
+#ifdef BFD_ASSEMBLER
+int
+md_apply_fix (fixP, valp)
+ fixS *fixP;
+ valueT *valp;
+#else
void
md_apply_fix (fixP, val)
fixS *fixP;
long val;
+#endif
{
char *buf = fixP->fx_where + fixP->fx_frag->fr_literal;
int lowbyte = target_big_endian ? 1 : 0;
int highbyte = target_big_endian ? 0 : 1;
+#ifdef BFD_ASSEMBLER
+ long val = *valp;
+#endif
+#ifndef BFD_ASSEMBLER
if (fixP->fx_r_type == 0)
{
if (fixP->fx_size == 2)
- fixP->fx_r_type = R_SH_IMM16;
+ fixP->fx_r_type = BFD_RELOC_16;
else if (fixP->fx_size == 4)
- fixP->fx_r_type = R_SH_IMM32;
+ fixP->fx_r_type = BFD_RELOC_32;
else if (fixP->fx_size == 1)
- fixP->fx_r_type = R_SH_IMM8;
+ fixP->fx_r_type = BFD_RELOC_SH_IMM8;
else
abort ();
}
+#endif
switch (fixP->fx_r_type)
{
- case R_SH_IMM4:
+ case BFD_RELOC_SH_IMM4:
*buf = (*buf & 0xf0) | (val & 0xf);
break;
- case R_SH_IMM4BY2:
+ case BFD_RELOC_SH_IMM4BY2:
*buf = (*buf & 0xf0) | ((val >> 1) & 0xf);
break;
- case R_SH_IMM4BY4:
+ case BFD_RELOC_SH_IMM4BY4:
*buf = (*buf & 0xf0) | ((val >> 2) & 0xf);
break;
- case R_SH_IMM8BY2:
+ case BFD_RELOC_SH_IMM8BY2:
*buf = val >> 1;
break;
- case R_SH_IMM8BY4:
+ case BFD_RELOC_SH_IMM8BY4:
*buf = val >> 2;
break;
- case R_SH_IMM8:
+ case BFD_RELOC_8:
+ case BFD_RELOC_SH_IMM8:
*buf++ = val;
break;
- case R_SH_PCRELIMM8BY4:
+ case BFD_RELOC_SH_PCRELIMM8BY4:
/* The lower two bits of the PC are cleared before the
displacement is added in. We can assume that the destination
is on a 4 byte bounday. If this instruction is also on a 4
buf[lowbyte] = val;
break;
- case R_SH_PCRELIMM8BY2:
+ case BFD_RELOC_SH_PCRELIMM8BY2:
val /= 2;
if (val & ~0xff)
as_bad_where (fixP->fx_file, fixP->fx_line, "pcrel too far");
buf[lowbyte] = val;
break;
- case R_SH_PCDISP8BY2:
+ case BFD_RELOC_SH_PCDISP8BY2:
val /= 2;
if (val < -0x80 || val > 0x7f)
as_bad_where (fixP->fx_file, fixP->fx_line, "pcrel too far");
buf[lowbyte] = val;
break;
- case R_SH_PCDISP:
+ case BFD_RELOC_SH_PCDISP12BY2:
val /= 2;
if (val < -0x800 || val >= 0x7ff)
as_bad_where (fixP->fx_file, fixP->fx_line, "pcrel too far");
buf[highbyte] |= (val >> 8) & 0xf;
break;
- case R_SH_IMM32:
+ case BFD_RELOC_32:
if (! target_big_endian)
{
*buf++ = val >> 0;
}
break;
- case R_SH_IMM16:
+ case BFD_RELOC_16:
if (! target_big_endian)
{
*buf++ = val >> 0;
}
break;
- case R_SH_USES:
+ case BFD_RELOC_SH_USES:
/* Pass the value into sh_coff_reloc_mangle. */
fixP->fx_addnumber = val;
break;
- case R_SH_COUNT:
- case R_SH_ALIGN:
- case R_SH_CODE:
- case R_SH_DATA:
- case R_SH_LABEL:
+ case BFD_RELOC_SH_COUNT:
+ case BFD_RELOC_SH_ALIGN:
+ case BFD_RELOC_SH_CODE:
+ case BFD_RELOC_SH_DATA:
+ case BFD_RELOC_SH_LABEL:
/* Nothing to do here. */
break;
default:
abort ();
}
+
+#ifdef BFD_ASSEMBLER
+ return 0;
+#endif
}
int md_long_jump_size;
return fixP->fx_size + fixP->fx_where + fixP->fx_frag->fr_address + 2;
}
+#ifdef OBJ_COFF
+
int
tc_coff_sizemachdep (frag)
fragS *frag;
return md_relax_table[frag->fr_subtype].rlx_length;
}
+#endif /* OBJ_COFF */
+
/* When we align the .text section, insert the correct NOP pattern. */
int
int len;
{
if ((fill == NULL || (*fill == 0 && len == 1))
- && (now_seg == text_section
#ifdef BFD_ASSEMBLER
- || (now_seg->flags & SEC_CODE) != 0
+ && (now_seg->flags & SEC_CODE) != 0
+#else
+ && now_seg != data_section
+ && now_seg != bss_section
#endif
- || strcmp (obj_segment_name (now_seg), ".init") == 0)
&& n > 1)
{
static const unsigned char big_nop_pattern[] = { 0x00, 0x09 };
return 0;
}
+#ifndef BFD_ASSEMBLER
#ifdef OBJ_COFF
+/* Map BFD relocs to SH COFF relocs. */
+
+struct reloc_map
+{
+ bfd_reloc_code_real_type bfd_reloc;
+ int sh_reloc;
+};
+
+static const struct reloc_map coff_reloc_map[] =
+{
+ { BFD_RELOC_32, R_SH_IMM32 },
+ { BFD_RELOC_16, R_SH_IMM16 },
+ { BFD_RELOC_8, R_SH_IMM8 },
+ { BFD_RELOC_SH_PCDISP8BY2, R_SH_PCDISP8BY2 },
+ { BFD_RELOC_SH_PCDISP12BY2, R_SH_PCDISP },
+ { BFD_RELOC_SH_IMM4, R_SH_IMM4 },
+ { BFD_RELOC_SH_IMM4BY2, R_SH_IMM4BY2 },
+ { BFD_RELOC_SH_IMM4BY4, R_SH_IMM4BY4 },
+ { BFD_RELOC_SH_IMM8, R_SH_IMM8 },
+ { BFD_RELOC_SH_IMM8BY2, R_SH_IMM8BY2 },
+ { BFD_RELOC_SH_IMM8BY4, R_SH_IMM8BY4 },
+ { BFD_RELOC_SH_PCRELIMM8BY2, R_SH_PCRELIMM8BY2 },
+ { BFD_RELOC_SH_PCRELIMM8BY4, R_SH_PCRELIMM8BY4 },
+ { BFD_RELOC_SH_SWITCH16, R_SH_SWITCH16 },
+ { BFD_RELOC_SH_SWITCH32, R_SH_SWITCH32 },
+ { BFD_RELOC_SH_USES, R_SH_USES },
+ { BFD_RELOC_SH_COUNT, R_SH_COUNT },
+ { BFD_RELOC_SH_ALIGN, R_SH_ALIGN },
+ { BFD_RELOC_SH_CODE, R_SH_CODE },
+ { BFD_RELOC_SH_DATA, R_SH_DATA },
+ { BFD_RELOC_SH_LABEL, R_SH_LABEL },
+ { BFD_RELOC_UNUSED, 0 }
+};
+
/* Adjust a reloc for the SH. This is similar to the generic code,
but does some minor tweaking. */
if (! SWITCH_TABLE (fix))
{
- intr->r_type = fix->fx_r_type;
+ const struct reloc_map *rm;
+
+ for (rm = coff_reloc_map; rm->bfd_reloc != BFD_RELOC_UNUSED; rm++)
+ if (rm->bfd_reloc == (bfd_reloc_code_real_type) fix->fx_r_type)
+ break;
+ if (rm->bfd_reloc == BFD_RELOC_UNUSED)
+ as_bad_where (fix->fx_file, fix->fx_line,
+ "Can not represent %s relocation in this object file format",
+ bfd_get_reloc_code_name (fix->fx_r_type));
+ intr->r_type = rm->sh_reloc;
intr->r_offset = 0;
}
else
{
know (sh_relax);
- if (fix->fx_r_type == R_SH_IMM16)
+ if (fix->fx_r_type == BFD_RELOC_16)
intr->r_type = R_SH_SWITCH16;
- else if (fix->fx_r_type == R_SH_IMM32)
+ else if (fix->fx_r_type == BFD_RELOC_32)
intr->r_type = R_SH_SWITCH32;
else
abort ();
{
switch (fix->fx_r_type)
{
- case R_SH_PCRELIMM8BY2:
- case R_SH_PCRELIMM8BY4:
- case R_SH_PCDISP8BY2:
- case R_SH_PCDISP:
- case R_SH_USES:
+ case BFD_RELOC_SH_PCRELIMM8BY2:
+ case BFD_RELOC_SH_PCRELIMM8BY4:
+ case BFD_RELOC_SH_PCDISP8BY2:
+ case BFD_RELOC_SH_PCDISP12BY2:
+ case BFD_RELOC_SH_USES:
symbol_ptr = seg->dot;
break;
default:
}
}
- if (fix->fx_r_type == R_SH_USES)
+ if (fix->fx_r_type == BFD_RELOC_SH_USES)
{
/* We can't store the offset in the object file, since this
reloc does not take up any space, so we store it in r_offset.
The fx_addnumber field was set in md_apply_fix. */
intr->r_offset = fix->fx_addnumber;
}
- else if (fix->fx_r_type == R_SH_COUNT)
+ else if (fix->fx_r_type == BFD_RELOC_SH_COUNT)
{
/* We can't store the count in the object file, since this reloc
does not take up any space, so we store it in r_offset. The
/* This reloc is always absolute. */
symbol_ptr = NULL;
}
- else if (fix->fx_r_type == R_SH_ALIGN)
+ else if (fix->fx_r_type == BFD_RELOC_SH_ALIGN)
{
/* Store the alignment in the r_offset field. */
intr->r_offset = fix->fx_offset;
/* This reloc is always absolute. */
symbol_ptr = NULL;
}
- else if (fix->fx_r_type == R_SH_CODE
- || fix->fx_r_type == R_SH_DATA
- || fix->fx_r_type == R_SH_LABEL)
+ else if (fix->fx_r_type == BFD_RELOC_SH_CODE
+ || fix->fx_r_type == BFD_RELOC_SH_DATA
+ || fix->fx_r_type == BFD_RELOC_SH_LABEL)
{
/* These relocs are always absolute. */
symbol_ptr = NULL;
intr->r_symndx = -1;
}
-#endif
+#endif /* OBJ_COFF */
+#endif /* ! BFD_ASSEMBLER */
+
+#ifdef BFD_ASSEMBLER
+
+/* Create a reloc. */
+
+arelent *
+tc_gen_reloc (section, fixp)
+ asection *section;
+ fixS *fixp;
+{
+ arelent *rel;
+ bfd_reloc_code_real_type r_type;
+
+ rel = (arelent *) bfd_alloc_by_size_t (stdoutput, sizeof (arelent));
+ if (rel == NULL)
+ as_fatal ("Out of memory");
+ rel->sym_ptr_ptr = &fixp->fx_addsy->bsym;
+ rel->address = fixp->fx_frag->fr_address + fixp->fx_where;
+
+ r_type = fixp->fx_r_type;
+
+ if (SWITCH_TABLE (fixp))
+ {
+ rel->addend = rel->address - S_GET_VALUE (fixp->fx_subsy);
+ if (r_type == BFD_RELOC_16)
+ r_type = BFD_RELOC_SH_SWITCH16;
+ else if (r_type == BFD_RELOC_32)
+ r_type = BFD_RELOC_SH_SWITCH32;
+ else
+ abort ();
+ }
+ else if (r_type == BFD_RELOC_SH_USES)
+ rel->addend = fixp->fx_addnumber;
+ else if (r_type == BFD_RELOC_SH_COUNT)
+ rel->addend = fixp->fx_offset;
+ else if (r_type == BFD_RELOC_SH_ALIGN)
+ rel->addend = fixp->fx_offset;
+ else if (fixp->fx_pcrel)
+ rel->addend = fixp->fx_addnumber;
+ else
+ rel->addend = 0;
+
+ rel->howto = bfd_reloc_type_lookup (stdoutput, r_type);
+ if (rel->howto == NULL)
+ {
+ as_bad_where (fixp->fx_file, fixp->fx_line,
+ "Cannot represent relocation type %s",
+ bfd_get_reloc_code_name (r_type));
+ /* Set howto to a garbage value so that we can keep going. */
+ rel->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_32);
+ assert (rel->howto != NULL);
+ }
+
+ return rel;
+}
+
+#endif /* BFD_ASSEMBLER */
/* This file is tc-sh.h
-
Copyright (C) 1993, 94, 95, 1996 Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
#define TC_SH
-/* This macro translates between an internal fix and an coff reloc type */
-#define TC_COFF_FIX2RTYPE(fix) ((fix)->fx_r_type)
-
-#define BFD_ARCH bfd_arch_sh
+#define TARGET_ARCH bfd_arch_sh
+/* Whether in little endian mode. */
extern int shl;
-#define COFF_MAGIC (shl ? SH_ARCH_MAGIC_LITTLE : SH_ARCH_MAGIC_BIG)
-
/* Whether -relax was used. */
extern int sh_relax;
+/* Don't try to break words. */
+#define WORKING_DOT_WORD
+
/* When relaxing, we need to generate relocations for alignment
directives. */
#define HANDLE_ALIGN(frag) sh_handle_align (frag)
#define TC_FORCE_RELOCATION(fix) sh_force_relocation (fix)
extern int sh_force_relocation ();
-/* We need to write out relocs which have not been completed. */
-#define TC_COUNT_RELOC(fix) ((fix)->fx_addsy != NULL)
-
-#define TC_RELOC_MANGLE(seg, fix, int, paddr) \
- sh_coff_reloc_mangle ((seg), (fix), (int), (paddr))
-extern void sh_coff_reloc_mangle ();
-
#define IGNORE_NONSTANDARD_ESCAPES
-#define tc_coff_symbol_emit_hook(a) ; /* not used */
-
-#define DO_NOT_STRIP 0
-#define DO_STRIP 0
#define LISTING_HEADER (shl ? "Hitachi Super-H GAS Little Endian" : "Hitachi Super-H GAS Big Endian")
-#define NEED_FX_R_TYPE 1
-#define RELOC_32 1234
-
-#define TC_KEEP_FX_OFFSET 1
-
-#define TC_COFF_SIZEMACHDEP(frag) tc_coff_sizemachdep(frag)
-extern int tc_coff_sizemachdep PARAMS ((fragS *));
#define md_operand(x)
extern const struct relax_type md_relax_table[];
#define TC_GENERIC_RELAX_TABLE md_relax_table
-#define tc_frob_file sh_coff_frob_file
-extern void sh_coff_frob_file PARAMS (());
-
/* We use a special alignment function to insert the correct nop
pattern. */
extern int sh_do_align PARAMS ((int, const char *, int));
extern void sh_flush_pending_output PARAMS ((void));
#define md_flush_pending_output() sh_flush_pending_output ()
+#ifdef BFD_ASSEMBLER
+#define tc_frob_file_before_adjust sh_frob_file
+#else
+#define tc_frob_file sh_frob_file
+#endif
+extern void sh_frob_file PARAMS ((void));
+
+#ifdef OBJ_COFF
+/* COFF specific definitions. */
+
+#define DO_NOT_STRIP 0
+
+/* This macro translates between an internal fix and an coff reloc type */
+#define TC_COFF_FIX2RTYPE(fix) ((fix)->fx_r_type)
+
+#define BFD_ARCH TARGET_ARCH
+
+#define COFF_MAGIC (shl ? SH_ARCH_MAGIC_LITTLE : SH_ARCH_MAGIC_BIG)
+
+/* We need to write out relocs which have not been completed. */
+#define TC_COUNT_RELOC(fix) ((fix)->fx_addsy != NULL)
+
+#define TC_RELOC_MANGLE(seg, fix, int, paddr) \
+ sh_coff_reloc_mangle ((seg), (fix), (int), (paddr))
+extern void sh_coff_reloc_mangle ();
+
+#define tc_coff_symbol_emit_hook(a) ; /* not used */
+
+#define NEED_FX_R_TYPE 1
+
+#define TC_KEEP_FX_OFFSET 1
+
+#define TC_COFF_SIZEMACHDEP(frag) tc_coff_sizemachdep(frag)
+extern int tc_coff_sizemachdep PARAMS ((fragS *));
+
+/* We align most sections to a 16 byte boundary. */
+#define SUB_SEGMENT_ALIGN(SEG) \
+ (strncmp (obj_segment_name (SEG), ".stabstr", 8) == 0 \
+ ? 0 \
+ : ((strncmp (obj_segment_name (SEG), ".stab", 5) == 0 \
+ || strcmp (obj_segment_name (SEG), ".ctors") == 0 \
+ || strcmp (obj_segment_name (SEG), ".dtors") == 0) \
+ ? 2 \
+ : 4))
+
+#endif /* OBJ_COFF */
+
+#ifdef OBJ_ELF
+/* ELF specific definitions. */
+
+/* Whether or not the target is big endian */
+extern int target_big_endian;
+
+#define TARGET_FORMAT (shl ? "elf32-shl" : "elf32-sh")
+
+#endif /* OBJ_ELF */
+
/* end of tc-sh.h */
static void s_proc PARAMS ((int));
static void s_reserve PARAMS ((int));
static void s_common PARAMS ((int));
+static void s_empty PARAMS ((int));
+static void s_uacons PARAMS ((int));
const pseudo_typeS md_pseudo_table[] =
{
{"align", s_align_bytes, 0}, /* Defaulting is invalid (0) */
{"common", s_common, 0},
+ {"empty", s_empty, 0},
{"global", s_globl, 0},
{"half", cons, 2},
{"optim", s_ignore, 0},
{"skip", s_space, 0},
{"word", cons, 4},
{"xword", cons, 8},
-#ifdef OBJ_ELF
- {"uaxword", cons, 8},
-#endif
#ifdef OBJ_ELF
/* these are specific to sparc/svr4 */
{"pushsection", obj_elf_section, 0},
{"popsection", obj_elf_previous, 0},
- {"uaword", cons, 4},
- {"uahalf", cons, 2},
+ {"uahalf", s_uacons, 2},
+ {"uaword", s_uacons, 4},
+ {"uaxword", s_uacons, 8},
+ {"2byte", s_uacons, 2},
+ {"4byte", s_uacons, 4},
+ {"8byte", s_uacons, 8},
#endif
{NULL, 0, 0},
};
char *p;
int align;
- allocate_bss:
old_sec = now_seg;
old_subsec = now_subseg;
align = temp;
}
}
+/* Handle the .empty pseudo-op. This supresses the warnings about
+ invalid delay slot usage. */
+
+static void
+s_empty (ignore)
+ int ignore;
+{
+ /* The easy way to implement is to just forget about the last
+ instruction. */
+ last_insn = NULL;
+}
+
static void
s_seg (ignore)
int ignore;
++input_line_pointer;
}
+/* This static variable is set by s_uacons to tell sparc_cons_align
+ that the expession does not need to be aligned. */
+
+static int sparc_no_align_cons = 0;
+
+/* This handles the unaligned space allocation pseudo-ops, such as
+ .uaword. .uaword is just like .word, but the value does not need
+ to be aligned. */
+
+static void
+s_uacons (bytes)
+ int bytes;
+{
+ /* Tell sparc_cons_align not to align this value. */
+ sparc_no_align_cons = 1;
+ cons (bytes);
+}
+
+/* We require .word, et. al., to be aligned correctly. We do it by
+ setting up an rs_align_code frag, and checking in HANDLE_ALIGN to
+ make sure that no unexpected alignment was introduced. */
+
+void
+sparc_cons_align (nbytes)
+ int nbytes;
+{
+ int nalign;
+ char *p;
+
+ if (sparc_no_align_cons)
+ {
+ /* This is an unaligned pseudo-op. */
+ sparc_no_align_cons = 0;
+ return;
+ }
+
+ nalign = 0;
+ while ((nbytes & 1) == 0)
+ {
+ ++nalign;
+ nbytes >>= 1;
+ }
+
+ if (nalign == 0)
+ return;
+
+ if (now_seg == absolute_section)
+ {
+ if ((abs_section_offset & ((1 << nalign) - 1)) != 0)
+ as_bad ("misaligned data");
+ return;
+ }
+
+ p = frag_var (rs_align_code, 1, 1, (relax_substateT) 0,
+ (symbolS *) NULL, (long) nalign, (char *) NULL);
+
+ record_alignment (now_seg, nalign);
+}
+
+/* This is where we do the unexpected alignment check. */
+
+void
+sparc_handle_align (fragp)
+ fragS *fragp;
+{
+ if (fragp->fr_type == rs_align_code
+ && fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix != 0)
+ as_bad_where (fragp->fr_file, fragp->fr_line, "misaligned data");
+}
+
/* sparc64 priviledged registers */
struct priv_reg_entry
extern int sparc_pic_code;
+/* We require .word, et. al., to be aligned correctly. */
+#define md_cons_align(nbytes) sparc_cons_align (nbytes)
+extern void sparc_cons_align PARAMS ((int));
+#define HANDLE_ALIGN(fragp) sparc_handle_align (fragp)
+extern void sparc_handle_align ();
+
#if defined (OBJ_ELF) || defined (OBJ_AOUT)
/* This expression evaluates to false if the relocation is for a local
True if we are willing to perform this relocation while building
the .o file.
- If we are generating PIC, and the reloc is against an externally
- visible symbol, we do not want gas to do the relocation. */
+ If the reloc is against an externally visible symbol, then the
+ a.out assembler should not do the relocation if generating PIC, and
+ the ELF assembler should never do the relocation. */
+
+#ifdef OBJ_ELF
+#define obj_relocate_extern 0
+#else
+#define obj_relocate_extern (! sparc_pic_code)
+#endif
#define TC_RELOC_RTSYM_LOC_FIXUP(FIX) \
- (! sparc_pic_code \
+ (obj_relocate_extern \
|| (FIX)->fx_addsy == NULL \
|| (! S_IS_EXTERNAL ((FIX)->fx_addsy) \
&& ! S_IS_WEAK ((FIX)->fx_addsy) \
This function is required for alloca.c support on those systems. */
#undef CRAY_STACKSEG_END
+/* Define if you have alloca, as a function or macro. */
+#undef HAVE_ALLOCA
+
/* Define if you have <alloca.h> and it should be used (not on Ultrix). */
#undef HAVE_ALLOCA_H
#undef MANY_SEGMENTS
-/* Needed only for sparc configuration */
+/* Needed only for sparc configuration. */
#undef SPARC_V9
#undef SPARC_ARCH64
+/* Needed only for some configurations that can produce multiple output
+ formats. */
+#undef DEFAULT_EMULATION
+#undef EMULATIONS
+#undef USE_EMULATIONS
+#undef OBJ_MAYBE_AOUT
+#undef OBJ_MAYBE_BOUT
+#undef OBJ_MAYBE_COFF
+#undef OBJ_MAYBE_ECOFF
+#undef OBJ_MAYBE_ELF
+#undef OBJ_MAYBE_GENERIC
+#undef OBJ_MAYBE_HP300
+#undef OBJ_MAYBE_IEEE
+#undef OBJ_MAYBE_SOM
+#undef OBJ_MAYBE_VMS
+
+/* Used for some of the COFF configurations, when the COFF code needs
+ to select something based on the CPU type before it knows it... */
+#undef I386COFF
+#undef M68KCOFF
+#undef M88KCOFF
+
/* Define if you have the remove function. */
#define HAVE_REMOVE
+/* sbrk() is available, but we don't want gas to use it. */
+#undef HAVE_SBRK
+
/* Define if you have the unlink function. */
#undef HAVE_UNLINK
#! /bin/sh
# Guess values for system-dependent variables and create Makefiles.
-# Generated automatically using autoconf version 2.8
-# Copyright (C) 1992, 1993, 1994 Free Software Foundation, Inc.
+# Generated automatically using autoconf version 2.10
+# Copyright (C) 1992, 93, 94, 95, 96 Free Software Foundation, Inc.
#
# This configure script is free software; the Free Software Foundation
# gives unlimited permission to copy, distribute and modify it.
verbose=yes ;;
-version | --version | --versio | --versi | --vers)
- echo "configure generated by autoconf version 2.8"
+ echo "configure generated by autoconf version 2.10"
exit 0 ;;
-with-* | --with-*)
a29k-nyu-sym1) fmt=coff targ=ebmon29k ;;
a29k-*-vxworks*) fmt=coff ;;
+ alpha-*-*vms*) fmt=evax ;;
alpha-*-netware*) fmt=ecoff ;;
alpha-*-openbsd*) fmt=ecoff ;;
alpha-*-osf*) fmt=ecoff ;;
- alpha-*-linux*) fmt=ecoff ;;
+ alpha-*-linuxecoff*) fmt=ecoff ;;
+ alpha-*-linux*) fmt=elf em=linux ;;
- arm-*-riscix*) fmt=aout targ=arm-lit ;;
+ arm-*-riscix*) fmt=aout targ=arm-lit em=riscix ;;
arm-*-aout) fmt=aout
case "$endian" in
big) targ=arm-big ;;
arm-*-riscix*) fmt=aout ;;
arm-*-pe) fmt=coff targ=armcoff em=pe ;;
+
hppa-*-*elf*) fmt=elf em=hppa ;;
hppa-*-lites*) fmt=elf em=hppa ;;
hppa-*-osf*) fmt=som em=hppa ;;
fmt=coff targ=i386coff ;;
i386-*-vsta) fmt=aout ;;
i386-*-go32) fmt=coff targ=i386coff ;;
+ i386-*-rtems*) fmt=coff targ=i386coff ;;
i386-*-gnu*) fmt=elf ;;
i386-*-mach*)
fmt=aout em=mach bfd_gas=yes ;;
i386-*-*nt) fmt=coff targ=i386coff em=pe ;;
i960-*-bout) fmt=bout ;;
i960-*-coff) fmt=coff em=ic960 targ=ic960coff ;;
+ i960-*-rtems*) fmt=coff em=ic960 targ=ic960coff ;;
i960-*-nindy*) fmt=bout ;;
i960-*-vxworks4*) fmt=bout ;;
i960-*-vxworks5.0) fmt=bout ;;
m68k-apollo-*) fmt=coff targ=apollo em=apollo ;;
m68k-*-sysv4 | m68k-*-elf) # must be before -sysv*
fmt=elf ;;
- m68k-*-coff | m68k-*-sysv*)
+ m68k-*-coff | m68k-*-sysv* | m68k-*-rtems*)
fmt=coff targ=m68kcoff ;;
m68k-*-hpux*) fmt=hp300 em=hp300 ;;
m68k-*-linux*aout*) fmt=aout em=linux ;;
mips-sony-bsd*) fmt=ecoff targ=mips-big ;;
mips-*-bsd*) { echo "configure: error: Unknown vendor for mips-bsd configuration." 1>&2; exit 1; } ;;
mips-*-ultrix*) fmt=ecoff targ=mips-lit endian=little ;;
+ mips-*-osf*) fmt=ecoff targ=mips-lit endian=little ;;
mips-*-ecoff*) fmt=ecoff
case "$endian" in
big) targ=mips-big ;;
*) targ=mips-lit ;;
esac
;;
+ mips-*-irix6*) fmt=elf targ=mips-big ;;
mips-*-irix5*) fmt=elf targ=mips-big ;;
mips-*-irix*) fmt=ecoff targ=mips-big ;;
mips-*-riscos*) fmt=ecoff targ=mips-big ;;
*) targ=ppc-sol ;;
esac
;;
+ ppc-*-rtems*)
+ fmt=elf
+ case "$endian" in
+ big) targ=ppc-big ;;
+ *) targ=ppc-lit ;;
+ esac
+ ;;
ppc-*-macos* | ppc-*-mpw*)
fmt=coff em=macos ;;
ppc-*-netware*) fmt=elf em=ppcnw ;;
- sh-*-coff) fmt=coff ;;
+ sh-*-elf*) fmt=elf ;;
+ sh-*-coff*) fmt=coff ;;
ns32k-pc532-mach* | ns32k-pc532-ux*) fmt=aout em=pc532mach ;;
ns32k-pc532-netbsd* | ns32k-pc532-lites*) fmt=aout em=nbsd532 ;;
ns32k-pc532-openbsd*) fmt=aout em=nbsd532 ;;
+ sparc-*-rtems*) fmt=aout ;;
sparc-*-sunos4*) fmt=aout em=sun3 ;;
sparc-*-aout | sparc*-*-vxworks*)
fmt=aout ;;
sparc-*-coff) fmt=coff ;;
sparc-*-lynxos*) fmt=coff em=lynx ;;
sparc-fujitsu-none) fmt=aout ;;
- sparc-*-elf | sparc-*-solaris*)
+ sparc-*-elf | sparc-*-sysv4* | sparc-*-solaris*)
fmt=elf ;;
sparc-*-netbsd*) fmt=aout em=nbsd bfd_gas=yes ;;
- sparc-*-openbsd*) fmt=aout em=nbsd bfd_gas=yes ;;
+ sparc-*-openbsd*) fmt=aout em=nbsd bfd_gas=yes ;;
+
+ v850-*-*) fmt=elf bfd_gas=yes ;;
vax-*-bsd* | vax-*-ultrix*)
fmt=aout ;;
esac
case ${cpu_type}-${fmt} in
+ alpha-*) bfd_gas=yes ;;
arm-*) bfd_gas=yes ;;
# not yet
# i386-aout) bfd_gas=preferred ;;
# do we need the opcodes library?
case ${cpu_type} in
- alpha | vax | i386)
+ vax | i386)
;;
*)
need_opcodes=yes
# do we need the opcodes library?
case "${need_opcodes}" in
- yes)
- OPCODES_DEP=../opcodes/libopcodes.a
- OPCODES_LIB='-L../opcodes -lopcodes'
+yes)
+ OPCODES_DEP=../opcodes/libopcodes.a
+ OPCODES_LIB='-L../opcodes -lopcodes'
- # We need to handle some special cases if opcodes was built shared.
+ # We need to handle some special cases for shared libraries.
+ case "${host}" in
+ *-*-sunos*)
+ # On SunOS, we must link against the name we are going to install,
+ # not -lbfd, since SunOS does not support SONAME.
if test "${shared_opcodes}" = "true"; then
- case "${host}" in
- *-*-sunos*)
- # On SunOS, we must link against the name we are going to install,
- # not -lbfd, since SunOS does not support SONAME.
OPCODES_LIB='-L../opcodes -l`echo opcodes | sed '"'"'$(program_transform_name)'"'"'`'
- ;;
- esac
fi
;;
+ alpha*-*-osf*)
+ # On Alpha OSF/1, the native linker searches all the -L
+ # directories for any LIB.so files, and only then searches for any
+ # LIB.a files. That means that if there is an installed
+ # libbfd.so, but this build is not done with --enable-shared, the
+ # link will wind up being against the install libbfd.so rather
+ # than the newly built libbfd. To avoid this, we must explicitly
+ # link against libbfd.a when --enable-shared is not used.
+ if test "${shared_opcodes}" != "true"; then
+ OPCODES_LIB='../opcodes/libopcodes.a'
+ fi
+ ;;
+ esac
+ ;;
esac
case "${need_bfd}" in
- yes)
- BFDDEP=../bfd/libbfd.a
- BFDLIB='-L../bfd -lbfd'
- ALL_OBJ_DEPS="$ALL_OBJ_DEPS ../bfd/bfd.h"
+yes)
+ BFDDEP=../bfd/libbfd.a
+ BFDLIB='-L../bfd -lbfd'
+ ALL_OBJ_DEPS="$ALL_OBJ_DEPS ../bfd/bfd.h"
- # We need to handle some special cases if BFD was built shared.
+ # We need to handle some special cases for shared libraries
+ case "${host}" in
+ *-*-sunos*)
+ # On SunOS, we must link against the name we are going to install,
+ # not -lbfd, since SunOS does not support SONAME.
if test "${shared_bfd}" = "true"; then
- case "${host}" in
- *-*-sunos*)
- # On SunOS, we must link against the name we are going to install,
- # not -lbfd, since SunOS does not support SONAME.
- BFDLIB='-L../bfd -l`echo bfd | sed '"'"'$(program_transform_name)'"'"'`'
- ;;
- esac
+ BFDLIB='-L../bfd -l`echo bfd | sed '"'"'$(program_transform_name)'"'"'`'
fi
;;
+ alpha*-*-osf*)
+ # On Alpha OSF/1, the native linker searches all the -L
+ # directories for any LIB.so files, and only then searches for any
+ # LIB.a files. That means that if there is an installed
+ # libbfd.so, but this build is not done with --enable-shared, the
+ # link will wind up being against the install libbfd.so rather
+ # than the newly built libbfd. To avoid this, we must explicitly
+ # link against libbfd.a when --enable-shared is not used.
+ if test "${shared_bfd}" != "true"; then
+ BFDLIB='../bfd/libbfd.a'
+ fi
+ ;;
+ esac
+ ;;
esac
yes;
#endif
EOF
-if { ac_try='${CC-cc} -E conftest.c'; { (eval echo configure:1420: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; } | egrep yes >/dev/null 2>&1; then
+if { ac_try='${CC-cc} -E conftest.c'; { (eval echo configure:1462: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; } | egrep yes >/dev/null 2>&1; then
ac_cv_prog_gcc=yes
else
ac_cv_prog_gcc=no
# On the NeXT, cc -E runs the code through the compiler's parser,
# not just through cpp.
cat > conftest.$ac_ext <<EOF
-#line 1532 "configure"
+#line 1574 "configure"
#include "confdefs.h"
#include <assert.h>
Syntax Error
EOF
ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:1538: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
+{ (eval echo configure:1580: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
ac_err=`grep -v '^ *+' conftest.out`
if test -z "$ac_err"; then
:
rm -rf conftest*
CPP="${CC-cc} -E -traditional-cpp"
cat > conftest.$ac_ext <<EOF
-#line 1547 "configure"
+#line 1589 "configure"
#include "confdefs.h"
#include <assert.h>
Syntax Error
EOF
ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:1553: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
+{ (eval echo configure:1595: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
ac_err=`grep -v '^ *+' conftest.out`
if test -z "$ac_err"; then
:
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 1581 "configure"
+#line 1623 "configure"
#include "confdefs.h"
#include <$ac_hdr>
EOF
ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:1586: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
+{ (eval echo configure:1628: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
ac_err=`grep -v '^ *+' conftest.out`
if test -z "$ac_err"; then
rm -rf conftest*
ac_cv_c_cross=yes
else
cat > conftest.$ac_ext <<EOF
-#line 1634 "configure"
+#line 1676 "configure"
#include "confdefs.h"
main(){return(0);}
EOF
-{ (eval echo configure:1638: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }
+{ (eval echo configure:1680: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }
if test -s conftest && (./conftest; exit) 2>/dev/null; then
ac_cv_c_cross=no
else
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 1658 "configure"
+#line 1700 "configure"
#include "confdefs.h"
#include <alloca.h>
int main() { return 0; }
char *p = alloca(2 * sizeof(int));
; return 0; }
EOF
-if { (eval echo configure:1666: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }; then
+if { (eval echo configure:1708: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }; then
rm -rf conftest*
ac_cv_header_alloca_h=yes
else
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 1690 "configure"
+#line 1732 "configure"
#include "confdefs.h"
#ifdef __GNUC__
char *p = (char *) alloca(1);
; return 0; }
EOF
-if { (eval echo configure:1714: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }; then
+if { (eval echo configure:1756: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }; then
rm -rf conftest*
ac_cv_func_alloca=yes
else
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 1749 "configure"
+#line 1791 "configure"
#include "confdefs.h"
#if defined(CRAY) && ! defined(CRAY2)
webecray
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 1778 "configure"
+#line 1820 "configure"
#include "confdefs.h"
/* System header to define __stub macros and hopefully few prototypes,
which can conflict with char $ac_func(); below. */
#include <assert.h>
/* Override any gcc2 internal prototype to avoid an error. */
+/* We use char because int might match the return type of a gcc2
+ builtin and then its argument prototype would still apply. */
char $ac_func();
int main() { return 0; }
; return 0; }
EOF
-if { (eval echo configure:1800: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }; then
+if { (eval echo configure:1844: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }; then
rm -rf conftest*
eval "ac_cv_func_$ac_func=yes"
else
ac_cv_c_stack_direction=0
else
cat > conftest.$ac_ext <<EOF
-#line 1832 "configure"
+#line 1876 "configure"
#include "confdefs.h"
find_stack_direction ()
{
exit (find_stack_direction() < 0);
}
EOF
-{ (eval echo configure:1851: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }
+{ (eval echo configure:1895: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }
if test -s conftest && (./conftest; exit) 2>/dev/null; then
ac_cv_c_stack_direction=1
else
ac_cv_c_inline=no
for ac_kw in inline __inline__ __inline; do
cat > conftest.$ac_ext <<EOF
-#line 1875 "configure"
+#line 1919 "configure"
#include "confdefs.h"
int main() { return 0; }
} $ac_kw foo() {
; return 0; }
EOF
-if { (eval echo configure:1883: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
+if { (eval echo configure:1927: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
rm -rf conftest*
ac_cv_c_inline=$ac_kw; break
fi
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 1915 "configure"
+#line 1959 "configure"
#include "confdefs.h"
/* System header to define __stub macros and hopefully few prototypes,
which can conflict with char $ac_func(); below. */
#include <assert.h>
/* Override any gcc2 internal prototype to avoid an error. */
+/* We use char because int might match the return type of a gcc2
+ builtin and then its argument prototype would still apply. */
char $ac_func();
int main() { return 0; }
; return 0; }
EOF
-if { (eval echo configure:1937: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }; then
+if { (eval echo configure:1983: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }; then
rm -rf conftest*
eval "ac_cv_func_$ac_func=yes"
else
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 1968 "configure"
+#line 2014 "configure"
#include "confdefs.h"
/* System header to define __stub macros and hopefully few prototypes,
which can conflict with char $ac_func(); below. */
#include <assert.h>
/* Override any gcc2 internal prototype to avoid an error. */
+/* We use char because int might match the return type of a gcc2
+ builtin and then its argument prototype would still apply. */
char $ac_func();
int main() { return 0; }
; return 0; }
EOF
-if { (eval echo configure:1990: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }; then
+if { (eval echo configure:2038: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }; then
rm -rf conftest*
eval "ac_cv_func_$ac_func=yes"
else
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 2021 "configure"
+#line 2069 "configure"
#include "confdefs.h"
#include <assert.h>
#include <stdio.h>
; return 0; }
EOF
-if { (eval echo configure:2038: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }; then
+if { (eval echo configure:2086: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }; then
rm -rf conftest*
gas_cv_assert_ok=yes
else
#endif
#ifdef HAVE_STRING_H
#include <string.h>
+#else
+#ifdef HAVE_STRINGS_H
+#include <strings.h>
+#endif
#endif
#ifdef HAVE_STDLIB_H
#include <stdlib.h>
#endif
"
+echo $ac_n "checking whether declaration is required for strstr""... $ac_c" 1>&6
+if eval "test \"`echo '$''{'gas_cv_decl_needed_strstr'+set}'`\" = set"; then
+ echo $ac_n "(cached) $ac_c" 1>&6
+else
+ cat > conftest.$ac_ext <<EOF
+#line 2130 "configure"
+#include "confdefs.h"
+$gas_test_headers
+int main() { return 0; }
+int t() {
+
+typedef char *(*f)();
+f x;
+x = (f) strstr;
+
+; return 0; }
+EOF
+if { (eval echo configure:2142: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }; then
+ rm -rf conftest*
+ gas_cv_decl_needed_strstr=no
+else
+ rm -rf conftest*
+ gas_cv_decl_needed_strstr=yes
+fi
+rm -f conftest*
+
+fi
+echo "$ac_t""$gas_cv_decl_needed_strstr" 1>&6
+test $gas_cv_decl_needed_strstr = no || {
+ cat >> confdefs.h <<\EOF
+#define NEED_DECLARATION_STRSTR 1
+EOF
+
+}
+
+
echo $ac_n "checking whether declaration is required for malloc""... $ac_c" 1>&6
if eval "test \"`echo '$''{'gas_cv_decl_needed_malloc'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 2078 "configure"
+#line 2166 "configure"
#include "confdefs.h"
$gas_test_headers
int main() { return 0; }
; return 0; }
EOF
-if { (eval echo configure:2090: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }; then
+if { (eval echo configure:2178: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }; then
rm -rf conftest*
gas_cv_decl_needed_malloc=no
else
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 2114 "configure"
+#line 2202 "configure"
#include "confdefs.h"
$gas_test_headers
int main() { return 0; }
; return 0; }
EOF
-if { (eval echo configure:2126: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }; then
+if { (eval echo configure:2214: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }; then
rm -rf conftest*
gas_cv_decl_needed_free=no
else
}
+echo $ac_n "checking whether declaration is required for sbrk""... $ac_c" 1>&6
+if eval "test \"`echo '$''{'gas_cv_decl_needed_sbrk'+set}'`\" = set"; then
+ echo $ac_n "(cached) $ac_c" 1>&6
+else
+ cat > conftest.$ac_ext <<EOF
+#line 2238 "configure"
+#include "confdefs.h"
+$gas_test_headers
+int main() { return 0; }
+int t() {
+
+typedef char *(*f)();
+f x;
+x = (f) sbrk;
+
+; return 0; }
+EOF
+if { (eval echo configure:2250: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }; then
+ rm -rf conftest*
+ gas_cv_decl_needed_sbrk=no
+else
+ rm -rf conftest*
+ gas_cv_decl_needed_sbrk=yes
+fi
+rm -f conftest*
+
+fi
+echo "$ac_t""$gas_cv_decl_needed_sbrk" 1>&6
+test $gas_cv_decl_needed_sbrk = no || {
+ cat >> confdefs.h <<\EOF
+#define NEED_DECLARATION_SBRK 1
+EOF
+
+}
+
+
# Does errno.h declare errno, or do we have to add a separate declaration
# for it?
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 2153 "configure"
+#line 2277 "configure"
#include "confdefs.h"
#ifdef HAVE_ERRNO_H
; return 0; }
EOF
-if { (eval echo configure:2169: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }; then
+if { (eval echo configure:2293: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }; then
rm -rf conftest*
gas_cv_decl_needed_errno=no
else
HLDFLAGS=
+HLDENV=
RPATH_ENVVAR=LD_LIBRARY_PATH
# If we have shared libraries, try to set rpath reasonably.
if test "${shared}" = "true"; then
HLDFLAGS='-Wl,+s,+b,$(libdir)'
RPATH_ENVVAR=SHLIB_PATH
;;
- *-*-irix5*)
+ *-*-irix5* | *-*-irix6*)
HLDFLAGS='-Wl,-rpath,$(libdir)'
;;
*-*-linux*aout*)
*-*-linux*)
HLDFLAGS='-Wl,-rpath,$(libdir)'
;;
- *-*-sysv4* | *-*-solaris*)
+ *-*-solaris*)
HLDFLAGS='-R $(libdir)'
;;
+ *-*-sysv4*)
+ HLDENV='if test -z "$${LD_RUN_PATH}"; then LD_RUN_PATH=$(libdir); else LD_RUN_PATH=$${LD_RUN_PATH}:$(libdir); fi; export LD_RUN_PATH;'
+ ;;
esac
fi
+
trap '' 1 2 15
cat > confcache <<\EOF
# This file is a shell script that caches the results of configure
echo "running \${CONFIG_SHELL-/bin/sh} $0 $ac_configure_args --no-create --no-recursion"
exec \${CONFIG_SHELL-/bin/sh} $0 $ac_configure_args --no-create --no-recursion ;;
-version | --version | --versio | --versi | --vers | --ver | --ve | --v)
- echo "$CONFIG_STATUS generated by autoconf version 2.8"
+ echo "$CONFIG_STATUS generated by autoconf version 2.10"
exit 0 ;;
-help | --help | --hel | --he | --h)
echo "\$ac_cs_usage"; exit 0 ;;
s%@CPP@%$CPP%g
s%@ALLOCA@%$ALLOCA%g
s%@HLDFLAGS@%$HLDFLAGS%g
+s%@HLDENV@%$HLDENV%g
s%@RPATH_ENVVAR@%$RPATH_ENVVAR%g
CEOF
cat > conftest.hdr <<\EOF
s/[\\&%]/\\&/g
s%[\\$`]%\\&%g
-s%#define \([A-Za-z_][A-Za-z0-9_]*\) \(.*\)%${ac_dA}\1${ac_dB}\1${ac_dC}\2${ac_dD}%gp
+s%#define \([A-Za-z_][A-Za-z0-9_]*\) *\(.*\)%${ac_dA}\1${ac_dB}\1${ac_dC}\2${ac_dD}%gp
s%ac_d%ac_u%gp
s%ac_u%ac_e%gp
EOF
echo "$ac_file is unchanged"
rm -f conftest.h
else
+ # Remove last slash and all that follows it. Not all systems have dirname.
+ ac_dir=`echo $ac_file|sed 's%/[^/][^/]*$%%'`
+ if test "$ac_dir" != "$ac_file" && test "$ac_dir" != .; then
+ # The file is in a subdirectory.
+ test ! -d "$ac_dir" && mkdir "$ac_dir"
+ fi
rm -f $ac_file
mv conftest.h $ac_file
fi
dnl brackets, be sure changequote invocations surround it.
dnl
dnl
-AC_PREREQ(2.3)dnl We only need 2.0, but pre-2.3 loses on some AIX version.
+AC_PREREQ(2.5)dnl v2.5 needed for --bindir et al
AC_INIT(as.h)dnl
dnl
user_bfd_gas=
a29k-nyu-sym1) fmt=coff targ=ebmon29k ;;
a29k-*-vxworks*) fmt=coff ;;
+ alpha-*-*vms*) fmt=evax ;;
alpha-*-netware*) fmt=ecoff ;;
alpha-*-osf*) fmt=ecoff ;;
- alpha-*-linux*) fmt=ecoff ;;
+ alpha-*-linuxecoff*) fmt=ecoff ;;
+ alpha-*-linux*) fmt=elf em=linux ;;
- arm-*-riscix*) fmt=aout targ=arm-lit ;;
+ arm-*-riscix*) fmt=aout targ=arm-lit em=riscix ;;
arm-*-aout) fmt=aout
case "$endian" in
big) targ=arm-big ;;
arm-*-riscix*) fmt=aout ;;
arm-*-pe) fmt=coff targ=armcoff em=pe ;;
+
hppa-*-*elf*) fmt=elf em=hppa ;;
hppa-*-lites*) fmt=elf em=hppa ;;
hppa-*-osf*) fmt=som em=hppa ;;
fmt=coff targ=i386coff ;;
i386-*-vsta) fmt=aout ;;
i386-*-go32) fmt=coff targ=i386coff ;;
+ i386-*-rtems*) fmt=coff targ=i386coff ;;
i386-*-gnu*) fmt=elf ;;
i386-*-mach*)
fmt=aout em=mach bfd_gas=yes ;;
i386-*-*nt) fmt=coff targ=i386coff em=pe ;;
i960-*-bout) fmt=bout ;;
i960-*-coff) fmt=coff em=ic960 targ=ic960coff ;;
+ i960-*-rtems*) fmt=coff em=ic960 targ=ic960coff ;;
i960-*-nindy*) fmt=bout ;;
i960-*-vxworks4*) fmt=bout ;;
i960-*-vxworks5.0) fmt=bout ;;
m68k-apollo-*) fmt=coff targ=apollo em=apollo ;;
m68k-*-sysv4 | m68k-*-elf) # must be before -sysv*
fmt=elf ;;
- m68k-*-coff | m68k-*-sysv*)
+ m68k-*-coff | m68k-*-sysv* | m68k-*-rtems*)
fmt=coff targ=m68kcoff ;;
m68k-*-hpux*) fmt=hp300 em=hp300 ;;
m68k-*-linux*aout*) fmt=aout em=linux ;;
mips-sony-bsd*) fmt=ecoff targ=mips-big ;;
mips-*-bsd*) AC_MSG_ERROR(Unknown vendor for mips-bsd configuration.) ;;
mips-*-ultrix*) fmt=ecoff targ=mips-lit endian=little ;;
+ mips-*-osf*) fmt=ecoff targ=mips-lit endian=little ;;
mips-*-ecoff*) fmt=ecoff
case "$endian" in
big) targ=mips-big ;;
*) targ=mips-lit ;;
esac
;;
+ mips-*-irix6*) fmt=elf targ=mips-big ;;
mips-*-irix5*) fmt=elf targ=mips-big ;;
mips-*-irix*) fmt=ecoff targ=mips-big ;;
mips-*-riscos*) fmt=ecoff targ=mips-big ;;
*) targ=ppc-sol ;;
esac
;;
+ ppc-*-rtems*)
+ fmt=elf
+ case "$endian" in
+ big) targ=ppc-big ;;
+ *) targ=ppc-lit ;;
+ esac
+ ;;
ppc-*-macos* | ppc-*-mpw*)
fmt=coff em=macos ;;
ppc-*-netware*) fmt=elf em=ppcnw ;;
- sh-*-coff) fmt=coff ;;
+ sh-*-elf*) fmt=elf ;;
+ sh-*-coff*) fmt=coff ;;
ns32k-pc532-mach* | ns32k-pc532-ux*) fmt=aout em=pc532mach ;;
ns32k-pc532-netbsd* | ns32k-pc532-lites*) fmt=aout em=nbsd532 ;;
ns32k-pc532-openbsd*) fmt=aout em=nbsd532 ;;
+ sparc-*-rtems*) fmt=aout ;;
sparc-*-sunos4*) fmt=aout em=sun3 ;;
sparc-*-aout | sparc*-*-vxworks*)
fmt=aout ;;
sparc-*-coff) fmt=coff ;;
sparc-*-lynxos*) fmt=coff em=lynx ;;
sparc-fujitsu-none) fmt=aout ;;
- sparc-*-elf | sparc-*-solaris*)
+ sparc-*-elf | sparc-*-sysv4* | sparc-*-solaris*)
fmt=elf ;;
sparc-*-netbsd*) fmt=aout em=nbsd bfd_gas=yes ;;
- sparc-*-openbsd*) fmt=aout em=nbsd bfd_gas=yes ;;
+ sparc-*-openbsd*) fmt=aout em=nbsd bfd_gas=yes ;;
+
+ v850-*-*) fmt=elf bfd_gas=yes ;;
vax-*-bsd* | vax-*-ultrix*)
fmt=aout ;;
esac
case ${cpu_type}-${fmt} in
+ alpha-*) bfd_gas=yes ;;
arm-*) bfd_gas=yes ;;
# not yet
# i386-aout) bfd_gas=preferred ;;
# do we need the opcodes library?
case ${cpu_type} in
- alpha | vax | i386)
+ vax | i386)
;;
*)
need_opcodes=yes
# do we need the opcodes library?
case "${need_opcodes}" in
- yes)
- OPCODES_DEP=../opcodes/libopcodes.a
- OPCODES_LIB='-L../opcodes -lopcodes'
+yes)
+ OPCODES_DEP=../opcodes/libopcodes.a
+ OPCODES_LIB='-L../opcodes -lopcodes'
- # We need to handle some special cases if opcodes was built shared.
+ # We need to handle some special cases for shared libraries.
+ case "${host}" in
+ *-*-sunos*)
+ # On SunOS, we must link against the name we are going to install,
+ # not -lbfd, since SunOS does not support SONAME.
if test "${shared_opcodes}" = "true"; then
- case "${host}" in
- *-*-sunos*)
- # On SunOS, we must link against the name we are going to install,
- # not -lbfd, since SunOS does not support SONAME.
OPCODES_LIB='-L../opcodes -l`echo opcodes | sed '"'"'$(program_transform_name)'"'"'`'
- ;;
- esac
fi
;;
+ alpha*-*-osf*)
+ # On Alpha OSF/1, the native linker searches all the -L
+ # directories for any LIB.so files, and only then searches for any
+ # LIB.a files. That means that if there is an installed
+ # libbfd.so, but this build is not done with --enable-shared, the
+ # link will wind up being against the install libbfd.so rather
+ # than the newly built libbfd. To avoid this, we must explicitly
+ # link against libbfd.a when --enable-shared is not used.
+ if test "${shared_opcodes}" != "true"; then
+ OPCODES_LIB='../opcodes/libopcodes.a'
+ fi
+ ;;
+ esac
+ ;;
esac
AC_SUBST(OPCODES_DEP)
AC_SUBST(OPCODES_LIB)
case "${need_bfd}" in
- yes)
- BFDDEP=../bfd/libbfd.a
- BFDLIB='-L../bfd -lbfd'
- ALL_OBJ_DEPS="$ALL_OBJ_DEPS ../bfd/bfd.h"
+yes)
+ BFDDEP=../bfd/libbfd.a
+ BFDLIB='-L../bfd -lbfd'
+ ALL_OBJ_DEPS="$ALL_OBJ_DEPS ../bfd/bfd.h"
- # We need to handle some special cases if BFD was built shared.
+ # We need to handle some special cases for shared libraries
+ case "${host}" in
+ *-*-sunos*)
+ # On SunOS, we must link against the name we are going to install,
+ # not -lbfd, since SunOS does not support SONAME.
if test "${shared_bfd}" = "true"; then
- case "${host}" in
- *-*-sunos*)
- # On SunOS, we must link against the name we are going to install,
- # not -lbfd, since SunOS does not support SONAME.
- BFDLIB='-L../bfd -l`echo bfd | sed '"'"'$(program_transform_name)'"'"'`'
- ;;
- esac
+ BFDLIB='-L../bfd -l`echo bfd | sed '"'"'$(program_transform_name)'"'"'`'
fi
;;
+ alpha*-*-osf*)
+ # On Alpha OSF/1, the native linker searches all the -L
+ # directories for any LIB.so files, and only then searches for any
+ # LIB.a files. That means that if there is an installed
+ # libbfd.so, but this build is not done with --enable-shared, the
+ # link will wind up being against the install libbfd.so rather
+ # than the newly built libbfd. To avoid this, we must explicitly
+ # link against libbfd.a when --enable-shared is not used.
+ if test "${shared_bfd}" != "true"; then
+ BFDLIB='../bfd/libbfd.a'
+ fi
+ ;;
+ esac
+ ;;
esac
AC_SUBST(BFDDEP)
AC_SUBST(BFDLIB)
#endif
#ifdef HAVE_STRING_H
#include <string.h>
+#else
+#ifdef HAVE_STRINGS_H
+#include <strings.h>
+#endif
#endif
#ifdef HAVE_STDLIB_H
#include <stdlib.h>
#include <unistd.h>
#endif
"
+GAS_CHECK_DECL_NEEDED(strstr, f, char *(*f)(), $gas_test_headers)
GAS_CHECK_DECL_NEEDED(malloc, f, char *(*f)(), $gas_test_headers)
GAS_CHECK_DECL_NEEDED(free, f, void (*f)(), $gas_test_headers)
+GAS_CHECK_DECL_NEEDED(sbrk, f, char *(*f)(), $gas_test_headers)
# Does errno.h declare errno, or do we have to add a separate declaration
# for it?
])
HLDFLAGS=
+HLDENV=
RPATH_ENVVAR=LD_LIBRARY_PATH
# If we have shared libraries, try to set rpath reasonably.
if test "${shared}" = "true"; then
HLDFLAGS='-Wl,+s,+b,$(libdir)'
RPATH_ENVVAR=SHLIB_PATH
;;
- *-*-irix5*)
+ *-*-irix5* | *-*-irix6*)
HLDFLAGS='-Wl,-rpath,$(libdir)'
;;
*-*-linux*aout*)
*-*-linux*)
HLDFLAGS='-Wl,-rpath,$(libdir)'
;;
- *-*-sysv4* | *-*-solaris*)
+ *-*-solaris*)
HLDFLAGS='-R $(libdir)'
;;
+ *-*-sysv4*)
+ HLDENV='if test -z "$${LD_RUN_PATH}"; then LD_RUN_PATH=$(libdir); else LD_RUN_PATH=$${LD_RUN_PATH}:$(libdir); fi; export LD_RUN_PATH;'
+ ;;
esac
fi
;;
esac
AC_SUBST(HLDFLAGS)
+AC_SUBST(HLDENV)
AC_SUBST(RPATH_ENVVAR)
dnl This must come last.
program_transform_name = @program_transform_name@
exec_prefix = @exec_prefix@
-bindir = $(exec_prefix)/bin
-libdir = $(exec_prefix)/lib
+bindir = @bindir@
+libdir = @libdir@
-datadir = $(prefix)/lib
-mandir = $(prefix)/man
+datadir = @datadir@
+mandir = @mandir@
man1dir = $(mandir)/man1
man2dir = $(mandir)/man2
man3dir = $(mandir)/man3
man7dir = $(mandir)/man7
man8dir = $(mandir)/man8
man9dir = $(mandir)/man9
-infodir = $(prefix)/info
-includedir = $(prefix)/include
-docdir = $(datadir)/doc
+infodir = @infodir@
+includedir = @includedir@
SHELL = /bin/sh
@ifset A29K
@c am29k has no machine-dependent assembler options
@end ifset
+
@ifset H8
@c Hitachi family chips have no machine-dependent assembler options
@end ifset
@end table
@end ifset
+
@ifset I960
The following options are available when @value{AS} is configured for the
Intel 80960 processor.
@item -l
Shorten references to undefined symbols, to one word instead of two.
-@item -m68000 | -m68008 | -m68010 | -m68020 | -m68030 | -m68040
-@itemx | -m68302 | -m68331 | -m68332 | -m68333 | -m68340 | -mcpu32
+@item -m68000 | -m68008 | -m68010 | -m68020 | -m68030 | -m68040 | -m68060
+@itemx | -m68302 | -m68331 | -m68332 | -m68333 | -m68340 | -mcpu32 | -m5200
Specify what processor in the 68000 family is the target. The default
is normally the 68020, but this can be changed at configuration time.
@cindex line comment character
Anything from the @dfn{line comment} character to the next newline
is considered a comment and is ignored. The line comment character is
-@ifset VAX
-@samp{#} on the Vax;
-@end ifset
-@ifset I960
-@samp{#} on the i960;
-@end ifset
-@ifset SPARC
-@samp{!} on the SPARC;
-@end ifset
-@ifset M680X0
-@samp{|} on the 680x0;
-@end ifset
@ifset A29K
@samp{;} for the AMD 29K family;
@end ifset
@ifset HPPA
@samp{;} for the HPPA;
@end ifset
+@ifset I960
+@samp{#} on the i960;
+@end ifset
@ifset SH
@samp{!} for the Hitachi SH;
@end ifset
+@ifset SPARC
+@samp{!} on the SPARC;
+@end ifset
+@ifset M680X0
+@samp{|} on the 680x0;
+@end ifset
+@ifset VAX
+@samp{#} on the Vax;
+@end ifset
@ifset Z8000
@samp{!} for the Z8000;
@end ifset
For compatibility with other Unix systems, 8 and 9 are accepted as digits:
for example, @code{\008} has the value 010, and @code{\009} the value 011.
-@ifset HPPA
-@cindex @code{\@var{xdd}} (hex character code)
-@cindex hex character code (@code{\@var{xdd}})
-@item \@code{x} @var{hex-digit} @var{hex-digit}
-A hex character code. The numeric code is 2 hexadecimal digits. Either
-upper or lower case @code{x} works.
-@end ifset
+@cindex @code{\@var{xd...}} (hex character code)
+@cindex hex character code (@code{\@var{xd...}})
+@item \@code{x} @var{hex-digits...}
+A hex character code. All trailing hex digits are combined. Either upper or
+lower case @code{x} works.
@cindex @code{\\} (@samp{\} character)
@cindex backslash (@code{\\})
@ifset H8
One of the letters @samp{DFPRSX} (in upper or lower case).
@end ifset
-@ifset I960
-One of the letters @samp{DFT} (in upper or lower case).
-@end ifset
@ifset HPPA
The letter @samp{E} (upper case only).
@end ifset
+@ifset I960
+One of the letters @samp{DFT} (in upper or lower case).
+@end ifset
@end ifclear
@item
alignment required, as described below.
The second expression (also absolute) gives the value to be stored in
the padding bytes. It (and the comma) may be omitted. If it is
-omitted, the padding bytes are zero.
+omitted, the padding bytes are zero.
+For the alpha, if the section is marked as containing code and the
+padding expression is omitted, then the space is filled with no-ops.
The way the required alignment is specified varies from system to system.
For the a29k, hppa, m68k, m88k, w65, sparc, and Hitachi SH, and i386 using ELF
subject, see the hardware manufacturer's manual.
@menu
-@ifset VAX
-* Vax-Dependent:: VAX Dependent Features
-@end ifset
@ifset A29K
* AMD29K-Dependent:: AMD 29K Dependent Features
@end ifset
@ifset HPPA
* HPPA-Dependent:: HPPA Dependent Features
@end ifset
-@ifset SH
-* SH-Dependent:: Hitachi SH Dependent Features
+@ifset I80386
+* i386-Dependent:: Intel 80386 Dependent Features
@end ifset
@ifset I960
* i960-Dependent:: Intel 80960 Dependent Features
@ifset M680X0
* M68K-Dependent:: M680x0 Dependent Features
@end ifset
+@ifset MIPS
+* MIPS-Dependent:: MIPS Dependent Features
+@end ifset
+@ifset SH
+* SH-Dependent:: Hitachi SH Dependent Features
+@end ifset
@ifset SPARC
* Sparc-Dependent:: SPARC Dependent Features
@end ifset
@ifset Z8000
* Z8000-Dependent:: Z8000 Dependent Features
@end ifset
-@ifset MIPS
-* MIPS-Dependent:: MIPS Dependent Features
-@end ifset
-@ifset I80386
-* i386-Dependent:: 80386 Dependent Features
+@ifset VAX
+* Vax-Dependent:: VAX Dependent Features
@end ifset
@end menu
@c in both conditional blocks.
-@ifset VAX
-@include c-vax.texi
-@end ifset
-
@ifset A29K
@include c-a29k.texi
@end ifset
@end ifclear
@end ifset
+
@ifset H8/300
@include c-h8300.texi
@end ifset
@include c-hppa.texi
@end ifset
-@ifset SH
-@include c-sh.texi
+@ifset I80386
+@include c-i386.texi
@end ifset
@ifset I960
@include c-m68k.texi
@end ifset
+@ifset MIPS
+@include c-mips.texi
+@end ifset
+
@ifset NS32K
@include c-ns32k.texi
@end ifset
-@ifset SPARC
-@include c-sparc.texi
+@ifset SH
+@include c-sh.texi
@end ifset
-@ifset I80386
-@include c-i386.texi
+@ifset SPARC
+@include c-sparc.texi
@end ifset
@ifset Z8000
@include c-z8k.texi
@end ifset
-@ifset MIPS
-@include c-mips.texi
+@ifset VAX
+@include c-vax.texi
@end ifset
@ifset GENERIC
Ian Lance Taylor of Cygnus Support merged the Motorola and MIT syntax for the
68k, completed support for some COFF targets (68k, i386 SVR3, and SCO Unix),
-added support for MIPS ECOFF and ELF targets, and made a few other minor
-patches.
+added support for MIPS ECOFF and ELF targets, wrote the initial RS/6000 and
+PowerPC assembler, and made a few other minor patches.
Steve Chamberlain made @code{@value{AS}} able to generate listings.
Software Foundation (i386 mainly), and Ken Raeburn of Cygnus Support (sparc,
and some initial 64-bit support).
+Richard Henderson rewrote the Alpha assembler.
+
Several engineers at Cygnus Support have also provided many small bug fixes and
configuration enhancements.
@itemx -m68360
Assemble for the CPU32 family of chips.
+@item -m5200
+Assemble for the ColdFire family of chips.
+
@item -m68881
@itemx -m68882
Assemble 68881 floating point instructions. This is the default for the
0, /* rfdBase: index into the file indirect table */
0, /* crfd: count file indirect entries */
langC, /* lang: language for this file */
- 0, /* fMerge: whether this file can be merged */
+ 1, /* fMerge: whether this file can be merged */
0, /* fReadin: true if read in (not just created) */
#ifdef TARGET_BYTES_BIG_ENDIAN
1, /* fBigendian: if 1, compiled on big endian machine */
} lineno_list_t;
static lineno_list_t *first_lineno;
+static lineno_list_t *last_lineno;
static lineno_list_t **last_lineno_ptr = &first_lineno;
/* Sometimes there will be some .loc statements before a .ent. We
l->proc = new_proc_ptr;
*last_lineno_ptr = noproc_lineno;
while (*last_lineno_ptr != NULL)
- last_lineno_ptr = &(*last_lineno_ptr)->next;
+ {
+ last_lineno = *last_lineno_ptr;
+ last_lineno_ptr = &last_lineno->next;
+ }
noproc_lineno = (lineno_list_t *) NULL;
}
}
first_ch = *file_name;
- /* ??? This is ifdefed out, because it results in incorrect line number
- debugging info when multiple .file pseudo-ops are merged into one file
- descriptor. See for instance ecoff_build_lineno, which will
- end up setting all file->fdr.* fields multiple times, resulting in
- incorrect debug info. In order to make this work right, all line number
- and symbol info for the same source file has to be adjacent in the object
- file, so that a single file descriptor can be used to point to them.
- This would require maintaining file specific lists of line numbers and
- symbols for each file, so that they can be merged together (or output
- together) when two .file pseudo-ops are merged into one file
- descriptor. */
+ /* FIXME: We can't safely merge files which have line number
+ information (fMerge will be zero in this case). Otherwise, we
+ get incorrect line number debugging info. See for instance
+ ecoff_build_lineno, which will end up setting all file->fdr.*
+ fields multiple times, resulting in incorrect debug info. In
+ order to make this work right, all line number and symbol info
+ for the same source file has to be adjacent in the object file,
+ so that a single file descriptor can be used to point to them.
+ This would require maintaining file specific lists of line
+ numbers and symbols for each file, so that they can be merged
+ together (or output together) when two .file pseudo-ops are
+ merged into one file descriptor. */
-#if 0
/* See if the file has already been created. */
for (fil_ptr = first_file;
fil_ptr != (efdr_t *) NULL;
fil_ptr = fil_ptr->next_file)
{
if (first_ch == fil_ptr->name[0]
- && strcmp (file_name, fil_ptr->name) == 0)
+ && strcmp (file_name, fil_ptr->name) == 0
+ && fil_ptr->fdr.fMerge)
{
cur_file_ptr = fil_ptr;
if (! fake)
break;
}
}
-#else
- fil_ptr = (efdr_t *) NULL;
-#endif
/* If this is a new file, create it. */
if (fil_ptr == (efdr_t *) NULL)
coff_type.num_sizes = i + 1;
for (i--; i >= 0; i--)
- coff_type.sizes[i] = (coff_type.sizes[i + 1]
- / coff_type.dimensions[i + 1]);
+ coff_type.sizes[i] = (coff_type.dimensions[i + 1] == 0
+ ? 0
+ : (coff_type.sizes[i + 1]
+ / coff_type.dimensions[i + 1]));
}
}
else if (coff_symbol_typ == st_Member
list->paddr = frag_now_fix ();
list->lineno = lineno;
+ /* We don't want to merge files which have line numbers. */
+ cur_file_ptr->fdr.fMerge = 0;
+
/* A .loc directive will sometimes appear before a .ent directive,
which means that cur_proc_ptr will be NULL here. Arrange to
patch this up. */
}
else
{
+ last_lineno = list;
*last_lineno_ptr = list;
last_lineno_ptr = &list->next;
}
}
+
+/* The MIPS assembler sometimes inserts nop instructions in the
+ instruction stream. When this happens, we must patch up the .loc
+ information so that it points to the instruction after the nop. */
+
+void
+ecoff_fix_loc (old_frag, old_frag_offset)
+ fragS *old_frag;
+ unsigned long old_frag_offset;
+{
+ if (last_lineno != NULL
+ && last_lineno->frag == old_frag
+ && last_lineno->paddr == old_frag_offset)
+ {
+ last_lineno->frag = frag_now;
+ last_lineno->paddr = frag_now_fix ();
+ }
+}
\f
/* Make sure the @stabs symbol is emitted. */
}
else
{
- char *name;
- char name_end;
expressionS exp;
sc = sc_Nil;
list->paddr = frag_now_fix ();
list->lineno = lineno;
+ /* We don't want to merge files which have line numbers. */
+ cur_file_ptr->fdr.fMerge = 0;
+
/* A .loc directive will sometimes appear before a .ent directive,
which means that cur_proc_ptr will be NULL here. Arrange to
patch this up. */
}
else
{
+ last_lineno = list;
*last_lineno_ptr = list;
last_lineno_ptr = &list->next;
}
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
- along with GAS; see the file COPYING. If not, write to
- the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+ along with GAS; see the file COPYING. If not, write to the Free
+ Software Foundation, 59 Temple Place - Suite 330, Boston, MA
+ 02111-1307, USA. */
/*
* This is really a branch office of as-read.c. I split it out to clearly
static void clean_up_expression PARAMS ((expressionS * expressionP));
extern const char EXP_CHARS[], FLT_CHARS[];
+
+/* We keep a mapping of expression symbols to file positions, so that
+ we can provide better error messages. */
+
+struct expr_symbol_line
+{
+ struct expr_symbol_line *next;
+ symbolS *sym;
+ char *file;
+ unsigned int line;
+};
+
+static struct expr_symbol_line *expr_symbol_lines;
\f
/* Build a dummy symbol to hold a complex expression. This is how we
build expressions up out of other expressions. The symbol is put
{
const char *fake;
symbolS *symbolP;
+ struct expr_symbol_line *n;
if (expressionP->X_op == O_symbol
&& expressionP->X_add_number == 0)
if (expressionP->X_op == O_constant)
resolve_symbol_value (symbolP);
+ n = (struct expr_symbol_line *) xmalloc (sizeof *n);
+ n->sym = symbolP;
+ as_where (&n->file, &n->line);
+ n->next = expr_symbol_lines;
+ expr_symbol_lines = n;
+
return symbolP;
}
+
+/* Return the file and line number for an expr symbol. Return
+ non-zero if something was found, 0 if no information is known for
+ the symbol. */
+
+int
+expr_symbol_where (sym, pfile, pline)
+ symbolS *sym;
+ char **pfile;
+ unsigned int *pline;
+{
+ register struct expr_symbol_line *l;
+
+ for (l = expr_symbol_lines; l != NULL; l = l->next)
+ {
+ if (l->sym == sym)
+ {
+ *pfile = l->file;
+ *pline = l->line;
+ return 1;
+ }
+ }
+
+ return 0;
+}
\f
/*
* Build any floating-point literal here.
name = --input_line_pointer;
c = get_symbol_end ();
+#ifdef md_parse_name
+ /* This is a hook for the backend to parse certain names
+ specially in certain contexts. If a name always has a
+ specific value, it can often be handled by simply
+ entering it in the symbol table. */
+ if (md_parse_name (name, expressionP))
+ {
+ *input_line_pointer = c;
+ break;
+ }
+#endif
+
#ifdef TC_I960
/* The MRI i960 assembler permits
lda sizeof code,g13
- */
+ FIXME: This should use md_parse_name. */
if (flag_mri
&& (strcasecmp (name, "sizeof") == 0
|| strcasecmp (name, "startof") == 0))
typedef char operator_rankT;
-char get_symbol_end PARAMS ((void));
-void expr_begin PARAMS ((void));
-segT expr PARAMS ((int rank, expressionS * resultP));
-unsigned int get_single_number PARAMS ((void));
-struct symbol *make_expr_symbol PARAMS ((expressionS * expressionP));
+extern char get_symbol_end PARAMS ((void));
+extern void expr_begin PARAMS ((void));
+extern segT expr PARAMS ((int rank, expressionS * resultP));
+extern unsigned int get_single_number PARAMS ((void));
+extern struct symbol *make_expr_symbol PARAMS ((expressionS * expressionP));
+extern int expr_symbol_where
+ PARAMS ((struct symbol *, char **, unsigned int *));
/* end of expr.h */
/* frags.c - manage frags -
-
- Copyright (C) 1987, 1990, 1991, 1992 Free Software Foundation, Inc.
+ Copyright (C) 1987, 90, 91, 92, 93, 94, 95, 1996
+ Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
{
fragS *former_last_fragP;
frchainS *frchP;
- long tmp;
assert (frchain_now->frch_last == frag_now);
assert (former_last_fragP == frag_now);
frag_now = frag_alloc (&frchP->frch_obstack);
+ as_where (&frag_now->fr_file, &frag_now->fr_line);
+
/* Generally, frag_now->points to an address rounded up to next
alignment. However, characters will add to obstack frags
IMMEDIATELY after the struct frag, even if they are not starting
/* default these to zero. */
frag_now->fr_pcrel_adjust = 0;
frag_now->fr_bsr = 0;
+ as_where (&frag_now->fr_file, &frag_now->fr_line);
frag_new (max_chars);
return (retval);
}
/* default these to zero. */
frag_now->fr_pcrel_adjust = 0;
frag_now->fr_bsr = 0;
+ as_where (&frag_now->fr_file, &frag_now->fr_line);
frag_new (max_chars);
return (retval);
} /* frag_variant() */
int idx;
sb *in;
{
- int al;
+ int al, have_fill, fill;
+
idx = exp_get_abs ("align needs absolute expression.\n", idx, in, &al);
+ idx = sb_skip_white (idx, in);
+ have_fill = 0;
+ fill = 0;
+ if (! eol (idx, in))
+ {
+ idx = sb_skip_comma (idx, in);
+ idx = exp_get_abs (".align needs absolute fill value.\n", idx, in,
+ &fill);
+ have_fill = 1;
+ }
if (al != 1
&& al != 2
&& al != 4)
WARNING ((stderr, "alignment must be one of 1, 2 or 4.\n"));
- fprintf (outfile, ".align %d\n", al);
+ fprintf (outfile, ".align %d", al);
+ if (have_fill)
+ fprintf (outfile, ",%d", fill);
+ fprintf (outfile, "\n");
}
/* .res[.b|.w|.l] <size> */
/* hash.c - hash table lookup strings -
- Copyright (C) 1987, 1990, 1991, 1992 Free Software Foundation, Inc.
+ Copyright (C) 1987, 90, 91, 92, 93, 94, 95, 1996
+ Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
*/
temp = handle->hash_stat[STAT_SIZE];
newwhere = ((struct hash_entry *)
- xmalloc ((unsigned long) ((temp << GROW_FACTOR + 1)
+ xmalloc ((unsigned long) ((temp << (GROW_FACTOR + 1))
/* +1 for wall slot */
* sizeof (struct hash_entry))));
if (newwhere == NULL)
used = h->hash_stat[STAT_USED];
pct = (used * 100 + sz / 2) / sz;
- fprintf (file, "%s hash statistics:\n\t%d/%d slots used (%d%%)\n",
+ fprintf (file, "%s hash statistics:\n\t%lu/%lu slots used (%lu%%)\n",
name, used, sz, pct);
#define P(name, off) \
/* messages.c - error reporter -
- Copyright (C) 1987, 1991, 1992, 1995 Free Software Foundation, Inc.
+ Copyright (C) 1987, 91, 92, 93, 94, 95, 1996 Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
- along with GAS; see the file COPYING. If not, write to
- the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+ along with GAS; see the file COPYING. If not, write to the Free
+ Software Foundation, 59 Temple Place - Suite 330, Boston, MA
+ 02111-1307, USA. */
#include "as.h"
+#include "libiberty.h"
#include <stdio.h>
#ifdef HAVE_ERRNO_H
{
if (sizeof (val) <= sizeof (long))
{
- fprintf (file, "%ld", val);
+ fprintf (file, "%ld", (long) val);
return;
}
#ifdef BFD_ASSEMBLER
{
if (sizeof (val) <= sizeof (long))
{
- sprintf (buf, "%ld", val);
+ sprintf (buf, "%ld", (long) val);
return;
}
#ifdef BFD_ASSEMBLER
# The following works for many configurations, though not all.
Set obj_format `echo {target_canonical} | sed -e 's/.*-.*-//'`
+Set target_os `echo {target_canonical} | sed -e 's/.*-.*-//'`
Set bfd_gas no
Set bfd_gas yes
Set em macos
-Else If "{target_canonical}" =~ /i386-unknown-go32/
+Else If "{target_canonical}" =~ /i386-\Option-x-go32/
Set obj_format "coff"
Set TDEFINES '-d I386COFF'
-Else If "{target_canonical}" =~ /m68k-unknown-coff/
+Else If "{target_canonical}" =~ /m68k-\Option-x-coff/
Set TDEFINES '-d M68KCOFF'
Else If "{target_canonical}" =~ /mips-idt-ecoff/
Set bfd_gas yes
Set TDEFINES '-d TARGET_BYTES_BIG_ENDIAN'
+Else If "{target_canonical}" =~ /mips-\Option-x-\Option-x/
+ # Assume other OSes etc use ELF
+ Set obj_format "elf"
+ Set bfd_gas yes
+ Set TDEFINES '-d TARGET_BYTES_BIG_ENDIAN'
+ forward-include "{srcroot}"bfd:elf-bfd.h 'bfd/elf-bfd.h'
-Else If "{target_canonical}" =~ /sh-hitachi-hms/
+Else If "{target_canonical}" =~ /sh-\Option-x-hms/
Set obj_format "coff"
forward-include "{srcroot}"opcodes:sh-opc.h 'opcodes/sh-opc.h'
End If
Echo -n '#define TARGET_CPU "' >> "{o}"conf.new
Echo -n "{target_cpu}" >> "{o}"conf.new
Echo '"' >> "{o}"conf.new
+Echo -n '#define TARGET_OS "' >> "{o}"conf.new
+Echo -n "{target_os}" >> "{o}"conf.new
+Echo '"' >> "{o}"conf.new
Echo -n '#define TARGET_ALIAS "' >> "{o}"conf.new
Echo -n "{target_alias}" >> "{o}"conf.new
Echo '"' >> "{o}"conf.new
#include "libiberty.h"
#include "obstack.h"
#include "listing.h"
+#include "ecoff.h"
#ifndef TC_START_LABEL
#define TC_START_LABEL(x,y) (x==':')
static int hex_float PARAMS ((int, char *));
static void do_org PARAMS ((segT, expressionS *, int));
char *demand_copy_string PARAMS ((int *lenP));
-int is_it_end_of_statement PARAMS ((void));
static segT get_segmented_expression PARAMS ((expressionS *expP));
static segT get_known_segmented_expression PARAMS ((expressionS * expP));
static void pobegin PARAMS ((void));
}
else if (temp_repeat <= 0)
{
- as_warn ("Repeat < 0, .fill ignored");
+ if (temp_repeat < 0)
+ as_warn ("Repeat < 0, .fill ignored");
temp_size = 0;
}
else
align = 0;
+#ifdef OBJ_EVAX
+ /* FIXME: This needs to be done in a more general fashion. */
+ align = 3;
+#endif
+
record_alignment(bss_seg, align);
}
else
{
/* Assume some objects may require alignment on some systems. */
-#ifdef TC_ALPHA
+#if defined (TC_ALPHA) && ! defined (VMS)
if (temp > 1)
{
align = ffs (temp) - 1;
return;
}
+#ifdef md_cons_align
+ md_cons_align (nbytes);
+#endif
+
c = 0;
do
{
use = get & unmask;
if ((get & mask) != 0 && (get & mask) != mask)
{ /* Leading bits contain both 0s & 1s. */
- as_warn ("Value 0x%lx truncated to 0x%lx.", get, use);
+ as_warn ("Value 0x%lx truncated to 0x%lx.",
+ (unsigned long) get, (unsigned long) use);
}
/* put bytes in right order. */
md_number_to_chars (p, use, (int) nbytes);
#ifdef TC_CONS_FIX_NEW
TC_CONS_FIX_NEW (frag_now, p - frag_now->fr_literal, nbytes, exp);
#else
- fix_new_exp (frag_now, p - frag_now->fr_literal, (int) nbytes, exp, 0,
- /* @@ Should look at CPU word size. */
- nbytes == 2 ? BFD_RELOC_16
- : nbytes == 8 ? BFD_RELOC_64
- : BFD_RELOC_32);
+ {
+ bfd_reloc_code_real_type r;
+
+ switch (nbytes)
+ {
+ case 1:
+ r = BFD_RELOC_8;
+ break;
+ case 2:
+ r = BFD_RELOC_16;
+ break;
+ case 4:
+ r = BFD_RELOC_32;
+ break;
+ case 8:
+ r = BFD_RELOC_64;
+ break;
+ default:
+ as_bad ("unsupported BFD relocation size %u", nbytes);
+ r = BFD_RELOC_32;
+ break;
+ }
+ fix_new_exp (frag_now, p - frag_now->fr_literal, (int) nbytes, exp,
+ 0, r);
+ }
#endif
#else
#ifdef TC_CONS_FIX_NEW
/* read.h - of read.c
-
- Copyright (C) 1986, 1990, 1992 Free Software Foundation, Inc.
+ Copyright (C) 1986, 90, 92, 93, 94, 95, 1996 Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
extern char lex_type[];
extern char is_end_of_line[];
+extern int is_it_end_of_statement PARAMS ((void));
+
extern int target_big_endian;
/* These are initialized by the CPU specific target files (tc-*.c). */
LINKONCE_SAME_CONTENTS
};
-unsigned int get_stab_string_offset PARAMS ((const char *string,
- const char *stabstr_secname));
-
-char *demand_copy_C_string PARAMS ((int *len_pointer));
-char get_absolute_expression_and_terminator PARAMS ((long *val_pointer));
-offsetT get_absolute_expression PARAMS ((void));
-unsigned int next_char_of_string PARAMS ((void));
-void s_mri_sect PARAMS ((char *));
-char *mri_comment_field PARAMS ((char *));
-void mri_comment_end PARAMS ((char *, int));
-void add_include_dir PARAMS ((char *path));
-void cons PARAMS ((int nbytes));
-void demand_empty_rest_of_line PARAMS ((void));
-void emit_expr PARAMS ((expressionS *exp, unsigned int nbytes));
-void equals PARAMS ((char *sym_name));
-void float_cons PARAMS ((int float_type));
-void ignore_rest_of_line PARAMS ((void));
-void pseudo_set PARAMS ((symbolS * symbolP));
-void read_a_source_file PARAMS ((char *name));
-void read_begin PARAMS ((void));
-void s_abort PARAMS ((int));
-void s_align_bytes PARAMS ((int arg));
-void s_align_ptwo PARAMS ((int));
-void s_app_file PARAMS ((int));
-void s_app_line PARAMS ((int));
-void s_comm PARAMS ((int));
-void s_data PARAMS ((int));
-void s_desc PARAMS ((int));
-void s_else PARAMS ((int arg));
-void s_end PARAMS ((int arg));
-void s_endif PARAMS ((int arg));
-void s_err PARAMS ((int));
-void s_fail PARAMS ((int));
-void s_fill PARAMS ((int));
-void s_float_space PARAMS ((int mult));
-void s_globl PARAMS ((int arg));
-void s_if PARAMS ((int arg));
-void s_ifc PARAMS ((int arg));
-void s_ifdef PARAMS ((int arg));
-void s_ifeqs PARAMS ((int arg));
-void s_ignore PARAMS ((int arg));
-void s_include PARAMS ((int arg));
-void s_irp PARAMS ((int arg));
-void s_lcomm PARAMS ((int needs_align));
-void s_linkonce PARAMS ((int));
-void s_lsym PARAMS ((int));
-void s_macro PARAMS ((int));
-void s_mexit PARAMS ((int));
-void s_mri PARAMS ((int));
-void s_mri_common PARAMS ((int));
-void s_org PARAMS ((int));
-void s_print PARAMS ((int));
-void s_purgem PARAMS ((int));
-void s_rept PARAMS ((int));
-void s_set PARAMS ((int));
-void s_space PARAMS ((int mult));
-void s_stab PARAMS ((int what));
-void s_struct PARAMS ((int));
-void s_text PARAMS ((int));
-void stringer PARAMS ((int append_zero));
-void s_xstab PARAMS ((int what));
-void s_rva PARAMS ((int));
-
-void read_print_statistics PARAMS ((FILE *));
+extern void pop_insert PARAMS ((const pseudo_typeS *));
+extern unsigned int get_stab_string_offset
+ PARAMS ((const char *string, const char *stabstr_secname));
+extern char *demand_copy_C_string PARAMS ((int *len_pointer));
+extern char get_absolute_expression_and_terminator
+ PARAMS ((long *val_pointer));
+extern offsetT get_absolute_expression PARAMS ((void));
+extern unsigned int next_char_of_string PARAMS ((void));
+extern void s_mri_sect PARAMS ((char *));
+extern char *mri_comment_field PARAMS ((char *));
+extern void mri_comment_end PARAMS ((char *, int));
+extern void add_include_dir PARAMS ((char *path));
+extern void cons PARAMS ((int nbytes));
+extern void demand_empty_rest_of_line PARAMS ((void));
+extern void emit_expr PARAMS ((expressionS *exp, unsigned int nbytes));
+extern void equals PARAMS ((char *sym_name));
+extern void float_cons PARAMS ((int float_type));
+extern void ignore_rest_of_line PARAMS ((void));
+extern void pseudo_set PARAMS ((symbolS * symbolP));
+extern void read_a_source_file PARAMS ((char *name));
+extern void read_begin PARAMS ((void));
+extern void s_abort PARAMS ((int));
+extern void s_align_bytes PARAMS ((int arg));
+extern void s_align_ptwo PARAMS ((int));
+extern void s_app_file PARAMS ((int));
+extern void s_app_line PARAMS ((int));
+extern void s_comm PARAMS ((int));
+extern void s_data PARAMS ((int));
+extern void s_desc PARAMS ((int));
+extern void s_else PARAMS ((int arg));
+extern void s_end PARAMS ((int arg));
+extern void s_endif PARAMS ((int arg));
+extern void s_err PARAMS ((int));
+extern void s_fail PARAMS ((int));
+extern void s_fill PARAMS ((int));
+extern void s_float_space PARAMS ((int mult));
+extern void s_globl PARAMS ((int arg));
+extern void s_if PARAMS ((int arg));
+extern void s_ifc PARAMS ((int arg));
+extern void s_ifdef PARAMS ((int arg));
+extern void s_ifeqs PARAMS ((int arg));
+extern void s_ignore PARAMS ((int arg));
+extern void s_include PARAMS ((int arg));
+extern void s_irp PARAMS ((int arg));
+extern void s_lcomm PARAMS ((int needs_align));
+extern void s_linkonce PARAMS ((int));
+extern void s_lsym PARAMS ((int));
+extern void s_macro PARAMS ((int));
+extern void s_mexit PARAMS ((int));
+extern void s_mri PARAMS ((int));
+extern void s_mri_common PARAMS ((int));
+extern void s_org PARAMS ((int));
+extern void s_print PARAMS ((int));
+extern void s_purgem PARAMS ((int));
+extern void s_rept PARAMS ((int));
+extern void s_set PARAMS ((int));
+extern void s_space PARAMS ((int mult));
+extern void s_stab PARAMS ((int what));
+extern void s_struct PARAMS ((int));
+extern void s_text PARAMS ((int));
+extern void stringer PARAMS ((int append_zero));
+extern void s_xstab PARAMS ((int what));
+extern void s_rva PARAMS ((int));
+extern void read_print_statistics PARAMS ((FILE *));
/* end of read.h */
/* Generic stabs parsing for gas.
- Copyright (C) 1989, 1990, 1991, 1993 Free Software Foundation, Inc.
+ Copyright (C) 1989, 90, 91, 93, 94, 95, 1996 Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
the GNU General Public License for more details.
-You should have received a copy of the GNU General Public
-License along with GAS; see the file COPYING. If not, write
-to the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+You should have received a copy of the GNU General Public License
+along with GAS; see the file COPYING. If not, write to the Free
+Software Foundation, 59 Temple Place - Suite 330, Boston, MA
+02111-1307, USA. */
#include "as.h"
#include "libiberty.h"
#include "obstack.h"
#include "subsegs.h"
+#include "ecoff.h"
/* We need this, despite the apparent object format dependency, since
it defines stab types, which all object formats can use now. */
/* subsegs.c - subsegments -
- Copyright (C) 1987, 1990, 1991, 1992, 1993, 1994
+ Copyright (C) 1987, 90, 91, 92, 93, 94, 95, 1996
Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
- along with GAS; see the file COPYING. If not, write to
- the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+ along with GAS; see the file COPYING. If not, write to the Free
+ Software Foundation, 59 Temple Place - Suite 330, Boston, MA
+ 02111-1307, USA. */
/*
* Segments & sub-segments.
segT seg;
subsegT subseg;
{
- long tmp; /* JF for obstack alignment hacking */
register frchainS *frcP; /* crawl frchain chain */
register frchainS **lastPP; /* address of last pointer */
frchainS *newP; /* address of new frchain */
- register fragS *former_last_fragP;
- register fragS *new_fragP;
mri_common_symbol = NULL;
if (! EMIT_SECTION_SYMBOLS
#ifdef BFD_ASSEMBLER
- && symbol_table_frozen
+ || symbol_table_frozen
#endif
)
/* Here we know it won't be going into the symbol table. */
/* subsegs.h -> subsegs.c
-
- Copyright (C) 1987, 1992, 1993, 1994 Free Software Foundation, Inc.
+ Copyright (C) 1987, 92, 93, 94, 95, 1996 Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
#endif /* ! BFD_ASSEMBLER */
+extern void subsegs_print_statistics PARAMS ((FILE *));
+
/* end of subsegs.h */
#ifdef DEBUG_SYMS
#define debug_verify_symchain verify_symbol_chain
#else
-#define debug_verify_symchain (void)
+#define debug_verify_symchain(root, last) ((void) 0)
#endif
struct obstack notes;
{
symbolP->sy_frag = frag_now;
#ifdef OBJ_VMS
- S_GET_OTHER(symbolP) = const_flag;
+ S_SET_OTHER(symbolP, const_flag);
#endif
S_SET_VALUE (symbolP, (valueT) frag_now_fix ());
S_SET_SEGMENT (symbolP, now_seg);
data. */
symbolP->sy_frag = frag_now;
#ifdef OBJ_VMS
- S_GET_OTHER(symbolP) = const_flag;
-#endif /* OBJ_VMS */
+ S_SET_OTHER(symbolP, const_flag);
+#endif
S_SET_VALUE (symbolP, (valueT) frag_now_fix ());
S_SET_SEGMENT (symbolP, now_seg); /* keep N_EXT bit */
}
symp->sy_resolving = 1;
- reduce:
+ /* Simplify addition or subtraction of a constant by folding the
+ constant into X_add_number. */
+ if (symp->sy_value.X_op == O_add
+ || symp->sy_value.X_op == O_subtract)
+ {
+ resolve_symbol_value (symp->sy_value.X_add_symbol);
+ resolve_symbol_value (symp->sy_value.X_op_symbol);
+ if (S_GET_SEGMENT (symp->sy_value.X_op_symbol) == absolute_section)
+ {
+ right = S_GET_VALUE (symp->sy_value.X_op_symbol);
+ if (symp->sy_value.X_op == O_add)
+ symp->sy_value.X_add_number += right;
+ else
+ symp->sy_value.X_add_number -= right;
+ symp->sy_value.X_op = O_symbol;
+ symp->sy_value.X_op_symbol = NULL;
+ }
+ else if ((S_GET_SEGMENT (symp->sy_value.X_add_symbol)
+ == absolute_section)
+ && symp->sy_value.X_op == O_add)
+ {
+ left = S_GET_VALUE (symp->sy_value.X_add_symbol);
+ symp->sy_value.X_add_symbol = symp->sy_value.X_op_symbol;
+ symp->sy_value.X_add_number += left;
+ symp->sy_value.X_op = O_symbol;
+ symp->sy_value.X_op_symbol = NULL;
+ }
+ }
+
switch (symp->sy_value.X_op)
{
case O_absent:
resolved = symp->sy_value.X_add_symbol->sy_resolved;
break;
- case O_add:
- resolve_symbol_value (symp->sy_value.X_add_symbol);
- resolve_symbol_value (symp->sy_value.X_op_symbol);
- seg_left = S_GET_SEGMENT (symp->sy_value.X_add_symbol);
- seg_right = S_GET_SEGMENT (symp->sy_value.X_op_symbol);
- /* This case comes up with PIC support. */
- {
- symbolS *s_left = symp->sy_value.X_add_symbol;
- symbolS *s_right = symp->sy_value.X_op_symbol;
-
- if (seg_left == absolute_section)
- {
- symbolS *t;
- segT ts;
- t = s_left;
- s_left = s_right;
- s_right = t;
- ts = seg_left;
- seg_left = seg_right;
- seg_right = ts;
- }
- if (seg_right == absolute_section
- && s_right->sy_resolved)
- {
- symp->sy_value.X_add_number += S_GET_VALUE (s_right);
- symp->sy_value.X_op_symbol = 0;
- symp->sy_value.X_add_symbol = s_left;
- symp->sy_value.X_op = O_symbol;
- goto reduce;
- }
- }
- /* fall through */
-
case O_multiply:
case O_divide:
case O_modulus:
case O_bit_or_not:
case O_bit_exclusive_or:
case O_bit_and:
+ case O_add:
case O_subtract:
case O_eq:
case O_ne:
resolve_symbol_value (symp->sy_value.X_op_symbol);
seg_left = S_GET_SEGMENT (symp->sy_value.X_add_symbol);
seg_right = S_GET_SEGMENT (symp->sy_value.X_op_symbol);
- if (seg_left != seg_right
- && seg_left != undefined_section
- && seg_right != undefined_section)
- as_bad ("%s is operation on symbols in different sections",
- S_GET_NAME (symp));
- if ((S_GET_SEGMENT (symp->sy_value.X_add_symbol)
- != absolute_section)
- && symp->sy_value.X_op != O_subtract)
- as_bad ("%s is illegal operation on non-absolute symbols",
- S_GET_NAME (symp));
left = S_GET_VALUE (symp->sy_value.X_add_symbol);
right = S_GET_VALUE (symp->sy_value.X_op_symbol);
+
+ /* Subtraction is permitted if both operands are in the same
+ section. Otherwise, both operands must be absolute. We
+ already handled the case of addition or subtraction of a
+ constant above. This will probably need to be changed
+ for an object file format which supports arbitrary
+ expressions, such as IEEE-695. */
+ if ((seg_left != absolute_section
+ || seg_right != absolute_section)
+ && (symp->sy_value.X_op != O_subtract
+ || seg_left != seg_right))
+ {
+ char *file;
+ unsigned int line;
+
+ if (expr_symbol_where (symp, &file, &line))
+ as_bad_where (file, line, "invalid section for operation");
+ else
+ as_bad ("invalid section for operation setting %s",
+ S_GET_NAME (symp));
+ }
+
switch (symp->sy_value.X_op)
{
case O_multiply: val = left * right; break;
symbolS *s;
{
if ((s->bsym->flags & BSF_WEAK) != 0)
- as_warn ("%s already declared as weak", S_GET_NAME (s));
+ {
+ /* Let .weak override .global. */
+ return;
+ }
s->bsym->flags |= BSF_GLOBAL;
s->bsym->flags &= ~(BSF_LOCAL|BSF_WEAK);
}
symbolS *s;
{
if ((s->bsym->flags & BSF_WEAK) != 0)
- as_warn ("%s already declared as weak", S_GET_NAME (s));
+ {
+ /* Let .weak override. */
+ return;
+ }
s->bsym->flags |= BSF_LOCAL;
s->bsym->flags &= ~(BSF_GLOBAL|BSF_WEAK);
}
S_SET_WEAK (s)
symbolS *s;
{
- if ((s->bsym->flags & BSF_GLOBAL) != 0)
- as_warn ("%s already declared as global", S_GET_NAME (s));
s->bsym->flags |= BSF_WEAK;
s->bsym->flags &= ~(BSF_GLOBAL|BSF_LOCAL);
}
+Thu Aug 29 11:32:23 1996 James G. Smith <jsmith@cygnus.co.uk>
+
+ * gas/arm/arm7t.d: Explicitly force little-endian assembly.
+
+Fri Aug 16 00:19:10 1996 Jeffrey A Law (law@cygnus.com)
+
+ * gas/hppa/basic/purge.s: Use "%sr4" on pitlb, pitlbe
+ fic and fice instructions to test 3bit space identifiers.
+ * gas/hppa/basic/system.s: Similarly for iitlba and
+ iitlbp.
+ * gas/hppa/basic/basic.exp: Corresponding changes.
+
+Thu Aug 15 16:25:05 1996 James G. Smith <jsmith@cygnus.co.uk>
+
+ * gas/arm/arm.exp: Change inst.s test to check objdump.
+ * gas/arm/inst.d: Added.
+
+Thu Aug 15 16:06:02 1996 James G. Smith <jsmith@cygnus.co.uk>
+
+ * gas/arm/thumb.s: Added.
+ * gas/arm/immed.s: Added.
+ * gas/arm/arch4t.s: Added.
+ * gas/arm/arm.exp: Updated to run the new tests.
+
+Tue Aug 6 11:06:29 1996 Jeffrey A Law (law@cygnus.com)
+
+ * gas/h8300/misch.s: Reenable "eepmov.w" test.
+ * gas/h8300/miscs.s: Likewise.
+ * gas/h8300/h8300.exp: Check for correct assembly of "eepmov.w"
+ on the H8/300H and H8/S. Don't expect it to fail.
+
+Wed Jul 31 10:57:44 1996 Doug Evans <dje@canuck.cygnus.com>
+
+ * gas/sparc/asi.s: Update ASI_AS_IF_USER_{PRIMARY,SECONDARY}_LITTLE.
+
+Wed Jul 31 15:55:12 1996 James G. Smith <jsmith@cygnus.co.uk>
+
+ * gas/arm/arm7t.s: Added.
+ * gas/arm/arm7t.d: Added.
+ * gas/arm/arm.exp: Updated to run the new test.
+
+Mon Jul 8 14:27:39 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * gas/m68k/pcrel.d: Rename from schwab.d.
+ * gas/m68k/pcrel.s: Rename from schwab.s.
+
+Mon Jul 8 14:23:26 1996 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
+
+ * gas/m68k/schwab.d: Correct for ELF format.
+ * gas/m68k/all.exp: Run "schwab" test for all targets.
+
+Thu Jul 4 14:23:36 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ Avoid DOS file naming problems:
+ * gas/h8300/branch.s: Rename from branches.s.
+ * gas/h8300/branchh.s: Rename from branchesh.s.
+ * gas/h8300/branchs.s: Rename from branchess.s.
+ * gas/h8300/rotsh.s: Rename from rotshift.s.
+ * gas/h8300/rotshh.s: Rename from rotshifth.s.
+ * gas/h8300/rotshs.s: Rename from rotshifts.s.
+ * gas/h8300/h8300.exp: Corresponding changes.
+
+Thu Jul 4 14:01:46 1996 James G. Smith <jsmith@cygnus.co.uk>
+
+ * gas/mips/mips.exp: Add new tests for processors with interlocks
+ on div and mul.
+ * gas/mips/div-ilocks.d: Added.
+ * gas/mips/mul-ilocks.d: Added.
+
+Wed Jul 3 14:20:04 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * gas/all/gas.exp: Remove setup_xfail for h8300*-*-* for two tests
+ which now pass.
+ * gas/h8300/h8300.exp: Fix regexp of mov32bug test to work on a 64
+ bit host.
+
+Sat Jun 29 18:21:51 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * gas/all/gas.exp: Add setup_xfail for vax*-*-vms* for 930509a
+ test.
+ * gas/vax/quad.exp: Expect a nop after the movq.
+
+Tue Jun 18 12:39:49 1996 Jeffrey A. Law <law@rtl.cygnus.com>
+
+ * gas/h8300/cbranchh.s: Switch into h8300h mode.
+ * gas/h8300/h8300.exp (H8/300H misc tests): Fix test names.
+
+ * gas/h8300/{addsubs.s,bitops1s.s,bitops2s.s}: New tests for the
+ H8/S.
+ * gas/h8300/{bitops3.s,bitops4.s,cbranchs.s,logicals.s}: Likewise.
+ * gas/h8300/{branchess.s,compares.s,macs.s,decimals.s}: Likewise.
+ * gas/h8300/{incdecs.s,divmuls.s,miscs.s,multiples.s}: Likewise.
+ * gas/h8300/{movbs.s,movws.s,movls.s,pushpops.s}: Likewise.
+ * gas/h8300/{rotshifts.s,extends.s}: Likewise.
+ * gas/h8300/h8300.exp: Run them.
+
+Mon Jun 10 14:14:40 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * gas/all/cofftag.s, gas/all/cofftag.d: New test for COFF enum tag
+ with the same name as a global variable.
+ * gas/all/gas.exp: Run cofftag test for any COFF target.
+
Thu Jun 6 12:30:05 1996 Ian Lance Taylor <ian@cygnus.com>
* gas/m68k/all.exp: Pass -m68020 when assembling the disperr.s
* gasp/gasp.exp: Run them. Also, clean up the test names used in
pass and fail.
-start-sanitize-sh3e
Sun Aug 13 00:39:24 1995 Jeff Law (law@snake.cs.utah.edu)
* gas/sh/basic.exp: Update now that we know the right
bit patters for the new sts instructions.
-end-sanitize-sh3e
Thu Aug 10 00:46:21 1995 Ian Lance Taylor <ian@cygnus.com>
* gas/mri/char.d: Fix for little endian machines.
* gas/m68k/all.exp: Run new tests. Run schwab test for
m68k-*-coff*.
-start-sanitize-sh3e
Mon Aug 7 03:01:32 1995 Jeff Law (law@snake.cs.utah.edu)
* gas/sh/*: New tests for the hitachi-sh.
-end-sanitize-sh3e
Tue Aug 1 18:02:47 1995 Ian Lance Taylor <ian@cygnus.com>
* gas/mri/*: New tests for MRI mode.
# This test is meaningless for the PA; the difference of two undefined
# symbols is something that is (and must be) supported on the PA.
if ![istarget hppa*-*-*] then {
- # the h8300 fails because we skip all the logic in fixup_segment
- setup_xfail "h8300*-*-*"
gas_test_error "diff1.s" "" "difference of two undefined symbols"
}
# This test is meaningless for the PA; the difference of two symbols
# must not be resolved by the assembler.
if ![istarget hppa*-*-*] then {
- # the h8300 fails because we skip all the logic in fixup_segment
- setup_xfail "h8300*-*-*"
+ # the vax fails because VMS can apparently actually handle this
+ # case in relocs, so gas doesn't handle it itself.
+ setup_xfail "vax*-*-vms*"
do_930509a
}
run_dump_test struct
}
+# This test is for any COFF target.
+if { [istarget *-*-coff*] \
+ || [istarget *-*-pe*] \
+ || [istarget a29k-*-udi*] \
+ || [istarget a29k-*-ebmon*] \
+ || [istarget a29k-*-sym*] \
+ || [istarget a29k-*-vxworks*] \
+ || [istarget i*86-*-aix*] \
+ || [istarget i*86-*-sco*] \
+ || [istarget i*86-*-isc*] \
+ || [istarget i*86-*-go32*] \
+ || [istarget i*86-*-cygwin*] \
+ || [istarget i*86-*-*nt] \
+ || ([istarget i960-*-vxworks5.*] && ![istarget i960-*-vxworks5.0*]) } {
+ run_dump_test cofftag
+}
+
# FIXME: this is here cause of a bug in DejaGnu 1.1.1. When it is no longer
# in use, then this can be removed.
if [info exists errorInfo] then {
if [expr $x == 15] then { pass $testname } else { fail $testname }
}
-proc do_h8300_branches {} {
- set testname "branches.s: h8300 branch tests"
+proc do_h8300_branch {} {
+ set testname "branch.s: h8300 branch tests"
set x 0
- gas_start "branches.s" "-al"
+ gas_start "branch.s" "-al"
# Check each instruction bit pattern to verify it got
# assembled correctly.
}
proc do_h8300_rotate_shift {} {
- set testname "rotshift.s: h8300 rotate and shift tests"
+ set testname "rotsh.s: h8300 rotate and shift tests"
set x 0
- gas_start "rotshift.s" "-al"
+ gas_start "rotsh.s" "-al"
# Check each instruction bit pattern to verify it got
# assembled correctly.
if [expr $x == 15] then { pass $testname } else { fail $testname }
}
-proc do_h8300h_branches {} {
- set testname "branchesh.s: h8300h branch tests"
+proc do_h8300h_branch {} {
+ set testname "branchh.s: h8300h branch tests"
set x 0
- gas_start "branchesh.s" "-al"
+ gas_start "branchh.s" "-al"
# Check each instruction bit pattern to verify it got
# assembled correctly.
while 1 {
expect {
-re " +\[0-9\]+ 0000 7B5C598F\[^\n\]*\n" { set x [expr $x+1] }
- -re " +\[0-9\]+ 0004 0700\[^\n\]*\n" { set x [expr $x+1] }
- -re " +\[0-9\]+ 0006 0308\[^\n\]*\n" { set x [expr $x+1] }
- -re " +\[0-9\]+ 0008 01406900\[^\n\]*\n" { set x [expr $x+1] }
- -re " +\[0-9\]+ 000c 01406F00\[^\n\]*\n +\[0-9\]+ +0010\[^\n\]*\n" { set x [expr $x+1] }
- -re " +\[0-9\]+ 0012 01407800\[^\n\]*\n +\[0-9\]+ +6B200000\[^\n\]*\n +\[0-9\]+ +0020\[^\n\]*\n" { set x [expr $x+1] }
- -re " +\[0-9\]+ 001c 01406D00\[^\n\]*\n" { set x [expr $x+1] }
- -re " +\[0-9\]+ 0020 01406B00\[^\n\]*\n +\[0-9\]+ +0000\[^\n\]*\n" { set x [expr $x+1] }
- -re " +\[0-9\]+ 0026 01406B20\[^\n\]*\n +\[0-9\]+ +00000000\[^\n\]*\n" { set x [expr $x+1] }
- -re " +\[0-9\]+ 002e 0000\[^\n\]*\n" { set x [expr $x+1] }
- -re " +\[0-9\]+ 0030 5670\[^\n\]*\n" { set x [expr $x+1] }
- -re " +\[0-9\]+ 0032 5470\[^\n\]*\n" { set x [expr $x+1] }
- -re " +\[0-9\]+ 0034 0180\[^\n\]*\n" { set x [expr $x+1] }
- -re " +\[0-9\]+ 0036 0208\[^\n\]*\n" { set x [expr $x+1] }
- -re " +\[0-9\]+ 0038 01406980\[^\n\]*\n" { set x [expr $x+1] }
- -re " +\[0-9\]+ 003c 01406F80\[^\n\]*\n +\[0-9\]+ +0010\[^\n\]*\n" { set x [expr $x+1] }
- -re " +\[0-9\]+ 0042 01407800\[^\n\]*\n +\[0-9\]+ +6BA00000\[^\n\]*\n +\[0-9\]+ +0020\[^\n\]*\n" { set x [expr $x+1] }
- -re " +\[0-9\]+ 004c 01406D80\[^\n\]*\n" { set x [expr $x+1] }
- -re " +\[0-9\]+ 0050 01406B80\[^\n\]*\n +\[0-9\]+ +0000\[^\n\]*\n" { set x [expr $x+1] }
- -re " +\[0-9\]+ 0056 01406BA0\[^\n\]*\n +\[0-9\]+ +00000000\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0004 7BD4598F\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0008 0700\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 000a 0308\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 000c 01406900\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0010 01406F00\[^\n\]*\n +\[0-9\]+ +0010\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0016 01407800\[^\n\]*\n +\[0-9\]+ +6B200000\[^\n\]*\n +\[0-9\]+ +0020\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0020 01406D00\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0024 01406B00\[^\n\]*\n +\[0-9\]+ +0000\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 002a 01406B20\[^\n\]*\n +\[0-9\]+ +00000000\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0032 0000\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0034 5670\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0036 5470\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0038 0180\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 003a 0208\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 003c 01406980\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0040 01406F80\[^\n\]*\n +\[0-9\]+ +0010\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0046 01407800\[^\n\]*\n +\[0-9\]+ +6BA00000\[^\n\]*\n +\[0-9\]+ +0020\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0050 01406D80\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0054 01406B80\[^\n\]*\n +\[0-9\]+ +0000\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 005a 01406BA0\[^\n\]*\n +\[0-9\]+ +00000000\[^\n\]*\n" { set x [expr $x+1] }
+ eof { break }
+ }
+ }
+
+ # This was intended to do any cleanup necessary. It kinda looks like it
+ # isn't needed, but just in case, please keep it in for now.
+ gas_finish
+
+ # Did we find what we were looking for? If not, flunk it.
+ if [expr $x == 21] then { pass $testname } else { fail $testname }
+
+ setup_xfail "h8300*-*-*"
+ fail "h8300h movfpe/movtpe tests"
+}
+
+proc do_h8300h_movb {} {
+ set testname "movbh.s: h8300h movb tests"
+ set x 0
+
+ gas_start "movbh.s" "-al"
+
+ # Check each instruction bit pattern to verify it got
+ # assembled correctly.
+ while 1 {
+ expect {
+ -re " +\[0-9\]+ 0000 0C89\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0002 F810\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0004 6818\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0006 6E180010\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 000a 78106A28\[^\n\]*\n +\[0-9\]+ +00000020\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0012 6C18\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0014 2810\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0016 6A080000\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 001a 6A280000\[^\n\]*\n +\[0-9\]+ +0000\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0020 6898\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0022 6E980010\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0026 78106AA8\[^\n\]*\n +\[0-9\]+ +00000020\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 002e 6C98\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0030 3810\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0032 6A880000\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0036 6AA80000\[^\n\]*\n +\[0-9\]+ +0000\[^\n\]*\n" { set x [expr $x+1] }
+ eof { break }
+ }
+ }
+
+ # This was intended to do any cleanup necessary. It kinda looks like it
+ # isn't needed, but just in case, please keep it in for now.
+ gas_finish
+
+ # Did we find what we were looking for? If not, flunk it.
+ if [expr $x == 16] then { pass $testname } else { fail $testname }
+}
+
+proc do_h8300h_movw {} {
+ set testname "movwh.s: h8300h movw tests"
+ set x 0
+
+ gas_start "movwh.s" "-al"
+
+ # Check each instruction bit pattern to verify it got
+ # assembled correctly.
+ while 1 {
+ expect {
+ -re " +\[0-9\]+ 0000 0D01\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0002 79000010\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0006 6910\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0008 6F100010\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 000c 78106B20\[^\n\]*\n +\[0-9\]+ +00000020\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0014 6D10\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0016 6B000000\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 001a 6B200000\[^\n\]*\n +\[0-9\]+ +0000\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0020 6990\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0022 6F900010\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0026 78106BA0\[^\n\]*\n +\[0-9\]+ +00000020\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 002e 6D90\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0030 6B800000\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0034 6BA00000\[^\n\]*\n +\[0-9\]+ +0000\[^\n\]*\n" { set x [expr $x+1] }
+ eof { break }
+ }
+ }
+
+ # This was intended to do any cleanup necessary. It kinda looks like it
+ # isn't needed, but just in case, please keep it in for now.
+ gas_finish
+
+ # Did we find what we were looking for? If not, flunk it.
+ if [expr $x == 14] then { pass $testname } else { fail $testname }
+}
+
+proc do_h8300h_movl {} {
+ set testname "movlh.s: h8300h movl tests"
+ set x 0
+
+ gas_start "movlh.s" "-al"
+
+ # Check each instruction bit pattern to verify it got
+ # assembled correctly.
+ while 1 {
+ expect {
+ -re " +\[0-9\]+ 0000 0F81\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0002 7A000000\[^\n\]*\n +\[0-9\]+ +0040\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0008 01006910\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 000c 01006F10\[^\n\]*\n +\[0-9\]+ +0010\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0012 01007810\[^\n\]*\n +\[0-9\]+ +6B200000\[^\n\]*\n +\[0-9\]+ +0020\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 001c 01006D10\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0020 01006B00\[^\n\]*\n +\[0-9\]+ +0000\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0026 01006B20\[^\n\]*\n +\[0-9\]+ +00000000\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 002e 01006990\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0032 01006F90\[^\n\]*\n +\[0-9\]+ +0010\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0038 01007890\[^\n\]*\n +\[0-9\]+ +6BA00000\[^\n\]*\n +\[0-9\]+ +0020\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0042 01006D90\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0046 01006B80\[^\n\]*\n +\[0-9\]+ +0000\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 004c 01006BA0\[^\n\]*\n +\[0-9\]+ +00000000\[^\n\]*\n" { set x [expr $x+1] }
+ eof { break }
+ }
+ }
+
+ # This was intended to do any cleanup necessary. It kinda looks like it
+ # isn't needed, but just in case, please keep it in for now.
+ gas_finish
+
+ # Did we find what we were looking for? If not, flunk it.
+ if [expr $x == 14] then { pass $testname } else { fail $testname }
+}
+
+proc do_h8300h_pushpop {} {
+ set testname "pushpoph.s: h8300h pushpop tests"
+ set x 0
+
+ gas_start "pushpoph.s" "-al"
+
+ # Check each instruction bit pattern to verify it got
+ # assembled correctly.
+ while 1 {
+ expect {
+ -re " +\[0-9\]+ 0000 6D70\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0002 01006D70\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0006 6DF0\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0008 01006DF0\[^\n\]*\n" { set x [expr $x+1] }
+ eof { break }
+ }
+ }
+
+ # This was intended to do any cleanup necessary. It kinda looks like it
+ # isn't needed, but just in case, please keep it in for now.
+ gas_finish
+
+ # Did we find what we were looking for? If not, flunk it.
+ if [expr $x == 4] then { pass $testname } else { fail $testname }
+}
+
+proc do_h8300h_rotate_shift {} {
+ set testname "rotshh.s: h8300h rotate and shift tests"
+ set x 0
+
+ gas_start "rotshh.s" "-al"
+
+ # Check each instruction bit pattern to verify it got
+ # assembled correctly.
+ while 1 {
+ expect {
+ -re " +\[0-9\]+ 0000 1288\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0002 1290\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0004 12B0\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0006 1388\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0008 1390\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 000a 13B0\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 000c 1208\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 000e 1210\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0010 1230\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0012 1308\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0014 1310\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0016 1330\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0018 1088\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 001a 1090\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 001c 10B0\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 001e 1188\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0020 1190\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0022 11B0\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0024 1008\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0026 1010\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0028 1030\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 002a 1108\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 002c 1110\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 002e 1130\[^\n\]*\n" { set x [expr $x+1] }
+ eof { break }
+ }
+ }
+
+ # This was intended to do any cleanup necessary. It kinda looks like it
+ # isn't needed, but just in case, please keep it in for now.
+ gas_finish
+
+ # Did we find what we were looking for? If not, flunk it.
+ if [expr $x == 24] then { pass $testname } else { fail $testname }
+}
+
+proc do_h8300h_extend {} {
+ set testname "extendh.s: h8300h extend tests"
+ set x 0
+
+ gas_start "extendh.s" "-al"
+
+ # Check each instruction bit pattern to verify it got
+ # assembled correctly.
+ while 1 {
+ expect {
+ -re " +\[0-9\]+ 0000 17D0\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0002 17F0\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0004 1750\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0006 1770\[^\n\]*\n" { set x [expr $x+1] }
+ eof { break }
+ }
+ }
+
+ # This was intended to do any cleanup necessary. It kinda looks like it
+ # isn't needed, but just in case, please keep it in for now.
+ gas_finish
+
+ # Did we find what we were looking for? If not, flunk it.
+ if [expr $x == 4] then { pass $testname } else { fail $testname }
+}
+
+proc do_h8300s_add_sub {} {
+ set testname "addsubs.s: h8300s add/sub tests"
+ set x 0
+
+ gas_start "addsubs.s" "-al"
+
+ # Check each instruction bit pattern to verify it got
+ # assembled correctly.
+ while 1 {
+ expect {
+ -re " +\[0-9\]+ 0000 8910\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0002 0819\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0004 79110020\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0008 0912\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 000a 7A110000\[^\n\]*\n +\[0-9\]+ +0040\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0010 0A92\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0012 0B04\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0014 0B85\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0016 0B96\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0018 0E89\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 001a 9210\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 001c 1889\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 001e 79310010\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0022 1901\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0024 7A310000\[^\n\]*\n +\[0-9\]+ +0040\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 002a 1A92\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 002c 1B04\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 002e 1B85\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0030 1B96\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0032 1E89\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0034 B210\[^\n\]*\n" { set x [expr $x+1] }
+ timeout { perror "timeout\n; break }
+ eof { break }
+ }
+ }
+
+ # This was intended to do any cleanup necessary. It kinda looks like it
+ # isn't needed, but just in case, please keep it in for now.
+ gas_finish
+
+ # Did we find what we were looking for? If not, flunk it.
+ if [expr $x == 21] then { pass $testname } else { fail $testname }
+}
+
+proc do_h8300s_logical {} {
+ set testname "logicals.s: h8300s logical tests"
+ set x 0
+
+ gas_start "logicals.s" "-al"
+
+ # Check each instruction bit pattern to verify it got
+ # assembled correctly.
+ while 1 {
+ expect {
+ -re " +\[0-9\]+ 0000 E910\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0002 1691\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0004 79610020\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0008 6611\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 000a 7A610000\[^\n\]*\n +\[0-9\]+ +0040\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0010 01F06611\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0014 0610\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0016 01410610\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 001a C810\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 001c 1498\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 001e 79410020\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0022 6411\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0024 7A410000\[^\n\]*\n +\[0-9\]+ +0040\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 002a 01F06411\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 002e 0410\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0030 01410410\[^\n\]*\n" { set x [expr $x+1] }
+
+ -re " +\[0-9\]+ 0034 D810\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0036 1589\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0038 79510020\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 003c 6511\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 003e 7A510000\[^\n\]*\n +\[0-9\]+ +0040\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0044 01F06511\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0048 0510\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 004a 01410510\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 004e 1788\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0050 1790\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0052 17B0\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0054 1708\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0056 1710\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0058 1730\[^\n\]*\n" { set x [expr $x+1] }
+ timeout { perror "timeout\n; break }
+ eof { break }
+ }
+ }
+
+ # This was intended to do any cleanup necessary. It kinda looks like it
+ # isn't needed, but just in case, please keep it in for now.
+ gas_finish
+
+ # Did we find what we were looking for? If not, flunk it.
+ if [expr $x == 30] then { pass $testname } else { fail $testname }
+}
+
+proc do_h8300s_cbranch {} {
+ set testname "cbranchs.s: h8300s conditional branch tests"
+ set x 0
+
+ gas_start "cbranchs.s" "-al"
+
+ # Check each instruction bit pattern to verify it got
+ # assembled correctly.
+ while 1 {
+ expect {
+ -re " +\[0-9\]+ 0000 4000\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0002 4000\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0004 4100\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0006 4100\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0008 4200\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 000a 4300\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 000c 4400\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 000e 4400\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0010 4500\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0012 4500\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0014 4600\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0016 4700\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0018 4800\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 001a 4900\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 001c 4A00\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 001e 4B00\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0020 4C00\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0022 4D00\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0024 4E00\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0026 4F00\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0028 58000000\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 002c 58000000\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0030 58100000\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0034 58100000\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0038 58200000\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 003c 58300000\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0040 58400000\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0044 58400000\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0048 58500000\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 004c 58500000\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0050 58600000\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0054 58700000\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0058 58800000\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 005c 58900000\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0060 58A00000\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0064 58B00000\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0068 58C00000\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 006c 58D00000\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0070 58E00000\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0074 58F00000\[^\n\]*\n" { set x [expr $x+1] }
+ timeout { perror "timeout\n; break }
+ eof { break }
+ }
+ }
+
+ # This was intended to do any cleanup necessary. It kinda looks like it
+ # isn't needed, but just in case, please keep it in for now.
+ gas_finish
+
+ # Did we find what we were looking for? If not, flunk it.
+ if [expr $x == 40] then { pass $testname } else { fail $testname }
+}
+proc do_h8300s_bitops1 {} {
+ set testname "bitops1s.s: h8300s bitops tests #1"
+ set x 0
+
+ gas_start "bitops1s.s" "-al"
+
+ # Check each instruction bit pattern to verify it got
+ # assembled correctly.
+ while 1 {
+ expect {
+ -re " +\[0-9\]+ 0000 7608\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0002 7C007600\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0006 7E407600\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 000a 6A100080\[^\n\]*\n +\[0-9\]+ +7600" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0010 6A300001\[^\n\]*\n +\[0-9\]+ +00007600" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0018 7208\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 001a 7D007200\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 001e 7F407200\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0022 6A180080\[^\n\]*\n +\[0-9\]+ +7200" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0028 6A380001\[^\n\]*\n +\[0-9\]+ +00007200" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0030 6298\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0032 7D006290\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0036 7F406290\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 003a 6A180080\[^\n\]*\n +\[0-9\]+ +6290" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0040 6A380001\[^\n\]*\n +\[0-9\]+ +00006290" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0048 7688\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 004a 7C007680\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 004e 7E407680\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0052 6A100080\[^\n\]*\n +\[0-9\]+ +7680" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0058 6A300001\[^\n\]*\n +\[0-9\]+ +00007680" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0060 7788\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0062 7C007780\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0066 7E407780\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 006a 6A100080\[^\n\]*\n +\[0-9\]+ +7780" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0070 6A300001\[^\n\]*\n +\[0-9\]+ +00007780" { set x [expr $x+1] }
+ timeout { perror "timeout\n; break }
+ eof { break }
+ }
+ }
+
+ # This was intended to do any cleanup necessary. It kinda looks like it
+ # isn't needed, but just in case, please keep it in for now.
+ gas_finish
+
+ # Did we find what we were looking for? If not, flunk it.
+ if [expr $x == 25] then { pass $testname } else { fail $testname }
+}
+
+proc do_h8300s_bitops2 {} {
+ set testname "bitops2s.s: h8300s bitops tests #2"
+ set x 0
+
+ gas_start "bitops2s.s" "-al"
+
+ # Check each instruction bit pattern to verify it got
+ # assembled correctly.
+ while 1 {
+ expect {
+ -re " +\[0-9\]+ 0000 7488\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0002 7C007480\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0006 7E407480\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 000a 6A100080\[^\n\]*\n +\[0-9\]+ +7480" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0010 6A300001\[^\n\]*\n +\[0-9\]+ +00007480" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0018 6788\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 001a 7D006780\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 001e 7F406780\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0022 6A180080\[^\n\]*\n +\[0-9\]+ +6780" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0028 6A380001\[^\n\]*\n +\[0-9\]+ +00006780" { set x [expr $x+1] }
+
+ -re " +\[0-9\]+ 0030 7588\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0032 7C007580\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0036 7E407580\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 003a 6A100080\[^\n\]*\n +\[0-9\]+ +7580" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0040 6A300001\[^\n\]*\n +\[0-9\]+ +00007580" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0048 7708\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 004a 7C007700\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 004e 7E407700\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0052 6A100080\[^\n\]*\n +\[0-9\]+ +7700" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0058 6A300001\[^\n\]*\n +\[0-9\]+ +00007700" { set x [expr $x+1] }
+ timeout { perror "timeout\n; break }
+ eof { break }
+ }
+ }
+
+ # This was intended to do any cleanup necessary. It kinda looks like it
+ # isn't needed, but just in case, please keep it in for now.
+ gas_finish
+
+ # Did we find what we were looking for? If not, flunk it.
+ if [expr $x == 20] then { pass $testname } else { fail $testname }
+}
+
+proc do_h8300s_bitops3 {} {
+ set testname "bitops3s.s: h8300s bitops tests #3"
+ set x 0
+
+ gas_start "bitops3s.s" "-al"
+
+ # Check each instruction bit pattern to verify it got
+ # assembled correctly.
+ while 1 {
+ expect {
+ -re " +\[0-9\]+ 0000 7108\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0002 7D007100\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0006 7F407100\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 000a 6A180080\[^\n\]*\n +\[0-9\]+ +7100" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0010 6A380001\[^\n\]*\n +\[0-9\]+ +00007100" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0018 6198\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 001a 7D006190\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 001e 7F406190\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0022 6A180080\[^\n\]*\n +\[0-9\]+ +6190" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0028 6A380001\[^\n\]*\n +\[0-9\]+ +00006190" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0030 7008\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0032 7D007000\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0036 7F407000\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 003a 6A180080\[^\n\]*\n +\[0-9\]+ +7000" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0040 6A380001\[^\n\]*\n +\[0-9\]+ +00007000" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0048 6098\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 004a 7D006090\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 004e 7F406090\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0052 6A180080\[^\n\]*\n +\[0-9\]+ +6090" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0058 6A380001\[^\n\]*\n +\[0-9\]+ +00006090" { set x [expr $x+1] }
+ timeout { perror "timeout\n; break }
eof { break }
}
}
# Did we find what we were looking for? If not, flunk it.
if [expr $x == 20] then { pass $testname } else { fail $testname }
+}
- setup_xfail "h8300*-*-*"
- fail "h8300 movfpe/movtpe tests"
+proc do_h8300s_bitops4 {} {
+ set testname "bitops4s.s: h8300s bitops tests #4"
+ set x 0
+
+ gas_start "bitops4s.s" "-al"
+
+ # Check each instruction bit pattern to verify it got
+ # assembled correctly.
+ while 1 {
+ expect {
+ -re " +\[0-9\]+ 0000 7408\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0002 7C007400\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0006 7E407400\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 000a 6A100080\[^\n\]*\n +\[0-9\]+ +7400" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0010 6A300001\[^\n\]*\n +\[0-9\]+ +00007400" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0018 6708\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 001a 7D006700\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 001e 7F406700\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0022 6A180080\[^\n\]*\n +\[0-9\]+ +6700" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0028 6A380001\[^\n\]*\n +\[0-9\]+ +00006700" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0030 7308\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0032 7C007300\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0036 7E407300\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 003a 6A100080\[^\n\]*\n +\[0-9\]+ +7300" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0040 6A300001\[^\n\]*\n +\[0-9\]+ +00007300" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0048 6398\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 004a 7C006390\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 004e 7E406390\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0052 6A100080\[^\n\]*\n +\[0-9\]+ +6390" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0058 6A300001\[^\n\]*\n +\[0-9\]+ +00006390" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0060 7508\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0062 7C007500\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0066 7E407500\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 006a 6A100080\[^\n\]*\n +\[0-9\]+ +7500" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0070 6A300001\[^\n\]*\n +\[0-9\]+ +00007500" { set x [expr $x+1] }
+ timeout { perror "timeout\n; break }
+ eof { break }
+ }
+ }
+
+ # This was intended to do any cleanup necessary. It kinda looks like it
+ # isn't needed, but just in case, please keep it in for now.
+ gas_finish
+
+ # Did we find what we were looking for? If not, flunk it.
+ if [expr $x == 25] then { pass $testname } else { fail $testname }
+}
+
+proc do_h8300s_branch {} {
+ set testname "branchs.s: h8300s branch tests"
+ set x 0
+
+ gas_start "branchs.s" "-al"
+
+ # Check each instruction bit pattern to verify it got
+ # assembled correctly.
+ while 1 {
+ expect {
+ -re " +\[0-9\]+ 0000 5500\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0002 5C000000\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0006 5A000000\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 000a 5900\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 000c 5B00\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 000e 5E000000\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0012 5D00\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0014 5F00\[^\n\]*\n" { set x [expr $x+1] }
+ timeout { perror "timeout\n; break }
+ eof { break }
+ }
+ }
+
+ # This was intended to do any cleanup necessary. It kinda looks like it
+ # isn't needed, but just in case, please keep it in for now.
+ gas_finish
+
+ # Did we find what we were looking for? If not, flunk it.
+ if [expr $x == 8] then { pass $testname } else { fail $testname }
+}
+
+proc do_h8300s_compare {} {
+ set testname "compares.s: h8300s compare tests"
+ set x 0
+
+ gas_start "compares.s" "-al"
+
+ # Check each instruction bit pattern to verify it got
+ # assembled correctly.
+ while 1 {
+ expect {
+ -re " +\[0-9\]+ 0000 A800\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0002 1C08\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0004 79200020\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0008 1D01\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 000a 7A200000\[^\n\]*\n +\[0-9\]+ +0040\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0010 1F81\[^\n\]*\n" { set x [expr $x+1] }
+ timeout { perror "timeout\n; break }
+ eof { break }
+ }
+ }
+
+ # This was intended to do any cleanup necessary. It kinda looks like it
+ # isn't needed, but just in case, please keep it in for now.
+ gas_finish
+
+ # Did we find what we were looking for? If not, flunk it.
+ if [expr $x == 6] then { pass $testname } else { fail $testname }
+}
+
+proc do_h8300s_decimal {} {
+ set testname "decimals.s: h8300s decimal tests"
+ set x 0
+
+ gas_start "decimals.s" "-al"
+
+ # Check each instruction bit pattern to verify it got
+ # assembled correctly.
+ while 1 {
+ expect {
+ -re " +\[0-9\]+ 0000 0F08\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0002 1F08\[^\n\]*\n" { set x [expr $x+1] }
+ eof { break }
+ }
+ }
+
+ # This was intended to do any cleanup necessary. It kinda looks like it
+ # isn't needed, but just in case, please keep it in for now.
+ gas_finish
+
+ # Did we find what we were looking for? If not, flunk it.
+ if [expr $x == 2] then { pass $testname } else { fail $testname }
+}
+
+proc do_h8300s_incdec {} {
+ set testname "incdecs.s: h8300s incdec tests"
+ set x 0
+
+ gas_start "incdecs.s" "-al"
+
+ # Check each instruction bit pattern to verify it got
+ # assembled correctly.
+ while 1 {
+ expect {
+ -re " +\[0-9\]+ 0000 1A08\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0002 1B50\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0004 1BD0\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0006 1B70\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0008 1BF0\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 000a 0A08\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 000c 0B50\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 000e 0BD0\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0010 0B70\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0012 0BF0\[^\n\]*\n" { set x [expr $x+1] }
+ eof { break }
+ }
+ }
+
+ # This was intended to do any cleanup necessary. It kinda looks like it
+ # isn't needed, but just in case, please keep it in for now.
+ gas_finish
+
+ # Did we find what we were looking for? If not, flunk it.
+ if [expr $x == 10] then { pass $testname } else { fail $testname }
+}
+
+proc do_h8300s_divmul {} {
+ set testname "divmuls.s: h8300s divmul tests"
+ set x 0
+
+ gas_start "divmuls.s" "-al"
+
+ # Check each instruction bit pattern to verify it got
+ # assembled correctly.
+ while 1 {
+ expect {
+ -re " +\[0-9\]+ 0000 5181\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0002 5301\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0004 01D05181\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0008 01D05301\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 000c 5081\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 000e 5201\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0010 01C05081\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0014 01C05201\[^\n\]*\n" { set x [expr $x+1] }
+ eof { break }
+ }
+ }
+
+ # This was intended to do any cleanup necessary. It kinda looks like it
+ # isn't needed, but just in case, please keep it in for now.
+ gas_finish
+
+ # Did we find what we were looking for? If not, flunk it.
+ if [expr $x == 8] then { pass $testname } else { fail $testname }
+}
+
+proc do_h8300s_misc {} {
+ set testname "miscs.s: h8300s misc tests"
+ set x 0
+
+ gas_start "miscs.s" "-al"
+
+ # Check each instruction bit pattern to verify it got
+ # assembled correctly.
+ while 1 {
+ expect {
+ -re " +\[0-9\]+ 0000 7B5C598F\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0004 7BD4598F\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0008 0700\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 000a 0308\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 000c 01410700\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0010 0318\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0012 01406900\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0016 01406F00\[^\n\]*\n +\[0-9\]+ +0010\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 001c 01407800\[^\n\]*\n +\[0-9\]+ +6B200000\[^\n\]*\n +\[0-9\]+ +0020\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0026 01406D00\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 002a 01406B00\[^\n\]*\n +\[0-9\]+ +0000\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0030 01406B20\[^\n\]*\n +\[0-9\]+ +00000000\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0038 01416900\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 003c 01416F00\[^\n\]*\n +\[0-9\]+ +0010\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0042 01417800\[^\n\]*\n +\[0-9\]+ +6B200000\[^\n\]*\n +\[0-9\]+ +0020\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 004c 01416D00\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0050 01416B00\[^\n\]*\n +\[0-9\]+ +0000\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0056 01416B20\[^\n\]*\n +\[0-9\]+ +00000000\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 005e 0000\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0060 5670\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0062 5470\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0064 0180\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0066 0208\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0068 0218\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 006a 01406980\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 006e 01406F80\[^\n\]*\n +\[0-9\]+ +0010\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0074 01407800\[^\n\]*\n +\[0-9\]+ +6BA00000\[^\n\]*\n +\[0-9\]+ +0020\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 007e 01406D80\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0082 01406B80\[^\n\]*\n +\[0-9\]+ +0000\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0088 01406BA0\[^\n\]*\n +\[0-9\]+ +00000000\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0090 01416980\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0094 01416F80\[^\n\]*\n +\[0-9\]+ +0010\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 009a 01417800\[^\n\]*\n +\[0-9\]+ +6BA00000\[^\n\]*\n +\[0-9\]+ +0020\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 00a4 01416D80\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 00a8 01416B80\[^\n\]*\n +\[0-9\]+ +0000\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 00ae 01416BA0\[^\n\]*\n +\[0-9\]+ +00000000\[^\n\]*\n" { set x [expr $x+1] }
+ eof { break }
+ }
+ }
+
+ # This was intended to do any cleanup necessary. It kinda looks like it
+ # isn't needed, but just in case, please keep it in for now.
+ gas_finish
+
+ # Did we find what we were looking for? If not, flunk it.
+ if [expr $x == 36] then { pass $testname } else { fail $testname }
setup_xfail "h8300*-*-*"
- fail "h8300 eepmov.w tests"
+ fail "h8300s movfpe/movtpe tests"
}
-proc do_h8300h_movb {} {
- set testname "movbh.s: h8300h movb tests"
+proc do_h8300s_movb {} {
+ set testname "movbs.s: h8300s movb tests"
set x 0
- gas_start "movbh.s" "-al"
+ gas_start "movbs.s" "-al"
# Check each instruction bit pattern to verify it got
# assembled correctly.
if [expr $x == 16] then { pass $testname } else { fail $testname }
}
-proc do_h8300h_movw {} {
- set testname "movwh.s: h8300h movw tests"
+proc do_h8300s_movw {} {
+ set testname "movws.s: h8300s movw tests"
set x 0
- gas_start "movwh.s" "-al"
+ gas_start "movws.s" "-al"
# Check each instruction bit pattern to verify it got
# assembled correctly.
if [expr $x == 14] then { pass $testname } else { fail $testname }
}
-proc do_h8300h_movl {} {
- set testname "movlh.s: h8300h movl tests"
+
+proc do_h8300s_movl {} {
+ set testname "movls.s: h8300s movl tests"
set x 0
- gas_start "movlh.s" "-al"
+ gas_start "movls.s" "-al"
# Check each instruction bit pattern to verify it got
# assembled correctly.
if [expr $x == 14] then { pass $testname } else { fail $testname }
}
-proc do_h8300h_pushpop {} {
- set testname "pushpoph.s: h8300h pushpop tests"
+proc do_h8300s_pushpop {} {
+ set testname "pushpops.s: h8300s pushpop tests"
set x 0
- gas_start "pushpoph.s" "-al"
+ gas_start "pushpops.s" "-al"
# Check each instruction bit pattern to verify it got
# assembled correctly.
if [expr $x == 4] then { pass $testname } else { fail $testname }
}
-proc do_h8300h_rotate_shift {} {
- set testname "rotshifth.s: h8300h rotate and shift tests"
+proc do_h8300s_rotate_shift {} {
+ set testname "rotshs.s: h8300s rotate and shift tests"
set x 0
- gas_start "rotshifth.s" "-al"
+ gas_start "rotshs.s" "-al"
# Check each instruction bit pattern to verify it got
# assembled correctly.
while 1 {
expect {
-re " +\[0-9\]+ 0000 1288\[^\n\]*\n" { set x [expr $x+1] }
- -re " +\[0-9\]+ 0002 1290\[^\n\]*\n" { set x [expr $x+1] }
- -re " +\[0-9\]+ 0004 12B0\[^\n\]*\n" { set x [expr $x+1] }
- -re " +\[0-9\]+ 0006 1388\[^\n\]*\n" { set x [expr $x+1] }
- -re " +\[0-9\]+ 0008 1390\[^\n\]*\n" { set x [expr $x+1] }
- -re " +\[0-9\]+ 000a 13B0\[^\n\]*\n" { set x [expr $x+1] }
- -re " +\[0-9\]+ 000c 1208\[^\n\]*\n" { set x [expr $x+1] }
- -re " +\[0-9\]+ 000e 1210\[^\n\]*\n" { set x [expr $x+1] }
- -re " +\[0-9\]+ 0010 1230\[^\n\]*\n" { set x [expr $x+1] }
- -re " +\[0-9\]+ 0012 1308\[^\n\]*\n" { set x [expr $x+1] }
- -re " +\[0-9\]+ 0014 1310\[^\n\]*\n" { set x [expr $x+1] }
- -re " +\[0-9\]+ 0016 1330\[^\n\]*\n" { set x [expr $x+1] }
- -re " +\[0-9\]+ 0018 1088\[^\n\]*\n" { set x [expr $x+1] }
- -re " +\[0-9\]+ 001a 1090\[^\n\]*\n" { set x [expr $x+1] }
- -re " +\[0-9\]+ 001c 10B0\[^\n\]*\n" { set x [expr $x+1] }
- -re " +\[0-9\]+ 001e 1188\[^\n\]*\n" { set x [expr $x+1] }
- -re " +\[0-9\]+ 0020 1190\[^\n\]*\n" { set x [expr $x+1] }
- -re " +\[0-9\]+ 0022 11B0\[^\n\]*\n" { set x [expr $x+1] }
- -re " +\[0-9\]+ 0024 1008\[^\n\]*\n" { set x [expr $x+1] }
- -re " +\[0-9\]+ 0026 1010\[^\n\]*\n" { set x [expr $x+1] }
- -re " +\[0-9\]+ 0028 1030\[^\n\]*\n" { set x [expr $x+1] }
- -re " +\[0-9\]+ 002a 1108\[^\n\]*\n" { set x [expr $x+1] }
- -re " +\[0-9\]+ 002c 1110\[^\n\]*\n" { set x [expr $x+1] }
- -re " +\[0-9\]+ 002e 1130\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0002 12C8\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0004 1290\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0006 12D0\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0008 12B0\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 000a 12F0\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 000c 1388\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 000e 13C8\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0010 1390\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0012 13D0\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0014 13B0\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0016 13F0\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0018 1208\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 001a 1248\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 001c 1210\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 001e 1250\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0020 1230\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0022 1270\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0024 1308\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0026 1348\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0028 1310\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 002a 1350\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 002c 1330\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 002e 1370\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0030 1088\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0032 10C8\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0034 1090\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0036 10D0\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0038 10B0\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 003a 10F0\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 003c 1188\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 003e 11C8\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0040 1190\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0042 11D0\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0044 11B0\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0046 11F0\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0048 1008\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 004a 1048\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 004c 1010\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 004e 1050\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0050 1030\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0052 1070\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0054 1108\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0056 1148\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0058 1110\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 005a 1150\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 005c 1130\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 005e 1170\[^\n\]*\n" { set x [expr $x+1] }
eof { break }
}
}
gas_finish
# Did we find what we were looking for? If not, flunk it.
- if [expr $x == 24] then { pass $testname } else { fail $testname }
+ if [expr $x == 48] then { pass $testname } else { fail $testname }
}
-proc do_h8300h_extend {} {
- set testname "extendh.s: h8300h extend tests"
+proc do_h8300s_extend {} {
+ set testname "extends.s: h8300s extend tests"
set x 0
- gas_start "extendh.s" "-al"
+ gas_start "extends.s" "-al"
# Check each instruction bit pattern to verify it got
# assembled correctly.
if [expr $x == 4] then { pass $testname } else { fail $testname }
}
+proc do_h8300s_mac {} {
+ set testname "macs.s: h8300s mac tests"
+ set x 0
+
+ gas_start "macs.s" "-al"
+
+ # Check each instruction bit pattern to verify it got
+ # assembled correctly.
+ while 1 {
+ expect {
+ -re " +\[0-9\]+ 0000 01A0\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0002 0320\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0004 0331\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0006 01606D01\[^\n\]*\n" { set x [expr $x+1] }
+ eof { break }
+ }
+ }
+
+ # This was intended to do any cleanup necessary. It kinda looks like it
+ # isn't needed, but just in case, please keep it in for now.
+ gas_finish
+
+ # Did we find what we were looking for? If not, flunk it.
+ if [expr $x == 4] then { pass $testname } else { fail $testname }
+}
+
+proc do_h8300s_multiple {} {
+ set testname "multiples.s: h8300s multiple tests"
+ set x 0
+
+ gas_start "multiples.s" "-al"
+
+ # Check each instruction bit pattern to verify it got
+ # assembled correctly.
+ while 1 {
+ expect {
+ -re " +\[0-9\]+ 0000 01106D71\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0004 01206D72\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0008 01306D73\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 000c 01106DF0\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0010 01206DF0\[^\n\]*\n" { set x [expr $x+1] }
+ -re " +\[0-9\]+ 0014 01306DF0\[^\n\]*\n" { set x [expr $x+1] }
+ eof { break }
+ }
+ }
+
+ # This was intended to do any cleanup necessary. It kinda looks like it
+ # isn't needed, but just in case, please keep it in for now.
+ gas_finish
+
+ # Did we find what we were looking for? If not, flunk it.
+ if [expr $x == 6] then { pass $testname } else { fail $testname }
+}
+
proc do_h8300h_mov32bug {} {
set testname "mov32bug.s: h8300h mov32bug test"
set x 0
while 1 {
expect {
- -re "00000002\[^\n\]*32\[^\n\]*_a.0x88ca6c00\[^\n\]*\n"
+ -re "00000002\[^\n\]*32\[^\n\]*_a.0x0*88ca6c00\[^\n\]*\n"
{ set x [expr $x+1] }
timeout { perror "timeout\n; break }
eof { break }
do_h8300_bitops2
do_h8300_bitops3
do_h8300_bitops4
- do_h8300_branches
+ do_h8300_branch
do_h8300_compare
do_h8300_decimal
do_h8300_incdec
do_h8300h_bitops2
do_h8300h_bitops3
do_h8300h_bitops4
- do_h8300h_branches
+ do_h8300h_branch
do_h8300h_compare
do_h8300h_decimal
do_h8300h_incdec
do_h8300h_rotate_shift
do_h8300h_extend
+ # Now test the h8300s instruction parser
+ do_h8300s_add_sub
+ do_h8300s_logical
+ do_h8300s_cbranch
+ do_h8300s_bitops1
+ do_h8300s_bitops2
+ do_h8300s_bitops3
+ do_h8300s_bitops4
+ do_h8300s_branch
+ do_h8300s_compare
+ do_h8300s_decimal
+ do_h8300s_incdec
+ do_h8300s_divmul
+ do_h8300s_misc
+ do_h8300s_movb
+ do_h8300s_movw
+ do_h8300s_movl
+ do_h8300_pushpop
+ do_h8300s_rotate_shift
+ do_h8300s_extend
+ do_h8300s_mac
+ do_h8300s_multiple
+
do_h8300h_mov32bug
# Now some random tests
gas_test_error "p2410.s" "" "out-of-range 'bras'"
- if [expr [istarget m68*-*-hpux*] || [istarget m68*-*-sun*] \
- || [istarget m68*-*-*aout*] \
- || [istarget m68*-*-coff*] \
- || [istarget m68*-*-vxworks*] \
- ] then {
- run_dump_test "schwab"
- }
-
+ run_dump_test pcrel
run_dump_test operands
run_dump_test cas
run_dump_test bitfield
set svr4pic [expr [istarget *-*-elf*] || [istarget *-*-irix5*] ]
set empic [expr [istarget *-*-ecoff*] || [istarget *-*-ultrix*] || [istarget *-*-irix\[1-4\]*] ]
set aout [expr [istarget *-*-bsd*] || [istarget *-*-netbsd*] || [istarget *-*-openbsd*] ]
+ set ilocks [expr [istarget *4300*-*-elf*] || [istarget *4100*-*-elf*]]
run_dump_test "abs"
run_dump_test "add"
run_dump_test "bgeu"
run_dump_test "blt"
run_dump_test "bltu"
- run_dump_test "div"
+ if !$ilocks { run_dump_test "div" } else { run_dump_test "div-ilocks" }
run_dump_test "jal"
if $svr4pic { run_dump_test "jal-svr4pic" }
if $svr4pic { run_dump_test "jal-xgot" }
if $svr4pic { run_dump_test "lif-xgot" }
if $empic { run_dump_test "lif-empic" }
run_dump_test "mips4"
- run_dump_test "mul"
+ if !$ilocks { run_dump_test "mul" } else { run_dump_test "mul-ilocks" }
run_dump_test "rol"
if !$aout { run_dump_test "sb" }
run_dump_test "trunc"
}
}
#else
-#define dump_section_relocs(ABFD,SEC,STREAM) (void)(ABFD,SEC,STREAM)
+#define dump_section_relocs(ABFD,SEC,STREAM) ((void) 0)
#endif
#ifndef EMIT_SECTION_SYMBOLS
goto done;
}
+ if (bfd_is_abs_section (symsec))
+ {
+ /* The fixup_segment routine will not use this symbol in a
+ relocation unless TC_FORCE_RELOCATION returns 1. */
+ if (TC_FORCE_RELOCATION (fixp))
+ {
+ fixp->fx_addsy->sy_used_in_reloc = 1;
+#ifdef UNDEFINED_DIFFERENCE_OK
+ if (fixp->fx_subsy != NULL)
+ fixp->fx_subsy->sy_used_in_reloc = 1;
+#endif
+ }
+ goto done;
+ }
+
/* If it's one of these sections, assume the symbol is
definitely going to be output. The code in
md_estimate_size_before_relax in tc-mips.c uses this test
as well, so if you change this code you should look at that
code. */
if (bfd_is_und_section (symsec)
- || bfd_is_abs_section (symsec)
|| bfd_is_com_section (symsec))
{
fixp->fx_addsy->sy_used_in_reloc = 1;
/* If the section symbol isn't going to be output, the relocs
at least should still work. If not, figure out what to do
- when we run into that case. */
+ when we run into that case.
+
+ We refetch the segment when calling section_symbol, rather
+ than using symsec, because S_GET_VALUE may wind up changing
+ the section when it calls resolve_symbol_value. */
fixp->fx_offset += S_GET_VALUE (sym);
- fixp->fx_addsy = section_symbol (symsec);
+ fixp->fx_addsy = section_symbol (S_GET_SEGMENT (sym));
fixp->fx_addsy->sy_used_in_reloc = 1;
done:
n--;
continue;
}
+
+#if 0
+ /* This test is triggered inappropriately for the SH. */
if (fixp->fx_where + fixp->fx_size
> fixp->fx_frag->fr_fix + fixp->fx_frag->fr_offset)
abort ();
+#endif
s = bfd_install_relocation (stdoutput, reloc,
fixp->fx_frag->fr_literal,
#else
fix_new_exp (lie->frag,
lie->word_goes_here - lie->frag->fr_literal,
- 2, &exp, 0, BFD_RELOC_NONE);
+ 2, &exp, 0, BFD_RELOC_16);
#endif
#else
#if defined(TC_SPARC) || defined(TC_A29K) || defined(NEED_FX_R_TYPE)
PROGRESS (1);
+#ifdef tc_frob_file_before_adjust
+ tc_frob_file_before_adjust ();
+#endif
+#ifdef obj_frob_file_before_adjust
+ obj_frob_file_before_adjust ();
+#endif
+
bfd_map_over_sections (stdoutput, adjust_reloc_syms, (char *)0);
/* Set up symbol table, and write it out. */
*/
#ifndef md_relax_frag
+#ifdef TC_GENERIC_RELAX_TABLE
/* Subroutines of relax_segment. */
static int
return 0;
}
+#endif /* defined (TC_GENERIC_RELAX_TABLE) */
#endif /* ! defined (md_relax_frag) */
/* Relax_align. Advance location counter to next address that has 'alignment'
/* write.h
-
- Copyright (C) 1987, 1992, 1993 Free Software Foundation, Inc.
+ Copyright (C) 1987, 92, 93, 94, 95, 1996 Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
extern long string_byte_count;
extern int section_alignment[];
-bit_fixS *bit_fix_new PARAMS ((int size, int offset, long base_type,
- long base_adj, long min, long max, long add));
-void append PARAMS ((char **charPP, char *fromP, unsigned long length));
-void record_alignment PARAMS ((segT seg, int align));
-void write_object_file PARAMS ((void));
-void relax_segment PARAMS ((struct frag * seg_frag_root, segT seg_type));
+extern bit_fixS *bit_fix_new
+ PARAMS ((int size, int offset, long base_type, long base_adj, long min,
+ long max, long add));
+extern void append PARAMS ((char **charPP, char *fromP, unsigned long length));
+extern void record_alignment PARAMS ((segT seg, int align));
+extern void write_object_file PARAMS ((void));
+extern void relax_segment
+ PARAMS ((struct frag * seg_frag_root, segT seg_type));
-void number_to_chars_littleendian PARAMS ((char *, valueT, int));
-void number_to_chars_bigendian PARAMS ((char *, valueT, int));
+extern void number_to_chars_littleendian PARAMS ((char *, valueT, int));
+extern void number_to_chars_bigendian PARAMS ((char *, valueT, int));
#ifdef BFD_ASSEMBLER
-fixS *fix_new PARAMS ((fragS * frag, int where, int size,
- symbolS * add_symbol, offsetT offset, int pcrel,
- bfd_reloc_code_real_type r_type));
-fixS *fix_new_exp PARAMS ((fragS * frag, int where, int size,
- expressionS *exp, int pcrel,
- bfd_reloc_code_real_type r_type));
+extern fixS *fix_new
+ PARAMS ((fragS * frag, int where, int size, symbolS * add_symbol,
+ offsetT offset, int pcrel, bfd_reloc_code_real_type r_type));
+extern fixS *fix_new_exp
+ PARAMS ((fragS * frag, int where, int size, expressionS *exp, int pcrel,
+ bfd_reloc_code_real_type r_type));
#else
-fixS *fix_new PARAMS ((fragS * frag, int where, int size,
- symbolS * add_symbol, offsetT offset, int pcrel,
- int r_type));
-fixS *fix_new_exp PARAMS ((fragS * frag, int where, int size,
- expressionS *exp, int pcrel, int r_type));
+extern fixS *fix_new
+ PARAMS ((fragS * frag, int where, int size, symbolS * add_symbol,
+ offsetT offset, int pcrel, int r_type));
+extern fixS *fix_new_exp
+ PARAMS ((fragS * frag, int where, int size, expressionS *exp, int pcrel,
+ int r_type));
#endif
+extern void write_print_statistics PARAMS ((FILE *));
+
/* end of write.h */
+Fri Aug 30 12:16:11 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * gmon.h: Replace #elif with #else/#endif.
+
+Thu Aug 29 17:04:10 1996 Michael Meissner <meissner@tiktok.cygnus.com>
+
+ * configure.in (i[345]86-*-*): Recognize i686 for pentium pro.
+ * configure: Regenerate.
+
+Thu Aug 22 17:12:30 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * configure.in: Set and substitute HLDENV.
+ * configure: Rebuild.
+ * Makefile.in (HLDENV): New variable.
+ (gprof): Use $(HLDENV).
+
+Wed Aug 7 14:43:51 1996 Philippe De Muyter <phdm@info.ucl.ac.be>
+
+ * core.c (read_function_mappings): Cast xmalloc return.
+
+Thu Jul 4 12:01:42 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * gprof.c (VERSION): Define as "2.7.1".
+
+ * Released binutils 2.7.
+
+ * bb_exit_func.c: Rename from __bb_exit_func.c, so that it can be
+ stored on a System V file system.
+
+Thu Jun 27 11:36:22 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * configure.in: Call AC_ISC_POSIX.
+ * configure: Rebuild.
+ * Makefile.in (gprof): Pass $(CFLAGS) during link.
+ * hertz.c: Don't include <sys/time.h>; let sysdep.h handle that.
+ If HAVE_SETITIMER is not defined, try using sysconf.
+
+Mon Jun 24 18:27:28 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
+
+ * Makefile.in (exec_prefix, bindir, libdir, mandir, infodir, datadir,
+ INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
+ * configure.in (AC_PREREQ): autoconf 2.5 or higher.
+ (AC_PROG_INSTALL): added.
+ * configure: Rebuilt.
+
+Mon Jun 24 12:03:09 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * configure.in: On alpha*-*-osf*, link against libbfd.a if not
+ using shared libraries.
+ * configure: Rebuild with autoconf 2.10.
+
+Tue Jun 18 17:35:58 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * core.c (core_create_line_syms): Use xstrdup rather than strdup.
+ * source.c (source_file_lookup_path): Likewise.
+
Mon Apr 8 14:44:33 1996 Ian Lance Taylor <ian@cygnus.com>
* configure.in: Permit --enable-shared to specify a list of
srcdir = @srcdir@
prefix = @prefix@
-exec_prefix = $(prefix)
+exec_prefix = @exec_prefix@
program_transform_name = @program_transform_name@
-bindir = $(exec_prefix)/bin
-libdir = $(exec_prefix)/lib
+bindir = @bindir@
+libdir = @libdir@
tooldir = $(libdir)
-mandir = $(prefix)/man
+mandir = @mandir@
man1dir = $(mandir)/man1
-infodir = $(prefix)/info
-datadir = $(prefix)/lib
+infodir = @infodir@
+datadir = @datadir@
SHELL = /bin/sh
INSTALL = `cd $(srcdir); pwd`/../install.sh -c
-INSTALL_PROGRAM = $(INSTALL)
-INSTALL_DATA = $(INSTALL)
+INSTALL_PROGRAM = @INSTALL_PROGRAM@
+INSTALL_DATA = @INSTALL_DATA@
INSTALL_XFORM = $(INSTALL) -t='$(program_transform_name)'
INSTALL_XFORM1 = $(INSTALL_XFORM) -b=.1
MAKEINFO = makeinfo
CFLAGS=-g -DDEBUG
LDFLAGS=
HLDFLAGS = @HLDFLAGS@
+HLDENV = @HLDENV@
.c.o:
$(CC) -c $(CFLAGS) -I. -I$(srcdir) -I../bfd -I$(srcdir)/../include -I$(srcdir)/../bfd -DMACHINE_H=\"$(MY_TARGET).h\" $(TCFLAGS) $(HCFLAGS) $<
$(INSTALL_XFORM1) $(srcdir)/gprof.1 $(man1dir)/gprof.1
gprof: $(OBJS) $(LIBDEPS)
- $(CC) -o $(PROG) $(HLDFLAGS) $(LDFLAGS) $(OBJS) $(LIBS)
+ $(HLDENV) $(CC) -o $(PROG) $(CFLAGS) $(HLDFLAGS) $(LDFLAGS) $(OBJS) $(LIBS)
mostlyclean:
-rm -f *.o core gprof nohup.out \
#! /bin/sh
# Guess values for system-dependent variables and create Makefiles.
-# Generated automatically using autoconf version 2.8
-# Copyright (C) 1992, 1993, 1994 Free Software Foundation, Inc.
+# Generated automatically using autoconf version 2.10
+# Copyright (C) 1992, 93, 94, 95, 96 Free Software Foundation, Inc.
#
# This configure script is free software; the Free Software Foundation
# gives unlimited permission to copy, distribute and modify it.
verbose=yes ;;
-version | --version | --versio | --versi | --vers)
- echo "configure generated by autoconf version 2.8"
+ echo "configure generated by autoconf version 2.10"
exit 0 ;;
-with-* | --with-*)
test "${CFLAGS+set}" = set || CFLAGS="-g"
fi
-
ac_aux_dir=
for ac_dir in $srcdir $srcdir/.. $srcdir/../..; do
if test -f $ac_dir/install-sh; then
ac_config_sub=$ac_aux_dir/config.sub
ac_configure=$ac_aux_dir/configure # This should be Cygnus configure.
+# Find a good install program. We prefer a C program (faster),
+# so one script is as good as another. But avoid the broken or
+# incompatible versions:
+# SysV /etc/install, /usr/sbin/install
+# SunOS /usr/etc/install
+# IRIX /sbin/install
+# AIX /bin/install
+# AFS /usr/afsws/bin/install, which mishandles nonexistent args
+# SVR4 /usr/ucb/install, which tries to use the nonexistent group "staff"
+# ./install, which can be erroneously created by make from ./install.sh.
+echo $ac_n "checking for a BSD compatible install""... $ac_c" 1>&6
+if test -z "$INSTALL"; then
+if eval "test \"`echo '$''{'ac_cv_path_install'+set}'`\" = set"; then
+ echo $ac_n "(cached) $ac_c" 1>&6
+else
+ IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:"
+ for ac_dir in $PATH; do
+ # Account for people who put trailing slashes in PATH elements.
+ case "$ac_dir/" in
+ /|./|.//|/etc/*|/usr/sbin/*|/usr/etc/*|/sbin/*|/usr/afsws/bin/*|/usr/ucb/*) ;;
+ *)
+ # OSF1 and SCO ODT 3.0 have their own names for install.
+ for ac_prog in ginstall installbsd scoinst install; do
+ if test -f $ac_dir/$ac_prog; then
+ if test $ac_prog = install &&
+ grep dspmsg $ac_dir/$ac_prog >/dev/null 2>&1; then
+ # AIX install. It has an incompatible calling convention.
+ # OSF/1 installbsd also uses dspmsg, but is usable.
+ :
+ else
+ ac_cv_path_install="$ac_dir/$ac_prog -c"
+ break 2
+ fi
+ fi
+ done
+ ;;
+ esac
+ done
+ IFS="$ac_save_ifs"
+
+fi
+ if test "${ac_cv_path_install+set}" = set; then
+ INSTALL="$ac_cv_path_install"
+ else
+ # As a last resort, use the slow shell script. We don't cache a
+ # path for INSTALL within a source directory, because that will
+ # break other packages using the cache if that directory is
+ # removed, or if the path is relative.
+ INSTALL="$ac_install_sh"
+ fi
+fi
+echo "$ac_t""$INSTALL" 1>&6
+
+# Use test -z because SunOS4 sh mishandles braces in ${var-val}.
+# It thinks the first close brace ends the variable substitution.
+test -z "$INSTALL_PROGRAM" && INSTALL_PROGRAM='${INSTALL}'
+
+test -z "$INSTALL_DATA" && INSTALL_DATA='${INSTALL} -m 644'
+
+
+echo $ac_n "checking for POSIXized ISC""... $ac_c" 1>&6
+if test -d /etc/conf/kconfig.d &&
+ grep _POSIX_VERSION /usr/include/sys/unistd.h >/dev/null 2>&1
+then
+ echo "$ac_t""yes" 1>&6
+ ISC=yes # If later tests want to check for ISC.
+ cat >> confdefs.h <<\EOF
+#define _POSIX_SOURCE 1
+EOF
+
+ if test "$GCC" = yes; then
+ CC="$CC -posix"
+ else
+ CC="$CC -Xp"
+ fi
+else
+ echo "$ac_t""no" 1>&6
+ ISC=
+fi
+
+
# Do some error checking and defaulting for the host and target type.
# The inputs are:
case "${target}" in
alpha-*-*) MY_TARGET=alpha ;;
-i[345]86-*-*) MY_TARGET=i386 ;;
+i[3456]86-*-*) MY_TARGET=i386 ;;
sparc-*-*) MY_TARGET=sparc ;;
tahoe-*-*) MY_TARGET=tahoe ;;
vax-*-*) MY_TARGET=vax ;;
BFDLIB='-L../bfd -lbfd'
# We need to handle some special cases if BFD was built shared.
-if test "${shared}" = "true"; then
- case "${host}" in
+case "${host}" in
*-*-sunos*)
# On SunOS, we must link against the name we are going to install,
# not -lbfd, since SunOS does not support SONAME.
- BFDLIB='-L../bfd -l`echo bfd | sed '"'"'$(program_transform_name)'"'"'`'
+ if test "${shared}" = "true"; then
+ BFDLIB='-L../bfd -l`echo bfd | sed '"'"'$(program_transform_name)'"'"'`'
+ fi
;;
- esac
-fi
+alpha*-*-osf*)
+ # On Alpha OSF/1, the native linker searches all the -L
+ # directories for any LIB.so files, and only then searches for any
+ # LIB.a files. That means that if there is an installed
+ # libbfd.so, but this build is not done with --enable-shared, the
+ # link will wind up being against the install libbfd.so rather
+ # than the newly built libbfd. To avoid this, we must explicitly
+ # link against libbfd.a when --enable-shared is not used.
+ if test "${shared}" != "true"; then
+ BFDLIB='../bfd/libbfd.a'
+ fi
+ ;;
+esac
HLDFLAGS=
+HLDENV=
# If we have shared libraries, try to set rpath reasonably.
if test "${shared}" = "true"; then
case "${host}" in
*-*-linux*)
HLDFLAGS='-Wl,-rpath,$(libdir)'
;;
- *-*-sysv4* | *-*-solaris*)
+ *-*-solaris*)
HLDFLAGS='-R $(libdir)'
;;
+ *-*-sysv4*)
+ HLDENV='if test -z "$${LD_RUN_PATH}"; then LD_RUN_PATH=$(libdir); else LD_RUN_PATH=$${LD_RUN_PATH}:$(libdir); fi; export LD_RUN_PATH;'
+ ;;
esac
fi
esac
+
trap '' 1 2 15
cat > confcache <<\EOF
# This file is a shell script that caches the results of configure
echo "running \${CONFIG_SHELL-/bin/sh} $0 $ac_configure_args --no-create --no-recursion"
exec \${CONFIG_SHELL-/bin/sh} $0 $ac_configure_args --no-create --no-recursion ;;
-version | --version | --versio | --versi | --vers | --ver | --ve | --v)
- echo "$CONFIG_STATUS generated by autoconf version 2.8"
+ echo "$CONFIG_STATUS generated by autoconf version 2.10"
exit 0 ;;
-help | --help | --hel | --he | --h)
echo "\$ac_cs_usage"; exit 0 ;;
done
ac_given_srcdir=$srcdir
+ac_given_INSTALL="$INSTALL"
trap 'rm -fr `echo "Makefile" | sed "s/:[^ ]*//g"` conftest*; exit 1' 1 2 15
EOF
s%@infodir@%$infodir%g
s%@mandir@%$mandir%g
s%@CC@%$CC%g
+s%@INSTALL_PROGRAM@%$INSTALL_PROGRAM%g
+s%@INSTALL_DATA@%$INSTALL_DATA%g
s%@host@%$host%g
s%@host_alias@%$host_alias%g
s%@host_cpu@%$host_cpu%g
s%@MY_TARGET@%$MY_TARGET%g
s%@BFDLIB@%$BFDLIB%g
s%@HLDFLAGS@%$HLDFLAGS%g
+s%@HLDENV@%$HLDENV%g
CEOF
EOF
top_srcdir="$ac_dots$ac_given_srcdir" ;;
esac
+ case "$ac_given_INSTALL" in
+ [/$]*) INSTALL="$ac_given_INSTALL" ;;
+ *) INSTALL="$ac_dots$ac_given_INSTALL" ;;
+ esac
echo creating "$ac_file"
rm -f "$ac_file"
configure_input="Generated automatically from `echo $ac_file_in|sed 's%.*/%%'` by configure."
s%@configure_input@%$configure_input%g
s%@srcdir@%$srcdir%g
s%@top_srcdir@%$top_srcdir%g
+s%@INSTALL@%$INSTALL%g
" -f conftest.subs $ac_given_srcdir/$ac_file_in > $ac_file
fi; done
rm -f conftest.subs
dnl Process this file with autoconf to produce a configure script.
-AC_PREREQ(2.3)dnl
+AC_PREREQ(2.5)dnl
AC_INIT(gprof.c)
AC_ARG_ENABLE(shared,
esac])dnl
AC_PROG_CC
+AC_PROG_INSTALL
+
+AC_ISC_POSIX
AC_CANONICAL_SYSTEM
AC_ARG_PROGRAM
case "${target}" in
alpha-*-*) MY_TARGET=alpha ;;
changequote(,)dnl
-i[345]86-*-*) MY_TARGET=i386 ;;
+i[3456]86-*-*) MY_TARGET=i386 ;;
changequote([,])dnl
sparc-*-*) MY_TARGET=sparc ;;
tahoe-*-*) MY_TARGET=tahoe ;;
BFDLIB='-L../bfd -lbfd'
# We need to handle some special cases if BFD was built shared.
-if test "${shared}" = "true"; then
- case "${host}" in
+case "${host}" in
*-*-sunos*)
# On SunOS, we must link against the name we are going to install,
# not -lbfd, since SunOS does not support SONAME.
- BFDLIB='-L../bfd -l`echo bfd | sed '"'"'$(program_transform_name)'"'"'`'
+ if test "${shared}" = "true"; then
+ BFDLIB='-L../bfd -l`echo bfd | sed '"'"'$(program_transform_name)'"'"'`'
+ fi
;;
- esac
-fi
+alpha*-*-osf*)
+ # On Alpha OSF/1, the native linker searches all the -L
+ # directories for any LIB.so files, and only then searches for any
+ # LIB.a files. That means that if there is an installed
+ # libbfd.so, but this build is not done with --enable-shared, the
+ # link will wind up being against the install libbfd.so rather
+ # than the newly built libbfd. To avoid this, we must explicitly
+ # link against libbfd.a when --enable-shared is not used.
+ if test "${shared}" != "true"; then
+ BFDLIB='../bfd/libbfd.a'
+ fi
+ ;;
+esac
AC_SUBST(BFDLIB)
HLDFLAGS=
+HLDENV=
# If we have shared libraries, try to set rpath reasonably.
if test "${shared}" = "true"; then
case "${host}" in
*-*-linux*)
HLDFLAGS='-Wl,-rpath,$(libdir)'
;;
- *-*-sysv4* | *-*-solaris*)
+ *-*-solaris*)
HLDFLAGS='-R $(libdir)'
;;
+ *-*-sysv4*)
+ HLDENV='if test -z "$${LD_RUN_PATH}"; then LD_RUN_PATH=$(libdir); else LD_RUN_PATH=$${LD_RUN_PATH}:$(libdir); fi; export LD_RUN_PATH;'
+ ;;
esac
fi
;;
esac
AC_SUBST(HLDFLAGS)
+AC_SUBST(HLDENV)
AC_OUTPUT(Makefile)
}
/* Now we know how big we need to make our table. */
- symbol_map = xmalloc (count * sizeof (struct function_map));
+ symbol_map = ((struct function_map *)
+ xmalloc (count * sizeof (struct function_map)));
/* Rewind the input file so we can read it again. */
rewind (file);
}
/* make name pointer a malloc'ed string: */
- ltab.limit->name = strdup (ltab.limit->name);
+ ltab.limit->name = xstrdup (ltab.limit->name);
ltab.limit->file = source_file_lookup_path (filename);
ltab.limit->addr = core_text_sect->vma + offset;
* a size that is a multiple of 8.
*/
char pad[4];
-#elif defined (BSD44_FORMAT)
+#else
+#ifdef BSD44_FORMAT
char version[4]; /* version number */
char profrate[4]; /* profiling clock rate */
char spare[3*4]; /* reserved */
+#endif
#endif
};
#include "source.h"
#include "sym_ids.h"
-#define VERSION "2.6"
+#define VERSION "2.7.1"
const char *whoami;
const char *function_mapping_file;
+Tue Aug 13 16:10:30 1996 Stu Grossman (grossman@critters.cygnus.com)
+
+ * obstack.h: Change bcopy to memcpy. Works better on Posix
+ systems, which generally lack bcopy.
+
+Mon Aug 12 17:03:18 1996 Stu Grossman (grossman@critters.cygnus.com)
+
+ * ansidecl.h: Change WIN32 to _WIN32.
+
+Fri Jul 26 13:58:18 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * dis-asm.h: Add flavour field.
+ (print_insn_alpha): Declare.
+ (print_insn_alpha_osf, print_insn_alpha_vms): Don't declare.
+ (INIT_DISASSEMBLE_INFO): Initialize flavour field.
+
+Tue Jul 23 17:37:58 1996 Fred Fish <fnf@cygnus.com>
+
+ * libiberty.h (PRIVATE_XMALLOC): Enclose xmalloc/xrealloc
+ definitions inside #ifndef so that programs that want to
+ can define PRIVATE_XMALLOC and then define xmalloc and
+ xrealloc anyway they want.
+ (basename): Document in source that we can't declare the
+ parameter type because it is declared inconsistently across
+ different systems.
+
+Mon Jul 22 13:16:13 1996 Richard Henderson <rth@tamu.edu>
+
+ * dis-asm.h (print_insn_alpha): Don't declare.
+ (print_insn_alpha_osf, print_insn_alpha_vms): Declare.
+
+Mon Jul 15 16:55:38 1996 Stu Grossman (grossman@critters.cygnus.com)
+
+ * dis-asm.h: Get rid of decls for print_insn_i8086,
+ print_insn_sparc64 and print_insn_sparclite.
+ * (INIT_DISASSEMBLE_INFO): Split into two pieces. One,
+ INIT_DISASSEMBLE_INFO_NO_ARCH inits everything except for endian,
+ mach, and arch.
+
+Fri Jul 12 10:19:27 1996 Stu Grossman (grossman@critters.cygnus.com)
+
+ * dis-asm.h (print_insn_i8086): Declare.
+
+Wed Jul 3 16:02:39 1996 Stu Grossman (grossman@critters.cygnus.com)
+
+ * dis-asm.h (print_insn_sparclite): Declare.
+
+Tue Jun 18 16:02:46 1996 Jeffrey A. Law <law@rtl.cygnus.com>
+
+ * dis-asm.h (print_insn_h8300s): Declare.
+
+Tue Jun 18 15:11:33 1996 Klaus Kaempf <kkaempf@progis.de>
+
+ * fopen-vms.h: New file.
+
Tue Jun 4 18:58:16 1996 Ian Lance Taylor <ian@cygnus.com>
* bfdlink.h (struct bfd_link_info): Add notice_all field.
+Fri Jun 28 12:54:38 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * pe.h (FILHSZ): Define.
+
+Wed Jun 26 16:24:26 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * All files: Define FILHSZ, AOUTSZ, AOUTHDRSZ, SCNHSZ, SYMESZ,
+ AUXESZ, LINESZ, RELSZ as numeric constants rather than uses of
+ sizeof. Define AOUTHDRSZ in all files.
+ * pe.h (AOUTSZ): Define by adding to AOUTHDRSZ.
+
+Fri Jun 21 11:17:46 1996 Richard Henderson <rth@tamu.edu>
+
+ * alpha.h: Add declarations for relocation types added for Alpha
+ OSF/1 3.0.
+
+Tue Jun 18 16:04:29 1996 Jeffrey A. Law <law@rtl.cygnus.com>
+
+ * h8300.h (H8300SMAGIC): Define.
+ (H8300SBADMAG): Define.
+
+Mon Jun 10 11:53:28 1996 Jeffrey A Law (law@cygnus.com)
+
+ * internal.h (R_BCC_INV, R_JMP_DEL): New relocations for
+ relaxing in the H8/300 series.
+
Thu May 16 15:49:22 1996 Ian Lance Taylor <ian@cygnus.com>
* sh.h (R_SH_CODE, R_SH_DATA, R_SH_LABEL): Define.
#define ARMBADMAG(x) (((x).f_magic != ARMMAGIC))
#define FILHDR struct external_filehdr
-#define FILHSZ sizeof(FILHDR)
+#define FILHSZ 20
/********************** AOUT "OPTIONAL HEADER" **********************/
AOUTHDR;
-#define AOUTSZ (sizeof(AOUTHDR))
+#define AOUTSZ 28
+#define AOUTHDRSZ 28
#define OMAGIC 0404 /* object files, eg as output */
#define ZMAGIC 0413 /* demand load format, eg normal ld output */
};
#define SCNHDR struct external_scnhdr
-#define SCNHSZ sizeof(SCNHDR)
+#define SCNHSZ 40
/*
* names of "special" sections
#define RELOC struct external_reloc
-#define RELSZ sizeof (RELOC)
+#define RELSZ 14
&& (x).f_magic != LYNXCOFFMAGIC)
#define FILHDR struct external_filehdr
-#define FILHSZ sizeof(FILHDR)
+#define FILHSZ 20
/********************** AOUT "OPTIONAL HEADER" **********************/
AOUTHDR;
-#define AOUTSZ (sizeof(AOUTHDR))
+#define AOUTSZ 28
+#define AOUTHDRSZ 28
#define OMAGIC 0404 /* object files, eg as output */
#define ZMAGIC 0413 /* demand load format, eg normal ld output */
};
#define SCNHDR struct external_scnhdr
-#define SCNHSZ sizeof(SCNHDR)
+#define SCNHSZ 40
/*
* names of "special" sections
/* compute size of a header */
/*#define AOUTSZ(aout) (sizeof(AOUTHDR)+(aout.tagentries*sizeof(TAGBITS)))*/
-#define AOUTSZ (sizeof(AOUTHDR))
-
+#define AOUTSZ 32
+#define AOUTHDRSZ 32
/********************** SECTION HEADER **********************/
#define SCNHDR struct external_scnhdr
-#define SCNHSZ sizeof(SCNHDR)
+#define SCNHSZ 44
/*
* names of "special" sections
#define SYMENT struct external_syment
-#define SYMESZ sizeof(SYMENT) /* FIXME - calc by hand */
+#define SYMESZ 24
#define AUXENT union external_auxent
-#define AUXESZ sizeof(AUXENT) /* FIXME - calc by hand */
+#define AUXESZ 24
# define _ETEXT "_etext"
struct internal_scnhdr
{
char s_name[SCNNMLEN]; /* section name */
- bfd_vma s_paddr; /* physical address, aliased s_nlib */
+
+ /* Physical address, aliased s_nlib.
+ In the pei format, this field is the virtual section size
+ (the size of the section after being loaded int memory),
+ NOT the physical address. */
+ bfd_vma s_paddr;
+
bfd_vma s_vaddr; /* virtual address */
bfd_vma s_size; /* section size */
bfd_vma s_scnptr; /* file ptr to raw data for section */
a 32/24bit absolute address and how have a 16bit absolute address. */
#define R_MOVL2 0x4d
+/* This reloc identifies a bCC:8 which will have it's condition
+ inverted and its target redirected to the target of the branch
+ in the following insn. */
+#define R_BCC_INV 0x4e
+
+/* This reloc identifies a jmp instruction that has been deleted. */
+#define R_JMP_DEL 0x4f
+
/* Z8k modes */
#define R_IMM16 0x01 /* 16 bit abs */
#define R_JR 0x02 /* jr 8 bit disp */
#define PAGEMAGICPEXECPAGED 0413 /* pure executable (paged) */
#define FILHDR struct external_filehdr
-#define FILHSZ sizeof(FILHDR)
+#define FILHSZ 20
/********************** AOUT "OPTIONAL HEADER" **********************/
}
AOUTHDR;
-#define AOUTSZ (sizeof(AOUTHDR))
-
+#define AOUTSZ 28
+#define AOUTHDRSZ 28
/********************** SECTION HEADER **********************/
#define _COMMENT ".comment"
#define SCNHDR struct external_scnhdr
-#define SCNHSZ sizeof(SCNHDR)
+#define SCNHSZ 40
/********************** LINE NUMBERS **********************/
#define LINENO struct external_lineno
-#define LINESZ sizeof(LINENO)
+#define LINESZ 6
/********************** SYMBOLS **********************/
#define RELOC struct external_reloc
-#define RELSZ sizeof(struct external_reloc)
+#ifdef M68K_COFF_OFFSET
+#define RELSZ 14
+#else
+#define RELSZ 10
+#endif
#endif /* GNU_COFF_M68K_H */
#define FILHDR struct external_PE_filehdr
-
+#undef FILHSZ
+#define FILHSZ 152
#endif
#undef AOUTSZ
-#define AOUTSZ sizeof(PEAOUTHDR)
+#define AOUTSZ (AOUTHDRSZ + 196)
#undef E_FILNMLEN
#define E_FILNMLEN 18 /* # characters in a file name */
};
#define FILHDR struct external_filehdr
-#define FILHSZ sizeof(FILHDR)
+#define FILHSZ 20
/* Bits for f_flags:
* F_RELFLG relocation info stripped from file
}
AOUTHDR;
-#define AOUTSZ (sizeof(AOUTHDR))
-
+#define AOUTSZ 28
+#define AOUTHDRSZ 28
/********************** SECTION HEADER **********************/
};
#define SCNHDR struct external_scnhdr
-#define SCNHSZ sizeof(SCNHDR)
+#define SCNHSZ 40
/*
* names of "special" sections
((x).f_magic!=SH_ARCH_MAGIC_LITTLE))
#define FILHDR struct external_filehdr
-#define FILHSZ sizeof(FILHDR)
+#define FILHSZ 20
/********************** AOUT "OPTIONAL HEADER" **********************/
AOUTHDR;
-#define AOUTHDRSZ (sizeof(AOUTHDR))
-#define AOUTSZ (sizeof(AOUTHDR))
+#define AOUTHDRSZ 28
+#define AOUTSZ 28
#define SCNHDR struct external_scnhdr
-#define SCNHSZ sizeof(SCNHDR)
+#define SCNHSZ 40
/********************** LINE NUMBERS **********************/
#define PUT_LINENO_LNNO(abfd,val, ext) bfd_h_put_32(abfd,val, (bfd_byte *) (ext->l_lnno));
#define LINENO struct external_lineno
-#define LINESZ sizeof(LINENO)
+#define LINESZ 8
/********************** SYMBOLS **********************/
/* Target description. We could replace this with a pointer to the bfd,
but that would require one. There currently isn't any such requirement
so to avoid introducing one we record these explicitly. */
+ /* The bfd_flavour. This can be bfd_target_unknown_flavour. */
+ enum bfd_flavour flavour;
/* The bfd_arch value. */
enum bfd_architecture arch;
/* The bfd_mach value. */
extern int print_insn_z8002 PARAMS ((bfd_vma, disassemble_info*));
extern int print_insn_h8300 PARAMS ((bfd_vma, disassemble_info*));
extern int print_insn_h8300h PARAMS ((bfd_vma, disassemble_info*));
+extern int print_insn_h8300s PARAMS ((bfd_vma, disassemble_info*));
extern int print_insn_h8500 PARAMS ((bfd_vma, disassemble_info*));
extern int print_insn_alpha PARAMS ((bfd_vma, disassemble_info*));
extern int print_insn_big_arm PARAMS ((bfd_vma, disassemble_info*));
extern int print_insn_little_arm PARAMS ((bfd_vma, disassemble_info*));
extern int print_insn_sparc PARAMS ((bfd_vma, disassemble_info*));
-extern int print_insn_sparc64 PARAMS ((bfd_vma, disassemble_info*));
extern int print_insn_big_a29k PARAMS ((bfd_vma, disassemble_info*));
extern int print_insn_little_a29k PARAMS ((bfd_vma, disassemble_info*));
extern int print_insn_i960 PARAMS ((bfd_vma, disassemble_info*));
/* Macro to initialize a disassemble_info struct. This should be called
by all applications creating such a struct. */
#define INIT_DISASSEMBLE_INFO(INFO, STREAM, FPRINTF_FUNC) \
+ (INFO).flavour = bfd_target_unknown_flavour, \
+ (INFO).arch = bfd_arch_unknown, \
+ (INFO).mach = 0, \
+ (INFO).endian = BFD_ENDIAN_UNKNOWN, \
+ INIT_DISASSEMBLE_INFO_NO_ARCH(INFO, STREAM, FPRINTF_FUNC)
+
+/* Call this macro to initialize only the internal variables for the
+ disassembler. Architecture dependent things such as byte order, or machine
+ variant are not touched by this macro. This makes things much easier for
+ GDB which must initialize these things seperatly. */
+
+#define INIT_DISASSEMBLE_INFO_NO_ARCH(INFO, STREAM, FPRINTF_FUNC) \
(INFO).fprintf_func = (FPRINTF_FUNC), \
(INFO).stream = (STREAM), \
(INFO).buffer = NULL, \
(INFO).read_memory_func = buffer_read_memory, \
(INFO).memory_error_func = perror_memory, \
(INFO).print_address_func = generic_print_address, \
- (INFO).arch = bfd_arch_unknown, \
- (INFO).mach = 0, \
- (INFO).endian = BFD_ENDIAN_UNKNOWN, \
(INFO).flags = 0, \
(INFO).insn_info_valid = 0
+Fri Aug 30 17:06:21 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * common.h (EM_SH): Define.
+
+Mon Jul 22 18:59:55 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * mips.h (SHT_MIPS_IFACE, SHT_MIPS_CONTENT): Define.
+ (SHT_MIPS_SYMBOL_LIB): Define.
+ (SHF_MIPS_MERGE, SHF_MIPS_ADDR32, SHF_MIPS_ADDR64): Define.
+ (SHF_MIPS_NOSTRIP, SHF_MIPS_LOCAL, SHF_MIPS_NAMES): Define.
+
+Thu Jul 18 19:12:15 1996 Stan Shebs <shebs@andros.cygnus.com>
+
+ * dwarf2.h: New file.
+
+Fri Jun 21 12:33:24 1996 Richard Henderson <rth@tamu.edu>
+
+ * alpha.h: New file.
+ * common.h (EM_ALPHA): Define.
+
Fri May 31 17:28:05 1996 Ian Lance Taylor <ian@cygnus.com>
* mips.h (Elf_External_Options, Elf_Internal_Options): Define.
#define EM_PPC 20 /* PowerPC */
+#define EM_SH 42 /* Hitachi SH */
+
/* If it is necessary to assign new unofficial EM_* values, please pick large
random numbers (0x8523, 0xa7f2, etc.) to minimize the chances of collision
- with official or non-GNU unofficial values. */
+ with official or non-GNU unofficial values.
+
+ NOTE: Do not just increment the most recent number by one.
+ Somebody else somewhere will do exactly the same thing, and you
+ will have a collision. Instead, pick a random number. */
/* Cygnus PowerPC ELF backend. Written in the absence of an ABI. */
#define EM_CYGNUS_POWERPC 0x9025
#define EM_PPC_OLD 17
+
+/* Alpha backend magic number. Written in the absence of an ABI. */
+#define EM_ALPHA 0x9026
+
+
+
+/* See the above comment before you add a new EM_* value here. */
+
/* Values for e_version */
#define EV_NONE 0 /* Invalid ELF version */
/* Section contains register usage information. */
#define SHT_MIPS_REGINFO 0x70000006
+/* Section contains interface information. */
+#define SHT_MIPS_IFACE 0x7000000b
+
+/* Section contains description of contents of another section. */
+#define SHT_MIPS_CONTENT 0x7000000c
+
/* Section contains miscellaneous options. */
#define SHT_MIPS_OPTIONS 0x7000000d
/* DWARF debugging section. */
#define SHT_MIPS_DWARF 0x7000001e
+/* I'm not sure what this is, but it appears on Irix 6. */
+#define SHT_MIPS_SYMBOL_LIB 0x70000020
+
/* Events section. */
#define SHT_MIPS_EVENTS 0x70000021
/* This section must be in the global data area. */
#define SHF_MIPS_GPREL 0x10000000
+
+/* This section should be merged. */
+#define SHF_MIPS_MERGE 0x20000000
+
+/* This section contains 32 bit addresses. */
+#define SHF_MIPS_ADDR32 0x40000000
+
+/* This section contains 64 bit addresses. */
+#define SHF_MIPS_ADDR64 0x80000000
+
+/* This section may not be stripped. */
+#define SHF_MIPS_NOSTRIP 0x08000000
+
+/* This section is local to threads. */
+#define SHF_MIPS_LOCAL 0x04000000
+
+/* Linker should generate implicit weak names for this section. */
+#define SHF_MIPS_NAMES 0x02000000
\f
/* Processor specific program header types. */
extern void freeargv PARAMS ((char **));
-/* Return the last component of a path name. */
+/* Return the last component of a path name. Note that we can't use a
+ prototype here because the parameter is declared inconsistently
+ across different systems, sometimes as "char *" and sometimes as
+ "const char *" */
extern char *basename ();
__volatile__ libiberty_voidfn xexit;
#endif
+#ifndef PRIVATE_XMALLOC
+
/* Set the program name used by xmalloc. */
extern void xmalloc_set_program_name PARAMS ((const char *));
extern PTR xrealloc ();
+#endif /* PRIVATE_XMALLOC */
+
/* Copy a string into a memory buffer without fail. */
extern char *xstrdup PARAMS ((const char *));
_obstack_newchunk (__o, __len); \
if (!__o->alloc_failed) \
{ \
- bcopy (where, __o->next_free, __len); \
+ memcpy (__o->next_free, where, __len); \
__o->next_free += __len; \
} \
(void) 0; })
_obstack_newchunk (__o, __len + 1); \
if (!__o->alloc_failed) \
{ \
- bcopy (where, __o->next_free, __len); \
+ memcpy (__o->next_free, where, __len); \
__o->next_free += __len; \
*(__o->next_free)++ = 0; \
} \
(((h)->next_free + (h)->temp > (h)->chunk_limit) \
? (_obstack_newchunk ((h), (h)->temp), 0) : 0), \
((h)->alloc_failed ? 0 : \
- (bcopy (where, (h)->next_free, (h)->temp), \
+ (memcpy ((h)->next_free, where, (h)->temp), \
(h)->next_free += (h)->temp)))
#define obstack_grow0(h,where,length) \
(((h)->next_free + (h)->temp + 1 > (h)->chunk_limit) \
? (_obstack_newchunk ((h), (h)->temp + 1), 0) : 0), \
((h)->alloc_failed ? 0 : \
- (bcopy (where, (h)->next_free, (h)->temp), \
+ (memcpy ((h)->next_free, where, (h)->temp), \
(h)->next_free += (h)->temp, \
*((h)->next_free)++ = 0)))
+Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
+
+ * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
+ OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
+ OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
+ OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
+ OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
+ Defined.
+
+Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
+
+ * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
+ a 3 bit space id instead of a 2 bit space id.
+
+Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
+
+ * h8300.h (SN): Define.
+ (eepmov.b): Renamed from "eepmov"
+ (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
+ with them.
+
+Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
+ Williams <steve@icarus.com>.
+
+Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
+
+ * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
+
+Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
+
+ * m68k.h (mcf5200): New macro.
+ Document names of coldfire control registers.
+
+Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
+
+ * h8300.h (SRC_IN_DST): Define.
+
+ * h8300.h (UNOP3): Mark the register operand in this insn
+ as a source operand, not a destination operand.
+ (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
+ (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
+ register operand with SRC_IN_DST.
+
+Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
+
+ * alpha.h: New file.
+
+Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * rs6k.h: Remove obsolete file.
+
+Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
+ fdivp, and fdivrp. Add ffreep.
+
+Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
+
+ * h8300.h: Reorder various #defines for readability.
+ (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
+ (BITOP): Accept additional (unused) argument. All callers changed.
+ (EBITOP): Likewise.
+ (O_LAST): Bump.
+ (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
+
+ * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
+ (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
+ (BITOP, EBITOP): Handle new H8/S addressing modes for
+ bit insns.
+ (UNOP3): Handle new shift/rotate insns on the H8/S.
+ (insns using exr): New instructions.
+ (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
+
Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
* h8300.h (add.l): Undo Apr 5th change. The manual I had
#define HexE 14
#define HexF 15
-#define MEMRELAX 0x20 /* move insn which may relax */
-#define SRC 0x40
-#define DST 0x80
#define L_8 0x01
#define L_16 0x02
#define L_32 0x04
#define L_P 0x08
#define L_24 0x10
+#define MEMRELAX 0x20 /* move insn which may relax */
+#define SRC 0x40
+#define DST 0x80
#define REG 0x100
+#define EXR 0x200
+#define MACREG 0x800
+#define SRC_IN_DST 0x400
#define IMM 0x1000
#define DISP 0x2000
#define IND 0x4000
#define IGNORE 0x200000
#define E 0x400000 /* FIXME: end of nibble sequence? */
#define L_2 0x800000
-#define CCR 0x4000000
-#define ABS 0x8000000
#define B30 0x1000000 /* bit 3 must be low */
#define B31 0x2000000 /* bit 3 must be high */
+#define CCR 0x4000000
+#define ABS 0x8000000
#define ABSJMP 0x10000000
#define ABS8MEM 0x20000000
#define PCREL 0x40000000
#define IMM2 IMM|L_2
#define SIZE (L_2|L_3|L_8|L_16|L_32|L_P|L_24)
-#define MODE (REG|IMM|DISP|IND|INC|DEC|CCR|ABS|MEMIND)
+#define MODE (REG|IMM|DISP|IND|INC|DEC|CCR|ABS|MEMIND|EXR)
#define RD8 (DST|L_8|REG)
#define RD16 (DST|L_16|REG)
#define ABS16DST (DST|ABS|L_16)
#define ABS24SRC (SRC|ABS|L_24)
#define ABS24DST (DST|ABS|L_24)
+#define ABS32SRC (SRC|ABS|L_32)
+#define ABS32DST (DST|ABS|L_32)
#define RDDEC (DST|DEC)
#define RSINC (SRC|INC)
+#define RDINC (DST|INC)
#define RDIND (DST|IND)
#define RSIND (SRC|IND)
#ifdef DEFINE_TABLE
-#define BITOP(code, imm, name, op00, op01,op10,op11, op20,op21)\
+#define BITOP(code, imm, name, op00, op01,op10,op11, op20,op21,op30)\
{ code, 1, 2, name, {imm,RD8,E}, {op00, op01, imm, RD8, E, 0, 0, 0, 0}, 0, 0, 0, 0},\
{ code, 1, 6, name, {imm,RDIND,E}, {op10, op11, B30|RDIND, 0, op00,op01, imm, 0, E}, 0, 0, 0, 0},\
-{ code, 1, 6, name, {imm,ABS8DST,E},{op20, op21, ABS8DST, IGNORE, op00,op01, imm, 0,E}, 0, 0, 0, 0}
+{ code, 1, 6, name, {imm,ABS8DST,E},{op20, op21, ABS8DST, IGNORE, op00,op01, imm, 0,E}, 0, 0, 0, 0}\
+,{ code, 1, 6, name, {imm,ABS16DST,E},{0x6,0xa,0x1,op30,ABS16DST,IGNORE,IGNORE,IGNORE, op00,op01, imm, 0,E}, 0, 0, 0, 0},\
+{ code, 1, 6, name, {imm,ABS32DST,E},{0x6,0xa,0x3,op30,ABS32DST,IGNORE,IGNORE,IGNORE,IGNORE,IGNORE,IGNORE,IGNORE, op00,op01, imm, 0,E}, 0, 0, 0, 0}
-#define EBITOP(code, imm, name, op00, op01,op10,op11, op20,op21)\
- BITOP(code,imm, name, op00+1, op01, op10,op11, op20,op21),\
- BITOP(code,RS8, name, op00, op01, op10,op11, op20,op21)
+
+#define EBITOP(code, imm, name, op00, op01,op10,op11, op20,op21,op30)\
+ BITOP(code,imm, name, op00+1, op01, op10,op11, op20,op21,op30),\
+ BITOP(code,RS8, name, op00, op01, op10,op11, op20,op21,op30)
#define WTWOP(code,name, op1, op2) \
{ code, 1, 2, name, {RS16, RD16, E}, { op1, op2, RS16, RD16, E, 0, 0, 0, 0}, 0, 0, 0, 0}
#define UNOP3(code, name, op1, op2, op3) \
{ O(code,SB), 1, 2, name, {OR8, E, 0}, {op1, op2, op3+0, OR8, E, 0, 0, 0, 0}, 0, 0, 0, 0}, \
{ O(code,SW), 0, 2, name, {OR16, E, 0}, {op1, op2, op3+1, OR16, E, 0, 0, 0, 0}, 0, 0, 0, 0}, \
-{ O(code,SL), 0, 2, name, {OR32, E, 0}, {op1, op2, op3+3, OR32|B30, E, 0, 0, 0, 0}, 0, 0, 0, 0}
+{ O(code,SL), 0, 2, name, {OR32, E, 0}, {op1, op2, op3+3, OR32|B30, E, 0, 0, 0, 0}, 0, 0, 0, 0} \
+,{ O(code,SB), 1, 2, name, {IMM, OR8 | SRC_IN_DST, E}, {op1, op2, op3+4, OR8 | SRC_IN_DST, E, 0, 0, 0, 0}, 0, 0, 0, 0}, \
+{ O(code,SW), 0, 2, name, {IMM, OR16 | SRC_IN_DST, E}, {op1, op2, op3+5, OR16 | SRC_IN_DST, E, 0, 0, 0, 0}, 0, 0, 0, 0}, \
+{ O(code,SL), 0, 2, name, {IMM, OR32 | SRC_IN_DST, E}, {op1, op2, op3+7, OR32 | SRC_IN_DST|B30 , E, 0, 0, 0, 0}, 0, 0, 0, 0}
+
#define IMM32LIST IMM32,IGNORE,IGNORE,IGNORE,IGNORE,IGNORE,IGNORE,IGNORE
#define IMM24LIST IMM24,IGNORE,IGNORE,IGNORE,IGNORE,IGNORE
#define IMM16LIST IMM16,IGNORE,IGNORE,IGNORE
#define A16LIST L_16,IGNORE,IGNORE,IGNORE
#define DISP24LIST DISP|L_24,IGNORE,IGNORE,IGNORE,IGNORE,IGNORE
+#define DISP32LIST DISP|L_32,IGNORE,IGNORE,IGNORE,IGNORE,IGNORE,IGNORE,IGNORE
#define ABS24LIST ABS|L_24,IGNORE,IGNORE,IGNORE,IGNORE,IGNORE
+#define ABS32LIST ABS|L_32,IGNORE,IGNORE,IGNORE,IGNORE,IGNORE,IGNORE,IGNORE
#define A24LIST L_24,IGNORE,IGNORE,IGNORE,IGNORE,IGNORE
+#define A32LIST L_32,IGNORE,IGNORE,IGNORE,IGNORE,IGNORE,IGNORE,IGNORE
#define PREFIX32 0x0,0x1,0x0,0x0
#define PREFIXLDC 0x0,0x1,0x4,0x0
#define O_ADDS 77
#define O_SYSCALL 78
#define O_MOV_TO_REG 79
-#define O_LAST 80
+#define O_TAS 80
+#define O_CLRMAC 82
+#define O_LDMAC 83
+#define O_MAC 84
+#define O_LDM 85
+#define O_STM 86
+#define O_LAST 87
#define SB 0
#define SW 1
#define SL 2
+#define SN 3
/* FIXME: Lots of insns have "E, 0, 0, 0, 0" in the nibble code sequences.
NEW_SOP(O(O_AND,SL),0,2,"and.l") ,{RS32,RD32,E },{0x0,0x1,0xF,0x0,0x6,0x6,B30|RS32,B30|RD32,E} EOP,
NEW_SOP(O(O_ANDC,SB),1,2,"andc"), {IMM8,CCR,E},{ 0x0,0x6,IMM8,IGNORE,E,0,0,0,0} EOP,
+ NEW_SOP(O(O_ANDC,SB),1,2,"andc"), {IMM8,EXR,E},{ 0x0,0x1,0x4,0x1,0x0,0x6,IMM8,IGNORE,E,0,0,0,0} EOP,
- BITOP(O(O_BAND,SB), IMM3,"band",0x7,0x6,0x7,0xC,0x7,0xE),
+ BITOP(O(O_BAND,SB), IMM3|B30,"band",0x7,0x6,0x7,0xC,0x7,0xE,0x0),
BRANCH(O(O_BRA,SB),"bra",0x0),
BRANCH(O(O_BRA,SB),"bt",0x0),
BRANCH(O(O_BRN,SB),"brn",0x1),
BRANCH(O(O_BGT,SB),"bgt",0xE),
BRANCH(O(O_BLE,SB),"ble",0xF),
- EBITOP(O(O_BCLR,SB),IMM3, "bclr", 0x6,0x2,0x7,0xD,0x7,0xF),
- BITOP(O(O_BIAND,SB),IMM3|B31,"biand",0x7,0x6,0x7,0xC,0x7,0xE),
- BITOP(O(O_BILD,SB), IMM3|B31,"bild", 0x7,0x7,0x7,0xC,0x7,0xE),
- BITOP(O(O_BIOR,SB), IMM3|B31,"bior", 0x7,0x4,0x7,0xC,0x7,0xE),
- BITOP(O(O_BIST,SB), IMM3|B31,"bist", 0x6,0x7,0x7,0xD,0x7,0xF),
- BITOP(O(O_BIXOR,SB),IMM3|B31,"bixor",0x7,0x5,0x7,0xC,0x7,0xE),
- BITOP(O(O_BLD,SB), IMM3|B30,"bld", 0x7,0x7,0x7,0xC,0x7,0xE),
- EBITOP(O(O_BNOT,SB),IMM3|B30,"bnot", 0x6,0x1,0x7,0xD,0x7,0xF),
- BITOP(O(O_BOR,SB), IMM3|B30,"bor", 0x7,0x4,0x7,0xC,0x7,0xE),
- EBITOP(O(O_BSET,SB),IMM3|B30,"bset", 0x6,0x0,0x7,0xD,0x7,0xF),
+ EBITOP(O(O_BCLR,SB),IMM3|B30,"bclr", 0x6,0x2,0x7,0xD,0x7,0xF,0x8),
+ BITOP(O(O_BIAND,SB),IMM3|B31,"biand",0x7,0x6,0x7,0xC,0x7,0xE,0x0),
+ BITOP(O(O_BILD,SB), IMM3|B31,"bild", 0x7,0x7,0x7,0xC,0x7,0xE,0x0),
+ BITOP(O(O_BIOR,SB), IMM3|B31,"bior", 0x7,0x4,0x7,0xC,0x7,0xE,0x0),
+ BITOP(O(O_BIST,SB), IMM3|B31,"bist", 0x6,0x7,0x7,0xD,0x7,0xF,0x8),
+ BITOP(O(O_BIXOR,SB),IMM3|B31,"bixor",0x7,0x5,0x7,0xC,0x7,0xE,0x0),
+ BITOP(O(O_BLD,SB), IMM3|B30,"bld", 0x7,0x7,0x7,0xC,0x7,0xE,0x0),
+ EBITOP(O(O_BNOT,SB),IMM3|B30,"bnot", 0x6,0x1,0x7,0xD,0x7,0xF,0x8),
+ BITOP(O(O_BOR,SB), IMM3|B30,"bor", 0x7,0x4,0x7,0xC,0x7,0xE,0x0),
+ EBITOP(O(O_BSET,SB),IMM3|B30,"bset", 0x6,0x0,0x7,0xD,0x7,0xF,0x8),
SOP(O(O_BSR,SB),6,"bsr"),{DISP8,E,0},{ 0x5,0x5,DISP8,IGNORE,E,0,0,0,0} EOP,
SOP(O(O_BSR,SB),6,"bsr"),{DISP16,E,0},{ 0x5,0xC,0x0,0x0,DISP16,IGNORE,IGNORE,IGNORE,E,0,0,0,0} EOP,
- BITOP(O(O_BST,SB), IMM3|B30,"bst",0x6,0x7,0x7,0xD,0x7,0xF),
- EBITOP(O(O_BTST,SB), IMM3|B30,"btst",0x6,0x3,0x7,0xC,0x7,0xE),
- BITOP(O(O_BXOR,SB), IMM3|B30,"bxor",0x7,0x5,0x7,0xC,0x7,0xE),
+ BITOP(O(O_BST,SB), IMM3|B30,"bst",0x6,0x7,0x7,0xD,0x7,0xF,0x8),
+ EBITOP(O(O_BTST,SB), IMM3|B30,"btst",0x6,0x3,0x7,0xC,0x7,0xE,0x0),
+ BITOP(O(O_BXOR,SB), IMM3|B30,"bxor",0x7,0x5,0x7,0xC,0x7,0xE,0x0),
TWOOP(O(O_CMP,SB), "cmp.b",0xA,0x1,0xC),
WTWOP(O(O_CMP,SW), "cmp.w",0x1,0xD),
NEW_SOP(O(O_DIVS,SB),0,20,"divxs.b") ,{RS8,RD16,E },{0x0,0x1,0xD,0x0,0x5,0x1,RS8,RD16,E} EOP,
NEW_SOP(O(O_DIVS,SW),0,02,"divxs.w") ,{RS16,RD32,E },{0x0,0x1,0xD,0x0,0x5,0x3,RS16,B30|RD32,E} EOP,
- NEW_SOP(O(O_EEPMOV,SB),1,50,"eepmov"),{ E,0,0},{0x7,0xB,0x5,0xC,0x5,0x9,0x8,0xF,E}EOP,
+ NEW_SOP(O(O_EEPMOV,SB),1,50,"eepmov.b"),{E,0,0},{0x7,0xB,0x5,0xC,0x5,0x9,0x8,0xF,E}EOP,
NEW_SOP(O(O_EEPMOV,SW),0,50,"eepmov.w"),{E,0,0},{0x7,0xB,0xD,0x4,0x5,0x9,0x8,0xF,E} EOP,
NEW_SOP(O(O_EXTS,SW),0,2,"exts.w"),{OR16,E,0},{0x1,0x7,0xD,OR16,E }EOP,
NEW_SOP(O(O_LDC,SB),1,2,"ldc"),{IMM8,CCR,E}, { 0x0,0x7,IMM8,IGNORE,E,0,0,0,0}EOP,
NEW_SOP(O(O_LDC,SB),1,2,"ldc"),{OR8,CCR,E}, { 0x0,0x3,0x0,OR8,E,0,0,0,0}EOP,
NEW_SOP(O(O_LDC,SB),0,2,"ldc"),{ABS16SRC,CCR,E}, {PREFIXLDC,0x6,0xB,0x0,0x0,ABS16SRC,IGNORE,IGNORE,IGNORE,E}EOP,
- NEW_SOP(O(O_LDC,SB),0,2,"ldc"),{ABS24SRC,CCR,E}, {PREFIXLDC,0x6,0xB,0x2,0x0,0x0,0x0,SRC|ABS24LIST,E}EOP,
+ NEW_SOP(O(O_LDC,SB),0,2,"ldc"),{ABS32SRC,CCR,E}, {PREFIXLDC,0x6,0xB,0x2,0x0,SRC|ABS32LIST,E}EOP,
NEW_SOP(O(O_LDC,SB),0,2,"ldc"),{DISP|SRC|L_16,CCR,E},{PREFIXLDC,0x6,0xF,B30|DISPREG,0,DISP|L_16,IGNORE,IGNORE,IGNORE,E}EOP,
- NEW_SOP(O(O_LDC,SB),0,2,"ldc"),{DISP|SRC|L_24,CCR,E},{PREFIXLDC,0x7,0x8,B30|DISPREG,0,0x6,0xB,0x2,0x0,0x0,0x0,SRC|DISP24LIST,E}EOP,
+ NEW_SOP(O(O_LDC,SB),0,2,"ldc"),{DISP|SRC|L_32,CCR,E},{PREFIXLDC,0x7,0x8,B30|DISPREG,0,0x6,0xB,0x2,0x0,SRC|DISP32LIST,E}EOP,
NEW_SOP(O(O_LDC,SB),0,2,"ldc"),{RSINC,CCR,E}, {PREFIXLDC,0x6,0xD,B30|RSINC,0x0,E}EOP,
NEW_SOP(O(O_LDC,SB),0,2,"ldc"),{RSIND,CCR,E}, {PREFIXLDC,0x6,0x9,B30|RDIND,0x0,E} EOP,
+ NEW_SOP(O(O_LDC,SB),1,2,"ldc"),{IMM8,EXR,E}, { 0x0,0x1,0x4,0x1,0x0,0x7,IMM8,IGNORE,E,0,0,0,0}EOP,
+ NEW_SOP(O(O_LDC,SB),1,2,"ldc"),{OR8,EXR,E}, { 0x0,0x3,0x1,OR8,E,0,0,0,0}EOP,
+ NEW_SOP(O(O_LDC,SB),0,2,"ldc"),{ABS16SRC,EXR,E}, { 0x0,0x1,0x4,0x1,0x6,0xb,0x0,0x0,ABS16SRC,IGNORE,IGNORE,IGNORE,E}EOP,
+ NEW_SOP(O(O_LDC,SB),0,2,"ldc"),{ABS32SRC,EXR,E}, { 0x0,0x1,0x4,0x1,0x6,0xb,0x2,0x0,SRC|ABS32LIST,E}EOP,
+ NEW_SOP(O(O_LDC,SB),0,2,"ldc"),{DISP|SRC|L_16,EXR,E},{ 0x0,0x1,0x4,0x1,0x6,0xf,B30|DISPREG,0,DISP|L_16,IGNORE,IGNORE,IGNORE,E}EOP,
+ NEW_SOP(O(O_LDC,SB),0,2,"ldc"),{DISP|SRC|L_32,EXR,E},{ 0x0,0x1,0x4,0x1,0x7,0x8,B30|DISPREG,0,0x6,0xB,0x2,0x0,SRC|DISP32LIST,E}EOP,
+ NEW_SOP(O(O_LDC,SB),0,2,"ldc"),{RSINC,EXR,E}, { 0x0,0x1,0x4,0x1,0x6,0xd,B30|RSINC,0x0,E}EOP,
+ NEW_SOP(O(O_LDC,SB),0,2,"ldc"),{RSIND,EXR,E}, { 0x0,0x1,0x4,0x1,0x6,0x9,B30|RDIND,0x0,E} EOP,
SOP(O(O_MOV_TO_REG,SB),4,"mov.b"),{ABS|SRC|L_16|MEMRELAX,RD8,E}, { 0x6,0xA,0x0,RD8,SRC|ABS|MEMRELAX|A16LIST,E}EOP,
- SOP(O(O_MOV_TO_REG,SB),6,"mov.b"),{ABS|SRC|L_24|MEMRELAX,RD8,E }, { 0x6,0xA,0x2,RD8,0x0,0x0,SRC|ABS|MEMRELAX|A24LIST,E }EOP,
+ SOP(O(O_MOV_TO_REG,SB),6,"mov.b"),{ABS|SRC|L_32|MEMRELAX,RD8,E }, { 0x6,0xA,0x2,RD8,SRC|ABS|MEMRELAX|A32LIST,E }EOP,
SOP(O(O_MOV_TO_MEM,SB),4,"mov.b"),{RS8,ABS|L_16|MEMRELAX|DST,E}, { 0x6,0xA,0x8,RS8,DST|ABS|MEMRELAX|A16LIST,E}EOP,
- SOP(O(O_MOV_TO_MEM,SB),6,"mov.b"),{RS8,ABS|DST|L_24|MEMRELAX,E }, { 0x6,0xA,0xA,RS8,0x0,0x0,DST|ABS|MEMRELAX|A24LIST,E }EOP,
+ SOP(O(O_MOV_TO_MEM,SB),6,"mov.b"),{RS8,ABS|DST|L_32|MEMRELAX,E }, { 0x6,0xA,0xA,RS8,DST|ABS|MEMRELAX|A32LIST,E }EOP,
- SOP(O(O_MOV_TO_REG,SB),6,"mov.b"),{DISP|L_24|SRC,RD8,E}, { 0x7,0x8,B30|DISPREG,0x0,0x6,0xA,0x2,RD8,0x0,0x0,SRC|DISP24LIST,E}EOP,
- SOP(O(O_MOV_TO_MEM,SB),6,"mov.b"),{RS8,DISP|L_24|DST,E}, { 0x7,0x8,B30|DISPREG,0x0,0x6,0xA,0xA,RS8,0x0,0x0,DST|DISP24LIST,E}EOP,
+ SOP(O(O_MOV_TO_REG,SB),6,"mov.b"),{DISP|L_32|SRC,RD8,E}, { 0x7,0x8,B30|DISPREG,0x0,0x6,0xA,0x2,RD8,SRC|DISP32LIST,E}EOP,
+ SOP(O(O_MOV_TO_MEM,SB),6,"mov.b"),{RS8,DISP|L_32|DST,E}, { 0x7,0x8,B30|DISPREG,0x0,0x6,0xA,0xA,RS8,DST|DISP32LIST,E}EOP,
SOP(O(O_MOV_TO_MEM,SB),4,"mov.b"),{RS8,ABS8DST,E}, { 0x3,RS8,ABS8DST,IGNORE,E,0,0,0,0}EOP,
SOP(O(O_MOV_TO_MEM,SW),6,"mov.w"),{RS16,RDIND,E}, { 0x6,0x9,RDIND|B31,RS16,E,0,0,0,0}EOP,
- SOP(O(O_MOV_TO_REG,SW),6,"mov.w"),{DISP|L_24|SRC,RD16,E},{ 0x7,0x8,B30|DISPREG,0x0,0x6,0xB,0x2,RD16,0x0,0x0,SRC|DISP24LIST,E}EOP,
- SOP(O(O_MOV_TO_MEM,SW),6,"mov.w"),{RS16,DISP|L_24|DST,E},{ 0x7,0x8,B30|DISPREG,0x0,0x6,0xB,0xA,RS16,0x0,0x0,DST|DISP24LIST,E}EOP,
- SOP(O(O_MOV_TO_REG,SW),6,"mov.w"),{ABS|L_24|MEMRELAX|SRC,RD16,E },{ 0x6,0xB,0x2,RD16,0x0,0x0,SRC|MEMRELAX|ABS24LIST,E }EOP,
- SOP(O(O_MOV_TO_MEM,SW),6,"mov.w"),{RS16,ABS|L_24|MEMRELAX|DST,E },{ 0x6,0xB,0xA,RS16,0x0,0x0,DST|MEMRELAX|ABS24LIST,E }EOP,
+ SOP(O(O_MOV_TO_REG,SW),6,"mov.w"),{DISP|L_32|SRC,RD16,E},{ 0x7,0x8,B30|DISPREG,0x0,0x6,0xB,0x2,RD16,SRC|DISP32LIST,E}EOP,
+ SOP(O(O_MOV_TO_MEM,SW),6,"mov.w"),{RS16,DISP|L_32|DST,E},{ 0x7,0x8,B30|DISPREG,0x0,0x6,0xB,0xA,RS16,DST|DISP32LIST,E}EOP,
+ SOP(O(O_MOV_TO_REG,SW),6,"mov.w"),{ABS|L_32|MEMRELAX|SRC,RD16,E },{ 0x6,0xB,0x2,RD16,SRC|MEMRELAX|ABS32LIST,E }EOP,
+ SOP(O(O_MOV_TO_MEM,SW),6,"mov.w"),{RS16,ABS|L_32|MEMRELAX|DST,E },{ 0x6,0xB,0xA,RS16,DST|MEMRELAX|ABS32LIST,E }EOP,
SOP(O(O_MOV_TO_REG,SW),2,"mov.w"),{RS16,RD16,E}, { 0x0,0xD,RS16, RD16,E,0,0,0,0}EOP,
SOP(O(O_MOV_TO_REG,SW),4,"mov.w"),{IMM16,RD16,E}, { 0x7,0x9,0x0,RD16,IMM16,IGNORE,IGNORE,IGNORE,E}EOP,
SOP(O(O_MOV_TO_REG,SW),4,"mov.w"),{RSIND,RD16,E}, { 0x6,0x9,B30|RSIND,RD16,E,0,0,0,0}EOP,
SOP(O(O_MOV_TO_REG,SL),4,"mov.l"),{RSIND,RD32,E}, { PREFIX32,0x6,0x9,RSIND|B30,B30|RD32,E,0,0,0,0 }EOP,
SOP(O(O_MOV_TO_REG,SL),6,"mov.l"),{DISP16SRC,RD32,E}, { PREFIX32,0x6,0xF,DISPREG|B30,B30|RD32,DISP16SRC,IGNORE,IGNORE,IGNORE,E }EOP,
- SOP(O(O_MOV_TO_REG,SL),6,"mov.l"),{DISP|L_24|SRC,RD32,E},{ PREFIX32,0x7,0x8,B30|DISPREG,0x0,0x6,0xB,0x2,B30|RD32,0x0,0x0,SRC|DISP24LIST,E }EOP,
+ SOP(O(O_MOV_TO_REG,SL),6,"mov.l"),{DISP|L_32|SRC,RD32,E},{ PREFIX32,0x7,0x8,B30|DISPREG,0x0,0x6,0xB,0x2,B30|RD32,SRC|DISP32LIST,E }EOP,
SOP(O(O_MOV_TO_REG,SL),6,"mov.l"),{RSINC,RD32,E}, { PREFIX32,0x6,0xD,B30|RSINC,B30|RD32,E,0,0,0,0 }EOP,
SOP(O(O_MOV_TO_REG,SL),6,"mov.l"),{ABS16SRC,RD32,E}, { PREFIX32,0x6,0xB,0x0,B30|RD32,ABS16SRC,IGNORE,IGNORE,IGNORE,E }EOP,
- SOP(O(O_MOV_TO_REG,SL),6,"mov.l"),{ABS24SRC|MEMRELAX,RD32,E }, { PREFIX32,0x6,0xB,0x2,B30|RD32,0x0,0x0,SRC|MEMRELAX|ABS24LIST,E }EOP,
+ SOP(O(O_MOV_TO_REG,SL),6,"mov.l"),{ABS32SRC|MEMRELAX,RD32,E }, { PREFIX32,0x6,0xB,0x2,B30|RD32,SRC|MEMRELAX|ABS32LIST,E }EOP,
SOP(O(O_MOV_TO_MEM,SL),6,"mov.l"),{RS32,RDIND,E}, { PREFIX32,0x6,0x9,RDIND|B31,B30|RS32,E,0,0,0,0 }EOP,
SOP(O(O_MOV_TO_MEM,SL),6,"mov.l"),{RS32,DISP16DST,E}, { PREFIX32,0x6,0xF,DISPREG|B31,B30|RS32,DISP16DST,IGNORE,IGNORE,IGNORE,E }EOP,
- SOP(O(O_MOV_TO_MEM,SL),6,"mov.l"),{RS32,DISP|L_24|DST,E},{ PREFIX32,0x7,0x8,B31|DISPREG,0x0,0x6,0xB,0xA,B30|RS32,0x0,0x0,DST|DISP24LIST,E }EOP,
+ SOP(O(O_MOV_TO_MEM,SL),6,"mov.l"),{RS32,DISP|L_32|DST,E},{ PREFIX32,0x7,0x8,B31|DISPREG,0x0,0x6,0xB,0xA,B30|RS32,DST|DISP32LIST,E }EOP,
SOP(O(O_MOV_TO_MEM,SL),6,"mov.l"),{RS32,RDDEC,E}, { PREFIX32,0x6,0xD,RDDEC|B31,B30|RS32,E,0,0,0,0 }EOP,
SOP(O(O_MOV_TO_MEM,SL),6,"mov.l"),{RS32,ABS16DST,E}, { PREFIX32,0x6,0xB,0x8,B30|RS32,ABS16DST,IGNORE,IGNORE,IGNORE,E }EOP,
- SOP(O(O_MOV_TO_MEM,SL),6,"mov.l"),{RS32,ABS24DST|MEMRELAX,E }, { PREFIX32,0x6,0xB,0xA,B30|RS32,0x0,0x0,DST|MEMRELAX|ABS24LIST,E }EOP,
+ SOP(O(O_MOV_TO_MEM,SL),6,"mov.l"),{RS32,ABS32DST|MEMRELAX,E }, { PREFIX32,0x6,0xB,0xA,B30|RS32,DST|MEMRELAX|ABS32LIST,E }EOP,
SOP(O(O_MOV_TO_REG,SB),10,"movfpe"),{ABS16SRC,RD8,E},{ 0x6,0xA,0x4,RD8,ABS16SRC,IGNORE,IGNORE,IGNORE,E}EOP,
SOP(O(O_MOV_TO_MEM,SB),10,"movtpe"),{RS8,ABS16DST,E},{ 0x6,0xA,0xC,RS8,ABS16DST,IGNORE,IGNORE,IGNORE,E}EOP,
NEW_SOP(O(O_NEG,SW),0,2,"neg.w"),{ OR16,E,0},{ 0x1,0x7,0x9,OR16,E}EOP,
NEW_SOP(O(O_NEG,SL),0,2,"neg.l"),{ OR32,E,0},{ 0x1,0x7,0xB,B30|OR32,E}EOP,
- NEW_SOP(O(O_NOP,SB),1,2,"nop"),{E,0,0},{ 0x0,0x0,0x0,0x0,E,0,0,0,0}EOP,
+ NEW_SOP(O(O_NOP,SN),1,2,"nop"),{E,0,0},{ 0x0,0x0,0x0,0x0,E,0,0,0,0}EOP,
/* ??? This can use UNOP3. */
NEW_SOP(O(O_NOT,SB),1,2,"not.b"),{ OR8,E, 0},{ 0x1,0x7,0x0,OR8,E,0,0,0,0}EOP,
NEW_SOP(O(O_OR,SL),0,2,"or.l"),{RS32,RD32,E },{0x0,0x1,0xF,0x0,0x6,0x4,B30|RS32,B30|RD32,E} EOP,
NEW_SOP(O(O_ORC,SB),1,2,"orc"),{IMM8,CCR,E},{ 0x0,0x4,IMM8,IGNORE,E,0,0,0,0}EOP,
+ NEW_SOP(O(O_ORC,SB),1,2,"orc"),{IMM8,EXR,E},{ 0x0,0x1,0x4,0x1,0x0,0x4,IMM8,IGNORE,E,0,0,0,0}EOP,
NEW_SOP(O(O_MOV_TO_REG,SW),1,6,"pop.w"),{OR16,E,0},{ 0x6,0xD,0x7,OR16,E,0,0,0,0}EOP,
NEW_SOP(O(O_MOV_TO_REG,SL),0,6,"pop.l"),{OR32,E,0},{ PREFIX32,0x6,0xD,0x7,OR32|B30,E,0,0,0,0}EOP,
UNOP3(O_ROTXL, "rotxl",0x1,0x2,0x0),
UNOP3(O_ROTXR, "rotxr",0x1,0x3,0x0),
- SOP(O(O_BPT,SB), 10,"bpt"),{E,0,0},{ 0x7,0xA,0xF,0xF,E,0,0,0,0}EOP,
- SOP(O(O_RTE,SB), 10,"rte"),{E,0,0},{ 0x5,0x6,0x7,0x0,E,0,0,0,0}EOP,
- SOP(O(O_RTS,SB), 8,"rts"),{E,0,0},{ 0x5,0x4,0x7,0x0,E,0,0,0,0}EOP,
+ SOP(O(O_BPT,SN), 10,"bpt"),{E,0,0},{ 0x7,0xA,0xF,0xF,E,0,0,0,0}EOP,
+ SOP(O(O_RTE,SN), 10,"rte"),{E,0,0},{ 0x5,0x6,0x7,0x0,E,0,0,0,0}EOP,
+ SOP(O(O_RTS,SN), 8,"rts"),{E,0,0},{ 0x5,0x4,0x7,0x0,E,0,0,0,0}EOP,
UNOP3(O_SHAL, "shal",0x1,0x0,0x8),
UNOP3(O_SHAR, "shar",0x1,0x1,0x8),
UNOP3(O_SHLL, "shll",0x1,0x0,0x0),
UNOP3(O_SHLR, "shlr",0x1,0x1,0x0),
- SOP(O(O_SLEEP,SB),2,"sleep"),{E,0,0},{ 0x0,0x1,0x8,0x0,E,0,0,0,0} EOP,
+ SOP(O(O_SLEEP,SN),2,"sleep"),{E,0,0},{ 0x0,0x1,0x8,0x0,E,0,0,0,0} EOP,
NEW_SOP(O(O_STC,SB), 1,2,"stc"),{CCR,RD8,E},{ 0x0,0x2,0x0,RD8,E,0,0,0,0} EOP,
NEW_SOP(O(O_STC,SB),0,2,"stc"),{CCR,RSIND,E}, {PREFIXLDC,0x6,0x9,B31|RDIND,0x0,E} EOP,
NEW_SOP(O(O_STC,SB),0,2,"stc"),{CCR,DISP|DST|L_16,E},{PREFIXLDC,0x6,0xF,B31|DISPREG,0,DST|DISP|L_16,IGNORE,IGNORE,IGNORE,E}EOP,
- NEW_SOP(O(O_STC,SB),0,2,"stc"),{CCR,DISP|DST|L_24,E},{PREFIXLDC,0x7,0x8,B30|DISPREG,0,0x6,0xB,0xA,0x0,0x0,0x0,DST|DISP24LIST,E}EOP,
+ NEW_SOP(O(O_STC,SB),0,2,"stc"),{CCR,DISP|DST|L_32,E},{PREFIXLDC,0x7,0x8,B30|DISPREG,0,0x6,0xB,0xA,0x0,DST|DISP32LIST,E}EOP,
NEW_SOP(O(O_STC,SB),0,2,"stc"),{CCR,RDDEC,E}, {PREFIXLDC,0x6,0xD,B31|RDDEC,0x0,E}EOP,
NEW_SOP(O(O_STC,SB),0,2,"stc"),{CCR,ABS16SRC,E}, {PREFIXLDC,0x6,0xB,0x8,0x0,ABS16DST,IGNORE,IGNORE,IGNORE,E}EOP,
- NEW_SOP(O(O_STC,SB),0,2,"stc"),{CCR,ABS24SRC,E}, {PREFIXLDC,0x6,0xB,0xA,0x0,0x0,0x0,DST|ABS24LIST,E}EOP,
+ NEW_SOP(O(O_STC,SB),0,2,"stc"),{CCR,ABS32SRC,E}, {PREFIXLDC,0x6,0xB,0xA,0x0,DST|ABS32LIST,E}EOP,
+
+ NEW_SOP(O(O_STC,SB), 1,2,"stc"),{EXR,RD8,E},{ 0x0,0x2,0x1,RD8,E,0,0,0,0} EOP,
+
+ NEW_SOP(O(O_STC,SB),0,2,"stc"),{EXR,RSIND,E}, {0x0,0x1,0x4,0x1,0x6,0x9,B31|RDIND,0x0,E} EOP,
+ NEW_SOP(O(O_STC,SB),0,2,"stc"),{EXR,DISP|DST|L_16,E},{0x0,0x1,0x4,0x1,0x6,0xF,B31|DISPREG,0,DST|DISP|L_16,IGNORE,IGNORE,IGNORE,E}EOP,
+ NEW_SOP(O(O_STC,SB),0,2,"stc"),{EXR,DISP|DST|L_32,E},{0x0,0x1,0x4,0x1,0x7,0x8,B30|DISPREG,0,0x6,0xB,0xA,0x0,DST|DISP32LIST,E}EOP,
+ NEW_SOP(O(O_STC,SB),0,2,"stc"),{EXR,RDDEC,E}, {0x0,0x1,0x4,0x1,0x6,0xD,B31|RDDEC,0x0,E}EOP,
+
+ NEW_SOP(O(O_STC,SB),0,2,"stc"),{EXR,ABS16SRC,E}, {0x0,0x1,0x4,0x1,0x6,0xB,0x8,0x0,ABS16DST,IGNORE,IGNORE,IGNORE,E}EOP,
+ NEW_SOP(O(O_STC,SB),0,2,"stc"),{EXR,ABS32SRC,E}, {0x0,0x1,0x4,0x1,0x6,0xB,0xA,0x0,DST|ABS32LIST,E}EOP,
SOP(O(O_SUB,SB),2,"sub.b"),{RS8,RD8,E},{ 0x1,0x8,RS8,RD8,E,0,0,0,0}EOP,
TWOOP(O(O_SUBX,SB),"subx",0xB,0x1,0xE),
NEW_SOP(O(O_TRAPA,SB),0,2,"trapa"),{ IMM2,E}, {0x5,0x7,IMM2,IGNORE,E }EOP,
+ NEW_SOP(O(O_TAS,SB),0,2,"tas"),{RSIND,E}, {0x0,0x1,0xe,0x0,0x7,0xb,B30|RSIND,0xc,E }EOP,
TWOOP(O(O_XOR, SB),"xor",0xD,0x1,0x5),
NEW_SOP(O(O_XOR,SL),0,2,"xor.l") ,{RS32,RD32,E },{0x0,0x1,0xF,0x0,0x6,0x5,B30|RS32,B30|RD32,E} EOP,
SOP(O(O_XORC,SB),2,"xorc"),{IMM8,CCR,E},{ 0x0,0x5,IMM8,IGNORE,E,0,0,0,0}EOP,
+ SOP(O(O_XORC,SB),2,"xorc"),{IMM8,EXR,E},{ 0x0,0x1,0x4,0x1,0x0,0x5,IMM8,IGNORE,E,0,0,0,0}EOP,
+
+ NEW_SOP(O(O_CLRMAC,SN),1,2,"clrmac"),{E, 0, 0},{0x0,0x1,0xa,0x0,E} EOP,
+ NEW_SOP(O(O_MAC,SL),1,2,"mac"),{RSINC,RDINC,E},{0x0,0x1,0x6,0x0,0x6,0xd,B30|RSINC,B30|RDINC,E} EOP,
+ NEW_SOP(O(O_LDMAC,SL),1,2,"ldmac"),{RS32,MACREG,E},{0x0,0x3,MACREG,RS32,E} EOP,
+ NEW_SOP(O(O_LDM,SL),0,6,"ldm.l"),{RSINC, RS32, E},{ 0x0,0x1,IGNORE,0x0,0x6,0xD,0x7,IGNORE,E}EOP,
+ NEW_SOP(O(O_STM,SL),0,6,"stm.l"),{RS32, RDDEC, E},{0x0,0x1,IGNORE,0x0,0x6,0xD,0xF,IGNORE,E}EOP,
0
};
#else
/* i386-opcode.h -- Intel 80386 opcode table
- Copyright 1989, 1991, 1992, 1995 Free Software Foundation.
+ Copyright 1989, 91, 92, 93, 94, 95, 1996 Free Software Foundation.
This file is part of GAS, the GNU Assembler, and GDB, the GNU Debugger.
{"fadd", 1, 0xd8c0, _, ShortForm, { FloatReg, 0, 0} },
{"fadd", 2, 0xd8c0, _, ShortForm|FloatD, { FloatReg, FloatAcc, 0} },
{"fadd", 0, 0xdcc1, _, NoModrm, { 0, 0, 0} }, /* alias for fadd %st, %st(1) */
-{"faddp", 1, 0xdac0, _, ShortForm, { FloatReg, 0, 0} },
-{"faddp", 2, 0xdac0, _, ShortForm|FloatD, { FloatReg, FloatAcc, 0} },
+{"faddp", 1, 0xdec0, _, ShortForm, { FloatReg, 0, 0} },
+{"faddp", 2, 0xdec0, _, ShortForm, { FloatReg, FloatAcc, 0} },
+{"faddp", 2, 0xdec0, _, ShortForm, { FloatAcc, FloatReg, 0} },
{"faddp", 0, 0xdec1, _, NoModrm, { 0, 0, 0} }, /* alias for faddp %st, %st(1) */
{"fadds", 1, 0xd8, 0, Modrm, { Mem, 0, 0} },
{"fiaddl", 1, 0xda, 0, Modrm, { Mem, 0, 0} },
{"fsub", 2, 0xdce0, _, ShortForm, { FloatAcc, FloatReg, 0} },
#endif
{"fsub", 0, 0xdce1, _, NoModrm, { 0, 0, 0} },
-{"fsubp", 1, 0xdae0, _, ShortForm, { FloatReg, 0, 0} },
-{"fsubp", 2, 0xdae0, _, ShortForm, { FloatReg, FloatAcc, 0} },
+{"fsubp", 1, 0xdee0, _, ShortForm, { FloatReg, 0, 0} },
+{"fsubp", 2, 0xdee0, _, ShortForm, { FloatReg, FloatAcc, 0} },
#ifdef NON_BROKEN_OPCODES
{"fsubp", 2, 0xdee8, _, ShortForm, { FloatAcc, FloatReg, 0} },
#else
{"fsubr", 2, 0xdce8, _, ShortForm, { FloatAcc, FloatReg, 0} },
#endif
{"fsubr", 0, 0xdce9, _, NoModrm, { 0, 0, 0} },
-{"fsubrp", 1, 0xdae8, _, ShortForm, { FloatReg, 0, 0} },
-{"fsubrp", 2, 0xdae8, _, ShortForm, { FloatReg, FloatAcc, 0} },
+{"fsubrp", 1, 0xdee8, _, ShortForm, { FloatReg, 0, 0} },
+{"fsubrp", 2, 0xdee8, _, ShortForm, { FloatReg, FloatAcc, 0} },
#ifdef NON_BROKEN_OPCODES
{"fsubrp", 2, 0xdee0, _, ShortForm, { FloatAcc, FloatReg, 0} },
#else
{"fmul", 1, 0xd8c8, _, ShortForm, { FloatReg, 0, 0} },
{"fmul", 2, 0xd8c8, _, ShortForm|FloatD, { FloatReg, FloatAcc, 0} },
{"fmul", 0, 0xdcc9, _, NoModrm, { 0, 0, 0} },
-{"fmulp", 1, 0xdac8, _, ShortForm, { FloatReg, 0, 0} },
-{"fmulp", 2, 0xdac8, _, ShortForm|FloatD, { FloatReg, FloatAcc, 0} },
+{"fmulp", 1, 0xdec8, _, ShortForm, { FloatReg, 0, 0} },
+{"fmulp", 2, 0xdec8, _, ShortForm, { FloatReg, FloatAcc, 0} },
+{"fmulp", 2, 0xdec8, _, ShortForm, { FloatAcc, FloatReg, 0} },
{"fmulp", 0, 0xdec9, _, NoModrm, { 0, 0, 0} },
{"fmuls", 1, 0xd8, 1, Modrm, { Mem, 0, 0} },
{"fimull", 1, 0xda, 1, Modrm, { Mem, 0, 0} },
{"fdiv", 2, 0xdcf0, _, ShortForm, { FloatAcc, FloatReg, 0} },
#endif
{"fdiv", 0, 0xdcf1, _, NoModrm, { 0, 0, 0} },
-{"fdivp", 1, 0xdaf0, _, ShortForm, { FloatReg, 0, 0} },
-{"fdivp", 2, 0xdaf0, _, ShortForm, { FloatReg, FloatAcc, 0} },
+{"fdivp", 1, 0xdef0, _, ShortForm, { FloatReg, 0, 0} },
+{"fdivp", 2, 0xdef0, _, ShortForm, { FloatReg, FloatAcc, 0} },
#ifdef NON_BROKEN_OPCODES
{"fdivp", 2, 0xdef8, _, ShortForm, { FloatAcc, FloatReg, 0} },
#else
{"fdivr", 2, 0xdcf8, _, ShortForm, { FloatAcc, FloatReg, 0} },
#endif
{"fdivr", 0, 0xdcf9, _, NoModrm, { 0, 0, 0} },
-{"fdivrp", 1, 0xdaf8, _, ShortForm, { FloatReg, 0, 0} },
-{"fdivrp", 2, 0xdaf8, _, ShortForm, { FloatReg, FloatAcc, 0} },
+{"fdivrp", 1, 0xdef8, _, ShortForm, { FloatReg, 0, 0} },
+{"fdivrp", 2, 0xdef8, _, ShortForm, { FloatReg, FloatAcc, 0} },
#ifdef NON_BROKEN_OPCODES
{"fdivrp", 2, 0xdef0, _, ShortForm, { FloatAcc, FloatReg, 0} },
#else
{"frstor", 1, 0xdd, 4, Modrm, { Mem, 0, 0} },
{"ffree", 1, 0xddc0, _, ShortForm, { FloatReg, 0, 0} },
+/* P6:free st(i), pop st */
+{"ffreep", 1, 0xdfc0, _, ShortForm, { FloatReg, 0, 0} },
{"fnop", 0, 0xd9d0, _, NoModrm, { 0, 0, 0} },
{"fwait", 0, 0x9b, _, NoModrm, { 0, 0, 0} },
{ R_2D(0x658), "intctl", I_JX, REG, 2, { RSL, RS, 0 } },
{ R_0(0x5b4), "intdis", I_JX, REG, 0, { 0, 0, 0 } },
{ R_0(0x5b5), "inten", I_JX, REG, 0, { 0, 0, 0 } },
- { R_0(0x65d), "halt", I_JX, REG, 0, { 0, 0, 0 } },
+ { R_0(0x65d), "halt", I_JX, REG, 1, { RSL, 0, 0 } },
/* Hx extensions. */
{ 0xac000000, "dcinva", I_HX, MEM1, 1, { M, 0, 0 } },
? Privileged Register in rs1 (v9)
* Prefetch function constant. (v9)
x OPF field (v9 impdep).
+ 0 32/64 bit immediate for set or setx (v9) insns
The following chars are unused: (note: ,[] are used as punctuation)
-[3450]
+[345]
*/
+Fri Aug 30 18:32:31 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * configure.tgt (sh-*-elf*): New target.
+ * emulparams/shelf.sh: New file.
+ * emulparams/shlelf.sh: New file.
+ * Makefile.in (ALL_EMULATIONS): Add eshelf.o and eshlelf.o.
+ (eshelf.c, eshlelf.c): New targets.
+ * scripttempl/elf.sc: If EMBEDDED is defined, then don't add
+ SIZEOF_HEADERS to TEXT_START_ADDR. Expand CTOR_START and CTOR_END
+ around .ctors, and DTOR_START and DTOR_END around .dtors. Expand
+ OTHER_RELOCATING_SECTIONS if RELOCATING.
+
+Thu Aug 29 16:57:46 1996 Michael Meissner <meissner@tiktok.cygnus.com>
+
+ * configure.{host,tgt} (i[345]86-*-*): Recognize i686 for pentium
+ pro.
+
+Mon Aug 26 12:58:11 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * ldgram.y (section): Add opt_nocrossrefs; pass value to
+ lang_enter_overlay.
+ (opt_nocrossrefs): New nonterminal.
+ * ldlex.l: Recognize NOCROSSREFS keyword in EXPRESSION mode.
+ * ldlang.c (overlay_nocrossrefs): New static variable.
+ (lang_enter_overlay): Add nocrossrefs parameter.
+ (lang_leave_overlay): Only add nocrossrefs if overlay_nocrossrefs
+ is set. Initialize overlay_nocrossrefs.
+ * ldlang.h (lang_enter_overlay): Update declaration.
+ * ld.texinfo (Overlays): Update documentation.
+
+ * ldver.c (ldversion): Print GNU ld in the version message.
+
+Thu Aug 22 17:10:40 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * configure.host: Set HLDENV.
+ * configure.in: Substitute HLDENV.
+ * configure: Rebuild.
+ * Makefile.in (HLDENV): New variable.
+ ($(LD_PROG)): Use $(HLDENV).
+
+Thu Aug 22 11:16:02 1996 Stan Shebs <shebs@andros.cygnus.com>
+
+ * mpw-make.sed: Add @DASH_C_FLAG@ to compiler edit.
+
+Wed Aug 21 11:26:37 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * scripttempl/elf.sc: Put .gnu.linkonce* sections in appropriate
+ containing sections.
+
+Mon Aug 19 13:01:42 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * fnmatch.c: Include sysdep.h.
+
+Mon Aug 19 11:28:29 1996 Michael Meissner <meissner@tiktok.cygnus.com>
+
+ * genscripts.sh: Undo 8/16 change.
+
+
+Fri Aug 16 19:18:08 1996 Michael Meissner <meissner@tiktok.cygnus.com>
+
+ * genscripts.sh: Explicitly reset any shell variables set or used
+ by the various .sc scripts to allow inadvertant use of these
+ names as normal environment variables by the person running
+ configure.
+
+
+Fri Aug 16 14:15:41 1996 James G. Smith <jsmith@cygnus.co.uk>
+
+ * scripttempl/armcoff.sc (__bss_start__, __bss_end__,
+ __data_start__, __data_end__): Added to keep in sync. with the
+ default ARM crt0.s. Added __CTOR_LIST__ and __DTOR_LIST__ support.
+
+Thu Aug 8 14:24:56 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * ldcref.c (check_reloc_refs): If info->same, look for any symbol
+ defined in info->defsec, not just the section symbol.
+
+Wed Aug 7 14:40:48 1996 Philippe De Muyter <phdm@info.ucl.ac.be>
+
+ * configure.in: Call BFD_NEED_DECLARATION on strstr and sbrk.
+ * acconfig.h (NEED_DECLARATION_STRSTR): New macro.
+ (NEED_DECLARATION_SBRK): New macro.
+ * configure, config.in: Rebuild.
+ * sysdep.h (strstr): Declare if NEED_DECLARATION_STRSTR.
+ * ldmain.c (sbrk): Declare if HAVE_SBRK and
+ NEED_DECLARATION_SBRK.
+
+ * ldlang.c (lang_record_phdrs): Cast xmalloc and xrealloc return.
+
+Mon Aug 5 16:26:14 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * ldlex.l: Recognize OVERLAY.
+ * ldgram.y: Add section_phdr field to %union.
+ (section): Handle phdr_opt result. Add OVERLAY case.
+ (opt_exp_without_type): New nonterminal.
+ (phdr_opt): Return list of phdrs.
+ (overlay_section): New nonterminal.
+ * ldlang.c: Include <ctype.h>.
+ (lang_leave_output_section_statement): Add phdrs parameter.
+ Change all callers.
+ (lang_section_in_phdr): Remove.
+ (overlay_vma, overlay_lmn, overlay_max): New static variables.
+ (struct overlay_list): Define.
+ (overlay_list): New static variable.
+ (lang_enter_overlay, lang_enter_overlay_section): New functions.
+ (lang_leave_overlay_section, lang_leave_overlay): New functions.
+ * ldlang.h (lang_leave_output_section_statement): Update
+ declaration for new parameter.
+ (lang_section_in_phdr): Don't declare.
+ (lang_enter_overlay, lang_enter_overlay_section): Declare.
+ (lang_leave_overlay_section, lang_leave_overlay): Declare.
+ * ld.texinfo (Overlays): New node under SECTIONS, documenting
+ overlays.
+
+ * ldlex.l: Recognize MAX and MIN.
+ * ldgram.y (MAX, MIN): New terminals.
+ (exp): Recognize MAX and MIN.
+ * ldexp.c (fold_binary): Handle MAX and MIN.
+ * ld.texinfo (Arithmetic Functions): Document MAX and MIN.
+
+ * ld.texinfo (PHDRS): Use @cindex, not @kindex, for program header
+ index entries.
+
+ * ldgram.y (SIZEOF, ADDR): Do not specify type.
+
+ * ldcref.c (check_nocrossref): Skip symbols with no output
+ sections.
+
+Fri Aug 2 14:57:49 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * ldgram.y (LOADADDR): New terminal.
+ (exp): Handle LOADADDR.
+ * ldlex.l: Recognize LOADADDR.
+ * ldexp.c (exp_print_token): Add LOADADDR.
+ (fold_name): Implement LOADADDR.
+ * ldlang.c (exp_init_os): Treat LOADADDR like ADDR.
+ * ld.texinfo (Arithmetic Functions): Document LOADADDR.
+
+Thu Aug 1 12:52:19 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * ld.h (check_nocrossrefs): Declare.
+ * ldlang.h (struct lang_nocrossref): Define.
+ (struct lang_nocrossrefs): Define.
+ (nocrossref_list): Declare.
+ (lang_add_nocrossref): Declare.
+ * ldlex.l: Recognize NOCROSSREFS keyword.
+ * ldgram.y (%union): Add nocrossref field.
+ (NOCROSSREFS): New terminal.
+ (ifile_p1): Recognize NOCROSSREFS.
+ (nocrossref_list): New nonterminal.
+ * ldlang.c (nocrossref_list): Define.
+ (lang_add_nocrossref): New function.
+ * ldmain.c (main): If nocrossref_list is not NULL, call
+ check_nocrossrefs.
+ (warning_callback): Free symbols if there is no place to store
+ them.
+ (notice): Call add_cref if nocrossref_list is not NULL.
+ * ldcref.c: Include "ldexp.h" and "ldlang.h".
+ (check_nocrossrefs): New function.
+ (check_nocrossref): New static function.
+ (struct check_refs_info): Define.
+ (check_refs, check_reloc_refs): New static functions.
+ * Makefile.in: Rebuild dependencies.
+ * ld.texinfo (Option Commands): Document NOCROSSREFS.
+
+ * ld.texinfo (Section Placement): Improve the wording of the
+ wildcard documentation. Mention that wildcards are only searched
+ for on the command line, not in the file system.
+
+ * emultempl/sunos.em (gld${EMULATION_NAME}_after_open): Move
+ definition of lib_path inside condition where it is used.
+
+Tue Jul 30 14:46:42 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * ldlang.c (lang_size_sections): Add the section VMA to the result
+ value when computing the address of a section.
+
+ * ld.h (args_type): Add cref field.
+ * lexsup.c (parse_args): Set command_line.cref.
+ * ldmain.c (main): Check command_line.cref rather than
+ link_info.notice_all.
+ (notice): Likewise.
+
+ * ldcref.c (output_one_cref): Don't crash if a symbol is defined
+ in a section without an owner.
+
+Mon Jul 29 17:23:33 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * fnmatch.h, fnmatch.c: New files.
+ * ldlex.l: Remove unused definition of FILENAME. Add definition
+ of WILDCHAR. In SCRIPT mode, accept any sequence of WILDCHAR as a
+ NAME.
+ * ldgram.y (file_NAME_list): Accept '*' and '?' specially.
+ (input_section_spec): Accept '?' specially.
+ (statement): Change exp to mustbe_exp in length and FILL cases.
+ (section): Call ldlex_script before section statements, and call
+ ldlex_popstate after them.
+ * ldlang.c: Include "fnmatch.h".
+ (wildcardp): New static function.
+ (wild_section): Permit the section name to be a wildcard.
+ (wild_file): New static function, broken out of wild.
+ (wild): Call wild_file. Permit the file name to be a wildcard.
+ (open_input_bfds): Don't call lookup_name for a wildcard pattern.
+ * Makefile.in: Rebuild dependencies.
+ (CFILES): Add fnmatch.c.
+ (HFILES): Add fnmatch.h.
+ (OFILES): Add fnmatch.o.
+ * ld.texinfo: Document that file and section names can now be
+ wildcard patterns.
+
+ * ldlang.c (lang_place_orphans): Correct condition: place a common
+ section if not relocateable or if common definitions are forced.
+
+Thu Jul 18 16:25:39 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * configure.tgt (sparc*-*-sysv4*): New target. From Andrew Gierth
+ <ANDREWG@microlise.co.uk>.
+
+ * configure.host: Change irix5 to irix[56]*.
+ * configure.tgt: Likewise.
+
+Wed Jul 17 10:52:46 1996 Kim Knuttila <krk@cygnus.com>
+
+ * emultempl/pe.em (sort_sections): Pay attention to return code.
+
+ * ldmisc.c (demangle): Remove all prefix '.'s from a name.
+
+Mon Jul 15 11:49:49 1996 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
+
+ * emultempl/elf32.em (gld${EMULATION_NAME}_place_orphan): Round
+ the value of __start_SECNAME to the alignment required by the
+ section to be placed.
+
+Tue Jul 9 12:09:02 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * configure.tgt (mips*el-*-elf*): Use elf32elmip.
+ (mips*-*-elf*): Use elf32ebmip.
+ * emulparams/elf32bmip.sh (EMBEDDED): Don't define.
+ * emulparams/elf32lmip.sh (EMBEDDED): Don't define.
+ * emulparams/elf32elmip.sh: New file; copy of elf32lmip.sh with
+ EMBEDDED defined.
+ * emulparams/elf32ebmip.sh: New file; copy of elf32bmip.sh with
+ EMBEDDED defined.
+ * emulparams/elf32b4300.sh (EMBEDDED): Define.
+ * emulparams/elf32l4300.sh (EMBEDDED): Define.
+ * Makefile.in (ALL_EMULATIONS): Add eelf32ebmip.o eelf32elmip.o.
+ (eelf32ebmip.c, eelf32elmip.c): New targets.
+
+Thu Jul 4 12:01:03 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * ldver.c (ldversion): Set version to cygnus-2.7.1.
+
+ * Released binutils 2.7.
+
+ * emulparams/pc532macha.sh: Rename from pc532machaout.sh to avoid
+ System V file name limitations.
+ * configure.tgt (nc32k-pc532-mach*, ns32k-pc532-ux*): Use
+ pc532macha rather than pc532machaout.
+ * Makefile.in (ALL_EMULATIONS): Change epc532machaout.o to
+ epc532macha.o.
+ (epc532macha.c): Rename target from epc532machaout.c.
+
+Wed Jul 3 11:40:10 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * ldlang.c (print_padding_statement): Use %u, not %x, to print
+ fill value.
+
+Sun Jun 30 11:16:43 1996 Stan Shebs <shebs@andros.cygnus.com>
+
+ * mpw-eppcmac.c: Update to reflect May 23 change to aix.em.
+
+Thu Jun 27 14:03:42 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * emultempl/sunos.em (gld${EMULATION_NAME}_find_so): Put the .sa
+ file just before the .so file, rather than just after.
+
+ * configure.host: Use -print-file-name=FILE rather than piping
+ -print-libgcc-file-name through sed.
+ (i[345]86*-*-sco*, i[345]86-*-isc*): Create crtbegin.o and
+ crtend.o files, in case gcc doesn't use them.
+ * Makefile.in (mostlyclean): Remove crtbegin.o and crtend.o.
+
+Wed Jun 26 15:57:21 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * configure.tgt (mips*-dec-osf*): New target.
+
+Tue Jun 25 22:15:29 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
+
+ * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
+ INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
+ (docdir): Removed.
+ * configure.in (AC_PREREQ): autoconf 2.5 or higher.
+ (AC_PROG_INSTALL): Added.
+ * configure: Rebuilt.
+
+Mon Jun 24 18:48:16 1996 Michael Meissner <meissner@tiktok.cygnus.com>
+
+ * scripttempl/elfppc.sc (_GLOBAL_OFFSET_TABLE_): Don't do a
+ PROVIDE of _GLOBAL_OFFSET_TABLE_, since it needs to be at a
+ non-fixed location.
+
+Mon Jun 24 17:55:31 1996 Jouke Numan <jnuman@bazis.nl>
+
+ * ldlang.h (enum section_type): Define.
+ (lang_output_section_statement_type): Remove loadable field. Add
+ sectype field.
+ (lang_enter_output_section_statement): Change flags parameter in
+ prototype to sectype.
+ * ldgram.y (typebits): Remove.
+ (sectype): New static variable.
+ (opt_at): Use sectype rather than typebits.
+ (type): Set sectype rather than typebits.
+ (atype): Likewise.
+ * ldlex.l: Recognize DSECT, COPY, INFO, and OVERLAY in
+ EXPRESSION mode.
+ * ldlang.c (lang_output_section_statement_lookup): Set sectype
+ field rather than loadable field.
+ (wild_doit): Check sectype rather than loadable.
+ (lang_record_phdrs): Likewise.
+ (lang_enter_output_section_statement): Rename flags parameter to
+ sectype. Set sectype field rather than loadable field. Set flags
+ field based on sectype.
+
+Mon Jun 24 12:00:32 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * scripttempl/elf.sc: Force .stab* and .comment sections to start
+ at 0.
+
+ * configure.in: On alpha*-*-osf*, link against libbfd.a if not
+ using shared libraries.
+ * configure: Rebuild with autoconf 2.10.
+
+Fri Jun 21 17:40:56 1996 Joel Sherrill <joel@merlin.gcs.redstone.army.mil>
+
+ * configure.tgt: Add support for *-*-rtems* configurations.
+
+Fri Jun 21 13:05:51 1996 Richard Henderson <rth@tamu.edu>
+
+ * configure.tgt (alpha-*-linuxecoff*): New target.
+ (alpha-*-linux*): Use elf64alpha.
+ * emulparams/elf64alpha.sh: New file.
+ * emultempl/elf32.em: If ELFSIZE is not set, set it to 32. Use
+ ${ELFSIZE} rather than 32 when calling BFD routines.
+ (hold_rodata): New static variable.
+ (gld${EMULATION_NAME}_place_orphan): Use hold_rodata for a
+ readonly section that is not code.
+ (gld${EMULATION_NAME}_place_section): Set hold_rodata. Don't use
+ a .rel section unless its bfd_section field is not NULL.
+ * Makefile.in (ALL_EMULATIONS): Add eelf64alpha.o.
+ (eelf64alpha.c): New target.
+
+Fri Jun 21 12:45:46 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * ldmisc.c (vfinfo): Correct handling of 0 in %W case.
+
+Thu Jun 20 13:55:28 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ Add enough support to understand the gcc svr3.ifile script:
+ * ldlex.l: Recognize BLOCK and GROUP in EXPRESSION context. Add
+ BIND keyword.
+ * ldgram.y: Add BIND token.
+ (section): Recognize GROUP.
+ (opt_ext_with_type): Recognize a couple of cases of BIND.
+ * ldlang.c (init_os): Don't do anything if section is already
+ initialized. Call exp_init_os on addr_tree field.
+ (exp_init_os): New static function.
+ (map_input_to_output_sections): Call exp_init_os on assignment
+ expression.
+ (lang_place_orphans): Check for common sections by name COMMON
+ rather than by common_section field. Don't warn about absence of
+ [COMMON] command.
+
+ * ldlang.h (lang_input_statement_type): Remove useless fields
+ common_section, common_output_section, and complained, as well as
+ all references to them.
+
+ * ldexp.c: Reindent a lot of code.
+ (exp_fold_tree): Call FAIL rather than einfo in default case.
+
+Wed Jun 19 11:40:14 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * configure.host (m88*-*-dgux*): Quote HOSTING_CRT0. From
+ <randall.hron@medaphis.com>.
+
+Tue Jun 18 15:53:09 1996 Jeffrey A. Law <law@rtl.cygnus.com>
+
+ * scripttempl/h8300s.sc: New file for H8/S.
+ * emulpararms/h8300s.sh: New file for H8/S.
+ * Makefile.in (ALL_EMULATIONS): Add H8/S.
+ (e_h8300s.c): Add dependencies.
+ * configure.tgt: Add H8/S to targ_extra_emuls.
+
+Tue Jun 18 17:55:39 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * configure.tgt (i[345]86*-*-isc*): New target. From
+ <uddeborg@carmen.se>.
+
+Wed Jun 12 12:46:21 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * lexsup.c: Include "libiberty.h".
+ (parse_args): Copy the -Y argument into memory.
+ (set_default_dirlist): Don't put the ':' back into the directory
+ list.
+
Fri Jun 7 11:27:42 1996 Ian Lance Taylor <ian@cygnus.com>
* emultempl/sunos.em: Include libiberty.h.
program_transform_name = @program_transform_name@
exec_prefix = @exec_prefix@
-bindir = $(exec_prefix)/bin
-libdir = $(exec_prefix)/lib
+bindir = @bindir@
+libdir = @libdir@
tooldir = $(exec_prefix)/$(target_alias)
-datadir = $(prefix)/lib
-mandir = $(prefix)/man
+datadir = @datadir@
+mandir = @mandir@
man1dir = $(mandir)/man1
man2dir = $(mandir)/man2
man3dir = $(mandir)/man3
man7dir = $(mandir)/man7
man8dir = $(mandir)/man8
man9dir = $(mandir)/man9
-infodir = $(prefix)/info
-includedir = $(prefix)/include
-docdir = $(datadir)/doc
+infodir = @infodir@
+includedir = @includedir@
+
# We put the scripts in the directory $(scriptdir)/ldscripts.
# We can't put the scripts in $(datadir) because the SEARCH_DIR
# directives need to be different for native and cross linkers.
SHELL = /bin/sh
INSTALL = `cd $(srcdir); pwd`/../install.sh -c
-INSTALL_PROGRAM = $(INSTALL)
-INSTALL_DATA = $(INSTALL)
+INSTALL_PROGRAM = @INSTALL_PROGRAM@
+INSTALL_DATA = @INSTALL_DATA@
INSTALL_XFORM = $(INSTALL) -t='$(program_transform_name)'
INSTALL_XFORM1 = $(INSTALL_XFORM) -b=.1
CFLAGS = @CFLAGS@
LDFLAGS = @LDFLAGS@
HLDFLAGS = @HLDFLAGS@
+HLDENV = @HLDENV@
RPATH_ENVVAR = @RPATH_ENVVAR@
MAKEINFO = makeinfo
TEXI2DVI = texi2dvi
eelf32_sparc.o \
eelf32b4300.o \
eelf32bmip.o \
+ eelf32ebmip.o \
+ eelf32elmip.o \
eelf32l4300.o \
eelf32lmip.o \
eelf32lppc.o \
eelf32ppc.o \
+ eelf64alpha.o \
eelf64_sparc.o \
eelf_i386.o \
egld960.o \
ego32.o \
eh8300.o \
eh8300h.o \
+ eh8300s.o \
eh8500.o \
eh8500b.o \
eh8500c.o \
emipslit.o \
enews.o \
ens32knbsd.o \
- epc532machaout.o \
+ epc532macha.o \
eppcmacos.o \
eppcnw.o \
eppcpe.o \
eriscix.o \
esa29200.o \
esh.o \
+ eshelf.o \
+ eshlelf.o \
eshl.o \
esparcaout.o \
esparclynx.o \
CFILES = ldctor.c ldemul.c ldexp.c ldfile.c ldlang.c \
ldmain.c ldmisc.c ldver.c ldwrite.c lexsup.c \
- mri.c ldcref.c
+ mri.c ldcref.c fnmatch.c
HFILES = config.h ld.h ldctor.h ldemul.h ldexp.h ldfile.h \
ldlang.h ldlex.h ldmain.h ldmisc.h ldver.h \
- ldwrite.h mri.h
+ ldwrite.h mri.h fnmatch.h
GENERATED_CFILES = ldgram.c ldlex.c
GENERATED_HFILES = ldgram.h ldemul-list.h
OFILES = ldgram.o ldlex.o lexsup.o ldlang.o mri.o ldctor.o ldmain.o \
ldwrite.o ldexp.o ldemul.o ldver.o ldmisc.o \
- ldfile.o ldcref.o ${EMULATION_OFILES}
+ ldfile.o ldcref.o fnmatch.o ${EMULATION_OFILES}
LINTSOURCES = $(CFILES) $(GENERATED_CFILES) e*.c
eelf32bmip.c: $(srcdir)/emulparams/elf32bmip.sh \
$(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elfmips.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf32bmip "$(tdir_elf32bmip)"
+eelf32ebmip.c: $(srcdir)/emulparams/elf32ebmip.sh \
+ $(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elfmips.sc ${GEN_DEPENDS}
+ ${GENSCRIPTS} elf32ebmip "$(tdir_elf32ebmip)"
+eelf32elmip.c: $(srcdir)/emulparams/elf32elmip.sh \
+ $(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elfmips.sc ${GEN_DEPENDS}
+ ${GENSCRIPTS} elf32elmip "$(tdir_elf32elmip)"
eelf32l4300.c: $(srcdir)/emulparams/elf32l4300.sh \
$(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf32l4300 "$(tdir_elf32l4300)"
eelf32ppc.c: $(srcdir)/emulparams/elf32ppc.sh \
$(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elfppc.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf32ppc "$(tdir_elf32ppc)"
+eelf64alpha.c: $(srcdir)/emulparams/elf64alpha.sh \
+ $(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
+ ${GENSCRIPTS} elf64alpha "$(tdir_elf64alpha)"
eelf64_sparc.c: $(srcdir)/emulparams/elf64_sparc.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf64_sparc "$(tdir_elf64_sparc)"
eh8300h.c: $(srcdir)/emulparams/h8300h.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/h8300h.sc ${GEN_DEPENDS}
${GENSCRIPTS} h8300h "$(tdir_h8300h)"
+eh8300s.c: $(srcdir)/emulparams/h8300s.sh \
+ $(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/h8300s.sc ${GEN_DEPENDS}
+ ${GENSCRIPTS} h8300s "$(tdir_h8300s)"
eh8500.c: $(srcdir)/emulparams/h8500.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/h8500.sc ${GEN_DEPENDS}
${GENSCRIPTS} h8500 "$(tdir_h8500)"
ens32knbsd.c: $(srcdir)/emulparams/ns32knbsd.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/aout.sc ${GEN_DEPENDS}
${GENSCRIPTS} ns32knbsd "$(tdir_ns32knbsd)"
-epc532machaout.c: $(srcdir)/emulparams/pc532machaout.sh \
+epc532macha.c: $(srcdir)/emulparams/pc532macha.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/aout.sc ${GEN_DEPENDS}
- ${GENSCRIPTS} pc532machaout "$(tdir_pc532machaout)"
+ ${GENSCRIPTS} pc532macha "$(tdir_pc532macha)"
eppcmacos.c: $(srcdir)/emulparams/ppcmacos.sh \
$(srcdir)/emultempl/aix.em $(srcdir)/scripttempl/aix.sc ${GEN_DEPENDS}
${GENSCRIPTS} ppcmacos "$(tdir_ppcmacos)"
esh.c: $(srcdir)/emulparams/sh.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/sh.sc ${GEN_DEPENDS}
${GENSCRIPTS} sh "$(tdir_sh)"
+eshelf.c: $(srcdir)/emulparams/shelf.sh \
+ $(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
+ ${GENSCRIPTS} shelf "$(tdir_shelf)"
+eshlelf.c: $(srcdir)/emulparams/shlelf.sh \
+ $(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
+ ${GENSCRIPTS} shlelf "$(tdir_shlelf)"
eshl.c: $(srcdir)/emulparams/shl.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/sh.sc ${GEN_DEPENDS}
${GENSCRIPTS} shl "$(tdir_shl)"
${GENSCRIPTS} z8002 "$(tdir_z8002)"
$(LD_PROG): $(OFILES) $(BFDDEP) $(LIBIBERTY)
- $(CC) $(HLDFLAGS) $(CFLAGS) $(LDFLAGS) -o $(LD_PROG) $(OFILES) $(BFDLIB) $(LIBIBERTY) $(EXTRALIBS)
+ $(HLDENV) $(CC) $(HLDFLAGS) $(CFLAGS) $(LDFLAGS) -o $(LD_PROG) $(OFILES) $(BFDLIB) $(LIBIBERTY) $(EXTRALIBS)
# The generated emulation files mostly have the same dependencies.
$(EMULATION_OFILES): ../bfd/bfd.h sysdep.h config.h $(INCDIR)/bfdlink.h \
mostlyclean:
-rm -f $(STAGESTUFF) ld.?? ld.??? ldlex.[qp] config.log
-rm -f ld ld1 ld2 ld3 *.o y.output cdtest cdtest.out cdtest.tmp
- -rm -f cdtest-ur cdtest-ur.out cdtest-ur.tmp
+ -rm -f cdtest-ur cdtest-ur.out cdtest-ur.tmp crtbegin.o crtend.o
-rm -f ldemul-list.h
-rm -fr tmpdir
clean: mostlyclean
$(INCDIR)/obstack.h sysdep.h config.h $(INCDIR)/fopen-same.h \
$(INCDIR)/libiberty.h $(INCDIR)/bfdlink.h ld.h ldmain.h \
ldgram.h ldexp.h ldlang.h ldemul.h ldlex.h ldmisc.h \
- ldctor.h ldfile.h
+ ldctor.h ldfile.h fnmatch.h
ldmain.o: ldmain.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
$(INCDIR)/obstack.h sysdep.h config.h $(INCDIR)/fopen-same.h \
$(INCDIR)/libiberty.h $(INCDIR)/progress.h $(INCDIR)/bfdlink.h \
ldlang.h ldwrite.h ldmisc.h ldgram.h ldmain.h
lexsup.o: lexsup.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
$(INCDIR)/obstack.h sysdep.h config.h $(INCDIR)/fopen-same.h \
- $(INCDIR)/getopt.h $(INCDIR)/bfdlink.h ld.h ldmain.h \
- ldmisc.h ldexp.h ldlang.h ldgram.h ldlex.h ldfile.h \
- ldver.h ldemul.h
+ $(INCDIR)/libiberty.h $(INCDIR)/getopt.h $(INCDIR)/bfdlink.h \
+ ld.h ldmain.h ldmisc.h ldexp.h ldlang.h ldgram.h ldlex.h \
+ ldfile.h ldver.h ldemul.h
mri.o: mri.c ../bfd/bfd.h $(INCDIR)/ansidecl.h $(INCDIR)/obstack.h \
sysdep.h config.h $(INCDIR)/fopen-same.h ld.h ldexp.h \
ldlang.h ldmisc.h mri.h ldgram.h
ldcref.o: ldcref.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
$(INCDIR)/obstack.h sysdep.h config.h $(INCDIR)/fopen-same.h \
$(INCDIR)/bfdlink.h $(INCDIR)/libiberty.h ld.h ldmain.h \
- ldmisc.h
+ ldmisc.h ldexp.h ldlang.h
+fnmatch.o: fnmatch.c
ldgram.o: ldgram.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
$(INCDIR)/obstack.h sysdep.h config.h $(INCDIR)/fopen-same.h \
$(INCDIR)/bfdlink.h ld.h ldexp.h ldver.h ldlang.h ldemul.h \
-*- text -*-
+Changes since version 2.7:
+
+* Linker scripts may now contain shell wildcard characters for file and section
+ names.
+
+* The NOCROSSREFS command was added to the linker script language.
+
+* The LOADADDR expression was added to the linker script language.
+
+* MAX and MIN functions were added to the linker script language.
+
+* The OVERLAY construct was added to the linker script language.
+
Changes since version 2.6:
* New option --cref to print out a cross reference table.
+/* Whether strstr must be declared even if <string.h> is included. */
+#undef NEED_DECLARATION_STRSTR
+
/* Whether free must be declared even if <stdlib.h> is included. */
#undef NEED_DECLARATION_FREE
+
+/* Whether sbrk must be declared even if <unistd.h> is included. */
+#undef NEED_DECLARATION_SBRK
@TOP@
/* Do we need to use the b modifier when opening binary files? */
/* config.in. Generated automatically from configure.in by autoheader. */
+/* Whether strstr must be declared even if <string.h> is included. */
+#undef NEED_DECLARATION_STRSTR
+
/* Whether free must be declared even if <stdlib.h> is included. */
#undef NEED_DECLARATION_FREE
+/* Whether sbrk must be declared even if <unistd.h> is included. */
+#undef NEED_DECLARATION_SBRK
+
/* Do we need to use the b modifier when opening binary files? */
#undef USE_BINARY_FOPEN
#! /bin/sh
# Guess values for system-dependent variables and create Makefiles.
-# Generated automatically using autoconf version 2.8
-# Copyright (C) 1992, 1993, 1994 Free Software Foundation, Inc.
+# Generated automatically using autoconf version 2.10
+# Copyright (C) 1992, 93, 94, 95, 96 Free Software Foundation, Inc.
#
# This configure script is free software; the Free Software Foundation
# gives unlimited permission to copy, distribute and modify it.
verbose=yes ;;
-version | --version | --versio | --versi | --vers)
- echo "configure generated by autoconf version 2.8"
+ echo "configure generated by autoconf version 2.10"
exit 0 ;;
-with-* | --with-*)
test "${CFLAGS+set}" = set || CFLAGS="-g"
fi
+# Find a good install program. We prefer a C program (faster),
+# so one script is as good as another. But avoid the broken or
+# incompatible versions:
+# SysV /etc/install, /usr/sbin/install
+# SunOS /usr/etc/install
+# IRIX /sbin/install
+# AIX /bin/install
+# AFS /usr/afsws/bin/install, which mishandles nonexistent args
+# SVR4 /usr/ucb/install, which tries to use the nonexistent group "staff"
+# ./install, which can be erroneously created by make from ./install.sh.
+echo $ac_n "checking for a BSD compatible install""... $ac_c" 1>&6
+if test -z "$INSTALL"; then
+if eval "test \"`echo '$''{'ac_cv_path_install'+set}'`\" = set"; then
+ echo $ac_n "(cached) $ac_c" 1>&6
+else
+ IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:"
+ for ac_dir in $PATH; do
+ # Account for people who put trailing slashes in PATH elements.
+ case "$ac_dir/" in
+ /|./|.//|/etc/*|/usr/sbin/*|/usr/etc/*|/sbin/*|/usr/afsws/bin/*|/usr/ucb/*) ;;
+ *)
+ # OSF1 and SCO ODT 3.0 have their own names for install.
+ for ac_prog in ginstall installbsd scoinst install; do
+ if test -f $ac_dir/$ac_prog; then
+ if test $ac_prog = install &&
+ grep dspmsg $ac_dir/$ac_prog >/dev/null 2>&1; then
+ # AIX install. It has an incompatible calling convention.
+ # OSF/1 installbsd also uses dspmsg, but is usable.
+ :
+ else
+ ac_cv_path_install="$ac_dir/$ac_prog -c"
+ break 2
+ fi
+ fi
+ done
+ ;;
+ esac
+ done
+ IFS="$ac_save_ifs"
+
+fi
+ if test "${ac_cv_path_install+set}" = set; then
+ INSTALL="$ac_cv_path_install"
+ else
+ # As a last resort, use the slow shell script. We don't cache a
+ # path for INSTALL within a source directory, because that will
+ # break other packages using the cache if that directory is
+ # removed, or if the path is relative.
+ INSTALL="$ac_install_sh"
+ fi
+fi
+echo "$ac_t""$INSTALL" 1>&6
+
+# Use test -z because SunOS4 sh mishandles braces in ${var-val}.
+# It thinks the first close brace ends the variable substitution.
+test -z "$INSTALL_PROGRAM" && INSTALL_PROGRAM='${INSTALL}'
+
+test -z "$INSTALL_DATA" && INSTALL_DATA='${INSTALL} -m 644'
+
. ${srcdir}/configure.host
+
# For most hosts we can use a simple definition to pick up the BFD and
# opcodes libraries. However, if we are building shared libraries, we
# need to handle some hosts specially.
BFDLIB='-L../bfd -lbfd'
-if test "${shared}" = "true"; then
- case "${host}" in
- *-*-sunos*)
- # On SunOS, we must link against the name we are going to install,
- # not -lbfd, since SunOS does not support SONAME.
+case "${host}" in
+*-*-sunos*)
+ # On SunOS, we must link against the name we are going to install,
+ # not -lbfd, since SunOS does not support SONAME.
+ if test "${shared}" = "true"; then
BFDLIB='-L../bfd -l`echo bfd | sed '"'"'$(program_transform_name)'"'"'`'
- ;;
- esac
-fi
+ fi
+ ;;
+alpha*-*-osf*)
+ # On Alpha OSF/1, the native linker searches all the -L
+ # directories for any LIB.so files, and only then searches for any
+ # LIB.a files. That means that if there is an installed
+ # libbfd.so, but this build is not done with --enable-shared, the
+ # link will wind up being against the install libbfd.so rather
+ # than the newly built libbfd. To avoid this, we must explicitly
+ # link against libbfd.a when --enable-shared is not used.
+ if test "${shared}" != "true"; then
+ BFDLIB='../bfd/libbfd.a'
+ fi
+ ;;
+esac
echo $ac_n "checking how to run the C preprocessor""... $ac_c" 1>&6
# On the NeXT, cc -E runs the code through the compiler's parser,
# not just through cpp.
cat > conftest.$ac_ext <<EOF
-#line 840 "configure"
+#line 912 "configure"
#include "confdefs.h"
#include <assert.h>
Syntax Error
EOF
ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:846: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
+{ (eval echo configure:918: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
ac_err=`grep -v '^ *+' conftest.out`
if test -z "$ac_err"; then
:
rm -rf conftest*
CPP="${CC-cc} -E -traditional-cpp"
cat > conftest.$ac_ext <<EOF
-#line 855 "configure"
+#line 927 "configure"
#include "confdefs.h"
#include <assert.h>
Syntax Error
EOF
ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:861: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
+{ (eval echo configure:933: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
ac_err=`grep -v '^ *+' conftest.out`
if test -z "$ac_err"; then
:
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 889 "configure"
+#line 961 "configure"
#include "confdefs.h"
#include <$ac_hdr>
EOF
ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:894: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
+{ (eval echo configure:966: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
ac_err=`grep -v '^ *+' conftest.out`
if test -z "$ac_err"; then
rm -rf conftest*
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 925 "configure"
+#line 997 "configure"
#include "confdefs.h"
/* System header to define __stub macros and hopefully few prototypes,
which can conflict with char $ac_func(); below. */
#include <assert.h>
/* Override any gcc2 internal prototype to avoid an error. */
+/* We use char because int might match the return type of a gcc2
+ builtin and then its argument prototype would still apply. */
char $ac_func();
int main() { return 0; }
; return 0; }
EOF
-if { (eval echo configure:947: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }; then
+if { (eval echo configure:1021: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }; then
rm -rf conftest*
eval "ac_cv_func_$ac_func=yes"
else
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 978 "configure"
+#line 1052 "configure"
#include "confdefs.h"
#include <sys/types.h>
#include <$ac_hdr>
DIR *dirp = 0;
; return 0; }
EOF
-if { (eval echo configure:987: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
+if { (eval echo configure:1061: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
rm -rf conftest*
eval "ac_cv_header_dirent_$ac_safe=yes"
else
# Two versions of opendir et al. are in -ldir and -lx on SCO Xenix.
if test $ac_header_dirent = dirent.h; then
echo $ac_n "checking for -ldir""... $ac_c" 1>&6
-ac_lib_var=`echo dir_opendir | tr '.-/+' '___p'`
+ac_lib_var=`echo dir'_'opendir | tr './+\055' '__p_'`
if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
ac_save_LIBS="$LIBS"
LIBS="-ldir $LIBS"
cat > conftest.$ac_ext <<EOF
-#line 1018 "configure"
+#line 1092 "configure"
#include "confdefs.h"
+/* Override any gcc2 internal prototype to avoid an error. */
+/* We use char because int might match the return type of a gcc2
+ builtin and then its argument prototype would still apply. */
+char opendir();
int main() { return 0; }
int t() {
opendir()
; return 0; }
EOF
-if { (eval echo configure:1026: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }; then
+if { (eval echo configure:1104: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }; then
rm -rf conftest*
eval "ac_cv_lib_$ac_lib_var=yes"
else
else
echo $ac_n "checking for -lx""... $ac_c" 1>&6
-ac_lib_var=`echo x_opendir | tr '.-/+' '___p'`
+ac_lib_var=`echo x'_'opendir | tr './+\055' '__p_'`
if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
ac_save_LIBS="$LIBS"
LIBS="-lx $LIBS"
cat > conftest.$ac_ext <<EOF
-#line 1053 "configure"
+#line 1131 "configure"
#include "confdefs.h"
+/* Override any gcc2 internal prototype to avoid an error. */
+/* We use char because int might match the return type of a gcc2
+ builtin and then its argument prototype would still apply. */
+char opendir();
int main() { return 0; }
int t() {
opendir()
; return 0; }
EOF
-if { (eval echo configure:1061: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }; then
+if { (eval echo configure:1143: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }; then
rm -rf conftest*
eval "ac_cv_lib_$ac_lib_var=yes"
else
;;
esac
+echo $ac_n "checking whether strstr must be declared""... $ac_c" 1>&6
+if eval "test \"`echo '$''{'bfd_cv_decl_needed_strstr'+set}'`\" = set"; then
+ echo $ac_n "(cached) $ac_c" 1>&6
+else
+ cat > conftest.$ac_ext <<EOF
+#line 1178 "configure"
+#include "confdefs.h"
+
+#include <stdio.h>
+#ifdef HAVE_STRING_H
+#include <string.h>
+#else
+#ifdef HAVE_STRINGS_H
+#include <strings.h>
+#endif
+#endif
+#ifdef HAVE_STDLIB_H
+#include <stdlib.h>
+#endif
+#ifdef HAVE_UNISTD_H
+#include <unistd.h>
+#endif
+int main() { return 0; }
+int t() {
+char *(*pfn) = (char *(*)) strstr
+; return 0; }
+EOF
+if { (eval echo configure:1200: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
+ rm -rf conftest*
+ bfd_cv_decl_needed_strstr=no
+else
+ rm -rf conftest*
+ bfd_cv_decl_needed_strstr=yes
+fi
+rm -f conftest*
+
+fi
+
+echo "$ac_t""$bfd_cv_decl_needed_strstr" 1>&6
+if test $bfd_cv_decl_needed_strstr = yes; then
+ bfd_tr_decl=NEED_DECLARATION_`echo strstr | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'`
+ cat >> confdefs.h <<EOF
+#define $bfd_tr_decl 1
+EOF
+
+fi
+
echo $ac_n "checking whether free must be declared""... $ac_c" 1>&6
if eval "test \"`echo '$''{'bfd_cv_decl_needed_free'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 1096 "configure"
+#line 1225 "configure"
#include "confdefs.h"
#include <stdio.h>
+#ifdef HAVE_STRING_H
+#include <string.h>
+#else
+#ifdef HAVE_STRINGS_H
+#include <strings.h>
+#endif
+#endif
#ifdef HAVE_STDLIB_H
#include <stdlib.h>
#endif
char *(*pfn) = (char *(*)) free
; return 0; }
EOF
-if { (eval echo configure:1111: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
+if { (eval echo configure:1247: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
rm -rf conftest*
bfd_cv_decl_needed_free=no
else
fi
+echo $ac_n "checking whether sbrk must be declared""... $ac_c" 1>&6
+if eval "test \"`echo '$''{'bfd_cv_decl_needed_sbrk'+set}'`\" = set"; then
+ echo $ac_n "(cached) $ac_c" 1>&6
+else
+ cat > conftest.$ac_ext <<EOF
+#line 1272 "configure"
+#include "confdefs.h"
+
+#include <stdio.h>
+#ifdef HAVE_STRING_H
+#include <string.h>
+#else
+#ifdef HAVE_STRINGS_H
+#include <strings.h>
+#endif
+#endif
+#ifdef HAVE_STDLIB_H
+#include <stdlib.h>
+#endif
+#ifdef HAVE_UNISTD_H
+#include <unistd.h>
+#endif
+int main() { return 0; }
+int t() {
+char *(*pfn) = (char *(*)) sbrk
+; return 0; }
+EOF
+if { (eval echo configure:1294: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
+ rm -rf conftest*
+ bfd_cv_decl_needed_sbrk=no
+else
+ rm -rf conftest*
+ bfd_cv_decl_needed_sbrk=yes
+fi
+rm -f conftest*
+
+fi
+
+echo "$ac_t""$bfd_cv_decl_needed_sbrk" 1>&6
+if test $bfd_cv_decl_needed_sbrk = yes; then
+ bfd_tr_decl=NEED_DECLARATION_`echo sbrk | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'`
+ cat >> confdefs.h <<EOF
+#define $bfd_tr_decl 1
+EOF
+
+fi
+
# target-specific stuff:
echo "running \${CONFIG_SHELL-/bin/sh} $0 $ac_configure_args --no-create --no-recursion"
exec \${CONFIG_SHELL-/bin/sh} $0 $ac_configure_args --no-create --no-recursion ;;
-version | --version | --versio | --versi | --vers | --ver | --ve | --v)
- echo "$CONFIG_STATUS generated by autoconf version 2.8"
+ echo "$CONFIG_STATUS generated by autoconf version 2.10"
exit 0 ;;
-help | --help | --hel | --he | --h)
echo "\$ac_cs_usage"; exit 0 ;;
done
ac_given_srcdir=$srcdir
+ac_given_INSTALL="$INSTALL"
trap 'rm -fr `echo "Makefile config.h:config.in" | sed "s/:[^ ]*//g"` conftest*; exit 1' 1 2 15
EOF
s%@build_vendor@%$build_vendor%g
s%@build_os@%$build_os%g
s%@CC@%$CC%g
+s%@INSTALL_PROGRAM@%$INSTALL_PROGRAM%g
+s%@INSTALL_DATA@%$INSTALL_DATA%g
s%@HLDFLAGS@%$HLDFLAGS%g
+s%@HLDENV@%$HLDENV%g
s%@RPATH_ENVVAR@%$RPATH_ENVVAR%g
s%@HDEFINES@%$HDEFINES%g
s%@HOSTING_CRT0@%$HOSTING_CRT0%g
top_srcdir="$ac_dots$ac_given_srcdir" ;;
esac
+ case "$ac_given_INSTALL" in
+ [/$]*) INSTALL="$ac_given_INSTALL" ;;
+ *) INSTALL="$ac_dots$ac_given_INSTALL" ;;
+ esac
echo creating "$ac_file"
rm -f "$ac_file"
configure_input="Generated automatically from `echo $ac_file_in|sed 's%.*/%%'` by configure."
s%@configure_input@%$configure_input%g
s%@srcdir@%$srcdir%g
s%@top_srcdir@%$top_srcdir%g
+s%@INSTALL@%$INSTALL%g
" -f conftest.subs $ac_given_srcdir/$ac_file_in > $ac_file
fi; done
rm -f conftest.subs
cat > conftest.hdr <<\EOF
s/[\\&%]/\\&/g
s%[\\$`]%\\&%g
-s%#define \([A-Za-z_][A-Za-z0-9_]*\) \(.*\)%${ac_dA}\1${ac_dB}\1${ac_dC}\2${ac_dD}%gp
+s%#define \([A-Za-z_][A-Za-z0-9_]*\) *\(.*\)%${ac_dA}\1${ac_dB}\1${ac_dC}\2${ac_dD}%gp
s%ac_d%ac_u%gp
s%ac_u%ac_e%gp
EOF
echo "$ac_file is unchanged"
rm -f conftest.h
else
+ # Remove last slash and all that follows it. Not all systems have dirname.
+ ac_dir=`echo $ac_file|sed 's%/[^/][^/]*$%%'`
+ if test "$ac_dir" != "$ac_file" && test "$ac_dir" != .; then
+ # The file is in a subdirectory.
+ test ! -d "$ac_dir" && mkdir "$ac_dir"
+ fi
rm -f $ac_file
mv conftest.h $ac_file
fi
# HOSTING_LIBS libraries used for bootstrapping
# NATIVE_LIB_DIRS library directories to search on this host
# HLDFLAGS link flags to use on this host
+# HLDENV environment variable to set when linking for the host
# RPATH_ENVVAR environment variable used to find shared libraries
HDEFINES=
NATIVE_LIB_DIRS=/usr/ccs/lib
;;
-i[345]86-*-bsd* | i[345]86-*-freebsd* | i[345]86-*-netbsd* | i[345]86-*-openbsd*)
+i[3456]86-*-bsd* | i[3456]86-*-freebsd* | i[3456]86-*-netbsd* | i[3456]86-*-openbsd*)
# The new BSD `make' has a bug: it doesn't pass empty arguments in
# shell commands. So we need to make this value non-empty in order
# for the genscripts.sh call to work. There's nothing magic about
HOSTING_CRT0=/usr/lib/crt0.o
;;
-i[345]86-*-sysv4*)
- HOSTING_CRT0='/usr/ccs/lib/crt1.o /usr/ccs/lib/crti.o /usr/ccs/lib/values-Xa.o `if [ -f ../gcc/crtbegin.o ]; then echo ../gcc/crtbegin.o; else gcc -print-libgcc-file-name | sed -e 's/libgcc.a/crtbegin.o/'; fi`'
- HOSTING_LIBS='`if [ -f ../gcc/libgcc.a ] ; then echo ../gcc/libgcc.a ; else gcc -print-libgcc-file-name; fi` -lc `if [ -f ../gcc/crtend.o ]; then echo ../gcc/crtend.o; else gcc -print-libgcc-file-name | sed -e 's/libgcc.a/crtend.o/'; fi` /usr/ccs/lib/crtn.o'
+i[3456]86-*-sysv4*)
+ HOSTING_CRT0='/usr/ccs/lib/crt1.o /usr/ccs/lib/crti.o /usr/ccs/lib/values-Xa.o `if [ -f ../gcc/crtbegin.o ]; then echo ../gcc/crtbegin.o; else gcc -print-file-name=crtbegin.o; fi`'
+ HOSTING_LIBS='`if [ -f ../gcc/libgcc.a ] ; then echo ../gcc/libgcc.a ; else gcc -print-libgcc-file-name; fi` -lc `if [ -f ../gcc/crtend.o ]; then echo ../gcc/crtend.o; else gcc -print-file-name=crtend.o; fi` /usr/ccs/lib/crtn.o'
NATIVE_LIB_DIRS=/usr/ccs/lib
;;
-i[345]86-sequent-ptx* | i[345]86-sequent-sysv*)
- HOSTING_CRT0='/lib/crt0.o `if [ -f ../gcc/crtbegin.o ]; then echo ../gcc/crtbegin.o; else gcc -print-libgcc-file-name | sed -e 's/libgcc.a/crtbegin.o/'; fi`'
- HOSTING_LIBS='`if [ -f ../gcc/libgcc.a ] ; then echo ../gcc/libgcc.a ; else gcc -print-libgcc-file-name; fi` -lc `if [ -f ../gcc/crtend.o ]; then echo ../gcc/crtend.o; else gcc -print-libgcc-file-name | sed -e 's/libgcc.a/crtend.o/'; fi`'
+i[3456]86-sequent-ptx* | i[3456]86-sequent-sysv*)
+ HOSTING_CRT0='/lib/crt0.o `if [ -f ../gcc/crtbegin.o ]; then echo ../gcc/crtbegin.o; else gcc -print-file-name=crtbegin.o; fi`'
+ HOSTING_LIBS='`if [ -f ../gcc/libgcc.a ] ; then echo ../gcc/libgcc.a ; else gcc -print-libgcc-file-name; fi` -lc `if [ -f ../gcc/crtend.o ]; then echo ../gcc/crtend.o; else gcc -print-file-name=crtend.o; fi`'
;;
-i[345]86-*-sysv*)
+i[3456]86-*-sysv*)
HOSTING_CRT0='/lib/crt1.o `if [ -f ../gcc/crtbegin.o ]; then echo ../gcc/crtbegin.o; fi`'
- HOSTING_LIBS='`if [ -f ../gcc/libgcc.a ] ; then echo ../gcc/libgcc.a ; else gcc -print-libgcc-file-name; fi` -lc `if [ -f ../gcc/crtend.o ]; then echo ../gcc/crtend.o; fi` /lib/crtn.o'
+ HOSTING_LIBS='`if [ -f ../gcc/libgcc.a ] ; then echo ../gcc/libgcc.a ; else gcc -print-libgcc-file-name; fi` -lc `if [ -f ../gcc/crtend.o ]; then echo ../gcc/crtend.o; fi` /lib/crtn.o'
;;
-i[345]86-*-solaris*)
- HOSTING_CRT0='`if [ -f ../gcc/crt1.o ]; then echo ../gcc/crt1.o; else gcc -print-libgcc-file-name | sed -e 's/libgcc.a/crt1.o/'; fi` `if [ -f ../gcc/crti.o ]; then echo ../gcc/crti.o; else gcc -print-libgcc-file-name | sed -e 's/libgcc.a/crti.o/'; fi` /usr/ccs/lib/values-Xa.o `if [ -f ../gcc/crtbegin.o ]; then echo ../gcc/crtbegin.o; else gcc -print-libgcc-file-name | sed -e 's/libgcc.a/crtbegin.o/'; fi`'
- HOSTING_LIBS='`if [ -f ../gcc/libgcc.a ] ; then echo ../gcc/libgcc.a ; else gcc -print-libgcc-file-name; fi` -lc `if [ -f ../gcc/crtend.o ]; then echo ../gcc/crtend.o; else gcc -print-libgcc-file-name | sed -e 's/libgcc.a/crtend.o/'; fi` `if [ -f ../gcc/crtn.o ]; then echo ../gcc/crtn.o; else gcc -print-libgcc-file-name | sed -e 's/libgcc.a/crtn.o/'; fi`'
+i[3456]86-*-solaris*)
+ HOSTING_CRT0='`if [ -f ../gcc/crt1.o ]; then echo ../gcc/crt1.o; else gcc -print-file-name=crt1.o; fi` `if [ -f ../gcc/crti.o ]; then echo ../gcc/crti.o; else gcc -print-file-name=crti.o; fi` /usr/ccs/lib/values-Xa.o `if [ -f ../gcc/crtbegin.o ]; then echo ../gcc/crtbegin.o; else gcc -print-file-name=crtbegin.o; fi`'
+ HOSTING_LIBS='`if [ -f ../gcc/libgcc.a ] ; then echo ../gcc/libgcc.a ; else gcc -print-libgcc-file-name; fi` -lc `if [ -f ../gcc/crtend.o ]; then echo ../gcc/crtend.o; else gcc -print-file-name=crtend.o; fi` `if [ -f ../gcc/crtn.o ]; then echo ../gcc/crtn.o; else gcc -print-file-name=crtn.o; fi`'
NATIVE_LIB_DIRS=/usr/ccs/lib
;;
-i[345]86-*-sco* | i[345]86-*-isc*)
- HOSTING_CRT0='/lib/crt1.o `if [ -f ../gcc/crtbegin.o ]; then echo ../gcc/crtbegin.o; else gcc -print-libgcc-file-name | sed -e 's/libgcc.a/crtbegin.o/'; fi`'
- HOSTING_LIBS='`if [ -f ../gcc/libgcc.a ] ; then echo ../gcc/libgcc.a ; else gcc -print-libgcc-file-name; fi` -lc `if [ -f ../gcc/crtend.o ]; then echo ../gcc/crtend.o; else gcc -print-libgcc-file-name | sed -e 's/libgcc.a/crtend.o/'; fi` /lib/crtn.o'
+i[3456]86-*-sco* | i[3456]86-*-isc*)
+ # In some configurations gcc does not use crtbegin.o and crtend.o.
+ # In that case gcc -print-file-name=crtbegin.o will simply print
+ # crtbegin.o. We create dummy crtbegin.o and crtend.o files to
+ # handle this.
+ echo "int dummy_crtbegin () { return 0; }" > crtbegin.c
+ ${CC} -c crtbegin.c -o crtbegin.o
+ rm -f crtbegin.c
+ echo "int dummy_crteng () { return 0; }" > crtend.c
+ ${CC} -c crtend.c -o crtend.o
+ rm -f crtend.c
+ HOSTING_CRT0='/lib/crt1.o `if [ -f ../gcc/crtbegin.o ]; then echo ../gcc/crtbegin.o; else gcc -print-file-name=crtbegin.o; fi`'
+ HOSTING_LIBS='`if [ -f ../gcc/libgcc.a ] ; then echo ../gcc/libgcc.a ; else gcc -print-libgcc-file-name; fi` -lc `if [ -f ../gcc/crtend.o ]; then echo ../gcc/crtend.o; else gcc -print-file-name=crtend.o; fi` /lib/crtn.o'
;;
-i[345]86-*-linuxaout* | i[345]86-*-linuxoldld)
+i[3456]86-*-linuxaout* | i[3456]86-*-linuxoldld)
HOSTING_CRT0=/usr/lib/crt0.o
;;
-i[345]86-*-linux*)
+i[3456]86-*-linux*)
HOSTING_CRT0='-dynamic-linker /lib/ld-linux.so.1 /usr/lib/crt1.o /usr/lib/crti.o `if [ -f ../gcc/crtbegin.o ]; then echo ../gcc/crtbegin.o; elif [ -f /usr/lib/crtbegin.o ]; then echo /usr/lib/crtbegin.o; else gcc --print-file-name=crtbegin.o; fi`'
HOSTING_LIBS='`if [ -f ../gcc/libgcc.a ] ; then echo ../gcc/libgcc.a ; else gcc -print-libgcc-file-name; fi` -lc `if [ -f ../gcc/libgcc.a ] ; then echo ../gcc/libgcc.a ; else gcc -print-libgcc-file-name; fi` `if [ -f ../gcc/crtend.o ]; then echo ../gcc/crtend.o; elif [ -f /usr/lib/crtend.o ]; then echo /usr/lib/crtend.o; else gcc --print-file-name=crtend.o; fi` /usr/lib/crtn.o'
;;
-i[345]86-*-lynxos*)
+i[3456]86-*-lynxos*)
HOSTING_CRT0=/lib/init1.o
HOSTING_LIBS='`if [ -f ../gcc/libgcc.a ] ; then echo ../gcc/libgcc.a ; else gcc -print-libgcc-file-name; fi` -lc -lm /lib/initn.o'
;;
HOSTING_LIBS='`if [ -f ../gcc/libgcc.a ] ; then echo ../gcc/libgcc.a ; else gcc -print-libgcc-file-name; fi` -lc /usr/lib/crtn.o'
;;
-mips*-sgi-irix5*)
+mips*-sgi-irix[56]*)
HOSTING_CRT0=/usr/lib/crt1.o
HOSTING_LIBS='`if [ -f ../gcc/libgcc.a ] ; then echo ../gcc/libgcc.a ; else gcc -print-libgcc-file-name; fi` -lc /usr/lib/crtn.o'
;;
m88*-*-dgux*)
HDEFINES=-D__using_DGUX
- HOSTING_CRT0=/lib/crt0.o -X
+ HOSTING_CRT0='/lib/crt0.o -X'
HOSTING_LIBS=/usr/sde/m88kbcs/lib/libc.a
;;
m88*-motorola-sysv3)
- HOSTING_CRT0='/lib/crt0.o `if [ -f ../gcc/crtbegin.o ]; then echo ../gcc/crtbegin.o; else gcc -print-libgcc-file-name | sed -e 's/libgcc.a/crtbegin.o/'; fi`'
- HOSTING_LIBS='`if [ -f ../gcc/libgcc.a ] ; then echo ../gcc/libgcc.a ; else gcc -print-libgcc-file-name; fi` -lc `if [ -f ../gcc/crtend.o ]; then echo ../gcc/crtend.o; else gcc -print-libgcc-file-name | sed -e 's/libgcc.a/crtend.o/'; fi` `if [ -f ../gcc/libgcc.a ] ; then echo ../gcc/libgcc.a ; else gcc -print-libgcc-file-name; fi`'
+ HOSTING_CRT0='/lib/crt0.o `if [ -f ../gcc/crtbegin.o ]; then echo ../gcc/crtbegin.o; else gcc -print-file-name=crtbegin.o; fi`'
+ HOSTING_LIBS='`if [ -f ../gcc/libgcc.a ] ; then echo ../gcc/libgcc.a ; else gcc -print-libgcc-file-name; fi` -lc `if [ -f ../gcc/crtend.o ]; then echo ../gcc/crtend.o; else gcc -print-file-name=crtend.o; fi` `if [ -f ../gcc/libgcc.a ] ; then echo ../gcc/libgcc.a ; else gcc -print-libgcc-file-name; fi`'
;;
romp-*-*)
;;
sparc*-*-solaris2*)
- HOSTING_CRT0='`if [ -f ../gcc/crt1.o ]; then echo ../gcc/crt1.o; else gcc -print-libgcc-file-name | sed -e 's/libgcc.a/crt1.o/'; fi` `if [ -f ../gcc/crti.o ]; then echo ../gcc/crti.o; else gcc -print-libgcc-file-name | sed -e 's/libgcc.a/crti.o/'; fi` /usr/ccs/lib/values-Xa.o `if [ -f ../gcc/crtbegin.o ]; then echo ../gcc/crtbegin.o; else gcc -print-libgcc-file-name | sed -e 's/libgcc.a/crtbegin.o/'; fi`'
- HOSTING_LIBS='`if [ -f ../gcc/libgcc.a ] ; then echo ../gcc/libgcc.a ; else gcc -print-libgcc-file-name; fi` -lc `if [ -f ../gcc/crtend.o ]; then echo ../gcc/crtend.o; else gcc -print-libgcc-file-name | sed -e 's/libgcc.a/crtend.o/'; fi` `if [ -f ../gcc/crtn.o ]; then echo ../gcc/crtn.o; else gcc -print-libgcc-file-name | sed -e 's/libgcc.a/crtn.o/'; fi`'
+ HOSTING_CRT0='`if [ -f ../gcc/crt1.o ]; then echo ../gcc/crt1.o; else gcc -print-file-name=crt1.o; fi` `if [ -f ../gcc/crti.o ]; then echo ../gcc/crti.o; else gcc -print-file-name=crti.o; fi` /usr/ccs/lib/values-Xa.o `if [ -f ../gcc/crtbegin.o ]; then echo ../gcc/crtbegin.o; else gcc -print-file-name=crtbegin.o; fi`'
+ HOSTING_LIBS='`if [ -f ../gcc/libgcc.a ] ; then echo ../gcc/libgcc.a ; else gcc -print-libgcc-file-name; fi` -lc `if [ -f ../gcc/crtend.o ]; then echo ../gcc/crtend.o; else gcc -print-file-name=crtend.o; fi` `if [ -f ../gcc/crtn.o ]; then echo ../gcc/crtn.o; else gcc -print-file-name=crtn.o; fi`'
NATIVE_LIB_DIRS=/usr/ccs/lib
;;
esac
HLDFLAGS=
+HLDENV=
RPATH_ENVVAR=LD_LIBRARY_PATH
# If we have shared libraries, try to set rpath reasonably.
if test "${shared}" = "true"; then
HLDFLAGS='-Wl,+s,+b,$(libdir)'
RPATH_ENVVAR=SHLIB_PATH
;;
- *-*-irix5*)
+ *-*-irix[56]*)
HLDFLAGS='-Wl,-rpath,$(libdir)'
;;
*-*-linux*aout*)
*-*-linux*)
HLDFLAGS='-Wl,-rpath,$(libdir)'
;;
- *-*-sysv4* | *-*-solaris*)
+ *-*-solaris*)
HLDFLAGS='-R $(libdir)'
;;
+ *-*-sysv4*)
+ HLDENV='if test -z "$${LD_RUN_PATH}"; then LD_RUN_PATH=$(libdir); else LD_RUN_PATH=$${LD_RUN_PATH}:$(libdir); fi; export LD_RUN_PATH;'
+ ;;
esac
fi
dnl Process this file with autoconf to produce a configure script
dnl
-AC_PREREG(2.0)
+AC_PREREG(2.5)
AC_INIT(ldmain.c)
AC_ARG_ENABLE(targets,
# host-specific stuff:
AC_PROG_CC
+AC_PROG_INSTALL
. ${srcdir}/configure.host
AC_SUBST(HLDFLAGS)
+AC_SUBST(HLDENV)
AC_SUBST(RPATH_ENVVAR)
AC_SUBST(HDEFINES)
AC_SUBST(HOSTING_CRT0)
# opcodes libraries. However, if we are building shared libraries, we
# need to handle some hosts specially.
BFDLIB='-L../bfd -lbfd'
-if test "${shared}" = "true"; then
- case "${host}" in
- *-*-sunos*)
- # On SunOS, we must link against the name we are going to install,
- # not -lbfd, since SunOS does not support SONAME.
+case "${host}" in
+*-*-sunos*)
+ # On SunOS, we must link against the name we are going to install,
+ # not -lbfd, since SunOS does not support SONAME.
+ if test "${shared}" = "true"; then
BFDLIB='-L../bfd -l`echo bfd | sed '"'"'$(program_transform_name)'"'"'`'
- ;;
- esac
-fi
+ fi
+ ;;
+alpha*-*-osf*)
+ # On Alpha OSF/1, the native linker searches all the -L
+ # directories for any LIB.so files, and only then searches for any
+ # LIB.a files. That means that if there is an installed
+ # libbfd.so, but this build is not done with --enable-shared, the
+ # link will wind up being against the install libbfd.so rather
+ # than the newly built libbfd. To avoid this, we must explicitly
+ # link against libbfd.a when --enable-shared is not used.
+ if test "${shared}" != "true"; then
+ BFDLIB='../bfd/libbfd.a'
+ fi
+ ;;
+esac
AC_SUBST(BFDLIB)
AC_CHECK_HEADERS(string.h strings.h stdlib.h unistd.h)
BFD_BINARY_FOPEN
+BFD_NEED_DECLARATION(strstr)
BFD_NEED_DECLARATION(free)
+BFD_NEED_DECLARATION(sbrk)
# target-specific stuff:
sparc*-*-aout) targ_emul=sparcaout ;;
sparc*-*-coff) targ_emul=coff_sparc ;;
sparc*-*-elf) targ_emul=elf32_sparc ;;
+sparc*-*-sysv4*) targ_emul=elf32_sparc ;;
sparc*-*-lynxos*) targ_emul=sparclynx ;;
sparc*-*-netbsd*) targ_emul=sparcnbsd ;;
sparc*-*-openbsd*) targ_emul=sparcnbsd ;;
sparc*-*-solaris2*) targ_emul=elf32_sparc ;;
sparc*-wrs-vxworks*) targ_emul=sparcaout ;;
+sparc*-*-rtems*) targ_emul=sparcaout ;;
i960-wrs-vxworks5.0*) targ_emul=gld960 ;;
i960-wrs-vxworks5*) targ_emul=gld960coff ;;
i960-wrs-vxworks*) targ_emul=gld960 ;;
i960-*-coff) targ_emul=gld960coff ;;
i960-intel-nindy) targ_emul=gld960 ;;
+i960-*-rtems*) targ_emul=gld960coff ;;
m68*-sun-sunos[34]*) targ_emul=sun3 ;;
m68*-wrs-vxworks*) targ_emul=sun3 ;;
m68*-ericsson-ose) targ_emul=sun3 ;;
m68*-apple-aux*) targ_emul=m68kaux ;;
*-tandem-none) targ_emul=st2000 ;;
-i[345]86-*-vsta) targ_emul=vsta ;;
-i[345]86-*-go32) targ_emul=i386go32 ;;
-i[345]86-*-aix*) targ_emul=i386coff ;;
-i[345]86-*-sco*) targ_emul=i386coff ;;
-i[345]86-*-lynxos*) targ_emul=i386lynx ;;
-i[345]86-*-coff) targ_emul=i386coff ;;
-i[345]86-*-bsd) targ_emul=i386bsd ;;
-i[345]86-*-bsd386) targ_emul=i386bsd ;;
-i[345]86-*-bsdi*) targ_emul=i386bsd ;;
-i[345]86-*-aout) targ_emul=i386aout ;;
-i[345]86-*-linuxaout*) targ_emul=i386linux
+i[3456]86-*-vsta) targ_emul=vsta ;;
+i[3456]86-go32-rtems*) targ_emul=i386go32 ;;
+i[3456]86-*-go32) targ_emul=i386go32 ;;
+i[3456]86-*-aix*) targ_emul=i386coff ;;
+i[3456]86-*-sco*) targ_emul=i386coff ;;
+i[3456]86-*-isc*) targ_emul=i386coff ;;
+i[3456]86-*-lynxos*) targ_emul=i386lynx ;;
+i[3456]86-*-coff) targ_emul=i386coff ;;
+i[3456]86-*-rtems*) targ_emul=i386coff ;;
+i[3456]86-*-bsd) targ_emul=i386bsd ;;
+i[3456]86-*-bsd386) targ_emul=i386bsd ;;
+i[3456]86-*-bsdi*) targ_emul=i386bsd ;;
+i[3456]86-*-aout) targ_emul=i386aout ;;
+i[3456]86-*-linuxaout*) targ_emul=i386linux
targ_extra_emuls=elf_i386
tdir_elf_i386=`echo ${targ_alias} | sed -e 's/aout//'`
;;
-i[345]86-*-linuxoldld) targ_emul=i386linux; targ_extra_emuls=elf_i386 ;;
-i[345]86-*-linux*) targ_emul=elf_i386
+i[3456]86-*-linuxoldld) targ_emul=i386linux; targ_extra_emuls=elf_i386 ;;
+i[3456]86-*-linux*) targ_emul=elf_i386
targ_extra_emuls=i386linux
tdir_i386linux=${targ_alias}aout
;;
-i[345]86-*-sysv4*) targ_emul=elf_i386 ;;
-i[345]86-*-unixware) targ_emul=elf_i386 ;;
-i[345]86-*-netbsd*) targ_emul=i386nbsd ;;
-i[345]86-*-openbsd*) targ_emul=i386nbsd ;;
-i[345]86-*-netware) targ_emul=i386nw ;;
-i[345]86-*-elf*) targ_emul=elf_i386 ;;
-i[345]86-*-freebsdelf*) targ_emul=elf_i386 ;;
-i[345]86-*-sysv*) targ_emul=i386coff ;;
-i[345]86-*-ptx*) targ_emul=i386coff ;;
-i[345]86-*-mach*) targ_emul=i386mach ;;
-i[345]86-*-gnu*) targ_emul=elf_i386; targ_extra_emuls=i386mach ;;
-i[345]86-*-msdos*) targ_emul=i386msdos; targ_extra_emuls=i386aout ;;
-i[345]86-*-moss*) targ_emul=i386moss; targ_extra_emuls=i386msdos ;;
-i[345]86-*-winnt) targ_emul=i386pe ;;
-i[345]86-*-pe) targ_emul=i386pe ;;
-i[345]86-*-cygwin32) targ_emul=i386pe ;;
+i[3456]86-*-sysv4*) targ_emul=elf_i386 ;;
+i[3456]86-*-unixware) targ_emul=elf_i386 ;;
+i[3456]86-*-netbsd*) targ_emul=i386nbsd ;;
+i[3456]86-*-openbsd*) targ_emul=i386nbsd ;;
+i[3456]86-*-netware) targ_emul=i386nw ;;
+i[3456]86-*-elf*) targ_emul=elf_i386 ;;
+i[3456]86-*-freebsdelf*) targ_emul=elf_i386 ;;
+i[3456]86-*-sysv*) targ_emul=i386coff ;;
+i[3456]86-*-ptx*) targ_emul=i386coff ;;
+i[3456]86-*-mach*) targ_emul=i386mach ;;
+i[3456]86-*-gnu*) targ_emul=elf_i386; targ_extra_emuls=i386mach ;;
+i[3456]86-*-msdos*) targ_emul=i386msdos; targ_extra_emuls=i386aout ;;
+i[3456]86-*-moss*) targ_emul=i386moss; targ_extra_emuls=i386msdos ;;
+i[3456]86-*-winnt) targ_emul=i386pe ;;
+i[3456]86-*-pe) targ_emul=i386pe ;;
+i[3456]86-*-cygwin32) targ_emul=i386pe ;;
m8*-*-*) targ_emul=m88kbcs ;;
a29k-*-udi) targ_emul=sa29200 ;;
a29k-*-ebmon) targ_emul=ebmon29k ;;
arm-*-aout | armel-*-aout) targ_emul=armaoutl ;;
armeb-*-aout) targ_emul=armaoutb ;;
arm-*-coff) targ_emul=armcoff ;;
-h8300-*-hms) targ_emul=h8300; targ_extra_emuls=h8300h ;;
+h8300-*-hms) targ_emul=h8300; targ_extra_emuls="h8300h h8300s"
+ ;;
h8500-*-hms) targ_emul=h8500
targ_extra_emuls="h8500s h8500b h8500m h8500c"
;;
+sh-*-elf*) targ_emul=shelf
+ targ_extra_emuls="shlelf sh shl"
+ ;;
sh-*-*) targ_emul=sh; targ_extra_emuls=shl ;;
m68k-sony-*) targ_emul=news ;;
m68k-hp-bsd*) targ_emul=hp300bsd ;;
m68*-*-netbsd*) targ_emul=m68knbsd ;;
m68*-*-openbsd*) targ_emul=m68knbsd ;;
m68*-*-psos*) targ_emul=m68kpsos ;;
+m68*-*-rtems*) targ_emul=m68kcoff ;;
hppa*-*-*elf*) targ_emul=hppaelf ;;
hppa*-*-lites*) targ_emul=hppaelf ;;
vax-dec-ultrix* | vax-dec-bsd*) targ_emul=vax ;;
mips*-dec-ultrix*) targ_emul=mipslit ;;
-mips*-sgi-irix5*) targ_emul=elf32bmip ;;
+mips*-dec-osf*) targ_emul=mipslit ;;
+mips*-sgi-irix[56]*) targ_emul=elf32bmip ;;
mips*-sgi-irix*) targ_emul=mipsbig ;;
mips*el-*-ecoff*) targ_emul=mipsidtl ;;
mips*-*-ecoff*) targ_emul=mipsidt ;;
mips*vr4300-*-elf*) targ_emul=elf32b4300 ;;
mips*vr4100el-*-elf*) targ_emul=elf32l4300 ;;
mips*vr4100-*-elf*) targ_emul=elf32b4300 ;;
-mips*el-*-elf*) targ_emul=elf32lmip ;;
-mips*-*-elf*) targ_emul=elf32bmip ;;
-alpha-*-linux*) targ_emul=alpha ;;
+mips*el-*-elf*) targ_emul=elf32elmip ;;
+mips*-*-elf*) targ_emul=elf32ebmip ;;
+alpha-*-linuxecoff*) targ_emul=alpha targ_extra_emuls=elf64alpha
+ tdir_elf64alpha=`echo ${targ_alias} | sed -e 's/ecoff//'`
+ ;;
+alpha-*-linux*) targ_emul=elf64alpha targ_extra_emuls=alpha
+ tdir_alpha=`echo ${targ_alias} | sed -e 's/linux/linuxecoff/'`
+ ;;
alpha-*-openbsd*) targ_emul=alpha ;;
alpha-*-osf*) targ_emul=alpha ;;
alpha-*-netware*) targ_emul=alpha ;;
z8k-*-coff) targ_emul=z8002; targ_extra_emuls=z8001 ;;
-ns32k-pc532-mach* | ns32k-pc532-ux*) targ_emul=pc532machaout ;;
+ns32k-pc532-mach* | ns32k-pc532-ux*) targ_emul=pc532macha ;;
ns32k-pc532-netbsd* | ns32k-pc532-lites*) targ_emul=ns32knbsd ;;
ns32k-pc532-openbsd*) targ_emul=ns32knbsd ;;
-powerpc-*-elf* | powerpc-*-eabi* | powerpc-*-linux* | powerpc-*-sysv*) targ_emul=elf32ppc ;;
+powerpc-*-elf* | powerpc-*-eabi* | powerpc-*-linux* | powerpc-*-sysv*)
+ targ_emul=elf32ppc ;;
powerpcle-*-elf* | powerpcle-*-eabi* | powerpcle-*-solaris* | powerpcle-*-sysv*) targ_emul=elf32lppc ;;
+powerpc-*-rtems*) targ_emul=elf32ppc ;;
powerpc-*-macos*) targ_emul=ppcmacos ;;
powerpc-*-netware*) targ_emul=ppcnw ;;
powerpcle-*-pe) targ_emul=ppcpe ;;
TEMPLATE_NAME=elf32
GENERATE_SHLIB_SCRIPT=yes
DYNAMIC_LINK=false
+EMBEDDED=yes
TEMPLATE_NAME=elf32
GENERATE_SHLIB_SCRIPT=yes
DYNAMIC_LINK=false
+EMBEDDED=yes
# This shell script emits a C file. -*- C -*-
# It does some substitutions.
+# This file is now misnamed, because it supports both 32 bit and 64 bit
+# ELF emulations.
+test -z "${ELFSIZE}" && ELFSIZE=32
cat >e${EMULATION_NAME}.c <<EOF
/* This file is is generated by a shell script. DO NOT EDIT! */
-/* 32 bit ELF emulation code for ${EMULATION_NAME}
+/* ${ELFSIZE} bit ELF emulation code for ${EMULATION_NAME}
Copyright (C) 1991, 93, 94, 95, 1996 Free Software Foundation, Inc.
Written by Steve Chamberlain <sac@cygnus.com>
ELF support by Ian Lance Taylor <ian@cygnus.com>
rpath = command_line.rpath;
if (rpath == NULL)
rpath = (const char *) getenv ("LD_RUN_PATH");
- if (! bfd_elf32_size_dynamic_sections (output_bfd,
- command_line.soname,
- rpath,
- command_line.export_dynamic,
- &link_info,
- &sinterp))
+ if (! bfd_elf${ELFSIZE}_size_dynamic_sections (output_bfd,
+ command_line.soname,
+ rpath,
+ command_line.export_dynamic,
+ &link_info,
+ &sinterp))
einfo ("%P%F: failed to set dynamic section sizes: %E\n");
/* Let the user override the dynamic linker we are using. */
case etree_assign:
if (strcmp (exp->assign.dst, ".") != 0)
{
- if (! (bfd_elf32_record_link_assignment
+ if (! (bfd_elf${ELFSIZE}_record_link_assignment
(output_bfd, &link_info, exp->assign.dst,
exp->type.node_class == etree_provide ? true : false)))
einfo ("%P%F: failed to record assignment to %s: %E\n",
static asection *hold_section;
static lang_output_section_statement_type *hold_use;
static lang_output_section_statement_type *hold_text;
+static lang_output_section_statement_type *hold_rodata;
static lang_output_section_statement_type *hold_data;
static lang_output_section_statement_type *hold_bss;
static lang_output_section_statement_type *hold_rel;
else if (strncmp (secname, ".rel", 4) == 0
&& hold_rel != NULL)
place = hold_rel;
+ else if ((s->flags & SEC_CODE) == 0
+ && (s->flags & SEC_READONLY) != 0
+ && hold_rodata != NULL)
+ place = hold_rodata;
else if ((s->flags & SEC_READONLY) != 0
&& hold_text != NULL)
place = hold_text;
symname = (char *) xmalloc (ps - secname + sizeof "__start_");
sprintf (symname, "__start_%s", secname);
lang_add_assignment (exp_assop ('=', symname,
- exp_nameop (NAME, ".")));
+ exp_unop (ALIGN_K,
+ exp_intop ((bfd_vma) 1
+ << s->alignment_power))));
}
if (! link_info.relocateable)
os = lang_output_section_statement_lookup (secname);
wild_doit (&os->children, s, os, file);
- lang_leave_output_section_statement ((bfd_vma) 0, "*default*");
+ lang_leave_output_section_statement
+ ((bfd_vma) 0, "*default*", (struct lang_output_section_phdr_list *) NULL);
stat_ptr = &add;
if (*ps == '\0' && config.build_constructors)
if (strcmp (os->name, ".text") == 0)
hold_text = os;
+ else if (strcmp (os->name, ".rodata") == 0)
+ hold_rodata = os;
else if (strcmp (os->name, ".data") == 0)
hold_data = os;
else if (strcmp (os->name, ".bss") == 0)
hold_bss = os;
else if (hold_rel == NULL
+ && os->bfd_section != NULL
&& strncmp (os->name, ".rel", 4) == 0)
hold_rel = os;
}
{
LANG_FOR_EACH_INPUT_STATEMENT (is)
{
- ppc_process_before_allocation(is->the_bfd, &link_info);
+ if (!ppc_process_before_allocation(is->the_bfd, &link_info))
+ {
+ einfo("Errors encountered processing file %s", is->filename);
+ }
}
}
alc = (char *) xmalloc (strlen (inp->filename) + 1);
strcpy (alc, inp->filename);
strstr (alc, ".so.")[2] = 'a';
- if (stat (alc, &st) == 0)
+ if (stat (alc, &st) != 0)
+ free (alc);
+ else
{
lang_input_statement_type *sa;
- char *a;
- /* Add the .sa file to the statement list just after the .so
+ /* Add the .sa file to the statement list just before the .so
file. This is really a hack. */
sa = ((lang_input_statement_type *)
xmalloc (sizeof (lang_input_statement_type)));
- sa->header.next = inp->header.next;
- sa->header.type = lang_input_statement_enum;
- a = (char *) xmalloc (strlen (alc) + 1);
- strcpy (a, alc);
- sa->filename = a;
- sa->local_sym_name = a;
- sa->the_bfd = NULL;
- sa->asymbols = NULL;
- sa->symbol_count = 0;
- sa->next = NULL;
- sa->next_real_file = inp->next_real_file;
- sa->is_archive = false;
- sa->search_dirs_flag = false;
- sa->just_syms_flag = false;
- sa->loaded = false;
- sa->real = true;
- sa->complained = false;
-
- /* Put the new statement next on the list of statements and next
- on the list of input files. */
+ *sa = *inp;
+
+ inp->filename = alc;
+ inp->local_sym_name = alc;
+
inp->header.next = (lang_statement_union_type *) sa;
inp->next_real_file = (lang_statement_union_type *) sa;
}
{
struct bfd_link_needed_list *ll;
const char *lname;
- const char *lib_path;
search_dirs_type *search;
lname = l->name;
if [ "x${host}" = "x${target}" ] ; then
if [ "x${DEFAULT_EMULATION}" = "x${EMULATION_NAME}" ] ; then
cat >>e${EMULATION_NAME}.c <<EOF
- lib_path = (const char *) getenv ("LD_LIBRARY_PATH");
- if (gld${EMULATION_NAME}_search_needed (lib_path, lname))
- continue;
+ {
+ const char *lib_path;
+
+ lib_path = (const char *) getenv ("LD_LIBRARY_PATH");
+ if (gld${EMULATION_NAME}_search_needed (lib_path, lname))
+ continue;
+ }
EOF
fi
fi
-/* ld.h -
-
- Copyright (C) 1991, 1993, 1994, 1995 Free Software Foundation, Inc.
+/* ld.h -- general linker header file
+ Copyright (C) 1991, 93, 94, 95, 1996 Free Software Foundation, Inc.
This file is part of GLD, the Gnu Linker.
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
- along with GLD; see the file COPYING. If not, write to
- the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+ along with GLD; see the file COPYING. If not, write to the Free
+ Software Foundation, 59 Temple Place - Suite 330, Boston, MA
+ 02111-1307, USA. */
#ifndef LD_H
#define LD_H
/* If true, force generation of a file with a .exe file. */
boolean force_exe_suffix;
+
+ /* If true, generate a cross reference report. */
+ boolean cref;
} args_type;
extern args_type command_line;
extern void add_cref PARAMS ((const char *, bfd *, asection *, bfd_vma));
extern void output_cref PARAMS ((FILE *));
+extern void check_nocrossrefs PARAMS ((void));
#endif
@end group
@end smallexample
+@kindex LOADADDR(@var{section})
+@cindex section load address
+@item LOADADDR(@var{section})
+Return the absolute load address of the named @var{section}. This is
+normally the same as @code{ADDR}, but it may be different if the
+@code{AT} keyword is used in the section definition (@pxref{Section
+Options}).
+
@kindex ALIGN(@var{exp})
@cindex rounding up location counter
@item ALIGN(@var{exp})
as the start address of the first section, if you choose, to facilitate
paging.
+@kindex MAX
+@item MAX(@var{exp1}, @var{exp2})
+Returns the maximum of @var{exp1} and @var{exp2}.
+
+@kindex MIN
+@item MIN(@var{exp1}, @var{exp2})
+Returns the minimum of @var{exp1} and @var{exp2}.
+
@end table
@node Semicolons
* Section Placement:: Section Placement
* Section Data Expressions:: Section Data Expressions
* Section Options:: Optional Section Attributes
+* Overlays:: Overlays
@end menu
@node Section Definition
The @var{contents} of a section definition may include any of the
following kinds of statement. You can include as many of these as you
like in a single section definition, separated from one another by
-whitespace.
+whitespace.
@table @code
@kindex @var{filename}
input file's format.
@end table
-For example, the following command script arranges the output file into
-three consecutive sections, named @code{.text}, @code{.data}, and
+In any place where you may use a specific file or section name, you may
+also use a wildcard pattern. The linker handles wildcards much as the
+Unix shell does. A @samp{*} character matches any number of characters.
+A @samp{?} character matches any single character. The sequence
+@samp{[@var{chars}]} will match a single instance of any of the
+@var{chars}; the @samp{-} character may be used to specify a range of
+characters, as in @samp{[a-z]} to match any lower case letter. A
+@samp{\} character may be used to quote the following character.
+
+When a file name is matched with a wildcard, the wildcard characters
+will not match a @samp{/} character (used to separate directory names on
+Unix). A pattern consisting of a single @samp{*} character is an
+exception; it will always match any file name. In a section name, the
+wildcard characters will match a @samp{/} character.
+
+Wildcards only match files which are explicitly specified on the command
+line. The linker does not search directories to expand wildcards.
+However, if you specify a simple file name---a name with no wildcard
+characters---in a linker script, and the file name is not also specified
+on the command line, the linker will attempt to open the file as though
+it appeared on the command line.
+
+In the following example, the command script arranges the output file
+into three consecutive sections, named @code{.text}, @code{.data}, and
@code{.bss}, taking the input for each from the correspondingly named
sections of all the input files:
@end group
@end smallexample
+This example shows how wildcard patterns might be used to partition
+files. All @code{.text} sections are placed in @code{.text}, and all
+@code{.bss} sections are placed in @code{.bss}. For all files beginning
+with an upper case character, the @code{.data} section is placed into
+@code{.DATA}; for all other files, the @code{.data} section is placed
+into @code{.data}.
+
+@smallexample
+@group
+SECTIONS @{
+ .text : @{ *(.text) @}
+ .DATA : @{ [A-Z]*(.data) @}
+ .data : @{ *(.data) @}
+ .bss : @{ *(.bss) @}
+@}
+@end group
+@end smallexample
+
@node Section Data Expressions
@subsection Section Data Expressions
@end table
+@node Overlays
+@subsection Overlays
+@kindex OVERLAY
+@cindex overlays
+
+The @code{OVERLAY} command provides an easy way to describe sections
+which are to be loaded as part of a single memory image but are to be
+run at the same memory address. At run time, some sort of overlay
+manager will copy the overlaid sections in and out of the runtime memory
+address as required, perhaps by simply manipulating addressing bits.
+This approach can be useful, for example, when a certain region of
+memory is faster than another.
+
+The @code{OVERLAY} command is used within a @code{SECTIONS} command. It
+appears as follows:
+@smallexample
+@group
+ OVERLAY @var{start} : [ NOCROSSREFS ] AT ( @var{ldaddr} )
+ @{
+ @var{secname1} @{ @var{contents} @} :@var{phdr} =@var{fill}
+ @var{secname2} @{ @var{contents} @} :@var{phdr} =@var{fill}
+ @dots{}
+ @} >@var{region} :@var{phdr} =@var{fill}
+@end group
+@end smallexample
+
+Everything is optional except @code{OVERLAY} (a keyword), and each
+section must have a name (@var{secname1} and @var{secname2} above). The
+section definitions within the @code{OVERLAY} construct are identical to
+those within the general @code{SECTIONS} contruct (@pxref{SECTIONS}),
+except that no addresses and no memory regions may be defined for
+sections within an @code{OVERLAY}.
+
+The sections are all defined with the same starting address. The load
+addresses of the sections are arranged such that they are consecutive in
+memory starting at the load address used for the @code{OVERLAY} as a
+whole (as with normal section definitions, the load address is optional,
+and defaults to the start address; the start address is also optional,
+and defaults to @code{.}).
+
+If the @code{NOCROSSREFS} keyword is used, and there any references
+among the sections, the linker will report an error. Since the sections
+all run at the same address, it normally does not make sense for one
+section to refer directly to another. @xref{Option Commands,
+NOCROSSREFS}.
+
+For each section within the @code{OVERLAY}, the linker automatically
+defines two symbols. The symbol @code{__load_start_@var{secname}} is
+defined as the starting load address of the section. The symbol
+@code{__load_stop_@var{secname}} is defined as the final load address of
+the section. Any characters within @var{secname} which are not legal
+within C identifiers are removed. C (or assembler) code may use these
+symbols to move the overlaid sections around as necessary.
+
+At the end of the overlay, the value of @code{.} is set to the start
+address of the overlay plus the size of the largest section.
+
+Here is an example. Remember that this would appear inside a
+@code{SECTIONS} construct.
+
+@smallexample
+@group
+ OVERLAY 0x1000 : AT (0x4000)
+ @{
+ .text0 @{ o1/*.o(.text) @}
+ .text1 @{ o2/*.o(.text) @}
+ @}
+@end group
+@end smallexample
+
+This will define both @code{.text0} and @code{.text1} to start at
+address 0x1000. @code{.text0} will be loaded at address 0x4000, and
+@code{.text1} will be loaded immediately after @code{.text0}. The
+following symbols will be defined: @code{__load_start_text0},
+@code{__load_stop_text0}, @code{__load_start_text1},
+@code{__load_stop_text1}.
+
+C code to copy overlay @code{.text1} into the overlay area might look
+like the following.
+
+@smallexample
+@group
+ extern char __load_start_text1, __load_stop_text1;
+ memcpy ((char *) 0x1000, &__load_start_text1,
+ &__load_stop_text1 - &__load_start_text1);
+@end group
+@end smallexample
+
+Note that the @code{OVERLAY} command is just syntactic sugar, since
+everything it does can be done using the more basic commands. The above
+example could have been written identically as follows.
+
+@smallexample
+@group
+ .text0 0x1000 : AT (0x4000) @{ o1/*.o(.text) @}
+ __load_start_text0 = LOADADDR (.text0);
+ __load_stop_text0 = LOADADDR (.text0) + SIZEOF (.text0);
+ .text1 0x1000 : AT (0x4000 + SIZEOF (.text0)) @{ o2/*.o(.text) @}
+ __load_start_text1 = LOADADDR (.text1);
+ __load_stop_text1 = LOADADDR (.text1) + SIZEOF (.text1);
+ . = 0x1000 + MAX (SIZEOF (.text0), SIZEOF (.text1));
+@end group
+@end smallexample
+
@node PHDRS
@section ELF Program Headers
@kindex PHDRS
-@kindex program headers
-@kindex ELF program headers
+@cindex program headers
+@cindex ELF program headers
The ELF object file format uses @dfn{program headers}, which are read by
the system loader and describe how the program should be loaded into
output file format. If that variable is also absent, @code{ld} uses
the default format configured for your machine in the BFD libraries.
@end ifclear
+
+@cindex cross references
+@kindex NOCROSSREFS ( @var{sections} )
+@item NOCROSSREFS ( @var{section} @var{section} @dots{} )
+This command may be used to tell @code{ld} to issue an error about any
+references among certain sections.
+
+In certain types of programs, particularly on embedded systems, when one
+section is loaded into memory, another section will not be. Any direct
+references between the two sections would be errors. For example, it
+would be an error if code in one section called a function defined in
+the other section.
+
+The @code{NOCROSSREFS} command takes a list of section names. If
+@code{ld} detects any cross references between the sections, it reports
+an error and returns a non-zero exit status. The @code{NOCROSSREFS}
+command uses output section names, defined in the @code{SECTIONS}
+command. It does not use the names of input sections.
@end table
@ifset GENERIC
{ NEXT,"NEXT" },
{ SIZEOF,"SIZEOF" },
{ ADDR,"ADDR" },
+ { LOADADDR,"LOADADDR" },
{ MEMORY,"MEMORY" },
{ DEFINED,"DEFINED" },
{ TARGET_K,"TARGET" },
static void
check (os, name, op)
lang_output_section_statement_type *os;
- CONST char *name;
- CONST char *op;
+ const char *name;
+ const char *op;
{
- if (os == (lang_output_section_statement_type *)NULL) {
- einfo("%F%P: %s uses undefined section %s\n", op, name);
- }
- if (os->processed == false) {
- einfo("%F%P: %s forward reference of section %s\n",op, name);
- }
+ if (os == NULL)
+ einfo ("%F%P: %s uses undefined section %s\n", op, name);
+ if (! os->processed)
+ einfo ("%F%P: %s forward reference of section %s\n", op, name);
}
etree_type *
BOP(ANDAND,&&);
BOP(OROR,||);
+ case MAX:
+ if (result.value < other.value)
+ result = other;
+ break;
+
+ case MIN:
+ if (result.value > other.value)
+ result = other;
+ break;
+
default:
FAIL();
}
break;
case ADDR:
+ if (allocation_done != lang_first_phase_enum)
+ {
+ lang_output_section_statement_type *os;
- if (allocation_done != lang_first_phase_enum) {
- lang_output_section_statement_type *os =
- lang_output_section_find(tree->name.name);
- check(os,tree->name.name,"ADDR");
- result = new_rel((bfd_vma)0, os);
- }
- else {
- result = invalid();
- }
+ os = lang_output_section_find (tree->name.name);
+ check (os, tree->name.name, "ADDR");
+ result = new_rel (0, os);
+ }
+ else
+ result = invalid ();
break;
+
+ case LOADADDR:
+ if (allocation_done != lang_first_phase_enum)
+ {
+ lang_output_section_statement_type *os;
+
+ os = lang_output_section_find (tree->name.name);
+ check (os, tree->name.name, "LOADADDR");
+ if (os->load_base == NULL)
+ result = new_rel (0, os);
+ else
+ result = exp_fold_tree_no_dot (os->load_base,
+ abs_output_section,
+ allocation_done);
+ }
+ else
+ result = invalid ();
+ break;
+
case SIZEOF:
- if(allocation_done != lang_first_phase_enum) {
- lang_output_section_statement_type *os =
- lang_output_section_find(tree->name.name);
- check(os,tree->name.name,"SIZEOF");
- result = new_abs((bfd_vma)(os->bfd_section->_raw_size));
- }
- else {
- result = invalid();
- }
+ if (allocation_done != lang_first_phase_enum)
+ {
+ lang_output_section_statement_type *os;
+
+ os = lang_output_section_find (tree->name.name);
+ check (os, tree->name.name, "SIZEOF");
+ result = new_abs (os->bfd_section->_raw_size);
+ }
+ else
+ result = invalid ();
break;
default:
{
etree_value_type result;
- if (tree == (etree_type *)NULL) {
- result.valid = false;
- }
- else {
- switch (tree->type.node_class)
+ if (tree == NULL)
+ {
+ result.valid = false;
+ return result;
+ }
+
+ switch (tree->type.node_class)
{
- case etree_value:
- result = new_rel(tree->value.value, current_section);
+ case etree_value:
+ result = new_rel (tree->value.value, current_section);
break;
+
case etree_rel:
if (allocation_done != lang_final_phase_enum)
result.valid = false;
+ tree->rel.section->output_offset),
current_section);
break;
- case etree_unary:
- result = exp_fold_tree(tree->unary.child,
- current_section,
- allocation_done, dot, dotp);
- if (result.valid == true)
- {
- switch(tree->type.node_code)
- {
- case ALIGN_K:
- if (allocation_done != lang_first_phase_enum) {
- result = new_rel_from_section(ALIGN_N(dot,
- result.value) ,
- current_section);
- }
- else {
- result.valid = false;
- }
- break;
- case ABSOLUTE:
- if (allocation_done != lang_first_phase_enum && result.valid)
- {
- result.value += result.section->bfd_section->vma;
- result.section = abs_output_section;
- }
- else
+ case etree_unary:
+ result = exp_fold_tree (tree->unary.child,
+ current_section,
+ allocation_done, dot, dotp);
+ if (result.valid)
+ {
+ switch (tree->type.node_code)
{
- result.valid = false;
+ case ALIGN_K:
+ if (allocation_done != lang_first_phase_enum)
+ result = new_rel_from_section (ALIGN_N (dot, result.value),
+ current_section);
+ else
+ result.valid = false;
+ break;
+
+ case ABSOLUTE:
+ if (allocation_done != lang_first_phase_enum && result.valid)
+ {
+ result.value += result.section->bfd_section->vma;
+ result.section = abs_output_section;
+ }
+ else
+ result.valid = false;
+ break;
+
+ case '~':
+ make_abs (&result);
+ result.value = ~result.value;
+ break;
+
+ case '!':
+ make_abs (&result);
+ result.value = !result.value;
+ break;
+
+ case '-':
+ make_abs (&result);
+ result.value = -result.value;
+ break;
+
+ case NEXT:
+ /* Return next place aligned to value. */
+ if (allocation_done == lang_allocating_phase_enum)
+ {
+ make_abs (&result);
+ result.value = ALIGN_N (dot, result.value);
+ }
+ else
+ result.valid = false;
+ break;
+
+ default:
+ FAIL ();
+ break;
}
- break;
- case '~':
- make_abs(&result);
- result.value = ~result.value;
- break;
- case '!':
- make_abs(&result);
- result.value = !result.value;
- break;
- case '-':
- make_abs(&result);
- result.value = -result.value;
- break;
- case NEXT:
- if (allocation_done ==lang_allocating_phase_enum) {
- make_abs(&result);
- result.value = ALIGN_N(dot, result.value);
- }
- else {
- /* Return next place aligned to value */
- result.valid = false;
- }
- break;
- default:
- FAIL();
}
- }
-
break;
- case etree_trinary:
-
- result = exp_fold_tree(tree->trinary.cond,
- current_section,
- allocation_done, dot, dotp);
- if (result.valid) {
- result = exp_fold_tree(result.value ?
- tree->trinary.lhs:tree->trinary.rhs,
- current_section,
- allocation_done, dot, dotp);
- }
+ case etree_trinary:
+ result = exp_fold_tree (tree->trinary.cond, current_section,
+ allocation_done, dot, dotp);
+ if (result.valid)
+ result = exp_fold_tree ((result.value
+ ? tree->trinary.lhs
+ : tree->trinary.rhs),
+ current_section,
+ allocation_done, dot, dotp);
break;
- case etree_binary:
- result = fold_binary(tree, current_section, allocation_done,
- dot, dotp);
+
+ case etree_binary:
+ result = fold_binary (tree, current_section, allocation_done,
+ dot, dotp);
break;
- case etree_assign:
- case etree_provide:
- if (tree->assign.dst[0] == '.' && tree->assign.dst[1] == 0) {
- /* Assignment to dot can only be done during allocation */
- if (tree->type.node_class == etree_provide)
- einfo ("%F%S can not PROVIDE assignment to location counter\n");
- if (allocation_done == lang_allocating_phase_enum
- || (allocation_done == lang_final_phase_enum
- && current_section == abs_output_section)) {
- result = exp_fold_tree(tree->assign.src,
- current_section,
- lang_allocating_phase_enum, dot, dotp);
- if (result.valid == false) {
- einfo("%F%S invalid assignment to location counter\n");
- }
- else {
- if (current_section ==
- (lang_output_section_statement_type *)NULL) {
- einfo("%F%S assignment to location counter invalid outside of SECTION\n");
- }
- else {
- bfd_vma nextdot =result.value +
- current_section->bfd_section->vma;
- if (nextdot < dot && current_section != abs_output_section) {
- einfo("%F%S cannot move location counter backwards (from %V to %V)\n", dot, nextdot);
- }
- else {
- *dotp = nextdot;
- }
+
+ case etree_assign:
+ case etree_provide:
+ if (tree->assign.dst[0] == '.' && tree->assign.dst[1] == 0)
+ {
+ /* Assignment to dot can only be done during allocation */
+ if (tree->type.node_class == etree_provide)
+ einfo ("%F%S can not PROVIDE assignment to location counter\n");
+ if (allocation_done == lang_allocating_phase_enum
+ || (allocation_done == lang_final_phase_enum
+ && current_section == abs_output_section))
+ {
+ result = exp_fold_tree (tree->assign.src,
+ current_section,
+ lang_allocating_phase_enum, dot,
+ dotp);
+ if (! result.valid)
+ einfo ("%F%S invalid assignment to location counter\n");
+ else
+ {
+ if (current_section == NULL)
+ einfo ("%F%S assignment to location counter invalid outside of SECTION\n");
+ else
+ {
+ bfd_vma nextdot;
+
+ nextdot = (result.value
+ + current_section->bfd_section->vma);
+ if (nextdot < dot
+ && current_section != abs_output_section)
+ {
+ einfo ("%F%S cannot move location counter backwards (from %V to %V)\n",
+ dot, nextdot);
+ }
+ else
+ *dotp = nextdot;
+ }
+ }
}
- }
}
- }
else
{
result = exp_fold_tree (tree->assign.src,
dot, dotp);
if (result.valid)
{
+ boolean create;
struct bfd_link_hash_entry *h;
+ if (tree->type.node_class == etree_assign)
+ create = true;
+ else
+ create = false;
h = bfd_link_hash_lookup (link_info.hash, tree->assign.dst,
- (tree->type.node_class == etree_assign
- ? true : false),
- false, false);
+ create, false, false);
if (h == (struct bfd_link_hash_entry *) NULL)
{
if (tree->type.node_class == etree_assign)
&& h->type != bfd_link_hash_common)
{
/* Do nothing. The symbol was defined by some
- object. */
+ object. */
}
else
{
h->u.def.section = result.section->bfd_section;
}
}
- }
+ }
break;
- case etree_name:
- result = fold_name(tree, current_section, allocation_done, dot);
+
+ case etree_name:
+ result = fold_name (tree, current_section, allocation_done, dot);
break;
- default:
- einfo("%F%S need more of these %d\n",tree->type.node_class );
+ default:
+ FAIL ();
+ break;
}
- }
return result;
}
-
static etree_value_type
exp_fold_tree_no_dot (tree, current_section, allocation_done)
etree_type *tree;
}
}
-
-
-
bfd_vma
exp_get_vma (tree, def, name, allocation_done)
etree_type *tree;
- bfd_vma def;
+ bfd_vma def;
char *name;
lang_phase_type allocation_done;
{
etree_value_type r;
- if (tree != (etree_type *)NULL) {
- r = exp_fold_tree_no_dot(tree,
- abs_output_section,
- allocation_done);
- if (r.valid == false && name) {
- einfo("%F%S nonconstant expression for %s\n",name);
+ if (tree != NULL)
+ {
+ r = exp_fold_tree_no_dot (tree, abs_output_section, allocation_done);
+ if (! r.valid && name != NULL)
+ einfo ("%F%S nonconstant expression for %s\n", name);
+ return r.value;
}
- return r.value;
- }
- else {
+ else
return def;
- }
}
int
#define YYDEBUG 1
#endif
-static int typebits;
+static enum section_type sectype;
lang_memory_region_type *region;
union etree_union *at;
union etree_union *flags;
} phdr;
+ struct lang_nocrossref *nocrossref;
+ struct lang_output_section_phdr_list *section_phdr;
}
%type <etree> exp opt_exp_with_type mustbe_exp opt_at phdr_type phdr_val
+%type <etree> opt_exp_without_type
%type <integer> fill_opt
%type <name> memspec_opt casesymlist
%token <integer> INT
%token <name> NAME LNAME
-%type <integer> length
+%type <integer> length
%type <phdr> phdr_qualifiers
+%type <nocrossref> nocrossref_list
+%type <section_phdr> phdr_opt
+%type <integer> opt_nocrossrefs
%right <token> PLUSEQ MINUSEQ MULTEQ DIVEQ '=' LSHIFTEQ RSHIFTEQ ANDEQ OREQ
%right <token> '?' ':'
%right UNARY
%token END
%left <token> '('
-%token <token> ALIGN_K BLOCK QUAD LONG SHORT BYTE
+%token <token> ALIGN_K BLOCK BIND QUAD LONG SHORT BYTE
%token SECTIONS PHDRS
%token '{' '}'
%token SIZEOF_HEADERS OUTPUT_FORMAT FORCE_COMMON_ALLOCATION OUTPUT_ARCH
%token MEMORY DEFSYMEND
%token NOLOAD DSECT COPY INFO OVERLAY
%token NAME LNAME DEFINED TARGET_K SEARCH_DIR MAP ENTRY
-%token <integer> SIZEOF NEXT ADDR
-%token STARTUP HLL SYSLIB FLOAT NOFLOAT
+%token <integer> NEXT
+%token SIZEOF ADDR LOADADDR MAX MIN
+%token STARTUP HLL SYSLIB FLOAT NOFLOAT NOCROSSREFS
%token ORIGIN FILL
%token LENGTH CREATE_OBJECT_SYMBOLS INPUT GROUP OUTPUT CONSTRUCTORS
%token ALIGNMOD AT PROVIDE
{ lang_add_map($3); }
| INCLUDE filename
{ ldfile_open_command_file($2); } ifile_list END
+ | NOCROSSREFS '(' nocrossref_list ')'
+ {
+ lang_add_nocrossref ($3);
+ }
;
input_list:
| assignment end
;
+/* The '*' and '?' cases are there because the lexer returns them as
+ separate tokens rather than as NAME. */
file_NAME_list:
NAME
- { lang_add_wild($1, current_file); }
+ { lang_add_wild ($1, current_file); }
+ | '*'
+ { lang_add_wild ("*", current_file); }
+ | '?'
+ { lang_add_wild ("?", current_file); }
| file_NAME_list opt_comma NAME
- { lang_add_wild($3, current_file); }
+ { lang_add_wild ($3, current_file); }
+ | file_NAME_list opt_comma '*'
+ { lang_add_wild ("*", current_file); }
+ | file_NAME_list opt_comma '?'
+ { lang_add_wild ("?", current_file); }
;
input_section_spec:
']'
| NAME
{
- current_file =$1;
+ current_file = $1;
+ }
+ '(' file_NAME_list ')'
+ | '?'
+ /* This case is needed because the lexer returns a
+ single question mark as '?' rather than NAME. */
+ {
+ current_file = "?";
}
'(' file_NAME_list ')'
| '*'
lang_add_attribute(lang_constructors_statement_enum);
}
| input_section_spec
- | length '(' exp ')'
+ | length '(' mustbe_exp ')'
{
lang_add_data((int) $1,$3);
}
- | FILL '(' exp ')'
+ | FILL '(' mustbe_exp ')'
{
lang_add_fill
(exp_get_value_int($3,
{ lang_float(false); }
;
+nocrossref_list:
+ /* empty */
+ {
+ $$ = NULL;
+ }
+ | NAME nocrossref_list
+ {
+ struct lang_nocrossref *n;
+
+ n = (struct lang_nocrossref *) xmalloc (sizeof *n);
+ n->name = $1;
+ n->next = $2;
+ $$ = n;
+ }
+ | NAME ',' nocrossref_list
+ {
+ struct lang_nocrossref *n;
+
+ n = (struct lang_nocrossref *) xmalloc (sizeof *n);
+ n->name = $1;
+ n->next = $3;
+ $$ = n;
+ }
+ ;
mustbe_exp: { ldlex_expression(); }
exp
{ $$ = exp_nameop(SIZEOF,$3); }
| ADDR '(' NAME ')'
{ $$ = exp_nameop(ADDR,$3); }
+ | LOADADDR '(' NAME ')'
+ { $$ = exp_nameop(LOADADDR,$3); }
| ABSOLUTE '(' exp ')'
{ $$ = exp_unop(ABSOLUTE, $3); }
| ALIGN_K '(' exp ')'
{ $$ = exp_unop(ALIGN_K,$3); }
| NAME
{ $$ = exp_nameop(NAME,$1); }
+ | MAX '(' exp ',' exp ')'
+ { $$ = exp_binop (MAX, $3, $5 ); }
+ | MIN '(' exp ',' exp ')'
+ { $$ = exp_binop (MIN, $3, $5 ); }
;
section: NAME { ldlex_expression(); }
opt_exp_with_type
- opt_at { ldlex_popstate(); }
+ opt_at { ldlex_popstate (); ldlex_script (); }
'{'
{
- lang_enter_output_section_statement($1,$3,typebits,0,0,0,$4);
+ lang_enter_output_section_statement($1, $3,
+ sectype,
+ 0, 0, 0, $4);
}
statement_list_opt
- '}' {ldlex_expression();} memspec_opt phdr_opt fill_opt
+ '}' { ldlex_popstate (); ldlex_expression (); }
+ memspec_opt phdr_opt fill_opt
{
- ldlex_popstate();
- lang_leave_output_section_statement($13, $11);
+ ldlex_popstate ();
+ lang_leave_output_section_statement ($13, $11, $12);
}
opt_comma
+ | OVERLAY
+ { ldlex_expression (); }
+ opt_exp_without_type opt_nocrossrefs opt_at
+ { ldlex_popstate (); ldlex_script (); }
+ '{'
+ {
+ lang_enter_overlay ($3, $5, (int) $4);
+ }
+ overlay_section
+ '}'
+ { ldlex_popstate (); ldlex_expression (); }
+ memspec_opt phdr_opt fill_opt
+ {
+ ldlex_popstate ();
+ lang_leave_overlay ($14, $12, $13);
+ }
+ opt_comma
+ | /* The GROUP case is just enough to support the gcc
+ svr3.ifile script. It is not intended to be full
+ support. I'm not even sure what GROUP is supposed
+ to mean. */
+ GROUP { ldlex_expression (); }
+ opt_exp_with_type
+ {
+ ldlex_popstate ();
+ lang_add_assignment (exp_assop ('=', ".", $3));
+ }
+ '{' sec_or_group_p1 '}'
;
type:
- NOLOAD { typebits = SEC_NEVER_LOAD; }
- | DSECT { typebits = 0; }
- | COPY { typebits = 0; }
- | INFO { typebits = 0; }
- | OVERLAY { typebits = 0; }
+ NOLOAD { sectype = noload_section; }
+ | DSECT { sectype = dsect_section; }
+ | COPY { sectype = copy_section; }
+ | INFO { sectype = info_section; }
+ | OVERLAY { sectype = overlay_section; }
;
atype:
'(' type ')'
- | /* EMPTY */ { typebits = 0; }
+ | /* EMPTY */ { sectype = normal_section; }
;
-
opt_exp_with_type:
- exp atype ':' { $$ = $1; ;}
- | atype ':' { $$= (etree_type *)NULL; }
+ exp atype ':' { $$ = $1; }
+ | atype ':' { $$ = (etree_type *)NULL; }
+ | /* The BIND cases are to support the gcc svr3.ifile
+ script. They aren't intended to implement full
+ support for the BIND keyword. I'm not even sure
+ what BIND is supposed to mean. */
+ BIND '(' exp ')' atype ':' { $$ = $3; }
+ | BIND '(' exp ')' BLOCK '(' exp ')' atype ':'
+ { $$ = $3; }
+ ;
+
+opt_exp_without_type:
+ exp ':' { $$ = $1; }
+ | ':' { $$ = (etree_type *) NULL; }
+ ;
+
+opt_nocrossrefs:
+ /* empty */
+ { $$ = 0; }
+ | NOCROSSREFS
+ { $$ = 1; }
;
memspec_opt:
phdr_opt:
/* empty */
+ {
+ $$ = NULL;
+ }
| phdr_opt ':' NAME
{
- lang_section_in_phdr ($3);
+ struct lang_output_section_phdr_list *n;
+
+ n = ((struct lang_output_section_phdr_list *)
+ xmalloc (sizeof *n));
+ n->name = $3;
+ n->used = false;
+ n->next = $1;
+ $$ = n;
}
;
+overlay_section:
+ /* empty */
+ | overlay_section
+ NAME
+ {
+ ldlex_script ();
+ lang_enter_overlay_section ($2);
+ }
+ '{' statement_list_opt '}'
+ { ldlex_popstate (); ldlex_expression (); }
+ phdr_opt fill_opt
+ {
+ ldlex_popstate ();
+ lang_leave_overlay_section ($9, $8);
+ }
+ opt_comma
+ ;
+
phdrs:
PHDRS '{' phdr_list '}'
;
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
-along with GLD; see the file COPYING. If not, write to
-the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+along with GLD; see the file COPYING. If not, write to the Free
+Software Foundation, 59 Temple Place - Suite 330, Boston, MA
+02111-1307, USA. */
#include "bfd.h"
#include "sysdep.h"
#include "ldmisc.h"
#include "ldctor.h"
#include "ldfile.h"
+#include "fnmatch.h"
+
+#include <ctype.h>
/* FORWARDS */
static lang_statement_union_type *new_statement PARAMS ((enum statement_enum,
PARAMS ((const char *name, lang_input_file_enum_type file_type,
const char *target, boolean add_to_list));
static void init_os PARAMS ((lang_output_section_statement_type *s));
+static void exp_init_os PARAMS ((etree_type *));
static void section_already_linked PARAMS ((bfd *, asection *, PTR));
+static boolean wildcardp PARAMS ((const char *));
static void wild_section PARAMS ((lang_wild_statement_type *ptr,
const char *section,
lang_input_statement_type *file,
static lang_input_statement_type *lookup_name PARAMS ((const char *name));
static void load_symbols PARAMS ((lang_input_statement_type *entry,
lang_statement_list_type *));
+static void wild_file PARAMS ((lang_wild_statement_type *, const char *,
+ lang_input_statement_type *,
+ lang_output_section_statement_type *));
static void wild PARAMS ((lang_wild_statement_type *s,
const char *section, const char *file,
const char *target,
boolean had_output_filename = false;
boolean lang_float_flag = false;
boolean delete_output_file_on_failure = false;
+struct lang_nocrossrefs *nocrossref_list;
etree_type *base; /* Relocation base - or null */
lang_has_input_file = true;
p->target = target;
- p->complained = false;
switch (file_type)
{
case lang_input_file_is_symbols_only_enum:
p->next_real_file = (lang_statement_union_type *) NULL;
p->next = (lang_statement_union_type *) NULL;
p->symbol_count = 0;
- p->common_output_section = (asection *) NULL;
p->dynamic = config.dynamic_link;
p->whole_archive = whole_archive;
p->loaded = false;
lookup->next = (lang_statement_union_type *) NULL;
lookup->bfd_section = (asection *) NULL;
lookup->processed = false;
- lookup->loadable = 1;
+ lookup->sectype = normal_section;
lookup->addr_tree = (etree_type *) NULL;
lang_list_init (&lookup->children);
print_statements ();
}
-/*
- *
- */
+/* Initialize an output section. */
+
static void
init_os (s)
- lang_output_section_statement_type * s;
+ lang_output_section_statement_type *s;
{
section_userdata_type *new;
+ if (s->bfd_section != NULL)
+ return;
+
if (strcmp (s->name, DISCARD_SECTION_NAME) == 0)
einfo ("%P%F: Illegal use of `%s' section", DISCARD_SECTION_NAME);
/* vma to allow us to output a section through itself */
s->bfd_section->output_offset = 0;
get_userdata (s->bfd_section) = (PTR) new;
+
+ /* If there is a base address, make sure that any sections it might
+ mention are initialized. */
+ if (s->addr_tree != NULL)
+ exp_init_os (s->addr_tree);
+}
+
+/* Make sure that all output sections mentioned in an expression are
+ initialized. */
+
+static void
+exp_init_os (exp)
+ etree_type *exp;
+{
+ switch (exp->type.node_class)
+ {
+ case etree_assign:
+ exp_init_os (exp->assign.src);
+ break;
+
+ case etree_binary:
+ exp_init_os (exp->binary.lhs);
+ exp_init_os (exp->binary.rhs);
+ break;
+
+ case etree_trinary:
+ exp_init_os (exp->trinary.cond);
+ exp_init_os (exp->trinary.lhs);
+ exp_init_os (exp->trinary.rhs);
+ break;
+
+ case etree_unary:
+ exp_init_os (exp->unary.child);
+ break;
+
+ case etree_name:
+ switch (exp->type.node_code)
+ {
+ case ADDR:
+ case LOADADDR:
+ case SIZEOF:
+ {
+ lang_output_section_statement_type *os;
+
+ os = lang_output_section_find (exp->name.name);
+ if (os != NULL && os->bfd_section == NULL)
+ init_os (os);
+ }
+ }
+ break;
+
+ default:
+ break;
+ }
}
/* Sections marked with the SEC_LINK_ONCE flag should only be linked
explicit actions, like foo.o(.text), bar.o(.text) and
foo.o(.text, .data). */
+/* Return true if the PATTERN argument is a wildcard pattern. */
+
+static boolean
+wildcardp (pattern)
+ const char *pattern;
+{
+ const char *s;
+
+ for (s = pattern; *s != '\0'; ++s)
+ if (*s == '?'
+ || *s == '\\'
+ || *s == '*'
+ || *s == '[')
+ return true;
+ return false;
+}
+
/* Add SECTION to the output section OUTPUT. Do this by creating a
lang_input_section statement which is placed at PTR. FILE is the
input file which holds SECTION. */
? SEC_LINK_ONCE | SEC_LINK_DUPLICATES
: 0)));
- if (! output->loadable)
+ switch (output->sectype)
{
- /* Turn off load flag */
+ case normal_section:
+ break;
+ case dsect_section:
+ case copy_section:
+ case info_section:
+ case overlay_section:
+ output->bfd_section->flags &= ~SEC_ALLOC;
+ break;
+ case noload_section:
output->bfd_section->flags &= ~SEC_LOAD;
output->bfd_section->flags |= SEC_NEVER_LOAD;
+ break;
}
if (section->alignment_power > output->bfd_section->alignment_power)
if (file->just_syms_flag == false)
{
register asection *s;
+ boolean wildcard;
+
+ if (section == NULL)
+ wildcard = false;
+ else
+ wildcard = wildcardp (section);
for (s = file->the_bfd->sections; s != NULL; s = s->next)
{
+ boolean match;
+
/* Attach all sections named SECTION. If SECTION is NULL,
then attach all sections.
section. I did not understand that, and I took it out.
--ian@cygnus.com. */
- if (section == NULL
- || strcmp (bfd_get_section_name (file->the_bfd, s),
- section) == 0)
+ if (section == NULL)
+ match = true;
+ else
+ {
+ const char *name;
+
+ name = bfd_get_section_name (file->the_bfd, s);
+ if (wildcard)
+ match = fnmatch (section, name, 0) == 0 ? true : false;
+ else
+ match = strcmp (section, name) == 0 ? true : false;
+ }
+ if (match)
wild_doit (&ptr->children, s, output, file);
}
}
entry->loaded = true;
}
+/* Handle a wild statement for a single file F. */
+
+static void
+wild_file (s, section, f, output)
+ lang_wild_statement_type *s;
+ const char *section;
+ lang_input_statement_type *f;
+ lang_output_section_statement_type *output;
+{
+ if (f->the_bfd == NULL
+ || ! bfd_check_format (f->the_bfd, bfd_archive))
+ wild_section (s, section, f, output);
+ else
+ {
+ bfd *member;
+
+ /* This is an archive file. We must map each member of the
+ archive separately. */
+ member = bfd_openr_next_archived_file (f->the_bfd, (bfd *) NULL);
+ while (member != NULL)
+ {
+ /* When lookup_name is called, it will call the add_symbols
+ entry point for the archive. For each element of the
+ archive which is included, BFD will call ldlang_add_file,
+ which will set the usrdata field of the member to the
+ lang_input_statement. */
+ if (member->usrdata != NULL)
+ {
+ wild_section (s, section,
+ (lang_input_statement_type *) member->usrdata,
+ output);
+ }
+
+ member = bfd_openr_next_archived_file (f->the_bfd, member);
+ }
+ }
+}
+
/* Handle a wild statement. SECTION or FILE or both may be NULL,
indicating that it is a wildcard. Separate lang_input_section
statements are created for each part of the expansion; they are
f != (lang_input_statement_type *) NULL;
f = (lang_input_statement_type *) f->next)
{
- wild_section (s, section, f, output);
+ wild_file (s, section, f, output);
+ }
+ }
+ else if (wildcardp (file))
+ {
+ for (f = (lang_input_statement_type *) file_chain.head;
+ f != (lang_input_statement_type *) NULL;
+ f = (lang_input_statement_type *) f->next)
+ {
+ if (fnmatch (file, f->filename, FNM_FILE_NAME) == 0)
+ wild_file (s, section, f, output);
}
}
else
{
/* Perform the iteration over a single file */
f = lookup_name (file);
- if (f->the_bfd == NULL
- || ! bfd_check_format (f->the_bfd, bfd_archive))
- wild_section (s, section, f, output);
- else
- {
- bfd *member;
-
- /* This is an archive file. We must map each member of the
- archive separately. */
- member = bfd_openr_next_archived_file (f->the_bfd, (bfd *) NULL);
- while (member != NULL)
- {
- /* When lookup_name is called, it will call the
- add_symbols entry point for the archive. For each
- element of the archive which is included, BFD will
- call ldlang_add_file, which will set the usrdata
- field of the member to the lang_input_statement. */
- if (member->usrdata != NULL)
- {
- wild_section (s, section,
- (lang_input_statement_type *) member->usrdata,
- output);
- }
-
- member = bfd_openr_next_archived_file (f->the_bfd, member);
- }
- }
+ wild_file (s, section, f, output);
}
if (section != (char *) NULL
break;
case lang_wild_statement_enum:
/* Maybe we should load the file's symbols */
- if (s->wild_statement.filename)
+ if (s->wild_statement.filename
+ && ! wildcardp (s->wild_statement.filename))
(void) lookup_name (s->wild_statement.filename);
open_input_bfds (s->wild_statement.children.head, force);
break;
case lang_object_symbols_statement_enum:
case lang_data_statement_enum:
case lang_reloc_statement_enum:
- case lang_assignment_statement_enum:
case lang_padding_statement_enum:
case lang_input_statement_enum:
if (output_section_statement != NULL
&& output_section_statement->bfd_section == NULL)
init_os (output_section_statement);
break;
+ case lang_assignment_statement_enum:
+ if (output_section_statement != NULL
+ && output_section_statement->bfd_section == NULL)
+ init_os (output_section_statement);
+
+ /* Make sure that any sections mentioned in the assignment
+ are initialized. */
+ exp_init_os (s->assignment_statement.exp);
+ break;
case lang_afile_asection_pair_statement_enum:
FAIL ();
break;
minfo ("0x%V %W", addr, s->size);
if (s->fill != 0)
- minfo (" 0x%x", s->fill);
+ minfo (" %u", s->fill);
print_nl ();
einfo ("%F%S: non constant address expression for section %s\n",
os->name);
}
- dot = r.value;
+ dot = r.value + r.section->bfd_section->vma;
}
/* The section starts here */
/* First, align to what the section needs */
s->output_section = bfd_abs_section_ptr;
s->output_offset = s->vma;
}
- else if (file->common_section == s)
+ else if (strcmp (s->name, "COMMON") == 0)
{
- /* This is a lonely common section which must
- have come from an archive. We attatch to the
- section with the wildcard */
+ /* This is a lonely common section which must have
+ come from an archive. We attach to the section
+ with the wildcard. */
if (! link_info.relocateable
- && ! command_line.force_common_definition)
+ || command_line.force_common_definition)
{
- if (default_common_section ==
- (lang_output_section_statement_type *) NULL)
+ if (default_common_section == NULL)
{
+#if 0
+ /* This message happens when using the
+ svr3.ifile linker script, so I have
+ disabled it. */
info_msg ("%P: no [COMMON] command, defaulting to .bss\n");
-
+#endif
default_common_section =
lang_output_section_statement_lookup (".bss");
return 0;
}
+
void
lang_enter_output_section_statement (output_section_statement_name,
- address_exp, flags, block_value,
+ address_exp, sectype, block_value,
align, subalign, ebase)
const char *output_section_statement_name;
etree_type * address_exp;
- int flags;
+ enum section_type sectype;
bfd_vma block_value;
etree_type *align;
etree_type *subalign;
os->addr_tree =
address_exp;
}
- os->flags = flags;
- if (flags & SEC_NEVER_LOAD)
- os->loadable = 0;
+ os->sectype = sectype;
+ if (sectype != noload_section)
+ os->flags = SEC_NO_FLAGS;
else
- os->loadable = 1;
+ os->flags = SEC_NEVER_LOAD;
os->block_value = block_value ? block_value : 1;
stat_ptr = &os->children;
}
void
-lang_leave_output_section_statement (fill, memspec)
+lang_leave_output_section_statement (fill, memspec, phdrs)
bfd_vma fill;
- CONST char *memspec;
+ const char *memspec;
+ struct lang_output_section_phdr_list *phdrs;
{
current_section->fill = fill;
current_section->region = lang_memory_region_lookup (memspec);
+ current_section->phdrs = phdrs;
stat_ptr = &statement_list;
}
*pp = n;
}
-/* Record that a section should be placed in a phdr. */
-
-void
-lang_section_in_phdr (name)
- const char *name;
-{
- struct lang_output_section_phdr_list *n;
-
- n = ((struct lang_output_section_phdr_list *)
- stat_alloc (sizeof (struct lang_output_section_phdr_list)));
- n->name = name;
- n->used = false;
- n->next = current_section->phdrs;
- current_section->phdrs = n;
-}
-
/* Record the program header information in the output BFD. FIXME: We
should not be calling an ELF specific function here. */
lang_statement_union_type *u;
alc = 10;
- secs = xmalloc (alc * sizeof (asection *));
+ secs = (asection **) xmalloc (alc * sizeof (asection *));
last = NULL;
for (l = lang_phdr_list; l != NULL; l = l->next)
{
last = pl;
else
{
- if (! os->loadable
+ if (os->sectype == noload_section
|| os->bfd_section == NULL
|| (os->bfd_section->flags & SEC_ALLOC) == 0)
continue;
if (c >= alc)
{
alc *= 2;
- secs = xrealloc (secs, alc * sizeof (asection *));
+ secs = ((asection **)
+ xrealloc (secs, alc * sizeof (asection *)));
}
secs[c] = os->bfd_section;
++c;
u->output_section_statement.name, pl->name);
}
}
+
+/* Record a list of sections which may not be cross referenced. */
+
+void
+lang_add_nocrossref (l)
+ struct lang_nocrossref *l;
+{
+ struct lang_nocrossrefs *n;
+
+ n = (struct lang_nocrossrefs *) xmalloc (sizeof *n);
+ n->next = nocrossref_list;
+ n->list = l;
+ nocrossref_list = n;
+
+ /* Set notice_all so that we get informed about all symbols. */
+ link_info.notice_all = true;
+}
+\f
+/* Overlay handling. We handle overlays with some static variables. */
+
+/* The overlay virtual address. */
+static etree_type *overlay_vma;
+
+/* The overlay load address. */
+static etree_type *overlay_lma;
+
+/* Whether nocrossrefs is set for this overlay. */
+static int overlay_nocrossrefs;
+
+/* An expression for the maximum section size seen so far. */
+static etree_type *overlay_max;
+
+/* A list of all the sections in this overlay. */
+
+struct overlay_list
+{
+ struct overlay_list *next;
+ lang_output_section_statement_type *os;
+};
+
+static struct overlay_list *overlay_list;
+
+/* Start handling an overlay. */
+
+void
+lang_enter_overlay (vma_expr, lma_expr, nocrossrefs)
+ etree_type *vma_expr;
+ etree_type *lma_expr;
+ int nocrossrefs;
+{
+ /* The grammar should prevent nested overlays from occurring. */
+ ASSERT (overlay_vma == NULL
+ && overlay_lma == NULL
+ && overlay_list == NULL
+ && overlay_max == NULL);
+
+ overlay_vma = vma_expr;
+ overlay_lma = lma_expr;
+ overlay_nocrossrefs = nocrossrefs;
+}
+
+/* Start a section in an overlay. We handle this by calling
+ lang_enter_output_section_statement with the correct VMA and LMA. */
+
+void
+lang_enter_overlay_section (name)
+ const char *name;
+{
+ struct overlay_list *n;
+ etree_type *size;
+
+ lang_enter_output_section_statement (name, overlay_vma, normal_section,
+ 0, 0, 0, overlay_lma);
+
+ /* If this is the first section, then base the VMA and LMA of future
+ sections on this one. This will work correctly even if `.' is
+ used in the addresses. */
+ if (overlay_list == NULL)
+ {
+ overlay_vma = exp_nameop (ADDR, name);
+ overlay_lma = exp_nameop (LOADADDR, name);
+ }
+
+ /* Remember the section. */
+ n = (struct overlay_list *) xmalloc (sizeof *n);
+ n->os = current_section;
+ n->next = overlay_list;
+ overlay_list = n;
+
+ size = exp_nameop (SIZEOF, name);
+
+ /* Adjust the LMA for the next section. */
+ overlay_lma = exp_binop ('+', overlay_lma, size);
+
+ /* Arrange to work out the maximum section end address. */
+ if (overlay_max == NULL)
+ overlay_max = size;
+ else
+ overlay_max = exp_binop (MAX, overlay_max, size);
+}
+
+/* Finish a section in an overlay. There isn't any special to do
+ here. */
+
+void
+lang_leave_overlay_section (fill, phdrs)
+ bfd_vma fill;
+ struct lang_output_section_phdr_list *phdrs;
+{
+ const char *name;
+ char *clean, *s2;
+ const char *s1;
+ char *buf;
+
+ name = current_section->name;
+
+ lang_leave_output_section_statement (fill, "*default*", phdrs);
+
+ /* Define the magic symbols. */
+
+ clean = xmalloc (strlen (name) + 1);
+ s2 = clean;
+ for (s1 = name; *s1 != '\0'; s1++)
+ if (isalnum (*s1) || *s1 == '_')
+ *s2++ = *s1;
+ *s2 = '\0';
+
+ buf = xmalloc (strlen (clean) + sizeof "__load_start_");
+ sprintf (buf, "__load_start_%s", clean);
+ lang_add_assignment (exp_assop ('=', buf,
+ exp_nameop (LOADADDR, name)));
+
+ buf = xmalloc (strlen (clean) + sizeof "__load_stop_");
+ sprintf (buf, "__load_stop_%s", clean);
+ lang_add_assignment (exp_assop ('=', buf,
+ exp_binop ('+',
+ exp_nameop (LOADADDR, name),
+ exp_nameop (SIZEOF, name))));
+
+ free (clean);
+}
+
+/* Finish an overlay. If there are any overlay wide settings, this
+ looks through all the sections in the overlay and sets them. */
+
+void
+lang_leave_overlay (fill, memspec, phdrs)
+ bfd_vma fill;
+ const char *memspec;
+ struct lang_output_section_phdr_list *phdrs;
+{
+ lang_memory_region_type *region;
+ struct overlay_list *l;
+ struct lang_nocrossref *nocrossref;
+
+ if (memspec == NULL)
+ region = NULL;
+ else
+ region = lang_memory_region_lookup (memspec);
+
+ nocrossref = NULL;
+
+ l = overlay_list;
+ while (l != NULL)
+ {
+ struct overlay_list *next;
+
+ if (fill != 0 && l->os->fill == 0)
+ l->os->fill = fill;
+ if (region != NULL && l->os->region == NULL)
+ l->os->region = region;
+ if (phdrs != NULL && l->os->phdrs == NULL)
+ l->os->phdrs = phdrs;
+
+ if (overlay_nocrossrefs)
+ {
+ struct lang_nocrossref *nc;
+
+ nc = (struct lang_nocrossref *) xmalloc (sizeof *nc);
+ nc->name = l->os->name;
+ nc->next = nocrossref;
+ nocrossref = nc;
+ }
+
+ next = l->next;
+ free (l);
+ l = next;
+ }
+
+ if (nocrossref != NULL)
+ lang_add_nocrossref (nocrossref);
+
+ /* Update . for the end of the overlay. */
+ lang_add_assignment (exp_assop ('=', ".",
+ exp_binop ('+', overlay_vma, overlay_max)));
+
+ overlay_vma = NULL;
+ overlay_lma = NULL;
+ overlay_nocrossrefs = 0;
+ overlay_list = NULL;
+ overlay_max = NULL;
+}
const char *name;
} lang_output_statement_type;
+/* Section types specified in a linker script. */
+
+enum section_type
+{
+ normal_section,
+ dsect_section,
+ copy_section,
+ noload_section,
+ info_section,
+ overlay_section
+};
/* This structure holds a list of program headers describing segments
in which this section should be placed. */
asection *bfd_section;
int flags; /* Or together of all input sections */
- int loadable; /* set from NOLOAD flag in script */
+ enum section_type sectype;
struct memory_region_struct *region;
size_t block_value;
fill_type fill;
/* unsigned int globals_in_this_file;*/
const char *target;
boolean real;
- asection *common_section;
- asection *common_output_section;
- boolean complained;
} lang_input_statement_type;
typedef struct
etree_type *flags;
};
+/* This structure is used to hold a list of sections which may not
+ cross reference each other. */
+
+struct lang_nocrossref
+{
+ struct lang_nocrossref *next;
+ const char *name;
+};
+
+/* The list of nocrossref lists. */
+
+struct lang_nocrossrefs
+{
+ struct lang_nocrossrefs *next;
+ struct lang_nocrossref *list;
+};
+
+extern struct lang_nocrossrefs *nocrossref_list;
+
extern lang_output_section_statement_type *abs_output_section;
extern boolean lang_has_input_file;
extern etree_type *base;
extern void lang_enter_output_section_statement
PARAMS ((const char *output_section_statement_name,
etree_type * address_exp,
- int flags,
+ enum section_type sectype,
bfd_vma block_value,
etree_type *align,
etree_type *subalign,
extern void lang_add_attribute PARAMS ((enum statement_enum));
extern void lang_startup PARAMS ((const char *));
extern void lang_float PARAMS ((enum bfd_boolean));
-extern void lang_leave_output_section_statement PARAMS ((bfd_vma,
- const char *));
+extern void lang_leave_output_section_statement
+ PARAMS ((bfd_vma, const char *, struct lang_output_section_phdr_list *));
extern void lang_abs_symbol_at_end_of PARAMS ((const char *, const char *));
extern void lang_abs_symbol_at_beginning_of PARAMS ((const char *,
const char *));
extern void lang_new_phdr
PARAMS ((const char *, etree_type *, boolean, boolean, etree_type *,
etree_type *));
-extern void lang_section_in_phdr PARAMS ((const char *));
+extern void lang_add_nocrossref PARAMS ((struct lang_nocrossref *));
+extern void lang_enter_overlay PARAMS ((etree_type *, etree_type *, int));
+extern void lang_enter_overlay_section PARAMS ((const char *));
+extern void lang_leave_overlay_section
+ PARAMS ((bfd_vma, struct lang_output_section_phdr_list *));
+extern void lang_leave_overlay
+ PARAMS ((bfd_vma, const char *, struct lang_output_section_phdr_list *));
#endif
%{
-/* Copyright (C) 1991, 1992, 1993, 1994 Free Software Foundation, Inc.
+/* Copyright (C) 1991, 92, 93, 94, 95, 1996 Free Software Foundation, Inc.
This file is part of GLD, the Gnu Linker.
FILENAMECHAR1 [_a-zA-Z\/\.\\\$\_\~]
SYMBOLCHARN [_a-zA-Z\/\.\\0-9]
FILENAMECHAR [_a-zA-Z0-9\/\.\-\_\+\=\$\:\[\]\\\,\~]
-FILENAME {FILENAMECHAR}+
+WILDCHAR [_a-zA-Z0-9\/\.\-\_\+\=\$\:\[\]\\\,\~\?\*]
WHITE [ \t\n\r]+
NOCFILENAMECHAR [_a-zA-Z0-9\/\.\-\_\+\$\:\[\]\\\~]
<BOTH,SCRIPT,EXPRESSION,MRI>";" { RTOKEN(';');}
<BOTH,SCRIPT>"MEMORY" { RTOKEN(MEMORY);}
<BOTH,SCRIPT>"ORIGIN" { RTOKEN(ORIGIN);}
-<BOTH,SCRIPT>"BLOCK" { RTOKEN(BLOCK);}
+<EXPRESSION,BOTH,SCRIPT>"BLOCK" { RTOKEN(BLOCK);}
+<EXPRESSION,BOTH,SCRIPT>"BIND" { RTOKEN(BIND);}
<BOTH,SCRIPT>"LENGTH" { RTOKEN(LENGTH);}
<EXPRESSION,BOTH,SCRIPT>"ALIGN" { RTOKEN(ALIGN_K);}
<EXPRESSION,BOTH,SCRIPT>"ADDR" { RTOKEN(ADDR);}
+<EXPRESSION,BOTH,SCRIPT>"LOADADDR" { RTOKEN(LOADADDR);}
+<EXPRESSION,BOTH>"MAX" { RTOKEN(MAX); }
+<EXPRESSION,BOTH>"MIN" { RTOKEN(MIN); }
<BOTH,SCRIPT>"ENTRY" { RTOKEN(ENTRY);}
<EXPRESSION,BOTH,SCRIPT>"NEXT" { RTOKEN(NEXT);}
<EXPRESSION,BOTH,SCRIPT>"sizeof_headers" { RTOKEN(SIZEOF_HEADERS);}
<BOTH,SCRIPT>"SEARCH_DIR" { RTOKEN(SEARCH_DIR);}
<BOTH,SCRIPT>"OUTPUT" { RTOKEN(OUTPUT);}
<BOTH,SCRIPT>"INPUT" { RTOKEN(INPUT);}
-<BOTH,SCRIPT>"GROUP" { RTOKEN(GROUP);}
+<EXPRESSION,BOTH,SCRIPT>"GROUP" { RTOKEN(GROUP);}
<EXPRESSION,BOTH,SCRIPT>"DEFINED" { RTOKEN(DEFINED);}
<BOTH,SCRIPT>"CREATE_OBJECT_SYMBOLS" { RTOKEN(CREATE_OBJECT_SYMBOLS);}
<BOTH,SCRIPT>"CONSTRUCTORS" { RTOKEN( CONSTRUCTORS);}
<BOTH,SCRIPT>"SHORT" { RTOKEN( SHORT);}
<BOTH,SCRIPT>"BYTE" { RTOKEN( BYTE);}
<BOTH,SCRIPT>"NOFLOAT" { RTOKEN(NOFLOAT);}
-<EXPRESSION,BOTH,SCRIPT>"NOLOAD" { RTOKEN(NOLOAD);}
-<BOTH,SCRIPT>"DSECT" { RTOKEN(DSECT);}
-<BOTH,SCRIPT>"COPY" { RTOKEN(COPY);}
-<BOTH,SCRIPT>"INFO" { RTOKEN(INFO);}
-<BOTH,SCRIPT>"OVERLAY" { RTOKEN(OVERLAY);}
+<EXPRESSION,BOTH,SCRIPT>"NOCROSSREFS" { RTOKEN(NOCROSSREFS);}
+<BOTH,SCRIPT>"OVERLAY" { RTOKEN(OVERLAY); }
+<EXPRESSION,BOTH,SCRIPT>"NOLOAD" { RTOKEN(NOLOAD);}
+<EXPRESSION,BOTH,SCRIPT>"DSECT" { RTOKEN(DSECT);}
+<EXPRESSION,BOTH,SCRIPT>"COPY" { RTOKEN(COPY);}
+<EXPRESSION,BOTH,SCRIPT>"INFO" { RTOKEN(INFO);}
+<EXPRESSION,BOTH,SCRIPT>"OVERLAY" { RTOKEN(OVERLAY);}
<BOTH,SCRIPT>"o" { RTOKEN(ORIGIN);}
<BOTH,SCRIPT>"org" { RTOKEN(ORIGIN);}
<BOTH,SCRIPT>"l" { RTOKEN( LENGTH);}
yylval.name = buystring (yytext + 2);
return LNAME;
}
-<SCRIPT>{FILENAMECHAR}* { yylval.name = buystring(yytext);
- return NAME;
- }
+<SCRIPT>{WILDCHAR}* { yylval.name = buystring(yytext); return NAME; }
<EXPRESSION,BOTH,SCRIPT>"\""[^\"]*"\"" {
/* No matter the state, quotes
/* Main program of GNU linker.
- Copyright (C) 1991, 92, 93, 94, 1995 Free Software Foundation, Inc.
+ Copyright (C) 1991, 92, 93, 94, 95, 1996 Free Software Foundation, Inc.
Written by Steve Chamberlain steve@cygnus.com
This file is part of GLD, the Gnu Linker.
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
-along with GLD; see the file COPYING. If not, write to
-the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
+along with GLD; see the file COPYING. If not, write to the Free
+Software Foundation, 59 Temple Place - Suite 330, Boston, MA
+02111-1307, USA. */
#include "bfd.h"
#include "sysdep.h"
#include <string.h>
+#ifdef HAVE_SBRK
+#ifdef NEED_DECLARATION_SBRK
+extern PTR sbrk ();
+#endif
+#endif
+
static char *get_emulation PARAMS ((int, char **));
static void set_scripts_dir PARAMS ((void));
if (config.map_file != NULL)
lang_map ();
- if (link_info.notice_all)
+ if (command_line.cref)
output_cref (config.map_file != NULL ? config.map_file : stdout);
+ if (nocrossref_list != NULL)
+ check_nocrossrefs ();
/* Even if we're producing relocateable output, some non-fatal errors should
be reported in the exit status. (What non-fatal errors, if any, do we
/* FIXME: The following fields are not set: header.next,
header.type, closed, passive_position, symbol_count,
- next_real_file, is_archive, target, real, common_section,
- common_output_section, complained. This bit of code is from the
- old decode_library_subfile function. I don't know whether any of
- those fields matters. */
+ next_real_file, is_archive, target, real. This bit of code is
+ from the old decode_library_subfile function. I don't know
+ whether any of those fields matters. */
ldlang_add_file (input);
if (! info.found)
einfo ("%B: %s\n", abfd, warning);
+
+ if (entry == NULL)
+ free (asymbols);
}
return true;
bfd_is_und_section (section) ? "reference to" : "definition of",
name);
- if (info->notice_all)
+ if (command_line.cref || nocrossref_list != NULL)
add_cref (name, abfd, section, value);
return true;
&& bfd_get_symbol_leading_char (output_bfd) == string[0])
++string;
- /* This is a hack for better error reporting on XCOFF. */
- if (string[0] == '.')
+ /* This is a hack for better error reporting on XCOFF, or the MS PE */
+ /* format. Xcoff has a single '.', while the NT PE for PPC has '..'. */
+ /* So we remove all of them. */
+ while(string[0] == '.')
++string;
res = cplus_demangle (string, DMGL_ANSI | DMGL_PARAMS);
sprintf_vma (buf, value);
for (p = buf; *p == '0'; ++p)
;
+ if (*p == '\0')
+ --p;
len = strlen (p);
while (len < 8)
{
ldversion (noisy)
int noisy;
{
- fprintf (stdout,"ld version cygnus-2.6 (with BFD %s)\n", BFD_VERSION);
+ fprintf (stdout, "GNU ld version cygnus-2.7.1 (with BFD %s)\n",
+ BFD_VERSION);
if (noisy)
{
#include "bfd.h"
#include "sysdep.h"
+#include "libiberty.h"
#include <stdio.h>
#include <string.h>
#include <ctype.h>
config.dynamic_link = false;
break;
case OPTION_CREF:
+ command_line.cref = true;
link_info.notice_all = true;
break;
case 'd':
case 'Y':
if (strncmp (optarg, "P,", 2) == 0)
optarg += 2;
- default_dirlist = optarg;
+ default_dirlist = xstrdup (optarg);
break;
case 'y':
add_ysym (optarg);
{
p = strchr (dirlist_ptr, ':');
if (p != NULL)
- *p = 0;
- if (*dirlist_ptr)
+ *p = '\0';
+ if (*dirlist_ptr != '\0')
ldfile_add_library_path (dirlist_ptr, true);
if (p == NULL)
break;
- *p = ':';
dirlist_ptr = p + 1;
}
}
# Hack up ldmain compile.
/^"{o}"ldmain.c.o \\Option-f .* config.status$/,/^$/c\
"{o}"ldmain.c.o \\Option-f "{s}"ldmain.c\
- {CC} -d DEFAULT_EMULATION='"'{EMUL}'"' -d SCRIPTDIR='"'{scriptdir}'"' {ALL_CFLAGS} "{s}"ldmain.c -o "{o}"ldmain.c.o\
+ {CC} @DASH_C_FLAG@ -d DEFAULT_EMULATION='"'{EMUL}'"' -d SCRIPTDIR='"'{scriptdir}'"' {ALL_CFLAGS} "{s}"ldmain.c -o "{o}"ldmain.c.o\
# Remove ldemul-list.h build, rely on configure to make one.
lang_add_wild(aptr->name, (char *)NULL);
}
}
-
- lang_leave_output_section_statement(0, "*default*");
+
+ lang_leave_output_section_statement
+ (0, "*default*", (struct lang_output_section_phdr_list *) NULL);
+
p = p->next;
}
}
# OTHER_BSS_SYMBOLS - symbols that appear at the start of the
# .bss section besides __bss_start.
# DATA_PLT - .plt should be in data segment, not text segment.
+# EMBEDDED - whether this is for an embedded system.
#
# When adding sections, do note that the names of some sections are used
# when specifying the start address of the next.
test "$LD_FLAG" = "N" && DATA_ADDR=.
INTERP=".interp ${RELOCATING-0} : { *(.interp) }"
PLT=".plt ${RELOCATING-0} : { *(.plt) }"
+
+# if this is for an embedded system, don't add SIZEOF_HEADERS.
+if [ -z "$EMBEDDED" ]; then
+ test -z "${TEXT_BASE_ADDRESS}" && TEXT_BASE_ADDRESS="${TEXT_START_ADDR} + SIZEOF_HEADERS"
+else
+ test -z "${TEXT_BASE_ADDRESS}" && TEXT_BASE_ADDRESS="${TEXT_START_ADDR}"
+fi
+
cat <<EOF
OUTPUT_FORMAT("${OUTPUT_FORMAT}", "${BIG_OUTPUT_FORMAT}",
"${LITTLE_OUTPUT_FORMAT}")
SECTIONS
{
/* Read-only sections, merged into text segment: */
- ${CREATE_SHLIB-${RELOCATING+. = ${TEXT_START_ADDR} + SIZEOF_HEADERS;}}
+ ${CREATE_SHLIB-${RELOCATING+. = ${TEXT_BASE_ADDRESS};}}
${CREATE_SHLIB+${RELOCATING+. = SIZEOF_HEADERS;}}
${CREATE_SHLIB-${INTERP}}
.hash ${RELOCATING-0} : { *(.hash) }
*(.text)
/* .gnu.warning sections are handled specially by elf32.em. */
*(.gnu.warning)
+ *(.gnu.linkonce.t*)
} =${NOP-0}
${RELOCATING+_etext = .;}
${RELOCATING+PROVIDE (etext = .);}
.fini ${RELOCATING-0} : { *(.fini) } =${NOP-0}
- .rodata ${RELOCATING-0} : { *(.rodata) }
+ .rodata ${RELOCATING-0} : { *(.rodata) *(.gnu.linkonce.r*) }
.rodata1 ${RELOCATING-0} : { *(.rodata1) }
${RELOCATING+${OTHER_READONLY_SECTIONS}}
{
${RELOCATING+${DATA_START_SYMBOLS}}
*(.data)
+ *(.gnu.linkonce.d*)
${CONSTRUCTING+CONSTRUCTORS}
}
.data1 ${RELOCATING-0} : { *(.data1) }
${RELOCATING+${OTHER_READWRITE_SECTIONS}}
- .ctors ${RELOCATING-0} : { *(.ctors) }
- .dtors ${RELOCATING-0} : { *(.dtors) }
+ .ctors ${RELOCATING-0} :
+ {
+ ${CONSTRUCTING+${CTOR_START}}
+ *(.ctors)
+ ${CONSTRUCTING+${CTOR_END}}
+ }
+ .dtors ${RELOCATING-0} :
+ {
+ ${CONSTRUCTING+${DTOR_START}}
+ *(.dtors)
+ ${CONSTRUCTING+${DTOR_END}}
+ }
.got ${RELOCATING-0} : { *(.got.plt) *(.got) }
.dynamic ${RELOCATING-0} : { *(.dynamic) }
${DATA_PLT+${PLT}}
${RELOCATING+_end = . ;}
${RELOCATING+PROVIDE (end = .);}
- /* These are needed for ELF backends which have not yet been
- converted to the new style linker. */
+ /* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
+ .stab.excl 0 : { *(.stab.excl) }
+ .stab.exclstr 0 : { *(.stab.exclstr) }
+ .stab.index 0 : { *(.stab.index) }
+ .stab.indexstr 0 : { *(.stab.indexstr) }
+
+ .comment 0 : { *(.comment) }
/* DWARF debug sections.
Symbols in the .debug DWARF section are relative to the beginning of the
.debug_sfnames 0 : { *(.debug_sfnames) }
.line 0 : { *(.line) }
+ ${RELOCATING+${OTHER_RELOCATING_SECTIONS}}
+
/* These must appear regardless of ${RELOCATING}. */
${OTHER_SECTIONS}
}
${RELOCATING+PROVIDE (_GOT2_END_ = .);}
${RELOCATING+PROVIDE (_GOT_START_ = .);}
- ${RELOCATING+PROVIDE (_GLOBAL_OFFSET_TABLE_ = .);}
.got ${RELOCATING-0} : { *(.got) }
.got.plt ${RELOCATING-0} : { *(.got.plt) }
${CREATE_SHLIB+${SDATA2}}
+Thu Aug 8 14:29:32 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * ld-scripts/cross2.t: Map XCOFF sections to .text or .data.
+
+ * lib/ld.exp: Use verbose -log instead of calling both verbose and
+ send_log.
+
+Wed Aug 7 18:00:58 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * ld-scripts/phdrs.exp: New test.
+ * ld-scripts/phdrs.s, ld-scripts/phdrs.t: New files.
+
+Sun Aug 4 21:58:12 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * ld-scripts/crossref.exp: On a29k targets, use --defsym to define
+ V_SPILL and V_FILL.
+
+Thu Aug 1 14:10:27 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * ld-scripts/crossref.exp: New test.
+ * ld-scripts/{cross1.c, cross2.c, cross3.c}: New files.
+ * ld-scripts/{cross1.t, cross2.t}: New files.
+
+Sat Jun 29 13:40:11 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * ld-sh/sh.exp: Fix debugging messages.
+ * ld-sh/sh1.s: Use .align 4.
+
Wed May 1 16:45:13 1996 Ian Lance Taylor <ian@cygnus.com>
* ld-sh/sh.exp: Use -O when compiling with -mrelax.
# Expect script for ld-sh tests
-# Copyright (C) 1995 Free Software Foundation
+# Copyright (C) 1995, 1996 Free Software Foundation
#
# This file is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# The file name is embedded in the S-records, so create both
# files with the same name.
catch "exec rm -f tmpdir/sh1.s2" exec_output
- send_log "exec mv tmpdir/sh1.s1 tmpdir/sh1.s2\n"
- verbose "exec mv tmpdir/sh1.s1 tmpdir/sh1.s2"
+ send_log "mv tmpdir/sh1.s1 tmpdir/sh1.s2\n"
+ verbose "mv tmpdir/sh1.s1 tmpdir/sh1.s2"
catch "exec mv tmpdir/sh1.s1 tmpdir/sh1.s2" exec_output
if ![string match "" $exec_output] {
send_log "$exec_output\n"
verbose "$exec_output"
unresolved $testsrec
} else {
+ send_log "$objcopy -O srec tmpdir/sh1 tmpdir/sh1.s1"
+ verbose "$objcopy -O srec tmpdir/sh1 tmpdir/sh1.s1"
catch "exec $objcopy -O srec tmpdir/sh1 tmpdir/sh1.s1" exec_output
if ![string match "" $exec_output] {
send_log "$exec_output\n"
+Thu Aug 29 16:48:45 1996 Michael Meissner <meissner@tiktok.cygnus.com>
+
+ * config.table (i[345]86-*-*): Recognize i686 for pentium pro.
+
+Tue Aug 27 13:47:58 1996 Stan Shebs <shebs@andros.cygnus.com>
+
+ * pexecute.c (pexecute) [MPW]: Remove old bogus code that
+ messed with arguments that included a '/', add escape chars
+ to double quotes, remove const decl from arg that Mac
+ compilers don't seem to like.
+
+Sat Aug 17 04:44:27 1996 Geoffrey Noer <noer@cygnus.com>
+
+ * pexecute.c: Update test for win32 (&& ! cygwin32).
+ * choose-temp.c: fix WIN32 preprocessor defines
+
+Thu Aug 15 12:26:48 1996 Stan Shebs <shebs@andros.cygnus.com>
+
+ * mpw-make.sed: Add @DASH_C_FLAG@ and @SEGMENT_FLAG({Default})@
+ to editing of default makefile rule.
+
+Sun Aug 11 21:03:27 1996 Stu Grossman (grossman@critters.cygnus.com)
+
+ * alloca-norm.h: Include <malloc.h> if _WIN32.
+ * argv.c: Include non-prototyped decls for malloc and string
+ functions if ! _WIN32 or if __GNUC__.
+
+Thu Aug 8 12:42:40 1996 Klaus Kaempf <kkaempf@progis.de>
+
+ * config.h-vms: New file.
+ * makefile.vms: Use it.
+
+Wed Aug 7 17:16:12 1996 Stu Grossman (grossman@critters.cygnus.com)
+
+ * getopt.c (_getopt_internal): If argc is 0, just return (before
+ we reference *argv and segfault).
+
+Mon Aug 5 01:29:08 1996 Jason Merrill <jason@yorick.cygnus.com>
+
+ * Makefile.in (distclean): Add multilib.out.
+
+Thu Jul 18 17:40:55 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * alloca-norm.h: Change #ifdef sparc to #if defined (sparc) &&
+ defined (sun). From Andrew Gierth <ANDREWG@microlise.co.uk>.
+
+Mon Jul 1 13:40:44 1996 Ken Raeburn <raeburn@cygnus.com>
+
+ Tue May 28 15:29:03 1996 Pat Rankin <rankin@eql.caltech.edu>
+
+ * vmsbuild.com (REQUIRD_OFILES): Add choose-temp.o and xstrdup.o.
+
+ Thu Jan 25 18:20:04 1996 Pat Rankin <rankin@eql.caltech.edu>
+
+ * vmsbuild.com: Changes to handle DEFFUNC(on_exit).
+ (do_ofiles): Allow nonexistent source file in pass 3.
+ (chk_deffunc): New routine.
+
+Tue Jun 25 19:24:43 1996 Doug Evans <dje@canuck.cygnus.com>
+
+ * pexecute.c (PEXECUTE_VERBOSE): Define.
+ (MPW pexecute): Check flags & PEXECUTE_VERBOSE instead of verbose_flag.
+
+Tue Jun 25 23:11:48 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
+
+ * Makefile.in (docdir): Removed.
+
+Tue Jun 25 23:01:07 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
+
+ * Makefile.in (oldincludedir): Removed.
+
+Tue Jun 25 22:50:07 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
+
+ * Makefile.in (datadir): Set to $(prefix)/share.
+
+Thu Jun 20 21:17:52 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * cplus-dem.c (demangle_arm_pt): Reindent. Avoid endless loop by
+ checking for errors from do_type.
+
+Tue Jun 18 14:36:19 1996 Klaus Kaempf <kkaempf@progis.de>
+
+ * makefile.vms: New file.
+ * xmalloc.c: If VMS, include <stdlib.h> and <unixlib.h> rather
+ than declaring malloc, realloc, and sbrk.
+
+Mon Jun 10 13:17:17 1996 Doug Evans <dje@canuck.cygnus.com>
+
+ * pexecute.c: New file.
+
Wed Jun 5 16:57:45 1996 Richard Henderson <rth@tamu.edu>
* xmalloc.c: Declare sbrk.
bindir = $(exec_prefix)/bin
libdir = $(exec_prefix)/lib
-datadir = $(prefix)/lib
+datadir = $(prefix)/share
mandir = $(prefix)/man
man1dir = $(mandir)/man1
man9dir = $(mandir)/man9
infodir = $(prefix)/info
includedir = $(prefix)/include
-oldincludedir =
-docdir = $(datadir)/doc
SHELL = /bin/sh
rm -f *.a required-list
@$(MULTICLEAN) multi-clean DO=clean
distclean: clean
- rm -f *~ Makefile config.status alloca-conf.h xhost-mkfrag TAGS
+ rm -f *~ Makefile config.status alloca-conf.h xhost-mkfrag TAGS multilib.out
@$(MULTICLEAN) multi-clean DO=distclean
maintainer-clean realclean: distclean
#ifdef __GNUC__
#define alloca __builtin_alloca
-#else /* not __GNUC__ */
-#ifdef sparc
+#else /* ! defined (__GNUC__) */
+#if defined (sparc) && defined (sun)
#include <alloca.h>
#ifdef __STDC__
extern void *__builtin_alloca();
-#else
+#else /* ! defined (__STDC__) */
extern char *__builtin_alloca(); /* Stupid include file doesn't declare it */
-#endif
-#else
+#endif /* ! defined (__STDC__) */
+#else /* ! defined (sparc) || ! defined (sun) */
#ifdef __STDC__
PTR alloca (size_t);
-#else
+#else /* ! defined (__STDC__) */
PTR alloca (); /* must agree with functions.def */
+#endif /* ! defined (__STDC__) */
+#endif /* ! defined (sparc) || ! defined (sun) */
+#ifdef _WIN32
+#include <malloc.h>
#endif
-#endif /* sparc */
-#endif /* not __GNUC__ */
+#endif /* ! defined (__GNUC__) */
arm-*-riscix*) frag=mh-riscix ;;
m68k-apollo-bsd*) frag=mh-a68bsd ;;
m68k-apollo-sysv*) frag=mh-apollo68 ;;
- i[345]86-ncr-sysv4*) frag=mh-ncr3000 ;;
+ i[3456]86-ncr-sysv4*) frag=mh-ncr3000 ;;
*-*-cxux7*) frag=mh-cxux7 ;;
*-*-lynxos*) frag=mh-lynxos ;;
*-*-dgux*) frag=mh-sysv ;;
esac
if [ "${shared}" = "yes" ]; then
case "${host}" in
- hppa*-*-*) frags="${frags} ../../config/mh-papic" ;;
- i[345]86-*-*) frags="${frags} ../../config/mh-x86pic" ;;
- *-*-*) frags="${frags} ../../config/mh-${host_cpu}pic" ;;
+ hppa*-*-*) frags="${frags} ../../config/mh-papic" ;;
+ i[3456]86-*-*) frags="${frags} ../../config/mh-x86pic" ;;
+ *-*-*) frags="${frags} ../../config/mh-${host_cpu}pic" ;;
esac
fi
static void
string_prepends PARAMS ((string *, string *));
+static int
+arm_pt PARAMS ((struct work_stuff *, const char *, int, const char **,
+ const char **));
+
+static void
+demangle_arm_pt PARAMS ((struct work_stuff *, const char **, int, string *));
+
/* Translate count to integer, consuming tokens in the process.
Conversion terminates on the first non-digit character.
Trying to consume something that isn't a count results in
/* ARM template? */
if (arm_pt (work, *mangled, n, &p, &args))
- {
- string arg;
- string_init (&arg);
- string_appendn (declp, *mangled, p - *mangled);
- string_append (declp, "<");
- /* should do error checking here */
- while (args < e) {
- string_clear (&arg);
- do_type (work, &args, &arg);
- string_appends (declp, &arg);
- string_append (declp, ",");
- }
- string_delete (&arg);
- --declp->p;
- string_append (declp, ">");
- }
+ {
+ string pt, arg;
+ int success;
+
+ string_init (&pt);
+ string_init (&arg);
+ string_appendn (&pt, *mangled, p - *mangled);
+ string_append (&pt, "<");
+ success = 1;
+ while (args < e)
+ {
+ string_clear (&arg);
+ if (! do_type (work, &args, &arg))
+ {
+ success = 0;
+ break;
+ }
+ string_appends (&pt, &arg);
+ string_append (&pt, ",");
+ }
+ if (success)
+ {
+ --pt.p;
+ string_append (&pt, ">");
+ string_appends (declp, &pt);
+ }
+ else
+ {
+ string_appendn (declp, *mangled, n);
+ }
+ string_delete (&pt);
+ string_delete (&arg);
+ }
else
- {
- string_appendn (declp, *mangled, n);
- }
+ {
+ string_appendn (declp, *mangled, n);
+ }
*mangled += n;
}
s/`cat needed-list`/"{o}"alloca.c.o "{o}"bcopy.c.o "{o}"getpagesize.c.o "{o}"insque.c.o "{o}"mpw.c.o "{o}"strcasecmp.c.o "{o}"strdup.c.o "{o}"strncasecmp.c.o/
# Paste in some desirable definitions.
+# The default rule here completely replaces the tricky stuff in the Unix
+# Makefile.in.
/^###$/a\
\
HDEFINES = -d NEED_sys_siglist -d NEED_sys_errlist -d NEED_basename -d NEED_strcasecmp -d NEED_strncasecmp\
INCLUDES = -i : -i {INCDIR}: -i {INCDIR}:mpw: -i ::extra-include: -i "{s}"\
\
.c.o \\Option-f .c\
- {CC} {DepDir}{Default}.c {LIBCFLAGS} {INCLUDES} {HDEFINES} @SEGMENT_FLAG@ -o {TargDir}{Default}.c.o\
+ {CC} @DASH_C_FLAG@ {DepDir}{Default}.c {LIBCFLAGS} {INCLUDES} {HDEFINES} @SEGMENT_FLAG({Default})@ -o {TargDir}{Default}.c.o\
# Remove dependency on needed-list, which we don't use.
/DO_ALSO =/s/needed-list//
#define ptrdiff_t long
#endif
+#if VMS
+#include <stdlib.h>
+#include <unixlib.h>
+#else
/* For systems with larger pointers than ints, these must be declared. */
PTR malloc PARAMS ((size_t));
PTR realloc PARAMS ((PTR, size_t));
PTR sbrk PARAMS ((ptrdiff_t));
+#endif
/* The program name if set. */
static const char *name = "";
"{ThisScript}" do-byacc
Else If "{BuildTarget}" =~ /all-flex/
"{ThisScript}" all-libiberty
- "{ThisScript}" all-byacc
"{ThisScript}" do-flex
Else If "{BuildTarget}" =~ /all-binutils/
"{ThisScript}" all-libiberty
"{ThisScript}" all-bfd
"{ThisScript}" all-opcodes
- "{ThisScript}" all-byacc
- "{ThisScript}" all-flex
"{ThisScript}" do-binutils
Else If "{BuildTarget}" =~ /all-gas/
"{ThisScript}" all-libiberty
"{ThisScript}" do-gas
Else If "{BuildTarget}" =~ /all-gcc/
"{ThisScript}" all-libiberty
- "{ThisScript}" all-byacc
"{ThisScript}" all-gas
"{ThisScript}" all-binutils
"{ThisScript}" do-gcc
"{ThisScript}" all-libiberty
"{ThisScript}" all-bfd
"{ThisScript}" all-opcodes
- "{ThisScript}" all-byacc
"{ThisScript}" do-gdb
Else If "{BuildTarget}" =~ /all-grez/
"{ThisScript}" all-libiberty
"{ThisScript}" all-bfd
- "{ThisScript}" all-byacc
"{ThisScript}" do-grez
Else If "{BuildTarget}" =~ /all-ld/
"{ThisScript}" all-libiberty
"{ThisScript}" all-bfd
"{ThisScript}" all-opcodes
- "{ThisScript}" all-byacc
- "{ThisScript}" all-flex
"{ThisScript}" do-ld
Else If "{BuildTarget}" =~ /do-byacc/
SetDirectory :byacc:
::mpw-build all
Else If "{BuildTarget}" =~ /do-gcc/
SetDirectory :gcc:
- # Need separate step to build all the insn-... etc files.
- ::mpw-build stamps-h
- ::mpw-build stamps-c
- ::mpw-build all
+ :mpw-build all
Else If "{BuildTarget}" =~ /do-gdb/
SetDirectory :gdb:
::mpw-build all
::mpw-build install
Else If "{BuildTarget}" =~ /install-gcc/
SetDirectory :gcc:
- ::mpw-build install
+ :mpw-build install
Else If "{BuildTarget}" =~ /install-gdb/
SetDirectory :gdb:
::mpw-build install
::mpw-build install-only
Else If "{BuildTarget}" =~ /install-only-gcc/
SetDirectory :gcc:
- ::mpw-build install-only
+ :mpw-build install-only
Else If "{BuildTarget}" =~ /install-only-gdb/
SetDirectory :gdb:
::mpw-build install-only
Set exec_prefix ""
+Set bindir ""
+
Set host_alias "m68k-apple-mpw"
Set target_alias {host_alias}
Set verify 0
Set verifystr ""
+Set enable_options ""
+Set disable_options ""
+
# Parse arguments.
Loop
If "{1}" =~ /--cc/
Set host_cc "{2}"
Shift 1
+ Else If "{1}" =~ /--bindir/
+ Set bindir "{2}"
+ Shift 1
Else If "{1}" =~ /--disable-?+/
- Set "`Echo {1} | sed -e 's/--disable-/enable_/'`" no
+ Set `Echo {1} | sed -e 's/--disable-/enable_/'` no
+ Set disable_options "{disable_options} '{1}'"
Else If "{1}" =~ /--enable-?+/
- Set "`Echo {1} | sed -e 's/--enable-/enable_/'`" yes
+ Set `Echo {1} | sed -e 's/--enable-/enable_/'` yes
+ Set enable_options "{enable_options} '{1}'"
Else If "{1}" =~ /--exec-prefix/
Set exec_prefix "{2}"
Shift 1
Set exec_prefix "{prefix}"
End If
+If "{bindir}" == ""
+ Set bindir "{prefix}"bin:
+End If
+
# Point to the correct set of tools to use with the chosen compiler.
If "{host_cc}" =~ /mpwc/
Set host_alias "m68k-apple-mpw"
Set cc_name '{CC_MPW_C}'
- Set segment_flag '-s {Default}'
+ Set segment_flag '-s '
Set ar_name '{AR_LIB}'
Set ranlib_name '{RANLIB_NULL}'
Set cc_ld_name '{CC_LD_LINK}'
Else If "{host_cc}" =~ /sc68k/
Set host_alias "m68k-apple-mpw"
Set cc_name '{CC_SC}'
- Set segment_flag '-s {Default}'
+ Set segment_flag '-s '
Set ar_name '{AR_LIB}'
Set ranlib_name '{RANLIB_NULL}'
Set cc_ld_name '{CC_LD_LINK}'
Else If "{host_cc}" =~ /mwc68k/
Set host_alias "m68k-apple-mpw"
Set cc_name '{CC_MWC68K}'
- Set segment_flag '-s {Default}'
+ Set segment_flag '-s '
Set ar_name '{AR_MWLINK68K}'
Set ranlib_name '{RANLIB_NULL}'
Set cc_ld_name '{CC_LD_MWLINK68K}'
Else If "{host_cc}" =~ /gcc68k/
Set host_alias "m68k-apple-mpw"
Set cc_name '{CC_68K_GCC}'
- Set segment_flag '-s {Default}'
+ Set segment_flag '-s '
Set ar_name '{AR_68K_AR}'
Set ranlib_name '{RANLIB_RANLIB}'
Set cc_ld_name '{CC_68K_GCC}'
Else If "{host_cc}" =~ /ppcc/
Set host_alias "powerpc-apple-mpw"
Set cc_name '{CC_PPCC}'
- Set segment_flag ''
+ Set segment_flag '-d ___s_e_g___='
Set ar_name '{AR_PPCLINK}'
Set ranlib_name '{RANLIB_NULL}'
Set cc_ld_name '{CC_LD_PPCLINK}'
Else If "{host_cc}" =~ /mrc/
Set host_alias "powerpc-apple-mpw"
Set cc_name '{CC_MRC}'
- Set segment_flag ''
+ Set segment_flag '-d ___s_e_g___='
Set ar_name '{AR_PPCLINK}'
Set ranlib_name '{RANLIB_NULL}'
Set cc_ld_name '{CC_LD_PPCLINK}'
Else If "{host_cc}" =~ /scppc/
Set host_alias "powerpc-apple-mpw"
Set cc_name '{CC_SC}'
- Set segment_flag ''
+ Set segment_flag '-d ___s_e_g___='
Set ar_name '{AR_PPCLINK}'
Set ranlib_name '{RANLIB_NULL}'
Set cc_ld_name '{CC_LD_PPCLINK}'
Else If "{host_cc}" =~ /mwcppc/
Set host_alias "powerpc-apple-mpw"
Set cc_name '{CC_MWCPPC}'
- Set segment_flag ''
+ Set segment_flag '-d ___s_e_g___='
Set ar_name '{AR_MWLINKPPC}'
Set ranlib_name '{RANLIB_NULL}'
Set cc_ld_name '{CC_LD_MWLINKPPC}'
Else If "{host_cc}" =~ /gccppc/
Set host_alias "powerpc-apple-mpw"
Set cc_name '{CC_PPC_GCC}'
- Set segment_flag ''
+ Set segment_flag '-d ___s_e_g___='
Set ar_name '{AR_PPCLINK}'
- Set ranlib_name '{RANLIB_RANLIB}'
If {with_gnu_ld} == 1
+ Set ranlib_name '{RANLIB_RANLIB}'
Set cc_ld_name '{CC_LD_GLD}'
Else
+ Set ranlib_name '{RANLIB_NULL}'
Set cc_ld_name '{CC_LD_PPCLINK}'
End If
Set prog_ext_name '{PROG_EXT_XCOFF}'
Echo "{host_cc}" is not a known MPW compiler type
End If
+Set dash_c_flag ''
+If "{host_cc}" =~ /gcc68k/
+ Set dash_c_flag '-c'
+Else If "{host_cc}" =~ /gccppc/
+ Set dash_c_flag '-c'
+End If
+
# (should interpret aliases if not in canonical form)
Set host_canonical "{host_alias}"
# dependencies on config.status.
Echo "# This directory was configured as follows:" >config.new
-Echo "{ThisScript} --host {host_alias} --target {target_alias} --srcdir {srcdir} --srcroot {srcroot} --prefix {prefix} --cc {host_cc}" >>config.new
+Echo "{ThisScript} --host {host_alias} --target {target_alias} --srcdir {srcdir} --srcroot {srcroot} --prefix {prefix} --cc {host_cc} {verifystr} {enable_options} {disable_options}" >>config.new
MoveIfChange config.new config.status
If "`Exists "{srcdir}"mpw-config.in`" != ""
Echo "srcdir = " {srcdir} >> "{objdir}"Makefile.tem
Echo "mpw_prefix = " {prefix} >> "{objdir}"Makefile.tem
Echo "mpw_exec_prefix = " {exec_prefix} >> "{objdir}"Makefile.tem
+Echo "mpw_bindir = " {bindir} >> "{objdir}"Makefile.tem
Echo "host_alias = " {host_alias} >> "{objdir}"Makefile.tem
Echo "target_alias = " {target_alias} >> "{objdir}"Makefile.tem
Echo "target_cpu = " {target_cpu} >> "{objdir}"Makefile.tem
Echo "MAKEPEF = " {makepef_name} >> "{objdir}"Makefile.tem
Echo "REZ = " {rez_name} >> "{objdir}"Makefile.tem
+If {host_cc} =~ /gccppc/
+ Echo -n "dq =\Option-d\Option-d\Option-d" > "{objdir}"Makefile.tem0
+ Echo '"' >> "{objdir}"Makefile.tem0
+ tr-7to8 "{objdir}"Makefile.tem0 >>"{objdir}"Makefile.tem
+Else
+ Echo -n "dq ='" >> "{objdir}"Makefile.tem
+ Echo -n '"' >> "{objdir}"Makefile.tem
+ Echo "'" >> "{objdir}"Makefile.tem
+End If
+
# Append the master set of definitions for the various compilers.
If "`Exists "{srcdir}"config:mpw-mh-mpw`" != ""
Else
Set MakefileIn "{srcdir}"Makefile.in
End If
- If "`Exists "{srcroot}"utils:mpw:g-mpw-make.sed`" != ""
+ # Find the generic makefile editing script.
+ If "`Exists "{srcroot}"config:mpw:g-mpw-make.sed`" != ""
+ sed -f "{srcroot}"config:mpw:g-mpw-make.sed "{MakefileIn}" >"{objdir}"Makefile.tem1
+ Else If "`Exists "{srcroot}"utils:mpw:g-mpw-make.sed`" != ""
sed -f "{srcroot}"utils:mpw:g-mpw-make.sed "{MakefileIn}" >"{objdir}"Makefile.tem1
+ Else If "`Exists "{srcdir}"g-mpw-make.sed`" != ""
+ sed -f "{srcdir}"g-mpw-make.sed "{MakefileIn}" >"{objdir}"Makefile.tem1
Else
+ Echo Warning: g-mpw-make.sed not found, copying "{MakefileIn}" verbatim...
Catenate "{MakefileIn}" >"{objdir}"Makefile.tem1
End If
sed -f "{srcdir}"mpw-make.sed "{objdir}"Makefile.tem1 >"{objdir}"Makefile.tem2
- sed -e 's/^prefix = .*$/prefix = {mpw_prefix}/g' -e 's/^exec_prefix = .*$/exec_prefix = {mpw_exec_prefix}/g' "{objdir}"Makefile.tem2 >"{objdir}"Makefile.tem3
- sed -e "s/@SEGMENT_FLAG@/{segment_flag}/" "{objdir}"Makefile.tem3 >"{objdir}"mpw-make.in
+ sed -e 's/^prefix = .*$/prefix = {mpw_prefix}/g' -e 's/^exec_prefix = .*$/exec_prefix = {mpw_exec_prefix}/g' -e 's/^bindir = @bindir@/bindir = {mpw_bindir}/g' "{objdir}"Makefile.tem2 >"{objdir}"Makefile.tem3
+ sed -e "s/@DASH_C_FLAG@/{dash_c_flag}/" -e "s/@SEGMENT_FLAG(\([^)]*\))@/{segment_flag}\1/" "{objdir}"Makefile.tem3 >"{objdir}"mpw-make.in
tr-7to8 "{objdir}"mpw-make.in >>"{objdir}"Makefile.tem
If "`Exists "{objdir}"mk.sed`" != ""
sed -f "{objdir}"mk.sed "{objdir}"Makefile.tem >"{objdir}"Makefile.tem2
End If
Else If "`Exists "{srcdir}"mpw-make.in`" != ""
sed -e 's/^prefix = .*$/prefix = {mpw_prefix}/g' "{srcdir}"mpw-make.in >"{objdir}"Makefile.tem1
- sed -e "s/@SEGMENT_FLAG@/{segment_flag}/" "{objdir}"Makefile.tem1 >"{objdir}"Makefile.tem2
+ sed -e "s/@DASH_C_FLAG@/{dash_c_flag}/" -e "s/@SEGMENT_FLAG(\([^)]*\))@/{segment_flag}}\1/" "{objdir}"Makefile.tem1 >"{objdir}"Makefile.tem2
tr-7to8 "{objdir}"Makefile.tem2 >>"{objdir}"Makefile.tem
If "`Exists "{objdir}"mk.sed`" != ""
sed -f "{objdir}"mk.sed "{objdir}"Makefile.tem >"{objdir}"Makefile.tem2
For subdir In {configdirs}
Set savedir "`Directory`"
If "`Exists "{srcdir}{subdir}:"`" == ""
- Echo Strange, no {subdir} in {srcdir}
+ If {verify} == 1
+ Echo No "{srcdir}{subdir}:" found, skipping
+ End If
Continue
End If
If {verify} == 1
NewFolder "{objdir}{subdir}"
End If
SetDirectory "{objdir}{subdir}:"
- "{ThisScript}" --target "{target_canonical}" --srcdir "{srcdir}{subdir}:" --srcroot "{srcroot}" --prefix "{prefix}" --cc "{host_cc}" {verifystr}
+ "{ThisScript}" --target "{target_canonical}" --srcdir "{srcdir}{subdir}:" --srcroot "{srcroot}" --prefix "{prefix}" --cc "{host_cc}" {verifystr} {enable_options} {disable_options}
SetDirectory "{savedir}"
End For
+Tue Sep 3 12:09:46 1996 Doug Evans <dje@canuck.cygnus.com>
+
+ * sparc-opc.c (sparc_opcodes): Add setuw, setsw, setx.
+
+Mon Aug 19 15:21:38 1996 Doug Evans <dje@canuck.cygnus.com>
+
+ * sparc-dis.c (print_insn_sparc): Handle little endian sparcs.
+
+Thu Aug 15 13:11:13 1996 Stan Shebs <shebs@andros.cygnus.com>
+
+ * mpw-make.sed: Update editing of include pathnames to be
+ more general.
+
+Thu Aug 15 16:28:41 1996 James G. Smith <jsmith@cygnus.co.uk>
+
+ * arm-opc.h: Added "bx" instruction definition.
+
+Wed Aug 14 17:00:04 1996 Richard Henderson <rth@tamu.edu>
+
+ * alpha-opc.c (EV4EXTHWINDEX): Field width should be 8 not 5.
+
+Thu Aug 8 12:43:52 1996 Klaus Kaempf <kkaempf@progis.de>
+
+ * makefile.vms: Update for alpha-opc changes.
+
+Wed Aug 7 11:55:10 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * i386-dis.c (print_insn_i386): Actually return the correct value.
+ (ONE, OP_ONE): #ifdef out; not used.
+
+Wed Jul 31 16:21:41 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * m68k-opc.c: Add cpushl for the mcf5200. From Ken Rose
+ <rose@netcom.com>.
+
+Wed Jul 31 14:39:27 1996 James G. Smith <jsmith@cygnus.co.uk>
+
+ * arm-opc.h: (arm_opcodes): Added halfword and sign-extension
+ memory transfer instructions. Add new format string entries %h and %s.
+ * arm-dis.c: (print_insn_arm): Provide decoding of the new
+ formats %h and %s.
+
+Fri Jul 26 14:01:43 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * alpha-dis.c (print_insn_alpha_osf): Remove.
+ (print_insn_alpha_vms): Remove.
+ (print_insn_alpha): Make globally visible. Chose the register
+ names based on info->flavour.
+ * disassemble.c: Always return print_insn_alpha for the alpha.
+
+Mon Jul 22 15:38:53 1996 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
+
+ * m68k-opc.c (m68k_opcodes): Make opcode masks for the ColdFire
+ move ccr/sr insns more strict so that the disassembler only
+ selects them when the addressing mode is data register.
+
+Mon Jul 22 13:47:23 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * sparc-opc.c: Fix opcode values for fpack16, and fpackfix. Fix
+ operands for fexpand and fpmerge. From Christian Kuehnke
+ <Christian.Kuehnke@arbi.informatik.uni-oldenburg.de>.
+
+Mon Jul 22 13:17:06 1996 Richard Henderson <rth@tamu.edu>
+
+ * alpha-dis.c (print_insn_alpha): No longer the user-visible
+ print routine. Take new regnames and cpumask arguments.
+ Kill the environment variable nonsense.
+ (print_insn_alpha_osf): New function. Do OSF/1 style regnames.
+ (print_insn_alpha_vms): New function. Do VMS style regnames.
+ * disassemble.c (disassembler): Test bfd flavour to pick
+ between OSF and VMS routines. Default to OSF.
+
+Thu Jul 18 17:19:34 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * configure.in: Call AC_SUBST (INSTALL_SHLIB).
+ * configure: Rebuild.
+ * Makefile.in (install): Use @INSTALL_SHLIB@.
+
+Wed Jul 17 10:12:05 1996 J.T. Conklin <jtc@rtl.cygnus.com>
+
+ * m68k-opc.c (m68k_opcodes): Fix bugs in coldfire insns relating
+ to bcc, trapfl, subxl, and wddata discovered by Andreas Schwab.
+
+Mon Jul 15 16:59:55 1996 Stu Grossman (grossman@critters.cygnus.com)
+
+ * i386-dis.c: Get rid of print_insn_i8086. Use info.mach to
+ distinguish between variants of the instruction set.
+ * sparc-dis.c: Get rid of print_insn_sparclite. Use info.mach to
+ distinguish between variants of the instruction set.
+
+Fri Jul 12 10:12:01 1996 Stu Grossman (grossman@critters.cygnus.com)
+
+ * i386-dis.c (print_insn_i8086): New routine to disassemble using
+ the 8086 instruction set.
+ * i386-dis.c: General cleanups. Make most things static. Add
+ prototypes. Get rid of static variables aflags and dflags. Pass
+ them as args (to almost everything).
+
+Thu Jul 11 11:58:44 1996 Jeffrey A Law (law@cygnus.com)
+
+ * h8300-dis.c (bfd_h8_disassemble): Handle macregs in ldmac insns.
+
+ * h8300-dis.c (bfd_h8_disassemble): Handle "ldm.l" and "stm.l".
+
+ * h8300-dis.c (bfd_h8_disassemble): "abs" is implicitly two
+ if the next arg is marked with SRC_IN_DST. Gross.
+
+ * h8300-dis.c (bfd_h8_disassemble): Print "exr" when
+ we're looking for and find EXR.
+
+ * h8300-dis.c (bfd_h8_disassemble): We don't have a match
+ if we're looking for KBIT and we don't find it.
+
+ * h8300-dis.c (bfd_h8_disassemble): Mask off unwanted bits
+ for L_3 and L_2.
+
+ * h8300-dis.c (bfd_h8_disassemble): Don't set plen for
+ 3bit immediate operands.
+
+Tue Jul 9 10:55:20 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * Released binutils 2.7.
+
+ * alpha-opc.c: Add new case of "mov". From Klaus Kaempf
+ <kkaempf@progis.ac-net.de>.
+
+Thu Jul 4 11:42:51 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * alpha-opc.c: Correct second case of "mov" to use OPRL.
+
+Wed Jul 3 16:03:47 1996 Stu Grossman (grossman@critters.cygnus.com)
+
+ * sparc-dis.c (print_insn_sparclite): New routine to print
+ sparclite instructions.
+
+Wed Jul 3 14:21:18 1996 J.T. Conklin <jtc@rtl.cygnus.com>
+
+ * m68k-opc.c (m68k_opcodes): Add coldfire support.
+
+Fri Jun 28 15:53:51 1996 Doug Evans <dje@canuck.cygnus.com>
+
+ * sparc-opc.c (asi_table): Add #ASI_N, #ASI_N_L, #ASI_NUCLEUS,
+ #ASI_NUCLEUS_LITTLE. Rename #ASI_AS_IF_USER_{PRIMARY,SECONDARY}_L
+ to #ASI_AS_IF_USER_{PRIMARY,SECONDARY}_LITTLE.
+
+Tue Jun 25 22:58:31 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
+
+ * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir):
+ Use autoconf-set values.
+ (docdir, oldincludedir): Removed.
+ * configure.in (AC_PREREQ): autoconf 2.5 or higher.
+
+Fri Jun 21 13:53:36 1996 Richard Henderson <rth@tamu.edu>
+
+ * alpha-opc.c: New file.
+ * alpha-opc.h: Remove.
+ * alpha-dis.c: Complete rewrite to use new opcode table.
+ * configure.in: For bfd_alpha_arch, use alpha-opc.o.
+ * configure: Rebuild with autoconf 2.10.
+ * Makefile.in (ALL_MACHINES): Add alpha-opc.o.
+ (alpha-dis.o): Depend upon $(INCDIR)/opcode/alpha.h, not
+ alpha-opc.h.
+ (alpha-opc.o): New target.
+
+Wed Jun 19 15:55:12 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * sparc-dis.c (print_insn_sparc): Remove unused local variable i.
+ Set imm_added_to_rs1 even if the source and destination register
+ are not the same.
+
+ * sparc-opc.c: Add some two operand forms of the wr instruction.
+
+Tue Jun 18 15:58:27 1996 Jeffrey A. Law <law@rtl.cygnus.com>
+
+ * h8300-dis.c (bfd_h8_disassemble): Rename "hmode" argument
+ to just "mode".
+
+ * disassemble.c (disassembler): Handle H8/S.
+ * h8300-dis.c (print_insn_h8300s): New function for H8/S.
+
+Tue Jun 18 18:06:50 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * sparc-opc.c: Add beq/teq as aliases for be/te.
+
+ * ppc-opc.c: Fix fcmpo opcode. From Sergei Steshenko
+ <sergei@msil.sps.mot.com>.
+
+Tue Jun 18 15:08:54 1996 Klaus Kaempf <kkaempf@progis.de>
+
+ * makefile.vms: New file.
+
+ * alpha-dis.c (print_insn_alpha): Print lda ra,lit(rz) as mov.
+
+Mon Jun 10 18:50:38 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * h8300-dis.c (bfd_h8_disassemble): Always print ABS8MEM with :8,
+ regardless of plen.
+
Tue Jun 4 09:15:53 1996 Doug Evans <dje@canuck.cygnus.com>
* i386-dis.c (OP_OFF): Call append_prefix.
# Makefile template for Configure for the opcodes library.
-# Copyright (C) 1990, 1991, 1992, 1995 Free Software Foundation, Inc.
+# Copyright (C) 1990, 91, 92, 93, 94, 95, 1996
+# Free Software Foundation, Inc.
# Written by Cygnus Support.
#
# This program is free software; you can redistribute it and/or modify
program_transform_name = @program_transform_name@
exec_prefix = @exec_prefix@
-bindir = $(exec_prefix)/bin
-libdir = $(exec_prefix)/lib
+bindir = @bindir@
+libdir = @libdir@
-datadir = $(prefix)/lib
-mandir = $(prefix)/man
+datadir = @datadir@
+mandir = @mandir@
man1dir = $(mandir)/man1
man2dir = $(mandir)/man2
man3dir = $(mandir)/man3
man7dir = $(mandir)/man7
man8dir = $(mandir)/man8
man9dir = $(mandir)/man9
-infodir = $(prefix)/info
-includedir = $(prefix)/include
-oldincludedir =
-docdir = $(srcdir)/doc
+infodir = @infodir@
+includedir = @includedir@
SHELL = /bin/sh
# To circumvent a Sun make VPATH bug, each file listed here
# should also have a foo.o: foo.c line further along in this file.
-ALL_MACHINES = a29k-dis.o alpha-dis.o h8300-dis.o h8500-dis.o \
+ALL_MACHINES = a29k-dis.o alpha-dis.o alpha-opc.o h8300-dis.o h8500-dis.o \
hppa-dis.o i386-dis.o i960-dis.o m68k-dis.o m68k-opc.o \
m88k-dis.o mips-dis.o mips-opc.o sh-dis.o sparc-dis.o \
sparc-opc.o z8k-dis.o ns32k-dis.o ppc-dis.o ppc-opc.o \
z8k-dis.o: z8k-dis.c z8k-opc.h $(INCDIR)/dis-asm.h
ns32k-dis.o: ns32k-dis.c $(INCDIR)/dis-asm.h $(INCDIR)/opcode/ns32k.h
sh-dis.o: sh-dis.c sh-opc.h $(INCDIR)/dis-asm.h
-alpha-dis.o: alpha-dis.c alpha-opc.h $(INCDIR)/dis-asm.h
+alpha-dis.o: alpha-dis.c $(INCDIR)/dis-asm.h $(INCDIR)/opcode/alpha.h
+alpha-opc.o: alpha-opc.c $(INCDIR)/dis-asm.h $(INCDIR)/opcode/alpha.h
hppa-dis.o: hppa-dis.c $(INCDIR)/dis-asm.h $(INCDIR)/opcode/hppa.h
m88k-dis.o: m88k-dis.c $(INCDIR)/dis-asm.h $(INCDIR)/opcode/m88k.h
arm-dis.o: arm-dis.c arm-opc.h $(INCDIR)/dis-asm.h
ts=lib`echo $(SHLIB) | sed -e 's,^\.\./bfd/,,' -e 's/^lib//' | sed '$(program_transform_name)'`; \
ln -sf $$ts $(libdir)/$$tf; \
elif [ "$$f" = "$(SHLIB)" ]; then \
- $(INSTALL_PROGRAM) $$f $(libdir)/$$tf; \
+ @INSTALL_SHLIB@ \
else \
$(INSTALL_DATA) $$f $(libdir)/$$tf; \
$(RANLIB) $(libdir)/$$tf; \
-/* Instruction printing code for the Alpha
- Copyright (C) 1993, 1995 Free Software Foundation, Inc.
- Contributed by Cygnus Support.
-
-Written by Steve Chamberlain (sac@cygnus.com)
-
-This file is part of libopcodes.
-
-This program is free software; you can redistribute it and/or modify it under
-the terms of the GNU General Public License as published by the Free
-Software Foundation; either version 2 of the License, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful, but WITHOUT
-ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
-more details.
-
-You should have received a copy of the GNU General Public License along with
-This program; if not, write to the Free Software Foundation, Inc., 675
- Mass Ave, Boston, MA 02111-1307, USA.
-*/
-
+/* alpha-dis.c -- Disassemble Alpha AXP instructions
+ Copyright 1996 Free Software Foundation, Inc.
+ Contributed by Richard Henderson <rth@tamu.edu>,
+ patterned after the PPC opcode handling written by Ian Lance Taylor.
+
+This file is part of GDB, GAS, and the GNU binutils.
+
+GDB, GAS, and the GNU binutils are free software; you can redistribute
+them and/or modify them under the terms of the GNU General Public
+License as published by the Free Software Foundation; either version
+2, or (at your option) any later version.
+
+GDB, GAS, and the GNU binutils are distributed in the hope that they
+will be useful, but WITHOUT ANY WARRANTY; without even the implied
+warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
+the GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this file; see the file COPYING. If not, write to the Free
+Software Foundation, 59 Temple Place - Suite 330, Boston, MA
+02111-1307, USA. */
+
+#include <stdlib.h>
+#include <stdio.h>
+#include "ansidecl.h"
+#include "sysdep.h"
#include "dis-asm.h"
-#define DEFINE_TABLE
-#include "alpha-opc.h"
+#include "opcode/alpha.h"
+/* OSF register names. */
-/* Print one instruction from PC on INFO->STREAM.
- Return the size of the instruction (always 4 on alpha). */
+static const char * const osf_regnames[64] =
+{
+ "v0", "t0", "t1", "t2", "t3", "t4", "t5", "t6",
+ "t7", "s0", "s1", "s2", "s3", "s4", "s5", "fp",
+ "a0", "a1", "a2", "a3", "a4", "a5", "t8", "t9",
+ "t10", "t11", "ra", "t12", "at", "gp", "sp", "zero",
+ "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7",
+ "$f8", "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15",
+ "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23",
+ "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31"
+};
+
+/* VMS register names. */
+
+static const char * const vms_regnames[64] =
+{
+ "R0", "R1", "R2", "R3", "R4", "R5", "R6", "R7",
+ "R8", "R9", "R10", "R11", "R12", "R13", "R14", "R15",
+ "R16", "R17", "R18", "R19", "R20", "R21", "R22", "R23",
+ "R24", "AI", "RA", "PV", "AT", "FP", "SP", "RZ",
+ "F0", "F1", "F2", "F3", "F4", "F5", "F6", "F7",
+ "F8", "F9", "F10", "F11", "F12", "F13", "F14", "F15",
+ "F16", "F17", "F18", "F19", "F20", "F21", "F22", "F23",
+ "F24", "F25", "F26", "F27", "F28", "F29", "F30", "FZ"
+};
+
+/* Disassemble Alpha instructions. */
int
-print_insn_alpha(pc, info)
- bfd_vma pc;
+print_insn_alpha (memaddr, info)
+ bfd_vma memaddr;
struct disassemble_info *info;
{
- alpha_insn *insn;
- unsigned char b[4];
- void *stream = info->stream;
- fprintf_ftype func = info->fprintf_func;
- unsigned long given;
- int status ;
- int found = 0;
-
- status = (*info->read_memory_func) (pc, (bfd_byte *) &b[0], 4, info);
- if (status != 0) {
- (*info->memory_error_func) (status, pc, info);
- return -1;
- }
- given = (b[0]) | (b[1] << 8) | (b[2] << 16) | (b[3] << 24);
-
- func (stream, "\t%08x\t", given);
-
- for (insn = alpha_insn_set;
- insn->name && !found;
- insn++)
+ static const struct alpha_opcode *opcode_index[AXP_NOPS+1];
+ const char * const * regnames;
+ const struct alpha_opcode *opcode, *opcode_end;
+ const unsigned char *opindex;
+ unsigned insn, op;
+ int need_comma;
+
+ /* Initialize the majorop table the first time through */
+ if (!opcode_index[0])
{
- switch (insn->type)
- {
- case MEMORY_FORMAT_CODE:
- if ((insn->i & MEMORY_FORMAT_MASK)
- ==(given & MEMORY_FORMAT_MASK))
- {
- func (stream, "%s\t%s, %d(%s)",
- insn->name,
- alpha_regs[RA(given)],
- OPCODE (given) == 9 ? DISP(given) * 65536 : DISP(given),
- alpha_regs[RB(given)]);
- found = 1;
- }
- break;
-
-
- case MEMORY_FUNCTION_FORMAT_CODE:
- if ((insn->i & MEMORY_FUNCTION_FORMAT_MASK)
- ==(given & MEMORY_FUNCTION_FORMAT_MASK))
- {
- switch (given & 0xffff)
- {
- case 0x8000: /* fetch */
- case 0xa000: /* fetch_m */
- func (stream, "%s\t(%s)", insn->name, alpha_regs[RB(given)]);
- break;
-
- case 0xc000: /* rpcc */
- func (stream, "%s\t%s", insn->name, alpha_regs[RA(given)]);
- break;
-
- default:
- func (stream, "%s", insn->name);
- break;
- }
- found = 1;
- }
- break;
-
- case BRANCH_FORMAT_CODE:
- if ((insn->i & BRANCH_FORMAT_MASK)
- == (given & BRANCH_FORMAT_MASK))
- {
- if (RA(given) == 31)
- func (stream, "%s\t ", insn->name);
- else
- func (stream, "%s\t%s, ", insn->name,
- alpha_regs[RA(given)]);
- (*info->print_address_func) (BDISP(given) * 4 + pc + 4, info);
- found = 1;
- }
- break;
-
- case MEMORY_BRANCH_FORMAT_CODE:
- if ((insn->i & MEMORY_BRANCH_FORMAT_MASK)
- == (given & MEMORY_BRANCH_FORMAT_MASK))
- {
- if (given & (1<<15))
- {
- func (stream, "%s\t%s, (%s), %d", insn->name,
- alpha_regs[RA(given)],
- alpha_regs[RB(given)],
- JUMP_HINT(given));
- }
- else
- {
- /* The displacement is a hint only, do not put out
- a symbolic address. */
- func (stream, "%s\t%s, (%s), 0x%lx", insn->name,
- alpha_regs[RA(given)],
- alpha_regs[RB(given)],
- JDISP(given) * 4 + pc + 4);
- }
- found = 1;
- }
- break;
+ opcode = alpha_opcodes;
+ opcode_end = opcode + alpha_num_opcodes;
+
+ for (op = 0; op < AXP_NOPS; ++op)
+ {
+ opcode_index[op] = opcode;
+ while (opcode < opcode_end && op == AXP_OP (opcode->opcode))
+ ++opcode;
+ }
+ opcode_index[op] = opcode;
+ }
- case OPERATE_FORMAT_CODE:
- if ((insn->i & OPERATE_FORMAT_MASK)
- == (given & OPERATE_FORMAT_MASK))
- {
- int opcode = OPCODE(given);
- int optype = OP_OPTYPE(given);
- if (OP_OPTYPE(insn->i) == optype)
- {
- int ra;
- ra = RA(given);
+ if (info->flavour == bfd_target_evax_flavour)
+ regnames = vms_regnames;
+ else
+ regnames = osf_regnames;
- if (OP_IS_CONSTANT(given))
- {
- if ((opcode == 0x11) && (optype == 0x20)
- && (ra == 31)) /* bis R31, lit, Ry */
- {
- func (stream, "mov\t0x%x, %s",
- LITERAL(given), alpha_regs[RC(given)] );
- }
- else
- {
-#if GNU_ASMCODE
- func (stream, "%s\t%s, 0x%x, %s", insn->name,
- alpha_regs[RA(given)],
- LITERAL(given),
- alpha_regs[RC(given)]);
-#else
- func (stream, "%s\t%s, #%d, %s", insn->name,
- alpha_regs[RA(given)],
- LITERAL(given),
- alpha_regs[RC(given)]);
- }
-#endif
- } else { /* not constant */
- int rb, rc;
- rb = RB(given); rc = RC(given);
- switch ((opcode << 8) | optype)
- {
- case 0x1009: /* subl */
- if (ra == 31)
- {
- func (stream, "negl\t%s, %s",
- alpha_regs[rb], alpha_regs[rc]);
- found = 1;
- }
- break;
- case 0x1029: /* subq */
- if (ra == 31)
- {
- func (stream, "negq\t%s, %s",
- alpha_regs[rb], alpha_regs[rc]);
- found = 1;
- }
- break;
- case 0x1120: /* bis */
- if (ra == 31)
- {
- if (ra == rb) /* ra=R31, rb=R31 */
- {
- if (rc == 31)
- func (stream, "nop");
- else
- func (stream, "clr\t%s", alpha_regs[rc]);
- }
- else
- func (stream, "mov\t%s, %s",
- alpha_regs[rb], alpha_regs[rc]);
- }
- else
- func (stream, "or\t%s, %s, %s",
- alpha_regs[ra], alpha_regs[rb],
- alpha_regs[rc]);
- found = 1;
- break;
+ /* Read the insn into a host word */
+ {
+ bfd_byte buffer[4];
+ int status = (*info->read_memory_func) (memaddr, buffer, 4, info);
+ if (status != 0)
+ {
+ (*info->memory_error_func) (status, memaddr, info);
+ return -1;
+ }
+ insn = bfd_getl32 (buffer);
+ }
- default:
- break;
+ /* Get the major opcode of the instruction. */
+ op = AXP_OP (insn);
- }
+ /* Find the first match in the opcode table. */
+ opcode_end = opcode_index[op+1];
+ for (opcode = opcode_index[op]; opcode < opcode_end; ++opcode)
+ {
+ if ((insn & opcode->mask) != opcode->opcode)
+ continue;
- if (!found)
- func (stream, "%s\t%s, %s, %s", insn->name,
- alpha_regs[ra], alpha_regs[rb], alpha_regs[rc]);
- }
- found = 1;
- }
- }
+ if (!(opcode->flags & AXP_OPCODE_ALL))
+ continue;
- break;
+ /* Make two passes over the operands. First see if any of them
+ have extraction functions, and, if they do, make sure the
+ instruction is valid. */
+ {
+ int invalid = 0;
+ for (opindex = opcode->operands; *opindex != 0; opindex++)
+ {
+ const struct alpha_operand *operand = alpha_operands + *opindex;
+ if (operand->extract)
+ (*operand->extract) (insn, &invalid);
+ }
+ if (invalid)
+ continue;
+ }
- case FLOAT_FORMAT_CODE:
- if ((insn->i & FLOAT_FORMAT_MASK)
- == (given & FLOAT_FORMAT_MASK))
- {
- int ra, rb, rc;
- ra = RA(given); rb = RB(given); rc = RC(given);
- switch (OP_OPTYPE(given))
- {
- case 0x20: /* cpys */
- if (ra == 31)
- {
- if (rb == 31)
- {
- if (rc == 31)
- func (stream, "fnop");
- else
- func (stream, "fclr\tf%d", rc);
- }
- else
- func (stream, "fabs\tf%d, f%d", rb, rc);
- found = 1;
- }
- else if (ra == rb)
- {
- func (stream, "fmov\tf%d, f%d", rb, rc);
- found = 1;
- }
- break;
- case 0x21: /* cpysn */
- if (ra == rb)
- {
- func (stream, "fneg\tf%d, f%d", rb, rc);
- found = 1;
- }
- default:
- ;
- }
+ /* The instruction is valid. */
+ goto found;
+ }
- if (!found)
- func (stream, "%s\tf%d, f%d, f%d", insn->name, ra, rb, rc);
+ /* No instruction found */
+ (*info->fprintf_func) (info->stream, ".long %#08x", insn);
+
+ return 4;
- found = 1;
- }
+found:
+ (*info->fprintf_func) (info->stream, "%s", opcode->name);
+ if (opcode->operands[0] != 0)
+ (*info->fprintf_func) (info->stream, "\t");
- break;
- case PAL_FORMAT_CODE:
- if (insn->i == given)
+ /* Now extract and print the operands. */
+ need_comma = 0;
+ for (opindex = opcode->operands; *opindex != 0; opindex++)
+ {
+ const struct alpha_operand *operand = alpha_operands + *opindex;
+ int value;
+
+ /* Operands that are marked FAKE are simply ignored. We
+ already made sure that the extract function considered
+ the instruction to be valid. */
+ if ((operand->flags & AXP_OPERAND_FAKE) != 0)
+ continue;
+
+ /* Extract the value from the instruction. */
+ if (operand->extract)
+ value = (*operand->extract) (insn, (int *) NULL);
+ else
+ {
+ value = (insn >> operand->shift) & ((1 << operand->bits) - 1);
+ if (operand->flags & AXP_OPERAND_SIGNED)
{
- func (stream, "call_pal %s", insn->name);
- found = 1;
+ int signbit = 1 << (operand->bits - 1);
+ value = (value ^ signbit) - signbit;
}
+ }
- break;
- case FLOAT_MEMORY_FORMAT_CODE:
- if ((insn->i & MEMORY_FORMAT_MASK)
- ==(given & MEMORY_FORMAT_MASK))
- {
- func (stream, "%s\tf%d, %d(%s)",
- insn->name,
- RA(given),
- OPCODE (given) == 9 ? DISP(given) * 65536 : DISP(given),
- alpha_regs[RB(given)]);
- found = 1;
- }
- break;
- case FLOAT_BRANCH_FORMAT_CODE:
- if ((insn->i & BRANCH_FORMAT_MASK)
- == (given & BRANCH_FORMAT_MASK))
- {
- func (stream, "%s\tf%d, ",
- insn->name,
- RA(given));
- (*info->print_address_func) (BDISP(given) * 4 + pc + 4, info);
- found = 1;
- }
- break;
+ if (need_comma &&
+ ((operand->flags & (AXP_OPERAND_PARENS|AXP_OPERAND_COMMA))
+ != AXP_OPERAND_PARENS))
+ {
+ (*info->fprintf_func) (info->stream, ",");
}
+ if (operand->flags & AXP_OPERAND_PARENS)
+ (*info->fprintf_func) (info->stream, "(");
+
+ /* Print the operand as directed by the flags. */
+ if (operand->flags & AXP_OPERAND_IR)
+ (*info->fprintf_func) (info->stream, "%s", regnames[value]);
+ else if (operand->flags & AXP_OPERAND_FPR)
+ (*info->fprintf_func) (info->stream, "%s", regnames[value+32]);
+ else if (operand->flags & AXP_OPERAND_RELATIVE)
+ (*info->print_address_func) (memaddr + 4 + value, info);
+ else if (operand->flags & AXP_OPERAND_SIGNED)
+ (*info->fprintf_func) (info->stream, "%d", value);
+ else
+ (*info->fprintf_func) (info->stream, "%#x", value);
+
+ if (operand->flags & AXP_OPERAND_PARENS)
+ (*info->fprintf_func) (info->stream, ")");
+ need_comma = 1;
}
- if (!found)
- switch (OPCODE (given))
- {
- case 0x00:
- func (stream, "call_pal 0x%x", given);
- break;
- case 0x19:
- case 0x1b:
- case 0x1d:
- case 0x1e:
- case 0x1f:
- func (stream, "PAL%X 0x%x", OPCODE (given), given & 0x3ffffff);
- break;
- case 0x01:
- case 0x02:
- case 0x03:
- case 0x04:
- case 0x05:
- case 0x06:
- case 0x07:
- case 0x0a:
- case 0x0c:
- case 0x0d:
- case 0x0e:
- case 0x14:
- case 0x1c:
- func (stream, "OPC%02X 0x%x", OPCODE (given), given & 0x3ffffff);
- break;
- }
-
return 4;
}
#! /bin/sh
# Guess values for system-dependent variables and create Makefiles.
-# Generated automatically using autoconf version 2.8
-# Copyright (C) 1992, 1993, 1994 Free Software Foundation, Inc.
+# Generated automatically using autoconf version 2.10
+# Copyright (C) 1992, 93, 94, 95, 96 Free Software Foundation, Inc.
#
# This configure script is free software; the Free Software Foundation
# gives unlimited permission to copy, distribute and modify it.
verbose=yes ;;
-version | --version | --versio | --versi | --vers)
- echo "configure generated by autoconf version 2.8"
+ echo "configure generated by autoconf version 2.10"
exit 0 ;;
-with-* | --with-*)
+
echo $ac_n "checking how to run the C preprocessor""... $ac_c" 1>&6
# On Suns, sometimes $CPP names a directory.
if test -n "$CPP" && test -d "$CPP"; then
# On the NeXT, cc -E runs the code through the compiler's parser,
# not just through cpp.
cat > conftest.$ac_ext <<EOF
-#line 1049 "configure"
+#line 1050 "configure"
#include "confdefs.h"
#include <assert.h>
Syntax Error
EOF
ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:1055: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
+{ (eval echo configure:1056: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
ac_err=`grep -v '^ *+' conftest.out`
if test -z "$ac_err"; then
:
rm -rf conftest*
CPP="${CC-cc} -E -traditional-cpp"
cat > conftest.$ac_ext <<EOF
-#line 1064 "configure"
+#line 1065 "configure"
#include "confdefs.h"
#include <assert.h>
Syntax Error
EOF
ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:1070: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
+{ (eval echo configure:1071: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
ac_err=`grep -v '^ *+' conftest.out`
if test -z "$ac_err"; then
:
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 1098 "configure"
+#line 1099 "configure"
#include "confdefs.h"
#include <$ac_hdr>
EOF
ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:1103: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
+{ (eval echo configure:1104: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
ac_err=`grep -v '^ *+' conftest.out`
if test -z "$ac_err"; then
rm -rf conftest*
case "$arch" in
bfd_a29k_arch) ta="$ta a29k-dis.o" ;;
bfd_alliant_arch) ;;
- bfd_alpha_arch) ta="$ta alpha-dis.o" ;;
+ bfd_alpha_arch) ta="$ta alpha-dis.o alpha-opc.o" ;;
bfd_arm_arch) ta="$ta arm-dis.o" ;;
bfd_convex_arch) ;;
bfd_h8300_arch) ta="$ta h8300-dis.o" ;;
echo "running \${CONFIG_SHELL-/bin/sh} $0 $ac_configure_args --no-create --no-recursion"
exec \${CONFIG_SHELL-/bin/sh} $0 $ac_configure_args --no-create --no-recursion ;;
-version | --version | --versio | --versi | --vers | --ver | --ve | --v)
- echo "$CONFIG_STATUS generated by autoconf version 2.8"
+ echo "$CONFIG_STATUS generated by autoconf version 2.10"
exit 0 ;;
-help | --help | --hel | --he | --h)
echo "\$ac_cs_usage"; exit 0 ;;
s%@SHLIB_DEP@%$SHLIB_DEP%g
s%@BFD_PICLIST@%$BFD_PICLIST%g
s%@SHLINK@%$SHLINK%g
+s%@INSTALL_SHLIB@%$INSTALL_SHLIB%g
s%@CPP@%$CPP%g
s%@archdefs@%$archdefs%g
s%@BFD_MACHINES@%$BFD_MACHINES%g
cat > conftest.hdr <<\EOF
s/[\\&%]/\\&/g
s%[\\$`]%\\&%g
-s%#define \([A-Za-z_][A-Za-z0-9_]*\) \(.*\)%${ac_dA}\1${ac_dB}\1${ac_dC}\2${ac_dD}%gp
+s%#define \([A-Za-z_][A-Za-z0-9_]*\) *\(.*\)%${ac_dA}\1${ac_dB}\1${ac_dC}\2${ac_dD}%gp
s%ac_d%ac_u%gp
s%ac_u%ac_e%gp
EOF
echo "$ac_file is unchanged"
rm -f conftest.h
else
+ # Remove last slash and all that follows it. Not all systems have dirname.
+ ac_dir=`echo $ac_file|sed 's%/[^/][^/]*$%%'`
+ if test "$ac_dir" != "$ac_file" && test "$ac_dir" != .; then
+ # The file is in a subdirectory.
+ test ! -d "$ac_dir" && mkdir "$ac_dir"
+ fi
rm -f $ac_file
mv conftest.h $ac_file
fi
-AC_PREREQ(2.0)
+AC_PREREQ(2.5)
AC_INIT(z8k-dis.c)
# configure.in script for the opcodes library.
# Copyright (C) 1995, 1996 Free Software Foundation, Inc.
AC_SUBST(SHLIB_DEP)
AC_SUBST(BFD_PICLIST)
AC_SUBST(SHLINK)
+AC_SUBST(INSTALL_SHLIB)
AC_CHECK_HEADERS(string.h strings.h)
case "$arch" in
bfd_a29k_arch) ta="$ta a29k-dis.o" ;;
bfd_alliant_arch) ;;
- bfd_alpha_arch) ta="$ta alpha-dis.o" ;;
+ bfd_alpha_arch) ta="$ta alpha-dis.o alpha-opc.o" ;;
bfd_arm_arch) ta="$ta arm-dis.o" ;;
bfd_convex_arch) ;;
bfd_h8300_arch) ta="$ta h8300-dis.o" ;;
case bfd_arch_h8300:
if (bfd_get_mach(abfd) == bfd_mach_h8300h)
disassemble = print_insn_h8300h;
+ else if (bfd_get_mach(abfd) == bfd_mach_h8300s)
+ disassemble = print_insn_h8300s;
else
disassemble = print_insn_h8300;
break;
unsigned int
-bfd_h8_disassemble (addr, info, hmode)
+bfd_h8_disassemble (addr, info, mode)
bfd_vma addr;
disassemble_info *info;
- int hmode;
+ int mode;
{
/* Find the first entry in the table for this opcode */
static CONST char *regnames[] =
int plen = 0;
static boolean init = 0;
struct h8_opcode *q = h8_opcodes;
- char CONST **pregnames = hmode ? lregnames : wregnames;
+ char CONST **pregnames = mode != 0 ? lregnames : wregnames;
int status;
int l;
case 0:
abs = 1;
break;
+ default:
+ goto fail;
}
}
else if (looking_for & L_8)
}
else if (looking_for & L_3)
{
- plen = 3;
- bit = thisnib;
+ bit = thisnib & 0x7;
}
else if (looking_for & L_2)
{
plen = 2;
- abs = thisnib;
+ abs = thisnib & 0x3;
+ }
+ else if (looking_for & MACREG)
+ {
+ abs = (thisnib == 3);
}
else if (looking_for == E)
{
}
}
fprintf (stream, "%s\t", q->name);
+
+ /* Gross. Disgusting. */
+ if (strcmp (q->name, "ldm.l") == 0)
+ {
+ int count, high;
+
+ count = (data[1] >> 4) & 0x3;
+ high = data[3] & 0x7;
+
+ fprintf (stream, "@sp+,er%d-er%d", high - count, high);
+ return q->length;
+ }
+
+ if (strcmp (q->name, "stm.l") == 0)
+ {
+ int count, low;
+
+ count = (data[1] >> 4) & 0x3;
+ low = data[3] & 0x7;
+
+ fprintf (stream, "er%d-er%d,@-sp", low, low + count);
+ return q->length;
+ }
+
/* Fill in the args */
{
op_type *args = q->args.nib;
}
else if (x & (IMM|KBIT|DBIT))
{
+ /* Bletch. For shal #2,er0 and friends. */
+ if (*(args+1) & SRC_IN_DST)
+ abs = 2;
+
fprintf (stream, "#0x%x", (unsigned) abs);
}
else if (x & REG)
}
}
-
+ else if (x & MACREG)
+ {
+ fprintf (stream, "mac%c", abs ? 'l' : 'h');
+ }
else if (x & INC)
{
fprintf (stream, "@%s+", pregnames[rs]);
fprintf (stream, "@%s", pregnames[rn]);
}
- else if (x & (ABS|ABSJMP|ABS8MEM))
+ else if (x & ABS8MEM)
+ {
+ fprintf (stream, "@0x%x:8", (unsigned) abs);
+ }
+
+ else if (x & (ABS|ABSJMP))
{
fprintf (stream, "@0x%x:%d", (unsigned) abs, plen);
}
else if (x & CCR)
{
-
fprintf (stream, "ccr");
}
+ else if (x & EXR)
+ {
+ fprintf (stream, "exr");
+ }
else
fprintf (stream, "Hmmmm %x", x);
return bfd_h8_disassemble (addr, info , 0);
}
- int
+int
print_insn_h8300h (addr, info)
bfd_vma addr;
disassemble_info *info;
return bfd_h8_disassemble (addr, info , 1);
}
+int
+print_insn_h8300s (addr, info)
+bfd_vma addr;
+disassemble_info *info;
+{
+ return bfd_h8_disassemble (addr, info , 2);
+}
#define Iw OP_I, w_mode
#define Jb OP_J, b_mode
#define Jv OP_J, v_mode
+#if 0
#define ONE OP_ONE, 0
+#endif
#define Cd OP_C, d_mode
#define Dd OP_D, d_mode
#define Td OP_T, d_mode
#define fs OP_REG, fs_reg
#define gs OP_REG, gs_reg
-int OP_E(), OP_indirE(), OP_G(), OP_I(), OP_sI(), OP_REG();
-int OP_J(), OP_SEG();
-int OP_DIR(), OP_OFF(), OP_DSSI(), OP_ESDI(), OP_ONE(), OP_C();
-int OP_D(), OP_T(), OP_rm();
+typedef int op_rtn PARAMS ((int bytemode, int aflag, int dflag));
-static void dofloat (), putop (), append_prefix (), set_op ();
-static int get16 (), get32 ();
+static op_rtn OP_E, OP_G, OP_I, OP_indirE, OP_sI, OP_REG, OP_J, OP_DIR, OP_OFF;
+static op_rtn OP_ESDI, OP_DSSI, OP_SEG, OP_C, OP_D, OP_T, OP_rm, OP_ST;
+static op_rtn OP_STi;
+#if 0
+static op_rtn OP_ONE;
+#endif
+
+static void append_prefix PARAMS ((void));
+static void set_op PARAMS ((int op));
+static void putop PARAMS ((char *template, int aflag, int dflag));
+static void dofloat PARAMS ((int aflag, int dflag));
+static int get16 PARAMS ((void));
+static int get32 PARAMS ((void));
+static void ckprefix PARAMS ((void));
#define b_mode 1
#define v_mode 2
struct dis386 {
char *name;
- int (*op1)();
+ op_rtn *op1;
int bytemode1;
- int (*op2)();
+ op_rtn *op2;
int bytemode2;
- int (*op3)();
+ op_rtn *op3;
int bytemode3;
};
-struct dis386 dis386[] = {
+static struct dis386 dis386[] = {
/* 00 */
{ "addb", Eb, Gb },
{ "addS", Ev, Gv },
{ GRP5 },
};
-struct dis386 dis386_twobyte[] = {
+static struct dis386 dis386_twobyte[] = {
/* 00 */
{ GRP6 },
{ GRP7 },
static int mod;
static int rm;
static int reg;
-static void oappend ();
+static void oappend PARAMS ((char *s));
static char *names32[]={
"%eax","%ecx","%edx","%ebx", "%esp","%ebp","%esi","%edi",
"bx+si","bx+di","bp+si","bp+di","si","di","bp","bx"
};
-struct dis386 grps[][8] = {
+static struct dis386 grps[][8] = {
/* GRP1b */
{
{ "addb", Eb, Ib },
}
}
-static int dflag;
-static int aflag;
-
static char op1out[100], op2out[100], op3out[100];
static int op_address[3], op_ad, op_index[3];
static int start_pc;
* The function returns the length of this instruction in bytes.
*/
+int print_insn_x86 PARAMS ((bfd_vma pc, disassemble_info *info, int aflag,
+ int dflag));
int
print_insn_i386 (pc, info)
bfd_vma pc;
disassemble_info *info;
+{
+ if (info->mach == bfd_mach_i386_i386)
+ return print_insn_x86 (pc, info, 1, 1);
+ else if (info->mach == bfd_mach_i386_i8086)
+ return print_insn_x86 (pc, info, 0, 0);
+ else
+ abort ();
+}
+
+int
+print_insn_x86 (pc, info, aflag, dflag)
+ bfd_vma pc;
+ disassemble_info *info;
{
struct dis386 *dp;
int i;
return (1);
}
- /* these would be initialized to 0 if disassembling for 8086 or 286 */
- dflag = 1;
- aflag = 1;
-
if (prefixes & PREFIX_DATA)
dflag ^= 1;
if (dp->name == NULL && dp->bytemode1 == FLOATCODE)
{
- dofloat ();
+ dofloat (aflag, dflag);
}
else
{
if (dp->name == NULL)
dp = &grps[dp->bytemode1][reg];
- putop (dp->name);
+ putop (dp->name, aflag, dflag);
obufp = op1out;
op_ad = 2;
if (dp->op1)
- (*dp->op1)(dp->bytemode1);
+ (*dp->op1)(dp->bytemode1, aflag, dflag);
obufp = op2out;
op_ad = 1;
if (dp->op2)
- (*dp->op2)(dp->bytemode2);
+ (*dp->op2)(dp->bytemode2, aflag, dflag);
obufp = op3out;
op_ad = 0;
if (dp->op3)
- (*dp->op3)(dp->bytemode3);
+ (*dp->op3)(dp->bytemode3, aflag, dflag);
}
obufp = obuf + strlen (obuf);
return (codep - inbuf);
}
-char *float_mem[] = {
+static char *float_mem[] = {
/* d8 */
"fadds",
"fmuls",
#define ST OP_ST, 0
#define STi OP_STi, 0
-int OP_ST(), OP_STi();
#define FGRPd9_2 NULL, NULL, 0
#define FGRPd9_4 NULL, NULL, 1
#define FGRPde_3 NULL, NULL, 7
#define FGRPdf_4 NULL, NULL, 8
-struct dis386 float_reg[][8] = {
+static struct dis386 float_reg[][8] = {
/* d8 */
{
{ "fadd", ST, STi },
};
-char *fgrps[][8] = {
+static char *fgrps[][8] = {
/* d9_2 0 */
{
"fnop","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
};
static void
-dofloat ()
+dofloat (aflag, dflag)
+ int aflag;
+ int dflag;
{
struct dis386 *dp;
unsigned char floatop;
if (mod != 3)
{
- putop (float_mem[(floatop - 0xd8) * 8 + reg]);
+ putop (float_mem[(floatop - 0xd8) * 8 + reg], aflag, dflag);
obufp = op1out;
- OP_E (v_mode);
+ OP_E (v_mode, aflag, dflag);
return;
}
codep++;
dp = &float_reg[floatop - 0xd8][reg];
if (dp->name == NULL)
{
- putop (fgrps[dp->bytemode1][rm]);
+ putop (fgrps[dp->bytemode1][rm], aflag, dflag);
/* instruction fnstsw is only one with strange arg */
if (floatop == 0xdf
&& FETCH_DATA (the_info, codep + 1)
}
else
{
- putop (dp->name);
+ putop (dp->name, aflag, dflag);
obufp = op1out;
if (dp->op1)
- (*dp->op1)(dp->bytemode1);
+ (*dp->op1)(dp->bytemode1, aflag, dflag);
obufp = op2out;
if (dp->op2)
- (*dp->op2)(dp->bytemode2);
+ (*dp->op2)(dp->bytemode2, aflag, dflag);
}
}
/* ARGSUSED */
-int
-OP_ST (ignore)
+static int
+OP_ST (ignore, aflag, dflag)
int ignore;
+ int aflag;
+ int dflag;
{
oappend ("%st");
return (0);
}
/* ARGSUSED */
-int
-OP_STi (ignore)
+static int
+OP_STi (ignore, aflag, dflag)
int ignore;
+ int aflag;
+ int dflag;
{
sprintf (scratchbuf, "%%st(%d)", rm);
oappend (scratchbuf);
/* capital letters in template are macros */
static void
-putop (template)
+putop (template, aflag, dflag)
char *template;
+ int aflag;
+ int dflag;
{
char *p;
oappend ("%gs:");
}
-int
-OP_indirE (bytemode)
+static int
+OP_indirE (bytemode, aflag, dflag)
int bytemode;
+ int aflag;
+ int dflag;
{
oappend ("*");
- return OP_E (bytemode);
+ return OP_E (bytemode, aflag, dflag);
}
-int
-OP_E (bytemode)
+static int
+OP_E (bytemode, aflag, dflag)
int bytemode;
+ int aflag;
+ int dflag;
{
int disp;
return 0;
}
-int
-OP_G (bytemode)
+static int
+OP_G (bytemode, aflag, dflag)
int bytemode;
+ int aflag;
+ int dflag;
{
switch (bytemode)
{
op_address[op_ad] = op;
}
-int
-OP_REG (code)
+static int
+OP_REG (code, aflag, dflag)
int code;
+ int aflag;
+ int dflag;
{
char *s;
return (0);
}
-int
-OP_I (bytemode)
+static int
+OP_I (bytemode, aflag, dflag)
int bytemode;
+ int aflag;
+ int dflag;
{
int op;
return (0);
}
-int
-OP_sI (bytemode)
+static int
+OP_sI (bytemode, aflag, dflag)
int bytemode;
+ int aflag;
+ int dflag;
{
int op;
return (0);
}
-int
-OP_J (bytemode)
+static int
+OP_J (bytemode, aflag, dflag)
int bytemode;
+ int aflag;
+ int dflag;
{
int disp;
int mask = -1;
}
/* ARGSUSED */
-int
-OP_SEG (dummy)
+static int
+OP_SEG (dummy, aflag, dflag)
int dummy;
+ int aflag;
+ int dflag;
{
static char *sreg[] = {
"%es","%cs","%ss","%ds","%fs","%gs","%?","%?",
return (0);
}
-int
-OP_DIR (size)
+static int
+OP_DIR (size, aflag, dflag)
int size;
+ int aflag;
+ int dflag;
{
int seg, offset;
}
/* ARGSUSED */
-int
-OP_OFF (bytemode)
+static int
+OP_OFF (bytemode, aflag, dflag)
int bytemode;
+ int aflag;
+ int dflag;
{
int off;
}
/* ARGSUSED */
-int
-OP_ESDI (dummy)
- int dummy;
+static int
+OP_ESDI (dummy, aflag, dflag)
+ int dummy;
+ int aflag;
+ int dflag;
{
oappend ("%es:(");
oappend (aflag ? "%edi" : "%di");
}
/* ARGSUSED */
-int
-OP_DSSI (dummy)
- int dummy;
+static int
+OP_DSSI (dummy, aflag, dflag)
+ int dummy;
+ int aflag;
+ int dflag;
{
oappend ("%ds:(");
oappend (aflag ? "%esi" : "%si");
return (0);
}
+#if 0
+/* Not used. */
+
/* ARGSUSED */
-int
-OP_ONE (dummy)
- int dummy;
+static int
+OP_ONE (dummy, aflag, dflag)
+ int dummy;
+ int aflag;
+ int dflag;
{
oappend ("1");
return (0);
}
+#endif
+
/* ARGSUSED */
-int
-OP_C (dummy)
- int dummy;
+static int
+OP_C (dummy, aflag, dflag)
+ int dummy;
+ int aflag;
+ int dflag;
{
codep++; /* skip mod/rm */
sprintf (scratchbuf, "%%cr%d", reg);
}
/* ARGSUSED */
-int
-OP_D (dummy)
- int dummy;
+static int
+OP_D (dummy, aflag, dflag)
+ int dummy;
+ int aflag;
+ int dflag;
{
codep++; /* skip mod/rm */
sprintf (scratchbuf, "%%db%d", reg);
}
/* ARGSUSED */
-int
-OP_T (dummy)
+static int
+OP_T (dummy, aflag, dflag)
int dummy;
+ int aflag;
+ int dflag;
{
codep++; /* skip mod/rm */
sprintf (scratchbuf, "%%tr%d", reg);
return (0);
}
-int
-OP_rm (bytemode)
+static int
+OP_rm (bytemode, aflag, dflag)
int bytemode;
+ int aflag;
+ int dflag;
{
switch (bytemode)
{
const struct m68k_opcode m68k_opcodes[] =
{
-{"abcd", one(0140400), one(0170770), "DsDd", m68000up },
-{"abcd", one(0140410), one(0170770), "-s-d", m68000up },
+{"abcd", one(0140400), one(0170770), "DsDd", m68000up },
+{"abcd", one(0140410), one(0170770), "-s-d", m68000up },
-{"addaw", one(0150300), one(0170700), "*wAd", m68000up },
-{"addal", one(0150700), one(0170700), "*lAd", m68000up },
+{"addaw", one(0150300), one(0170700), "*wAd", m68000up },
+{"addal", one(0150700), one(0170700), "*lAd", m68000up | mcf5200 },
-{"addib", one(0003000), one(0177700), "#b$b", m68000up },
-{"addiw", one(0003100), one(0177700), "#w$w", m68000up },
-{"addil", one(0003200), one(0177700), "#l$l", m68000up },
+{"addib", one(0003000), one(0177700), "#b$b", m68000up },
+{"addiw", one(0003100), one(0177700), "#w$w", m68000up },
+{"addil", one(0003200), one(0177700), "#l$l", m68000up | mcf5200 },
-{"addqb", one(0050000), one(0170700), "Qd$b", m68000up },
-{"addqw", one(0050100), one(0170700), "Qd%w", m68000up },
-{"addql", one(0050200), one(0170700), "Qd%l", m68000up },
+{"addqb", one(0050000), one(0170700), "Qd$b", m68000up },
+{"addqw", one(0050100), one(0170700), "Qd%w", m68000up },
+{"addql", one(0050200), one(0170700), "Qd%l", m68000up | mcf5200 },
/* The add opcode can generate the adda, addi, and addq instructions. */
-{"addb", one(0050000), one(0170700), "Qd$b", m68000up },
-{"addb", one(0003000), one(0177700), "#b$b", m68000up },
-{"addb", one(0150000), one(0170700), ";bDd", m68000up },
-{"addb", one(0150400), one(0170700), "Dd~b", m68000up },
-{"addw", one(0050100), one(0170700), "Qd%w", m68000up },
-{"addw", one(0150300), one(0170700), "*wAd", m68000up },
-{"addw", one(0003100), one(0177700), "#w$w", m68000up },
-{"addw", one(0150100), one(0170700), "*wDd", m68000up },
-{"addw", one(0150500), one(0170700), "Dd~w", m68000up },
-{"addl", one(0050200), one(0170700), "Qd%l", m68000up },
-{"addl", one(0003200), one(0177700), "#l$l", m68000up },
-{"addl", one(0150700), one(0170700), "*lAd", m68000up },
-{"addl", one(0150200), one(0170700), "*lDd", m68000up },
-{"addl", one(0150600), one(0170700), "Dd~l", m68000up },
-
-{"addxb", one(0150400), one(0170770), "DsDd", m68000up },
-{"addxb", one(0150410), one(0170770), "-s-d", m68000up },
-{"addxw", one(0150500), one(0170770), "DsDd", m68000up },
-{"addxw", one(0150510), one(0170770), "-s-d", m68000up },
-{"addxl", one(0150600), one(0170770), "DsDd", m68000up },
-{"addxl", one(0150610), one(0170770), "-s-d", m68000up },
-
-{"andib", one(0001000), one(0177700), "#b$b", m68000up },
-{"andib", one(0001074), one(0177777), "#bCb", m68000up },
-{"andiw", one(0001100), one(0177700), "#w$w", m68000up },
-{"andiw", one(0001174), one(0177777), "#wSw", m68000up },
-{"andil", one(0001200), one(0177700), "#l$l", m68000up },
-{"andi", one(0001100), one(0177700), "#w$w", m68000up },
-{"andi", one(0001074), one(0177777), "#bCb", m68000up },
-{"andi", one(0001174), one(0177777), "#wSw", m68000up },
+{"addb", one(0050000), one(0170700), "Qd$b", m68000up },
+{"addb", one(0003000), one(0177700), "#b$b", m68000up },
+{"addb", one(0150000), one(0170700), ";bDd", m68000up },
+{"addb", one(0150400), one(0170700), "Dd~b", m68000up },
+{"addw", one(0050100), one(0170700), "Qd%w", m68000up },
+{"addw", one(0150300), one(0170700), "*wAd", m68000up },
+{"addw", one(0003100), one(0177700), "#w$w", m68000up },
+{"addw", one(0150100), one(0170700), "*wDd", m68000up },
+{"addw", one(0150500), one(0170700), "Dd~w", m68000up },
+{"addl", one(0050200), one(0170700), "Qd%l", m68000up | mcf5200 },
+{"addl", one(0003200), one(0177700), "#l$l", m68000up | mcf5200 },
+{"addl", one(0150700), one(0170700), "*lAd", m68000up | mcf5200 },
+{"addl", one(0150200), one(0170700), "*lDd", m68000up | mcf5200 },
+{"addl", one(0150600), one(0170700), "Dd~l", m68000up | mcf5200 },
+
+{"addxb", one(0150400), one(0170770), "DsDd", m68000up },
+{"addxb", one(0150410), one(0170770), "-s-d", m68000up },
+{"addxw", one(0150500), one(0170770), "DsDd", m68000up },
+{"addxw", one(0150510), one(0170770), "-s-d", m68000up },
+{"addxl", one(0150600), one(0170770), "DsDd", m68000up | mcf5200 },
+{"addxl", one(0150610), one(0170770), "-s-d", m68000up },
+
+{"andib", one(0001000), one(0177700), "#b$b", m68000up },
+{"andib", one(0001074), one(0177777), "#bCb", m68000up },
+{"andiw", one(0001100), one(0177700), "#w$w", m68000up },
+{"andiw", one(0001174), one(0177777), "#wSw", m68000up },
+{"andil", one(0001200), one(0177700), "#l$l", m68000up | mcf5200 },
+{"andi", one(0001100), one(0177700), "#w$w", m68000up },
+{"andi", one(0001074), one(0177777), "#bCb", m68000up },
+{"andi", one(0001174), one(0177777), "#wSw", m68000up },
/* The and opcode can generate the andi instruction. */
-{"andb", one(0001000), one(0177700), "#b$b", m68000up },
-{"andb", one(0001074), one(0177777), "#bCb", m68000up },
-{"andb", one(0140000), one(0170700), ";bDd", m68000up },
-{"andb", one(0140400), one(0170700), "Dd~b", m68000up },
-{"andw", one(0001100), one(0177700), "#w$w", m68000up },
-{"andw", one(0001174), one(0177777), "#wSw", m68000up },
-{"andw", one(0140100), one(0170700), ";wDd", m68000up },
-{"andw", one(0140500), one(0170700), "Dd~w", m68000up },
-{"andl", one(0001200), one(0177700), "#l$l", m68000up },
-{"andl", one(0140200), one(0170700), ";lDd", m68000up },
-{"andl", one(0140600), one(0170700), "Dd~l", m68000up },
-{"and", one(0001100), one(0177700), "#w$w", m68000up },
-{"and", one(0001074), one(0177777), "#bCb", m68000up },
-{"and", one(0001174), one(0177777), "#wSw", m68000up },
-{"and", one(0140100), one(0170700), ";wDd", m68000up },
-{"and", one(0140500), one(0170700), "Dd~w", m68000up },
-
-{"aslb", one(0160400), one(0170770), "QdDs", m68000up },
-{"aslb", one(0160440), one(0170770), "DdDs", m68000up },
-{"aslw", one(0160500), one(0170770), "QdDs", m68000up },
-{"aslw", one(0160540), one(0170770), "DdDs", m68000up },
-{"aslw", one(0160700), one(0177700), "~s", m68000up },
-{"asll", one(0160600), one(0170770), "QdDs", m68000up },
-{"asll", one(0160640), one(0170770), "DdDs", m68000up },
-
-{"asrb", one(0160000), one(0170770), "QdDs", m68000up },
-{"asrb", one(0160040), one(0170770), "DdDs", m68000up },
-{"asrw", one(0160100), one(0170770), "QdDs", m68000up },
-{"asrw", one(0160140), one(0170770), "DdDs", m68000up },
-{"asrw", one(0160300), one(0177700), "~s", m68000up },
-{"asrl", one(0160200), one(0170770), "QdDs", m68000up },
-{"asrl", one(0160240), one(0170770), "DdDs", m68000up },
-
-{"bhiw", one(0061000), one(0177777), "BW", m68000up },
-{"blsw", one(0061400), one(0177777), "BW", m68000up },
-{"bccw", one(0062000), one(0177777), "BW", m68000up },
-{"bcsw", one(0062400), one(0177777), "BW", m68000up },
-{"bnew", one(0063000), one(0177777), "BW", m68000up },
-{"beqw", one(0063400), one(0177777), "BW", m68000up },
-{"bvcw", one(0064000), one(0177777), "BW", m68000up },
-{"bvsw", one(0064400), one(0177777), "BW", m68000up },
-{"bplw", one(0065000), one(0177777), "BW", m68000up },
-{"bmiw", one(0065400), one(0177777), "BW", m68000up },
-{"bgew", one(0066000), one(0177777), "BW", m68000up },
-{"bltw", one(0066400), one(0177777), "BW", m68000up },
-{"bgtw", one(0067000), one(0177777), "BW", m68000up },
-{"blew", one(0067400), one(0177777), "BW", m68000up },
-
-{"bhil", one(0061377), one(0177777), "BL", m68020up | cpu32 },
-{"blsl", one(0061777), one(0177777), "BL", m68020up | cpu32 },
-{"bccl", one(0062377), one(0177777), "BL", m68020up | cpu32 },
-{"bcsl", one(0062777), one(0177777), "BL", m68020up | cpu32 },
-{"bnel", one(0063377), one(0177777), "BL", m68020up | cpu32 },
-{"beql", one(0063777), one(0177777), "BL", m68020up | cpu32 },
-{"bvcl", one(0064377), one(0177777), "BL", m68020up | cpu32 },
-{"bvsl", one(0064777), one(0177777), "BL", m68020up | cpu32 },
-{"bpll", one(0065377), one(0177777), "BL", m68020up | cpu32 },
-{"bmil", one(0065777), one(0177777), "BL", m68020up | cpu32 },
-{"bgel", one(0066377), one(0177777), "BL", m68020up | cpu32 },
-{"bltl", one(0066777), one(0177777), "BL", m68020up | cpu32 },
-{"bgtl", one(0067377), one(0177777), "BL", m68020up | cpu32 },
-{"blel", one(0067777), one(0177777), "BL", m68020up | cpu32 },
-
-{"bhis", one(0061000), one(0177400), "BB", m68000up },
-{"blss", one(0061400), one(0177400), "BB", m68000up },
-{"bccs", one(0062000), one(0177400), "BB", m68000up },
-{"bcss", one(0062400), one(0177400), "BB", m68000up },
-{"bnes", one(0063000), one(0177400), "BB", m68000up },
-{"beqs", one(0063400), one(0177400), "BB", m68000up },
-{"bvcs", one(0064000), one(0177400), "BB", m68000up },
-{"bvss", one(0064400), one(0177400), "BB", m68000up },
-{"bpls", one(0065000), one(0177400), "BB", m68000up },
-{"bmis", one(0065400), one(0177400), "BB", m68000up },
-{"bges", one(0066000), one(0177400), "BB", m68000up },
-{"blts", one(0066400), one(0177400), "BB", m68000up },
-{"bgts", one(0067000), one(0177400), "BB", m68000up },
-{"bles", one(0067400), one(0177400), "BB", m68000up },
-
-{"jhi", one(0061000), one(0177400), "Bg", m68000up },
-{"jls", one(0061400), one(0177400), "Bg", m68000up },
-{"jcc", one(0062000), one(0177400), "Bg", m68000up },
-{"jcs", one(0062400), one(0177400), "Bg", m68000up },
-{"jne", one(0063000), one(0177400), "Bg", m68000up },
-{"jeq", one(0063400), one(0177400), "Bg", m68000up },
-{"jvc", one(0064000), one(0177400), "Bg", m68000up },
-{"jvs", one(0064400), one(0177400), "Bg", m68000up },
-{"jpl", one(0065000), one(0177400), "Bg", m68000up },
-{"jmi", one(0065400), one(0177400), "Bg", m68000up },
-{"jge", one(0066000), one(0177400), "Bg", m68000up },
-{"jlt", one(0066400), one(0177400), "Bg", m68000up },
-{"jgt", one(0067000), one(0177400), "Bg", m68000up },
-{"jle", one(0067400), one(0177400), "Bg", m68000up },
-
-{"bchg", one(0000500), one(0170700), "Dd$s", m68000up },
-{"bchg", one(0004100), one(0177700), "#b$s", m68000up },
-
-{"bclr", one(0000600), one(0170700), "Dd$s", m68000up },
-{"bclr", one(0004200), one(0177700), "#b$s", m68000up },
+{"andb", one(0001000), one(0177700), "#b$b", m68000up },
+{"andb", one(0001074), one(0177777), "#bCb", m68000up },
+{"andb", one(0140000), one(0170700), ";bDd", m68000up },
+{"andb", one(0140400), one(0170700), "Dd~b", m68000up },
+{"andw", one(0001100), one(0177700), "#w$w", m68000up },
+{"andw", one(0001174), one(0177777), "#wSw", m68000up },
+{"andw", one(0140100), one(0170700), ";wDd", m68000up },
+{"andw", one(0140500), one(0170700), "Dd~w", m68000up },
+{"andl", one(0001200), one(0177700), "#l$l", m68000up | mcf5200 },
+{"andl", one(0140200), one(0170700), ";lDd", m68000up | mcf5200 },
+{"andl", one(0140600), one(0170700), "Dd~l", m68000up | mcf5200 },
+{"and", one(0001100), one(0177700), "#w$w", m68000up },
+{"and", one(0001074), one(0177777), "#bCb", m68000up },
+{"and", one(0001174), one(0177777), "#wSw", m68000up },
+{"and", one(0140100), one(0170700), ";wDd", m68000up },
+{"and", one(0140500), one(0170700), "Dd~w", m68000up },
+
+{"aslb", one(0160400), one(0170770), "QdDs", m68000up },
+{"aslb", one(0160440), one(0170770), "DdDs", m68000up },
+{"aslw", one(0160500), one(0170770), "QdDs", m68000up },
+{"aslw", one(0160540), one(0170770), "DdDs", m68000up },
+{"aslw", one(0160700), one(0177700), "~s", m68000up },
+{"asll", one(0160600), one(0170770), "QdDs", m68000up | mcf5200 },
+{"asll", one(0160640), one(0170770), "DdDs", m68000up | mcf5200 },
+
+{"asrb", one(0160000), one(0170770), "QdDs", m68000up },
+{"asrb", one(0160040), one(0170770), "DdDs", m68000up },
+{"asrw", one(0160100), one(0170770), "QdDs", m68000up },
+{"asrw", one(0160140), one(0170770), "DdDs", m68000up },
+{"asrw", one(0160300), one(0177700), "~s", m68000up },
+{"asrl", one(0160200), one(0170770), "QdDs", m68000up | mcf5200 },
+{"asrl", one(0160240), one(0170770), "DdDs", m68000up | mcf5200 },
+
+{"bhiw", one(0061000), one(0177777), "BW", m68000up | mcf5200 },
+{"blsw", one(0061400), one(0177777), "BW", m68000up | mcf5200 },
+{"bccw", one(0062000), one(0177777), "BW", m68000up | mcf5200 },
+{"bcsw", one(0062400), one(0177777), "BW", m68000up | mcf5200 },
+{"bnew", one(0063000), one(0177777), "BW", m68000up | mcf5200 },
+{"beqw", one(0063400), one(0177777), "BW", m68000up | mcf5200 },
+{"bvcw", one(0064000), one(0177777), "BW", m68000up | mcf5200 },
+{"bvsw", one(0064400), one(0177777), "BW", m68000up | mcf5200 },
+{"bplw", one(0065000), one(0177777), "BW", m68000up | mcf5200 },
+{"bmiw", one(0065400), one(0177777), "BW", m68000up | mcf5200 },
+{"bgew", one(0066000), one(0177777), "BW", m68000up | mcf5200 },
+{"bltw", one(0066400), one(0177777), "BW", m68000up | mcf5200 },
+{"bgtw", one(0067000), one(0177777), "BW", m68000up | mcf5200 },
+{"blew", one(0067400), one(0177777), "BW", m68000up | mcf5200 },
+
+{"bhil", one(0061377), one(0177777), "BL", m68020up | cpu32 },
+{"blsl", one(0061777), one(0177777), "BL", m68020up | cpu32 },
+{"bccl", one(0062377), one(0177777), "BL", m68020up | cpu32 },
+{"bcsl", one(0062777), one(0177777), "BL", m68020up | cpu32 },
+{"bnel", one(0063377), one(0177777), "BL", m68020up | cpu32 },
+{"beql", one(0063777), one(0177777), "BL", m68020up | cpu32 },
+{"bvcl", one(0064377), one(0177777), "BL", m68020up | cpu32 },
+{"bvsl", one(0064777), one(0177777), "BL", m68020up | cpu32 },
+{"bpll", one(0065377), one(0177777), "BL", m68020up | cpu32 },
+{"bmil", one(0065777), one(0177777), "BL", m68020up | cpu32 },
+{"bgel", one(0066377), one(0177777), "BL", m68020up | cpu32 },
+{"bltl", one(0066777), one(0177777), "BL", m68020up | cpu32 },
+{"bgtl", one(0067377), one(0177777), "BL", m68020up | cpu32 },
+{"blel", one(0067777), one(0177777), "BL", m68020up | cpu32 },
+
+{"bhis", one(0061000), one(0177400), "BB", m68000up | mcf5200 },
+{"blss", one(0061400), one(0177400), "BB", m68000up | mcf5200 },
+{"bccs", one(0062000), one(0177400), "BB", m68000up | mcf5200 },
+{"bcss", one(0062400), one(0177400), "BB", m68000up | mcf5200 },
+{"bnes", one(0063000), one(0177400), "BB", m68000up | mcf5200 },
+{"beqs", one(0063400), one(0177400), "BB", m68000up | mcf5200 },
+{"bvcs", one(0064000), one(0177400), "BB", m68000up | mcf5200 },
+{"bvss", one(0064400), one(0177400), "BB", m68000up | mcf5200 },
+{"bpls", one(0065000), one(0177400), "BB", m68000up | mcf5200 },
+{"bmis", one(0065400), one(0177400), "BB", m68000up | mcf5200 },
+{"bges", one(0066000), one(0177400), "BB", m68000up | mcf5200 },
+{"blts", one(0066400), one(0177400), "BB", m68000up | mcf5200 },
+{"bgts", one(0067000), one(0177400), "BB", m68000up | mcf5200 },
+{"bles", one(0067400), one(0177400), "BB", m68000up | mcf5200 },
+
+{"jhi", one(0061000), one(0177400), "Bg", m68000up | mcf5200 },
+{"jls", one(0061400), one(0177400), "Bg", m68000up | mcf5200 },
+{"jcc", one(0062000), one(0177400), "Bg", m68000up | mcf5200 },
+{"jcs", one(0062400), one(0177400), "Bg", m68000up | mcf5200 },
+{"jne", one(0063000), one(0177400), "Bg", m68000up | mcf5200 },
+{"jeq", one(0063400), one(0177400), "Bg", m68000up | mcf5200 },
+{"jvc", one(0064000), one(0177400), "Bg", m68000up | mcf5200 },
+{"jvs", one(0064400), one(0177400), "Bg", m68000up | mcf5200 },
+{"jpl", one(0065000), one(0177400), "Bg", m68000up | mcf5200 },
+{"jmi", one(0065400), one(0177400), "Bg", m68000up | mcf5200 },
+{"jge", one(0066000), one(0177400), "Bg", m68000up | mcf5200 },
+{"jlt", one(0066400), one(0177400), "Bg", m68000up | mcf5200 },
+{"jgt", one(0067000), one(0177400), "Bg", m68000up | mcf5200 },
+{"jle", one(0067400), one(0177400), "Bg", m68000up | mcf5200 },
+
+{"bchg", one(0000500), one(0170700), "Dd$s", m68000up | mcf5200 },
+{"bchg", one(0004100), one(0177700), "#b$s", m68000up | mcf5200 },
+
+{"bclr", one(0000600), one(0170700), "Dd$s", m68000up | mcf5200 },
+{"bclr", one(0004200), one(0177700), "#b$s", m68000up | mcf5200 },
{"bfchg", two(0165300, 0), two(0177700, 0170000), "?sO2O3", m68020up },
{"bfclr", two(0166300, 0), two(0177700, 0170000), "?sO2O3", m68020up },
{"bkpt", one(0044110), one(0177770), "ts", m68010up },
-{"braw", one(0060000), one(0177777), "BW", m68000up },
-{"bral", one(0060377), one(0177777), "BL", m68020up | cpu32 },
-{"bras", one(0060000), one(0177400), "BB", m68000up },
+{"braw", one(0060000), one(0177777), "BW", m68000up | mcf5200 },
+{"bral", one(0060377), one(0177777), "BL", m68020up | cpu32 },
+{"bras", one(0060000), one(0177400), "BB", m68000up | mcf5200 },
-{"bset", one(0000700), one(0170700), "Dd$s", m68000up },
-{"bset", one(0004300), one(0177700), "#b$s", m68000up },
+{"bset", one(0000700), one(0170700), "Dd$s", m68000up | mcf5200 },
+{"bset", one(0004300), one(0177700), "#b$s", m68000up | mcf5200 },
-{"bsrw", one(0060400), one(0177777), "BW", m68000up },
-{"bsrl", one(0060777), one(0177777), "BL", m68020up | cpu32 },
-{"bsrs", one(0060400), one(0177400), "BB", m68000up },
+{"bsrw", one(0060400), one(0177777), "BW", m68000up | mcf5200 },
+{"bsrl", one(0060777), one(0177777), "BL", m68020up | cpu32 },
+{"bsrs", one(0060400), one(0177400), "BB", m68000up | mcf5200 },
-{"btst", one(0000400), one(0170700), "Dd@s", m68000up },
-{"btst", one(0004000), one(0177700), "#b@s", m68000up },
+{"btst", one(0000400), one(0170700), "Dd@s", m68000up | mcf5200 },
+{"btst", one(0004000), one(0177700), "#b@s", m68000up | mcf5200 },
{"callm", one(0003300), one(0177700), "#b!s", m68020 },
{"cpusha", one(0xf420|SCOPE_ALL), one(0xff38), "ce", m68040up },
{"cpushl", one(0xf420|SCOPE_LINE), one(0xff38), "ceas", m68040up },
+{"cpushl", one(0x04e8), one(0xfff8), "as", mcf5200 },
{"cpushp", one(0xf420|SCOPE_PAGE), one(0xff38), "ceas", m68040up },
#undef SCOPE_LINE
#undef SCOPE_PAGE
#undef SCOPE_ALL
-{"clrb", one(0041000), one(0177700), "$s", m68000up },
-{"clrw", one(0041100), one(0177700), "$s", m68000up },
-{"clrl", one(0041200), one(0177700), "$s", m68000up },
+{"clrb", one(0041000), one(0177700), "$s", m68000up | mcf5200 },
+{"clrw", one(0041100), one(0177700), "$s", m68000up | mcf5200 },
+{"clrl", one(0041200), one(0177700), "$s", m68000up | mcf5200 },
{"cmp2b", two(0000300,0), two(0177700,07777), "!sR1", m68020up | cpu32 },
{"cmp2w", two(0001300,0), two(0177700,07777), "!sR1", m68020up | cpu32 },
{"cmp2l", two(0002300,0), two(0177700,07777), "!sR1", m68020up | cpu32 },
-{"cmpaw", one(0130300), one(0170700), "*wAd", m68000up },
-{"cmpal", one(0130700), one(0170700), "*lAd", m68000up },
+{"cmpaw", one(0130300), one(0170700), "*wAd", m68000up },
+{"cmpal", one(0130700), one(0170700), "*lAd", m68000up | mcf5200 },
-{"cmpib", one(0006000), one(0177700), "#b;b", m68000up },
-{"cmpiw", one(0006100), one(0177700), "#w;w", m68000up },
-{"cmpil", one(0006200), one(0177700), "#l;l", m68000up },
+{"cmpib", one(0006000), one(0177700), "#b;b", m68000up },
+{"cmpiw", one(0006100), one(0177700), "#w;w", m68000up },
+{"cmpil", one(0006200), one(0177700), "#l;l", m68000up | mcf5200 },
-{"cmpmb", one(0130410), one(0170770), "+s+d", m68000up },
-{"cmpmw", one(0130510), one(0170770), "+s+d", m68000up },
-{"cmpml", one(0130610), one(0170770), "+s+d", m68000up },
+{"cmpmb", one(0130410), one(0170770), "+s+d", m68000up },
+{"cmpmw", one(0130510), one(0170770), "+s+d", m68000up },
+{"cmpml", one(0130610), one(0170770), "+s+d", m68000up | mcf5200 },
/* The cmp opcode can generate the cmpa, cmpm, and cmpi instructions. */
-{"cmpb", one(0006000), one(0177700), "#b;b", m68000up },
-{"cmpb", one(0130410), one(0170770), "+s+d", m68000up },
-{"cmpb", one(0130000), one(0170700), ";bDd", m68000up },
-{"cmpw", one(0130300), one(0170700), "*wAd", m68000up },
-{"cmpw", one(0006100), one(0177700), "#w;w", m68000up },
-{"cmpw", one(0130510), one(0170770), "+s+d", m68000up },
-{"cmpw", one(0130100), one(0170700), "*wDd", m68000up },
-{"cmpl", one(0130700), one(0170700), "*lAd", m68000up },
-{"cmpl", one(0006200), one(0177700), "#l;l", m68000up },
-{"cmpl", one(0130610), one(0170770), "+s+d", m68000up },
-{"cmpl", one(0130200), one(0170700), "*lDd", m68000up },
-
-{"dbcc", one(0052310), one(0177770), "DsBw", m68000up },
-{"dbcs", one(0052710), one(0177770), "DsBw", m68000up },
-{"dbeq", one(0053710), one(0177770), "DsBw", m68000up },
-{"dbf", one(0050710), one(0177770), "DsBw", m68000up },
-{"dbge", one(0056310), one(0177770), "DsBw", m68000up },
-{"dbgt", one(0057310), one(0177770), "DsBw", m68000up },
-{"dbhi", one(0051310), one(0177770), "DsBw", m68000up },
-{"dble", one(0057710), one(0177770), "DsBw", m68000up },
-{"dbls", one(0051710), one(0177770), "DsBw", m68000up },
-{"dblt", one(0056710), one(0177770), "DsBw", m68000up },
-{"dbmi", one(0055710), one(0177770), "DsBw", m68000up },
-{"dbne", one(0053310), one(0177770), "DsBw", m68000up },
-{"dbpl", one(0055310), one(0177770), "DsBw", m68000up },
-{"dbt", one(0050310), one(0177770), "DsBw", m68000up },
-{"dbvc", one(0054310), one(0177770), "DsBw", m68000up },
-{"dbvs", one(0054710), one(0177770), "DsBw", m68000up },
+{"cmpb", one(0006000), one(0177700), "#b;b", m68000up },
+{"cmpb", one(0130410), one(0170770), "+s+d", m68000up },
+{"cmpb", one(0130000), one(0170700), ";bDd", m68000up },
+{"cmpw", one(0130300), one(0170700), "*wAd", m68000up },
+{"cmpw", one(0006100), one(0177700), "#w;w", m68000up },
+{"cmpw", one(0130510), one(0170770), "+s+d", m68000up },
+{"cmpw", one(0130100), one(0170700), "*wDd", m68000up },
+{"cmpl", one(0130700), one(0170700), "*lAd", m68000up | mcf5200 },
+{"cmpl", one(0006200), one(0177700), "#l;l", m68000up | mcf5200 },
+{"cmpl", one(0130610), one(0170770), "+s+d", m68000up | mcf5200 },
+{"cmpl", one(0130200), one(0170700), "*lDd", m68000up | mcf5200 },
+
+{"dbcc", one(0052310), one(0177770), "DsBw", m68000up },
+{"dbcs", one(0052710), one(0177770), "DsBw", m68000up },
+{"dbeq", one(0053710), one(0177770), "DsBw", m68000up },
+{"dbf", one(0050710), one(0177770), "DsBw", m68000up },
+{"dbge", one(0056310), one(0177770), "DsBw", m68000up },
+{"dbgt", one(0057310), one(0177770), "DsBw", m68000up },
+{"dbhi", one(0051310), one(0177770), "DsBw", m68000up },
+{"dble", one(0057710), one(0177770), "DsBw", m68000up },
+{"dbls", one(0051710), one(0177770), "DsBw", m68000up },
+{"dblt", one(0056710), one(0177770), "DsBw", m68000up },
+{"dbmi", one(0055710), one(0177770), "DsBw", m68000up },
+{"dbne", one(0053310), one(0177770), "DsBw", m68000up },
+{"dbpl", one(0055310), one(0177770), "DsBw", m68000up },
+{"dbt", one(0050310), one(0177770), "DsBw", m68000up },
+{"dbvc", one(0054310), one(0177770), "DsBw", m68000up },
+{"dbvs", one(0054710), one(0177770), "DsBw", m68000up },
{"divsw", one(0100700), one(0170700), ";wDd", m68000up },
{"divull", two(0046100,0000000),two(0177700,0107770),";lD3D1",m68020up|cpu32 },
{"divull", two(0046100,0000000),two(0177700,0107770),";lDD", m68020up|cpu32 },
-{"eorib", one(0005000), one(0177700), "#b$s", m68000up },
-{"eorib", one(0005074), one(0177777), "#bCs", m68000up },
-{"eoriw", one(0005100), one(0177700), "#w$s", m68000up },
-{"eoriw", one(0005174), one(0177777), "#wSs", m68000up },
-{"eoril", one(0005200), one(0177700), "#l$s", m68000up },
-{"eori", one(0005074), one(0177777), "#bCs", m68000up },
-{"eori", one(0005174), one(0177777), "#wSs", m68000up },
-{"eori", one(0005100), one(0177700), "#w$s", m68000up },
+{"eorib", one(0005000), one(0177700), "#b$s", m68000up },
+{"eorib", one(0005074), one(0177777), "#bCs", m68000up },
+{"eoriw", one(0005100), one(0177700), "#w$s", m68000up },
+{"eoriw", one(0005174), one(0177777), "#wSs", m68000up },
+{"eoril", one(0005200), one(0177700), "#l$s", m68000up | mcf5200 },
+{"eori", one(0005074), one(0177777), "#bCs", m68000up },
+{"eori", one(0005174), one(0177777), "#wSs", m68000up },
+{"eori", one(0005100), one(0177700), "#w$s", m68000up },
/* The eor opcode can generate the eori instruction. */
-{"eorb", one(0005000), one(0177700), "#b$s", m68000up },
-{"eorb", one(0005074), one(0177777), "#bCs", m68000up },
-{"eorb", one(0130400), one(0170700), "Dd$s", m68000up },
-{"eorw", one(0005100), one(0177700), "#w$s", m68000up },
-{"eorw", one(0005174), one(0177777), "#wSs", m68000up },
-{"eorw", one(0130500), one(0170700), "Dd$s", m68000up },
-{"eorl", one(0005200), one(0177700), "#l$s", m68000up },
-{"eorl", one(0130600), one(0170700), "Dd$s", m68000up },
-{"eor", one(0005074), one(0177777), "#bCs", m68000up },
-{"eor", one(0005174), one(0177777), "#wSs", m68000up },
-{"eor", one(0005100), one(0177700), "#w$s", m68000up },
-{"eor", one(0130500), one(0170700), "Dd$s", m68000up },
-
-{"exg", one(0140500), one(0170770), "DdDs", m68000up },
-{"exg", one(0140510), one(0170770), "AdAs", m68000up },
-{"exg", one(0140610), one(0170770), "DdAs", m68000up },
-{"exg", one(0140610), one(0170770), "AsDd", m68000up },
-
-{"extw", one(0044200), one(0177770), "Ds", m68000up },
-{"extl", one(0044300), one(0177770), "Ds", m68000up },
-{"extbl", one(0044700), one(0177770), "Ds", m68020up | cpu32 },
+{"eorb", one(0005000), one(0177700), "#b$s", m68000up },
+{"eorb", one(0005074), one(0177777), "#bCs", m68000up },
+{"eorb", one(0130400), one(0170700), "Dd$s", m68000up },
+{"eorw", one(0005100), one(0177700), "#w$s", m68000up },
+{"eorw", one(0005174), one(0177777), "#wSs", m68000up },
+{"eorw", one(0130500), one(0170700), "Dd$s", m68000up },
+{"eorl", one(0005200), one(0177700), "#l$s", m68000up | mcf5200 },
+{"eorl", one(0130600), one(0170700), "Dd$s", m68000up | mcf5200 },
+{"eor", one(0005074), one(0177777), "#bCs", m68000up },
+{"eor", one(0005174), one(0177777), "#wSs", m68000up },
+{"eor", one(0005100), one(0177700), "#w$s", m68000up },
+{"eor", one(0130500), one(0170700), "Dd$s", m68000up },
+
+{"exg", one(0140500), one(0170770), "DdDs", m68000up },
+{"exg", one(0140510), one(0170770), "AdAs", m68000up },
+{"exg", one(0140610), one(0170770), "DdAs", m68000up },
+{"exg", one(0140610), one(0170770), "AsDd", m68000up },
+
+{"extw", one(0044200), one(0177770), "Ds", m68000up|mcf5200 },
+{"extl", one(0044300), one(0177770), "Ds", m68000up|mcf5200 },
+{"extbl", one(0044700), one(0177770), "Ds", m68020up|cpu32|mcf5200 },
/* float stuff starts here */
{"ftwotoxx", two(0xF000, 0x4811), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
{"ftwotoxx", two(0xF000, 0x0011), two(0xF1C0, 0xE07F), "IiFt", mfloat },
-{"illegal", one(0045374), one(0177777), "", m68000up },
+{"halt", one(0045310), one(0177777), "", mcf5200 },
-{"jmp", one(0047300), one(0177700), "!s", m68000up },
+{"illegal", one(0045374), one(0177777), "", m68000up },
-{"jra", one(0060000), one(0177400), "Bg", m68000up },
-{"jra", one(0047300), one(0177700), "!s", m68000up },
+{"jmp", one(0047300), one(0177700), "!s", m68000up | mcf5200 },
-{"jsr", one(0047200), one(0177700), "!s", m68000up },
+{"jra", one(0060000), one(0177400), "Bg", m68000up | mcf5200 },
+{"jra", one(0047300), one(0177700), "!s", m68000up | mcf5200 },
-{"jbsr", one(0060400), one(0177400), "Bg", m68000up },
-{"jbsr", one(0047200), one(0177700), "!s", m68000up },
+{"jsr", one(0047200), one(0177700), "!s", m68000up | mcf5200 },
-{"lea", one(0040700), one(0170700), "!sAd", m68000up },
+{"jbsr", one(0060400), one(0177400), "Bg", m68000up | mcf5200 },
+{"jbsr", one(0047200), one(0177700), "!s", m68000up | mcf5200 },
+
+{"lea", one(0040700), one(0170700), "!sAd", m68000up | mcf5200 },
{"lpstop", two(0174000,0000700), two(0177777,0177777), "", cpu32|m68060 },
-{"linkw", one(0047120), one(0177770), "As#w", m68000up },
+{"linkw", one(0047120), one(0177770), "As#w", m68000up | mcf5200 },
{"linkl", one(0044010), one(0177770), "As#l", m68020up | cpu32 },
-{"link", one(0047120), one(0177770), "As#W", m68000up },
+{"link", one(0047120), one(0177770), "As#W", m68000up | mcf5200 },
{"link", one(0044010), one(0177770), "As#l", m68020up | cpu32 },
-{"lslb", one(0160410), one(0170770), "QdDs", m68000up },
-{"lslb", one(0160450), one(0170770), "DdDs", m68000up },
-{"lslw", one(0160510), one(0170770), "QdDs", m68000up },
-{"lslw", one(0160550), one(0170770), "DdDs", m68000up },
-{"lslw", one(0161700), one(0177700), "~s", m68000up },
-{"lsll", one(0160610), one(0170770), "QdDs", m68000up },
-{"lsll", one(0160650), one(0170770), "DdDs", m68000up },
-
-{"lsrb", one(0160010), one(0170770), "QdDs", m68000up },
-{"lsrb", one(0160050), one(0170770), "DdDs", m68000up },
-{"lsrw", one(0160110), one(0170770), "QdDs", m68000up },
-{"lsrw", one(0160150), one(0170770), "DdDs", m68000up },
-{"lsrw", one(0161300), one(0177700), "~s", m68000up },
-{"lsrl", one(0160210), one(0170770), "QdDs", m68000up },
-{"lsrl", one(0160250), one(0170770), "DdDs", m68000up },
-
-{"moveal", one(0020100), one(0170700), "*lAd", m68000up },
-{"moveaw", one(0030100), one(0170700), "*wAd", m68000up },
-
-{"movec", one(0047173), one(0177777), "R1Jj", m68010up },
-{"movec", one(0047173), one(0177777), "R1#j", m68010up },
-{"movec", one(0047172), one(0177777), "JjR1", m68010up },
-{"movec", one(0047172), one(0177777), "#jR1", m68010up },
-
-{"movemw", one(0044200), one(0177700), "Lw&s", m68000up },
-{"movemw", one(0044240), one(0177770), "lw-s", m68000up },
-{"movemw", one(0046200), one(0177700), "!sLw", m68000up },
-{"movemw", one(0046230), one(0177770), "+sLw", m68000up },
-{"movemw", one(0044200), one(0177700), "#w&s", m68000up },
-{"movemw", one(0044240), one(0177770), "#w-s", m68000up },
-{"movemw", one(0046200), one(0177700), "!s#w", m68000up },
-{"movemw", one(0046230), one(0177770), "+s#w", m68000up },
-{"moveml", one(0044300), one(0177700), "Lw&s", m68000up },
-{"moveml", one(0044340), one(0177770), "lw-s", m68000up },
-{"moveml", one(0046300), one(0177700), "!sLw", m68000up },
-{"moveml", one(0046330), one(0177770), "+sLw", m68000up },
-{"moveml", one(0044300), one(0177700), "#w&s", m68000up },
-{"moveml", one(0044340), one(0177770), "#w-s", m68000up },
-{"moveml", one(0046300), one(0177700), "!s#w", m68000up },
-{"moveml", one(0046330), one(0177770), "+s#w", m68000up },
-
-{"movepw", one(0000410), one(0170770), "dsDd", m68000up },
-{"movepw", one(0000610), one(0170770), "Ddds", m68000up },
-{"movepl", one(0000510), one(0170770), "dsDd", m68000up },
-{"movepl", one(0000710), one(0170770), "Ddds", m68000up },
-
-{"moveq", one(0070000), one(0170400), "MsDd", m68000up },
+{"lslb", one(0160410), one(0170770), "QdDs", m68000up },
+{"lslb", one(0160450), one(0170770), "DdDs", m68000up },
+{"lslw", one(0160510), one(0170770), "QdDs", m68000up },
+{"lslw", one(0160550), one(0170770), "DdDs", m68000up },
+{"lslw", one(0161700), one(0177700), "~s", m68000up },
+{"lsll", one(0160610), one(0170770), "QdDs", m68000up | mcf5200 },
+{"lsll", one(0160650), one(0170770), "DdDs", m68000up | mcf5200 },
+
+{"lsrb", one(0160010), one(0170770), "QdDs", m68000up },
+{"lsrb", one(0160050), one(0170770), "DdDs", m68000up },
+{"lsrw", one(0160110), one(0170770), "QdDs", m68000up },
+{"lsrw", one(0160150), one(0170770), "DdDs", m68000up },
+{"lsrw", one(0161300), one(0177700), "~s", m68000up },
+{"lsrl", one(0160210), one(0170770), "QdDs", m68000up | mcf5200 },
+{"lsrl", one(0160250), one(0170770), "DdDs", m68000up | mcf5200 },
+
+{"moveal", one(0020100), one(0170700), "*lAd", m68000up | mcf5200 },
+{"moveaw", one(0030100), one(0170700), "*wAd", m68000up | mcf5200 },
+
+{"movec", one(0047173), one(0177777), "R1Jj", m68010up | mcf5200 },
+{"movec", one(0047173), one(0177777), "R1#j", m68010up | mcf5200 },
+{"movec", one(0047172), one(0177777), "JjR1", m68010up },
+{"movec", one(0047172), one(0177777), "#jR1", m68010up },
+
+{"movemw", one(0044200), one(0177700), "Lw&s", m68000up },
+{"movemw", one(0044240), one(0177770), "lw-s", m68000up },
+{"movemw", one(0046200), one(0177700), "!sLw", m68000up },
+{"movemw", one(0046230), one(0177770), "+sLw", m68000up },
+{"movemw", one(0044200), one(0177700), "#w&s", m68000up },
+{"movemw", one(0044240), one(0177770), "#w-s", m68000up },
+{"movemw", one(0046200), one(0177700), "!s#w", m68000up },
+{"movemw", one(0046230), one(0177770), "+s#w", m68000up },
+{"moveml", one(0044300), one(0177700), "Lw&s", m68000up | mcf5200 },
+{"moveml", one(0044340), one(0177770), "lw-s", m68000up | mcf5200 },
+{"moveml", one(0046300), one(0177700), "!sLw", m68000up | mcf5200 },
+{"moveml", one(0046330), one(0177770), "+sLw", m68000up | mcf5200 },
+{"moveml", one(0044300), one(0177700), "#w&s", m68000up | mcf5200 },
+{"moveml", one(0044340), one(0177770), "#w-s", m68000up | mcf5200 },
+{"moveml", one(0046300), one(0177700), "!s#w", m68000up | mcf5200 },
+{"moveml", one(0046330), one(0177770), "+s#w", m68000up | mcf5200 },
+
+{"movepw", one(0000410), one(0170770), "dsDd", m68000up },
+{"movepw", one(0000610), one(0170770), "Ddds", m68000up },
+{"movepl", one(0000510), one(0170770), "dsDd", m68000up },
+{"movepl", one(0000710), one(0170770), "Ddds", m68000up },
+
+{"moveq", one(0070000), one(0170400), "MsDd", m68000up | mcf5200 },
/* The move opcode can generate the movea and moveq instructions. */
-{"moveb", one(0010000), one(0170000), ";b$d", m68000up },
-{"movew", one(0030000), one(0170000), "*w$d", m68000up },
-{"movew", one(0030100), one(0170700), "*wAd", m68000up },
-{"movew", one(0040300), one(0177700), "Ss$s", m68000up },
-{"movew", one(0041300), one(0177700), "Cs$s", m68010up },
-{"movew", one(0042300), one(0177700), ";wCd", m68000up },
-{"movew", one(0043300), one(0177700), ";wSd", m68000up },
-{"movel", one(0070000), one(0170400), "MsDd", m68000up },
-{"movel", one(0020000), one(0170000), "*l$d", m68000up },
-{"movel", one(0020100), one(0170700), "*lAd", m68000up },
-{"movel", one(0047140), one(0177770), "AsUd", m68000up },
-{"movel", one(0047150), one(0177770), "UdAs", m68000up },
-{"move", one(0030000), one(0170000), "*w$d", m68000up },
-{"move", one(0030100), one(0170700), "*wAd", m68000up },
-{"move", one(0040300), one(0177700), "Ss$s", m68000up },
-{"move", one(0041300), one(0177700), "Cs$s", m68010up },
-{"move", one(0042300), one(0177700), ";wCd", m68000up },
-{"move", one(0043300), one(0177700), ";wSd", m68000up },
-{"move", one(0047140), one(0177770), "AsUd", m68000up },
-{"move", one(0047150), one(0177770), "UdAs", m68000up },
+{"moveb", one(0010000), one(0170000), ";b$d", m68000up | mcf5200 },
+{"movew", one(0030000), one(0170000), "*w$d", m68000up | mcf5200 },
+{"movew", one(0030100), one(0170700), "*wAd", m68000up | mcf5200 },
+
+{"movew", one(0040300), one(0177770), "SsDs", mcf5200 },
+{"movew", one(0041300), one(0177770), "CsDs", mcf5200 },
+{"movew", one(0040300), one(0177700), "Ss$s", m68000up },
+{"movew", one(0041300), one(0177700), "Cs$s", m68010up },
+{"movew", one(0042300), one(0177700), ";wCd", m68000up | mcf5200 },
+{"movew", one(0043300), one(0177700), ";wSd", m68000up | mcf5200 },
+
+{"movel", one(0070000), one(0170400), "MsDd", m68000up | mcf5200 },
+{"movel", one(0020000), one(0170000), "*l$d", m68000up | mcf5200 },
+{"movel", one(0020100), one(0170700), "*lAd", m68000up | mcf5200 },
+{"movel", one(0047140), one(0177770), "AsUd", m68000up | mcf5200 },
+{"movel", one(0047150), one(0177770), "UdAs", m68000up | mcf5200 },
+{"move", one(0030000), one(0170000), "*w$d", m68000up | mcf5200 },
+{"move", one(0030100), one(0170700), "*wAd", m68000up | mcf5200 },
+
+{"move", one(0040300), one(0177770), "SsDs", mcf5200 },
+{"move", one(0041300), one(0177770), "CsDs", mcf5200 },
+{"move", one(0040300), one(0177700), "Ss$s", m68000up },
+{"move", one(0041300), one(0177700), "Cs$s", m68010up },
+{"move", one(0042300), one(0177700), ";wCd", m68000up | mcf5200 },
+{"move", one(0043300), one(0177700), ";wSd", m68000up | mcf5200 },
+
+{"move", one(0047140), one(0177770), "AsUd", m68000up | mcf5200 },
+{"move", one(0047150), one(0177770), "UdAs", m68000up | mcf5200 },
{"movesb", two(0007000, 0), two(0177700, 07777), "~sR1", m68010up },
{"movesb", two(0007000, 04000), two(0177700, 07777), "R1~s", m68010up },
{"move16", one(0xf610), one(0xfff8), "as_L", m68040up },
{"move16", one(0xf618), one(0xfff8), "_Las", m68040up },
-{"mulsw", one(0140700), one(0170700), ";wDd", m68000up },
-{"mulsl", two(0046000,004000), two(0177700,0107770), ";lD1", m68020up|cpu32 },
-{"mulsl", two(0046000,006000), two(0177700,0107770), ";lD3D1",m68020up|cpu32 },
+{"mulsw", one(0140700), one(0170700), ";wDd", m68000up|mcf5200 },
+{"mulsl", two(0046000,004000), two(0177700,0107770), ";lD1", m68020up|cpu32|mcf5200 },
+{"mulsl", two(0046000,006000), two(0177700,0107770), ";lD3D1",m68020up|cpu32 },
-{"muluw", one(0140300), one(0170700), ";wDd", m68000up },
-{"mulul", two(0046000,000000), two(0177700,0107770), ";lD1", m68020up|cpu32 },
-{"mulul", two(0046000,002000), two(0177700,0107770), ";lD3D1",m68020up|cpu32 },
+{"muluw", one(0140300), one(0170700), ";wDd", m68000up|mcf5200 },
+{"mulul", two(0046000,000000), two(0177700,0107770), ";lD1", m68020up|cpu32|mcf5200 },
+{"mulul", two(0046000,002000), two(0177700,0107770), ";lD3D1",m68020up|cpu32 },
-{"nbcd", one(0044000), one(0177700), "$s", m68000up },
+{"nbcd", one(0044000), one(0177700), "$s", m68000up },
-{"negb", one(0042000), one(0177700), "$s", m68000up },
-{"negw", one(0042100), one(0177700), "$s", m68000up },
-{"negl", one(0042200), one(0177700), "$s", m68000up },
+{"negb", one(0042000), one(0177700), "$s", m68000up },
+{"negw", one(0042100), one(0177700), "$s", m68000up },
+{"negl", one(0042200), one(0177700), "$s", m68000up | mcf5200},
-{"negxb", one(0040000), one(0177700), "$s", m68000up },
-{"negxw", one(0040100), one(0177700), "$s", m68000up },
-{"negxl", one(0040200), one(0177700), "$s", m68000up },
+{"negxb", one(0040000), one(0177700), "$s", m68000up },
+{"negxw", one(0040100), one(0177700), "$s", m68000up },
+{"negxl", one(0040200), one(0177700), "$s", m68000up | mcf5200},
-{"nop", one(0047161), one(0177777), "", m68000up },
+{"nop", one(0047161), one(0177777), "", m68000up | mcf5200},
-{"notb", one(0043000), one(0177700), "$s", m68000up },
-{"notw", one(0043100), one(0177700), "$s", m68000up },
-{"notl", one(0043200), one(0177700), "$s", m68000up },
+{"notb", one(0043000), one(0177700), "$s", m68000up },
+{"notw", one(0043100), one(0177700), "$s", m68000up },
+{"notl", one(0043200), one(0177700), "$s", m68000up | mcf5200},
-{"orib", one(0000000), one(0177700), "#b$s", m68000up },
-{"orib", one(0000074), one(0177777), "#bCs", m68000up },
-{"oriw", one(0000100), one(0177700), "#w$s", m68000up },
-{"oriw", one(0000174), one(0177777), "#wSs", m68000up },
-{"oril", one(0000200), one(0177700), "#l$s", m68000up },
-{"ori", one(0000074), one(0177777), "#bCs", m68000up },
-{"ori", one(0000100), one(0177700), "#w$s", m68000up },
-{"ori", one(0000174), one(0177777), "#wSs", m68000up },
+{"orib", one(0000000), one(0177700), "#b$s", m68000up },
+{"orib", one(0000074), one(0177777), "#bCs", m68000up },
+{"oriw", one(0000100), one(0177700), "#w$s", m68000up },
+{"oriw", one(0000174), one(0177777), "#wSs", m68000up },
+{"oril", one(0000200), one(0177700), "#l$s", m68000up | mcf5200 },
+{"ori", one(0000074), one(0177777), "#bCs", m68000up },
+{"ori", one(0000100), one(0177700), "#w$s", m68000up },
+{"ori", one(0000174), one(0177777), "#wSs", m68000up },
/* The or opcode can generate the ori instruction. */
-{"orb", one(0000000), one(0177700), "#b$s", m68000up },
-{"orb", one(0000074), one(0177777), "#bCs", m68000up },
-{"orb", one(0100000), one(0170700), ";bDd", m68000up },
-{"orb", one(0100400), one(0170700), "Dd~s", m68000up },
-{"orw", one(0000100), one(0177700), "#w$s", m68000up },
-{"orw", one(0000174), one(0177777), "#wSs", m68000up },
-{"orw", one(0100100), one(0170700), ";wDd", m68000up },
-{"orw", one(0100500), one(0170700), "Dd~s", m68000up },
-{"orl", one(0000200), one(0177700), "#l$s", m68000up },
-{"orl", one(0100200), one(0170700), ";lDd", m68000up },
-{"orl", one(0100600), one(0170700), "Dd~s", m68000up },
-{"or", one(0000074), one(0177777), "#bCs", m68000up },
-{"or", one(0000100), one(0177700), "#w$s", m68000up },
-{"or", one(0000174), one(0177777), "#wSs", m68000up },
-{"or", one(0100100), one(0170700), ";wDd", m68000up },
-{"or", one(0100500), one(0170700), "Dd~s", m68000up },
-
-{"pack", one(0100500), one(0170770), "DsDd#w", m68020up },
-{"pack", one(0100510), one(0170770), "-s-d#w", m68020up },
+{"orb", one(0000000), one(0177700), "#b$s", m68000up },
+{"orb", one(0000074), one(0177777), "#bCs", m68000up },
+{"orb", one(0100000), one(0170700), ";bDd", m68000up },
+{"orb", one(0100400), one(0170700), "Dd~s", m68000up },
+{"orw", one(0000100), one(0177700), "#w$s", m68000up },
+{"orw", one(0000174), one(0177777), "#wSs", m68000up },
+{"orw", one(0100100), one(0170700), ";wDd", m68000up },
+{"orw", one(0100500), one(0170700), "Dd~s", m68000up },
+{"orl", one(0000200), one(0177700), "#l$s", m68000up | mcf5200 },
+{"orl", one(0100200), one(0170700), ";lDd", m68000up | mcf5200 },
+{"orl", one(0100600), one(0170700), "Dd~s", m68000up | mcf5200 },
+{"or", one(0000074), one(0177777), "#bCs", m68000up },
+{"or", one(0000100), one(0177700), "#w$s", m68000up },
+{"or", one(0000174), one(0177777), "#wSs", m68000up },
+{"or", one(0100100), one(0170700), ";wDd", m68000up },
+{"or", one(0100500), one(0170700), "Dd~s", m68000up },
+
+{"pack", one(0100500), one(0170770), "DsDd#w", m68020up },
+{"pack", one(0100510), one(0170770), "-s-d#w", m68020up },
{"pbac", one(0xf087), one(0xffbf), "Bc", m68851 },
{"pbacw", one(0xf087), one(0xffff), "BW", m68851 },
{"pdbwc", two(0xf048, 0x0009), two(0xfff8, 0xffff), "DsBw", m68851 },
{"pdbws", two(0xf048, 0x0008), two(0xfff8, 0xffff), "DsBw", m68851 },
-{"pea", one(0044100), one(0177700), "!s", m68000up },
+{"pea", one(0044100), one(0177700), "!s", m68000up|mcf5200 },
{"pflusha", two(0xf000,0x2400), two(0xffff,0xffff), "", m68030 | m68851 },
{"pflusha", one(0xf518), one(0xfff8), "", m68040up },
{"ptrapwsl", two(0xf07b, 0x0008), two(0xffff, 0xffff), "#l", m68851 },
{"ptrapws", two(0xf07c, 0x0008), two(0xffff, 0xffff), "", m68851 },
+{"pulse", one(0045314), one(0177777), "", mcf5200 },
+
{"pvalid", two(0xf000, 0x2800), two(0xffc0, 0xffff), "Vs&s", m68851 },
{"pvalid", two(0xf000, 0x2c00), two(0xffc0, 0xfff8), "A3&s", m68851 },
{"rtd", one(0047164), one(0177777), "#w", m68010up },
-{"rte", one(0047163), one(0177777), "", m68000up },
+{"rte", one(0047163), one(0177777), "", m68000up|mcf5200 },
{"rtm", one(0003300), one(0177760), "Rs", m68020 },
{"rtr", one(0047167), one(0177777), "", m68000up },
-{"rts", one(0047165), one(0177777), "", m68000up },
+{"rts", one(0047165), one(0177777), "", m68000up|mcf5200 },
{"sbcd", one(0100400), one(0170770), "DsDd", m68000up },
{"sbcd", one(0100410), one(0170770), "-s-d", m68000up },
-{"scc", one(0052300), one(0177700), "$s", m68000up },
-{"scs", one(0052700), one(0177700), "$s", m68000up },
-{"seq", one(0053700), one(0177700), "$s", m68000up },
-{"sf", one(0050700), one(0177700), "$s", m68000up },
-{"sge", one(0056300), one(0177700), "$s", m68000up },
-{"sgt", one(0057300), one(0177700), "$s", m68000up },
-{"shi", one(0051300), one(0177700), "$s", m68000up },
-{"sle", one(0057700), one(0177700), "$s", m68000up },
-{"sls", one(0051700), one(0177700), "$s", m68000up },
-{"slt", one(0056700), one(0177700), "$s", m68000up },
-{"smi", one(0055700), one(0177700), "$s", m68000up },
-{"sne", one(0053300), one(0177700), "$s", m68000up },
-{"spl", one(0055300), one(0177700), "$s", m68000up },
-{"st", one(0050300), one(0177700), "$s", m68000up },
-{"svc", one(0054300), one(0177700), "$s", m68000up },
-{"svs", one(0054700), one(0177700), "$s", m68000up },
-
-{"stop", one(0047162), one(0177777), "#w", m68000up },
-
-{"subal", one(0110700), one(0170700), "*lAd", m68000up },
-{"subaw", one(0110300), one(0170700), "*wAd", m68000up },
-
-{"subib", one(0002000), one(0177700), "#b$s", m68000up },
-{"subiw", one(0002100), one(0177700), "#w$s", m68000up },
-{"subil", one(0002200), one(0177700), "#l$s", m68000up },
-
-{"subqb", one(0050400), one(0170700), "Qd%s", m68000up },
-{"subqw", one(0050500), one(0170700), "Qd%s", m68000up },
-{"subql", one(0050600), one(0170700), "Qd%s", m68000up },
+{"scc", one(0052300), one(0177700), "$s", m68000up | mcf5200 },
+{"scs", one(0052700), one(0177700), "$s", m68000up | mcf5200 },
+{"seq", one(0053700), one(0177700), "$s", m68000up | mcf5200 },
+{"sf", one(0050700), one(0177700), "$s", m68000up | mcf5200 },
+{"sge", one(0056300), one(0177700), "$s", m68000up | mcf5200 },
+{"sgt", one(0057300), one(0177700), "$s", m68000up | mcf5200 },
+{"shi", one(0051300), one(0177700), "$s", m68000up | mcf5200 },
+{"sle", one(0057700), one(0177700), "$s", m68000up | mcf5200 },
+{"sls", one(0051700), one(0177700), "$s", m68000up | mcf5200 },
+{"slt", one(0056700), one(0177700), "$s", m68000up | mcf5200 },
+{"smi", one(0055700), one(0177700), "$s", m68000up | mcf5200 },
+{"sne", one(0053300), one(0177700), "$s", m68000up | mcf5200 },
+{"spl", one(0055300), one(0177700), "$s", m68000up | mcf5200 },
+{"st", one(0050300), one(0177700), "$s", m68000up | mcf5200 },
+{"svc", one(0054300), one(0177700), "$s", m68000up | mcf5200 },
+{"svs", one(0054700), one(0177700), "$s", m68000up | mcf5200 },
+
+{"stop", one(0047162), one(0177777), "#w", m68000up | mcf5200 },
+
+{"subal", one(0110700), one(0170700), "*lAd", m68000up | mcf5200 },
+{"subaw", one(0110300), one(0170700), "*wAd", m68000up },
+
+{"subib", one(0002000), one(0177700), "#b$s", m68000up },
+{"subiw", one(0002100), one(0177700), "#w$s", m68000up },
+{"subil", one(0002200), one(0177700), "#l$s", m68000up | mcf5200 },
+
+{"subqb", one(0050400), one(0170700), "Qd%s", m68000up },
+{"subqw", one(0050500), one(0170700), "Qd%s", m68000up },
+{"subql", one(0050600), one(0170700), "Qd%s", m68000up | mcf5200 },
/* The sub opcode can generate the suba, subi, and subq instructions. */
-{"subb", one(0050400), one(0170700), "Qd%s", m68000up },
-{"subb", one(0002000), one(0177700), "#b$s", m68000up },
-{"subb", one(0110000), one(0170700), ";bDd", m68000up },
-{"subb", one(0110400), one(0170700), "Dd~s", m68000up },
-{"subw", one(0050500), one(0170700), "Qd%s", m68000up },
-{"subw", one(0002100), one(0177700), "#w$s", m68000up },
-{"subw", one(0110300), one(0170700), "*wAd", m68000up },
-{"subw", one(0110100), one(0170700), "*wDd", m68000up },
-{"subw", one(0110500), one(0170700), "Dd~s", m68000up },
-{"subl", one(0050600), one(0170700), "Qd%s", m68000up },
-{"subl", one(0002200), one(0177700), "#l$s", m68000up },
-{"subl", one(0110700), one(0170700), "*lAd", m68000up },
-{"subl", one(0110200), one(0170700), "*lDd", m68000up },
-{"subl", one(0110600), one(0170700), "Dd~s", m68000up },
-
-{"subxb", one(0110400), one(0170770), "DsDd", m68000up },
-{"subxb", one(0110410), one(0170770), "-s-d", m68000up },
-{"subxw", one(0110500), one(0170770), "DsDd", m68000up },
-{"subxw", one(0110510), one(0170770), "-s-d", m68000up },
-{"subxl", one(0110600), one(0170770), "DsDd", m68000up },
-{"subxl", one(0110610), one(0170770), "-s-d", m68000up },
-
-{"swap", one(0044100), one(0177770), "Ds", m68000up },
+{"subb", one(0050400), one(0170700), "Qd%s", m68000up },
+{"subb", one(0002000), one(0177700), "#b$s", m68000up },
+{"subb", one(0110000), one(0170700), ";bDd", m68000up },
+{"subb", one(0110400), one(0170700), "Dd~s", m68000up },
+{"subw", one(0050500), one(0170700), "Qd%s", m68000up },
+{"subw", one(0002100), one(0177700), "#w$s", m68000up },
+{"subw", one(0110300), one(0170700), "*wAd", m68000up },
+{"subw", one(0110100), one(0170700), "*wDd", m68000up },
+{"subw", one(0110500), one(0170700), "Dd~s", m68000up },
+{"subl", one(0050600), one(0170700), "Qd%s", m68000up | mcf5200 },
+{"subl", one(0002200), one(0177700), "#l$s", m68000up | mcf5200 },
+{"subl", one(0110700), one(0170700), "*lAd", m68000up | mcf5200 },
+{"subl", one(0110200), one(0170700), "*lDd", m68000up | mcf5200 },
+{"subl", one(0110600), one(0170700), "Dd~s", m68000up | mcf5200 },
+
+{"subxb", one(0110400), one(0170770), "DsDd", m68000up },
+{"subxb", one(0110410), one(0170770), "-s-d", m68000up },
+{"subxw", one(0110500), one(0170770), "DsDd", m68000up },
+{"subxw", one(0110510), one(0170770), "-s-d", m68000up },
+{"subxl", one(0110600), one(0170770), "DsDd", m68000up | mcf5200 },
+{"subxl", one(0110610), one(0170770), "-s-d", m68000up },
+
+{"swap", one(0044100), one(0177770), "Ds", m68000up | mcf5200 },
{"tas", one(0045300), one(0177700), "$s", m68000up },
TBL("tblub", "tbluw", "tblul", 0, 1),
TBL("tblunb", "tblunw", "tblunl", 0, 0),
-{"trap", one(0047100), one(0177760), "Ts", m68000up },
-
-{"trapcc", one(0052374), one(0177777), "", m68020up | cpu32 },
-{"trapcs", one(0052774), one(0177777), "", m68020up | cpu32 },
-{"trapeq", one(0053774), one(0177777), "", m68020up | cpu32 },
-{"trapf", one(0050774), one(0177777), "", m68020up | cpu32 },
-{"trapge", one(0056374), one(0177777), "", m68020up | cpu32 },
-{"trapgt", one(0057374), one(0177777), "", m68020up | cpu32 },
-{"traphi", one(0051374), one(0177777), "", m68020up | cpu32 },
-{"traple", one(0057774), one(0177777), "", m68020up | cpu32 },
-{"trapls", one(0051774), one(0177777), "", m68020up | cpu32 },
-{"traplt", one(0056774), one(0177777), "", m68020up | cpu32 },
-{"trapmi", one(0055774), one(0177777), "", m68020up | cpu32 },
-{"trapne", one(0053374), one(0177777), "", m68020up | cpu32 },
-{"trappl", one(0055374), one(0177777), "", m68020up | cpu32 },
-{"trapt", one(0050374), one(0177777), "", m68020up | cpu32 },
-{"trapvc", one(0054374), one(0177777), "", m68020up | cpu32 },
-{"trapvs", one(0054774), one(0177777), "", m68020up | cpu32 },
-
-{"trapccw", one(0052372), one(0177777), "#w", m68020up | cpu32 },
-{"trapcsw", one(0052772), one(0177777), "#w", m68020up | cpu32 },
-{"trapeqw", one(0053772), one(0177777), "#w", m68020up | cpu32 },
-{"trapfw", one(0050772), one(0177777), "#w", m68020up | cpu32 },
-{"trapgew", one(0056372), one(0177777), "#w", m68020up | cpu32 },
-{"trapgtw", one(0057372), one(0177777), "#w", m68020up | cpu32 },
-{"traphiw", one(0051372), one(0177777), "#w", m68020up | cpu32 },
-{"traplew", one(0057772), one(0177777), "#w", m68020up | cpu32 },
-{"traplsw", one(0051772), one(0177777), "#w", m68020up | cpu32 },
-{"trapltw", one(0056772), one(0177777), "#w", m68020up | cpu32 },
-{"trapmiw", one(0055772), one(0177777), "#w", m68020up | cpu32 },
-{"trapnew", one(0053372), one(0177777), "#w", m68020up | cpu32 },
-{"trapplw", one(0055372), one(0177777), "#w", m68020up | cpu32 },
-{"traptw", one(0050372), one(0177777), "#w", m68020up | cpu32 },
-{"trapvcw", one(0054372), one(0177777), "#w", m68020up | cpu32 },
-{"trapvsw", one(0054772), one(0177777), "#w", m68020up | cpu32 },
-
-{"trapccl", one(0052373), one(0177777), "#l", m68020up | cpu32 },
-{"trapcsl", one(0052773), one(0177777), "#l", m68020up | cpu32 },
-{"trapeql", one(0053773), one(0177777), "#l", m68020up | cpu32 },
-{"trapfl", one(0050773), one(0177777), "#l", m68020up | cpu32 },
-{"trapgel", one(0056373), one(0177777), "#l", m68020up | cpu32 },
-{"trapgtl", one(0057373), one(0177777), "#l", m68020up | cpu32 },
-{"traphil", one(0051373), one(0177777), "#l", m68020up | cpu32 },
-{"traplel", one(0057773), one(0177777), "#l", m68020up | cpu32 },
-{"traplsl", one(0051773), one(0177777), "#l", m68020up | cpu32 },
-{"trapltl", one(0056773), one(0177777), "#l", m68020up | cpu32 },
-{"trapmil", one(0055773), one(0177777), "#l", m68020up | cpu32 },
-{"trapnel", one(0053373), one(0177777), "#l", m68020up | cpu32 },
-{"trappll", one(0055373), one(0177777), "#l", m68020up | cpu32 },
-{"traptl", one(0050373), one(0177777), "#l", m68020up | cpu32 },
-{"trapvcl", one(0054373), one(0177777), "#l", m68020up | cpu32 },
-{"trapvsl", one(0054773), one(0177777), "#l", m68020up | cpu32 },
-
-{"trapv", one(0047166), one(0177777), "", m68000up },
-
-{"tstb", one(0045000), one(0177700), ";b", m68000up },
-{"tstw", one(0045100), one(0177700), "*w", m68000up },
-{"tstl", one(0045200), one(0177700), "*l", m68000up },
-
-{"unlk", one(0047130), one(0177770), "As", m68000up },
-
-{"unpk", one(0100600), one(0170770), "DsDd#w", m68020up },
-{"unpk", one(0100610), one(0170770), "-s-d#w", m68020up },
+{"trap", one(0047100), one(0177760), "Ts", m68000up | mcf5200 },
+
+{"trapcc", one(0052374), one(0177777), "", m68020up | cpu32 },
+{"trapcs", one(0052774), one(0177777), "", m68020up | cpu32 },
+{"trapeq", one(0053774), one(0177777), "", m68020up | cpu32 },
+{"trapf", one(0050774), one(0177777), "", m68020up | cpu32 | mcf5200 },
+{"trapge", one(0056374), one(0177777), "", m68020up | cpu32 },
+{"trapgt", one(0057374), one(0177777), "", m68020up | cpu32 },
+{"traphi", one(0051374), one(0177777), "", m68020up | cpu32 },
+{"traple", one(0057774), one(0177777), "", m68020up | cpu32 },
+{"trapls", one(0051774), one(0177777), "", m68020up | cpu32 },
+{"traplt", one(0056774), one(0177777), "", m68020up | cpu32 },
+{"trapmi", one(0055774), one(0177777), "", m68020up | cpu32 },
+{"trapne", one(0053374), one(0177777), "", m68020up | cpu32 },
+{"trappl", one(0055374), one(0177777), "", m68020up | cpu32 },
+{"trapt", one(0050374), one(0177777), "", m68020up | cpu32 },
+{"trapvc", one(0054374), one(0177777), "", m68020up | cpu32 },
+{"trapvs", one(0054774), one(0177777), "", m68020up | cpu32 },
+
+{"trapccw", one(0052372), one(0177777), "#w", m68020up|cpu32 },
+{"trapcsw", one(0052772), one(0177777), "#w", m68020up|cpu32 },
+{"trapeqw", one(0053772), one(0177777), "#w", m68020up|cpu32 },
+{"trapfw", one(0050772), one(0177777), "#w", m68020up|cpu32|mcf5200},
+{"trapgew", one(0056372), one(0177777), "#w", m68020up|cpu32 },
+{"trapgtw", one(0057372), one(0177777), "#w", m68020up|cpu32 },
+{"traphiw", one(0051372), one(0177777), "#w", m68020up|cpu32 },
+{"traplew", one(0057772), one(0177777), "#w", m68020up|cpu32 },
+{"traplsw", one(0051772), one(0177777), "#w", m68020up|cpu32 },
+{"trapltw", one(0056772), one(0177777), "#w", m68020up|cpu32 },
+{"trapmiw", one(0055772), one(0177777), "#w", m68020up|cpu32 },
+{"trapnew", one(0053372), one(0177777), "#w", m68020up|cpu32 },
+{"trapplw", one(0055372), one(0177777), "#w", m68020up|cpu32 },
+{"traptw", one(0050372), one(0177777), "#w", m68020up|cpu32 },
+{"trapvcw", one(0054372), one(0177777), "#w", m68020up|cpu32 },
+{"trapvsw", one(0054772), one(0177777), "#w", m68020up|cpu32 },
+
+{"trapccl", one(0052373), one(0177777), "#l", m68020up|cpu32 },
+{"trapcsl", one(0052773), one(0177777), "#l", m68020up|cpu32 },
+{"trapeql", one(0053773), one(0177777), "#l", m68020up|cpu32 },
+{"trapfl", one(0050773), one(0177777), "#l", m68020up|cpu32|mcf5200},
+{"trapgel", one(0056373), one(0177777), "#l", m68020up|cpu32 },
+{"trapgtl", one(0057373), one(0177777), "#l", m68020up|cpu32 },
+{"traphil", one(0051373), one(0177777), "#l", m68020up|cpu32 },
+{"traplel", one(0057773), one(0177777), "#l", m68020up|cpu32 },
+{"traplsl", one(0051773), one(0177777), "#l", m68020up|cpu32 },
+{"trapltl", one(0056773), one(0177777), "#l", m68020up|cpu32 },
+{"trapmil", one(0055773), one(0177777), "#l", m68020up|cpu32 },
+{"trapnel", one(0053373), one(0177777), "#l", m68020up|cpu32 },
+{"trappll", one(0055373), one(0177777), "#l", m68020up|cpu32 },
+{"traptl", one(0050373), one(0177777), "#l", m68020up|cpu32 },
+{"trapvcl", one(0054373), one(0177777), "#l", m68020up|cpu32 },
+{"trapvsl", one(0054773), one(0177777), "#l", m68020up|cpu32 },
+
+{"trapv", one(0047166), one(0177777), "", m68000up },
+
+{"tstb", one(0045000), one(0177700), ";b", m68000up | mcf5200 },
+{"tstw", one(0045100), one(0177700), "*w", m68000up | mcf5200 },
+{"tstl", one(0045200), one(0177700), "*l", m68000up | mcf5200 },
+
+{"unlk", one(0047130), one(0177770), "As", m68000up | mcf5200 },
+
+{"unpk", one(0100600), one(0170770), "DsDd#w", m68020up },
+{"unpk", one(0100610), one(0170770), "-s-d#w", m68020up },
+
+{"wddatab", one(0172000), one(0177700), "~s", mcf5200 },
+{"wddataw", one(0172100), one(0177700), "~s", mcf5200 },
+{"wddatal", one(0172200), one(0177700), "~s", mcf5200 },
+
};
const int m68k_numopcodes = sizeof m68k_opcodes / sizeof m68k_opcodes[0];
# Empty HDEFINES.
/HDEFINES/s/@HDEFINES@//
-/INCDIR=/s/"{srcdir}":/"{topsrcdir}"/
-/^CSEARCH = .*$/s/$/ -i "{INCDIR}":mpw: -i ::extra-include:/
+# Fix pathnames to include directories.
+/^INCDIR = /s/^INCDIR = .*$/INCDIR = "{topsrcdir}"include/
+/^CSEARCH = /s/$/ -i "{INCDIR}":mpw: -i ::extra-include:/
+
/BFD_MACHINES/s/@BFD_MACHINES@/{BFD_MACHINES}/
/archdefs/s/@archdefs@/{ARCHDEFS}/
{ "fnmadd.", A(63,31,1), A_MASK, PPCCOM, { FRT,FRA,FRC,FRB } },
{ "fnma.", A(63,31,1), A_MASK, PWRCOM, { FRT,FRA,FRC,FRB } },
-{ "fcmpo", X(63,30), X_MASK|(3<<21), COM, { BF, FRA, FRB } },
+{ "fcmpo", X(63,32), X_MASK|(3<<21), COM, { BF, FRA, FRB } },
{ "mtfsb1", XRC(63,38,0), XRARB_MASK, COM, { BT } },
{ "mtfsb1.", XRC(63,38,1), XRARB_MASK, COM, { BT } },
FILE *stream = info->stream;
bfd_byte buffer[4];
unsigned long insn;
- register unsigned int i;
register struct opcode_hash *op;
/* Nonzero of opcode table has been initialized. */
static int opcodes_initialized = 0;
}
}
- insn = bfd_getb32 (buffer);
+ if (info->endian == BFD_ENDIAN_BIG)
+ insn = bfd_getb32 (buffer);
+ else
+ insn = bfd_getl32 (buffer);
info->insn_info_valid = 1; /* We do return this info */
info->insn_type = dis_nonbranch; /* Assume non branch insn */
/* Nonzero means we have an annulled branch. */
int is_annulled = 0;
- /* Do we have an `add' or `or' instruction where rs1 is the same
- as rsd, and which has the i bit set? */
- if ((opcode->match == 0x80102000 || opcode->match == 0x80002000)
+ /* Do we have an `add' or `or' instruction combining an
+ immediate with rs1? */
+ if (opcode->match == 0x80102000 || opcode->match == 0x80002000)
/* (or) (add) */
- && X_RS1 (insn) == X_RD (insn))
imm_added_to_rs1 = 1;
if (X_RS1 (insn) != X_RD (insn)
errcode =
(*info->read_memory_func)
(memaddr - 4, buffer, sizeof (buffer), info);
- prev_insn = bfd_getb32 (buffer);
+ if (info->endian == BFD_ENDIAN_BIG)
+ prev_insn = bfd_getb32 (buffer);
+ else
+ prev_insn = bfd_getl32 (buffer);
if (errcode == 0)
{
{
errcode = (*info->read_memory_func)
(memaddr - 8, buffer, sizeof (buffer), info);
- prev_insn = bfd_getb32 (buffer);
+ if (info->endian == BFD_ENDIAN_BIG)
+ prev_insn = bfd_getb32 (buffer);
+ else
+ prev_insn = bfd_getl32 (buffer);
}
}
instruction's name rather than the args. This would make gas faster, pinsn
slower, but would mess up some macros a bit. xoxorich. */
-/* v9 FIXME: Doesn't accept `setsw', `setx' synthetic instructions for v9. */
-
#include <stdio.h>
#include "ansidecl.h"
#include "opcode/sparc.h"
{ "wr", F3(2, 0x30, 0), F3(~2, ~0x30, ~0)|ASI(~0), "1,2,m", 0, v8 }, /* wr r,r,%asrX */
{ "wr", F3(2, 0x30, 1), F3(~2, ~0x30, ~1), "1,i,m", 0, v8 }, /* wr r,i,%asrX */
+{ "wr", F3(2, 0x30, 0), F3(~2, ~0x30, ~0)|ASI_RS2(~0), "1,m", F_ALIAS, v8 }, /* wr rs1,%g0,%asrX */
{ "wr", F3(2, 0x30, 0), F3(~2, ~0x30, ~0)|RD_G0|ASI(~0), "1,2,y", 0, v6 }, /* wr r,r,%y */
{ "wr", F3(2, 0x30, 1), F3(~2, ~0x30, ~1)|RD_G0, "1,i,y", 0, v6 }, /* wr r,i,%y */
+{ "wr", F3(2, 0x30, 0), F3(~2, ~0x30, ~0)|RD_G0|ASI_RS2(~0), "1,y", F_ALIAS, v6 }, /* wr rs1,%g0,%y */
{ "wr", F3(2, 0x31, 0), F3(~2, ~0x31, ~0)|RD_G0|ASI(~0), "1,2,p", 0, v6notv9 }, /* wr r,r,%psr */
{ "wr", F3(2, 0x31, 1), F3(~2, ~0x31, ~1)|RD_G0, "1,i,p", 0, v6notv9 }, /* wr r,i,%psr */
+{ "wr", F3(2, 0x31, 0), F3(~2, ~0x31, ~0)|RD_G0|ASI_RS2(~0), "1,p", F_ALIAS, v6notv9 }, /* wr rs1,%g0,%psr */
{ "wr", F3(2, 0x32, 0), F3(~2, ~0x32, ~0)|RD_G0|ASI(~0), "1,2,w", 0, v6notv9 }, /* wr r,r,%wim */
{ "wr", F3(2, 0x32, 1), F3(~2, ~0x32, ~1)|RD_G0, "1,i,w", 0, v6notv9 }, /* wr r,i,%wim */
+{ "wr", F3(2, 0x32, 0), F3(~2, ~0x32, ~0)|RD_G0|ASI_RS2(~0), "1,w", F_ALIAS, v6notv9 }, /* wr rs1,%g0,%wim */
{ "wr", F3(2, 0x33, 0), F3(~2, ~0x33, ~0)|RD_G0|ASI(~0), "1,2,t", 0, v6notv9 }, /* wr r,r,%tbr */
{ "wr", F3(2, 0x33, 1), F3(~2, ~0x33, ~1)|RD_G0, "1,i,t", 0, v6notv9 }, /* wr r,i,%tbr */
+{ "wr", F3(2, 0x33, 0), F3(~2, ~0x33, ~0)|RD_G0|ASI_RS2(~0), "1,t", F_ALIAS, v6notv9 }, /* wr rs1,%g0,%tbr */
{ "wr", F3(2, 0x30, 0)|RD(2), F3(~2, ~0x30, ~0)|RD(~2)|ASI(~0), "1,2,E", 0, v9 }, /* wr r,r,%ccr */
{ "wr", F3(2, 0x30, 1)|RD(2), F3(~2, ~0x30, ~1)|RD(~2), "1,i,E", 0, v9 }, /* wr r,i,%ccr */
cond ("bcc", "tcc", CONDCC, F_CONDBR),
cond ("bcs", "tcs", CONDCS, F_CONDBR),
cond ("be", "te", CONDE, F_CONDBR),
+cond ("beq", "teq", CONDE, F_CONDBR|F_ALIAS),
cond ("bg", "tg", CONDG, F_CONDBR),
cond ("bgt", "tgt", CONDG, F_CONDBR|F_ALIAS),
cond ("bge", "tge", CONDGE, F_CONDBR),
{ "nop", F2(0, 4), 0xfeffffff, "", 0, v6 }, /* sethi 0, %g0 */
{ "set", F2(0x0, 0x4), F2(~0x0, ~0x4), "Sh,d", F_ALIAS, v6 },
+{ "setuw", F2(0x0, 0x4), F2(~0x0, ~0x4), "Sh,d", F_ALIAS, v9 },
+{ "setsw", F2(0x0, 0x4), F2(~0x0, ~0x4), "Sh,d", F_ALIAS, v9 },
+{ "setx", F2(0x0, 0x4), F2(~0x0, ~0x4), "S0,1,d", F_ALIAS, v9 },
{ "sethi", F2(0x0, 0x4), F2(~0x0, ~0x4), "h,d", 0, v6 },
{ "fsub32", F3F(2, 0x36, 0x056), F3F(~2, ~0x36, ~0x056), "v,B,H", 0, v9a },
{ "fsub32s", F3F(2, 0x36, 0x057), F3F(~2, ~0x36, ~0x057), "e,f,g", 0, v9a },
-{ "fpack16", F3F(2, 0x36, 0x039), F3F(~2, ~0x36, ~0x039)|RS1_G0, "B,H", 0, v9a },
{ "fpack32", F3F(2, 0x36, 0x03a), F3F(~2, ~0x36, ~0x03a), "v,B,H", 0, v9a },
-{ "fpackfix", F3F(2, 0x36, 0x03b), F3F(~2, ~0x36, ~0x03b)|RS1_G0, "B,H", 0, v9a },
-{ "fexpand", F3F(2, 0x36, 0x04d), F3F(~2, ~0x36, ~0x04d)|RS1_G0, "B,H", 0, v9a },
-{ "fpmerge", F3F(2, 0x36, 0x04b), F3F(~2, ~0x36, ~0x04b), "v,B,H", 0, v9a },
+{ "fpack16", F3F(2, 0x36, 0x03b), F3F(~2, ~0x36, ~0x03b)|RS1_G0, "B,g", 0, v9a },
+{ "fpackfix", F3F(2, 0x36, 0x03d), F3F(~2, ~0x36, ~0x03d)|RS1_G0, "B,g", 0, v9a },
+{ "fexpand", F3F(2, 0x36, 0x04d), F3F(~2, ~0x36, ~0x04d)|RS1_G0, "f,H", 0, v9a },
+{ "fpmerge", F3F(2, 0x36, 0x04b), F3F(~2, ~0x36, ~0x04b), "e,f,H", 0, v9a },
/* Note that the mixing of 32/64 bit regs is intentional.
FIXME: Should these be commutative? */
static arg asi_table[] =
{
+ /* These are in the v9 architecture manual. */
+ /* The shorter versions appear first, they're here because Sun's as has them.
+ Sun's as uses #ASI_P_L instead of #ASI_PL (which appears in the
+ UltraSPARC architecture manual). */
+ { 0x04, "#ASI_N" },
+ { 0x0c, "#ASI_N_L" },
{ 0x10, "#ASI_AIUP" },
{ 0x11, "#ASI_AIUS" },
{ 0x18, "#ASI_AIUP_L" },
{ 0x89, "#ASI_S_L" },
{ 0x8a, "#ASI_PNF_L" },
{ 0x8b, "#ASI_SNF_L" },
+ { 0x04, "#ASI_NUCLEUS" },
+ { 0x0c, "#ASI_NUCLEUS_LITTLE" },
{ 0x10, "#ASI_AS_IF_USER_PRIMARY" },
{ 0x11, "#ASI_AS_IF_USER_SECONDARY" },
- { 0x18, "#ASI_AS_IF_USER_PRIMARY_L" },
- { 0x19, "#ASI_AS_IF_USER_SECONDARY_L" },
+ { 0x18, "#ASI_AS_IF_USER_PRIMARY_LITTLE" },
+ { 0x19, "#ASI_AS_IF_USER_SECONDARY_LITTLE" },
{ 0x80, "#ASI_PRIMARY" },
{ 0x81, "#ASI_SECONDARY" },
{ 0x82, "#ASI_PRIMARY_NOFAULT" },
{ 0x89, "#ASI_SECONDARY_LITTLE" },
{ 0x8a, "#ASI_PRIMARY_NOFAULT_LITTLE" },
{ 0x8b, "#ASI_SECONDARY_NOFAULT_LITTLE" },
+ /* These are UltraSPARC extensions. */
+ /* FIXME: There are dozens of them. Not sure we want them all.
+ Most are for kernel building but some are for vis type stuff. */
{ 0, 0 }
};
% This automatically updates the version number based on RCS.
\def\deftexinfoversion$#1: #2 ${\def\texinfoversion{#2}}
-\deftexinfoversion$Revision: 1.1.1.2 $
+\deftexinfoversion$Revision: 1.2 $
\message{Loading texinfo package [Version \texinfoversion]:}
% If in a .fmt file, print the version number
projects / openbsd / commitdiff