drm/amd/display: Use freesync when `DRM_EDID_FEATURE_CONTINUOUS_FREQ` found

From Mario Limonciello
95232806972adab87d6979256df37f5ceb1ad561 in linux-6.6.y/6.6.24
2f14c0c8cae8e9e3b603a3f91909baba66540027 in mainline linux

diff --git a/sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 055ae72..00d5f22 100644 (file)
--- a/sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -10753,18 +10753,24 @@ void amdgpu_dm_update_freesync_caps(struct drm_connector *connector,
        if (!adev->dm.freesync_module)
                goto update;
 
-       if (sink->sink_signal == SIGNAL_TYPE_DISPLAY_PORT
-               || sink->sink_signal == SIGNAL_TYPE_EDP) {
+       if (edid && (sink->sink_signal == SIGNAL_TYPE_DISPLAY_PORT ||
+                    sink->sink_signal == SIGNAL_TYPE_EDP)) {
                bool edid_check_required = false;
 
-               if (edid) {
-                       edid_check_required = is_dp_capable_without_timing_msa(
-                                               adev->dm.dc,
-                                               amdgpu_dm_connector);
+               if (is_dp_capable_without_timing_msa(adev->dm.dc,
+                                                    amdgpu_dm_connector)) {
+                       if (edid->features & DRM_EDID_FEATURE_CONTINUOUS_FREQ) {
+                               freesync_capable = true;
+                               amdgpu_dm_connector->min_vfreq = connector->display_info.monitor_range.min_vfreq;
+                               amdgpu_dm_connector->max_vfreq = connector->display_info.monitor_range.max_vfreq;
+                       } else {
+                               edid_check_required = edid->version > 1 ||
+                                                     (edid->version == 1 &&
+                                                      edid->revision > 1);
+                       }
                }
 
-               if (edid_check_required == true && (edid->version > 1 ||
-                  (edid->version == 1 && edid->revision > 1))) {
+               if (edid_check_required) {
                        for (i = 0; i < 4; i++) {
 
                                timing  = &edid->detailed_timings[i];