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drm/amd/display: ensure dentist display clock update finished in DCN20
author
jsg
<jsg@openbsd.org>
Wed, 4 Aug 2021 11:26:06 +0000
(11:26 +0000)
committer
jsg
<jsg@openbsd.org>
Wed, 4 Aug 2021 11:26:06 +0000
(11:26 +0000)
From Dale Zhao
63570e578094b4f0b6b8c6ac4a68195455733e31
in linux 5.10.y/5.10.56
b53e041d8e4308f7324999398aec092dbcb130f5
in mainline linux
sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c
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diff --git
a/sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c
b/sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c
index
f2114bc
..
6b744ed
100644
(file)
--- a/
sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c
+++ b/
sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c
@@
-135,7
+135,7
@@
void dcn20_update_clocks_update_dentist(struct clk_mgr_internal *clk_mgr)
REG_UPDATE(DENTIST_DISPCLK_CNTL,
DENTIST_DISPCLK_WDIVIDER, dispclk_wdivider);
-
// REG_WAIT(DENTIST_DISPCLK_CNTL, DENTIST_DISPCLK_CHG_DONE, 1, 5, 1
00);
+
REG_WAIT(DENTIST_DISPCLK_CNTL, DENTIST_DISPCLK_CHG_DONE, 1, 50, 10
00);
REG_UPDATE(DENTIST_DISPCLK_CNTL,
DENTIST_DPPCLK_WDIVIDER, dppclk_wdivider);
REG_WAIT(DENTIST_DISPCLK_CNTL, DENTIST_DPPCLK_CHG_DONE, 1, 5, 100);