Do not read the status MSR before setting performance adjustment mode.

This makes modifying hw.setperf and apmd -A work on robert's laptop.
Previously, it would sometimes be impossible to set hw.setperf to any
value on this machine.

Keep a delay loop that waits for the MSR write to take effect before
setting hw.cpuspeed to the new value since this is apparently needed
for some pre-ryzen processors.

Debugging, initial diff & test by robert

ok brynet

diff --git a/sys/arch/amd64/amd64/k1x-pstate.c b/sys/arch/amd64/amd64/k1x-pstate.c
index cb79e0c..8245c00 100644 (file)
--- a/sys/arch/amd64/amd64/k1x-pstate.c
+++ b/sys/arch/amd64/amd64/k1x-pstate.c
@@ -1,4 +1,4 @@
-/*     $OpenBSD: k1x-pstate.c,v 1.10 2017/12/27 17:41:54 fcambus Exp $ */
+/*     $OpenBSD: k1x-pstate.c,v 1.11 2021/08/11 18:31:48 tb Exp $ */
 /*
  * Copyright (c) 2011 Bryan Steele <brynet@gmail.com>
  *
@@ -97,21 +97,13 @@ k1x_transition(struct k1x_cpu_state *cstate, int level)
        u_int64_t msr;
        int i, cfid, fid = cstate->state_table[level].fid;
 
-       msr = rdmsr(MSR_K1X_STATUS);
-       cfid = K1X_FID(msr);
-
-       if (fid == cfid)
-               return;
-
-       if (cfid != fid) {
-               wrmsr(MSR_K1X_CONTROL, fid);
-               for (i = 0; i < 100; i++) {
-                       msr = rdmsr(MSR_K1X_STATUS);
-                       if (K1X_FID(msr) == fid)
-                               break;
-                       DELAY(100);
-               }
+       wrmsr(MSR_K1X_CONTROL, fid);
+       for (i = 0; i < 100; i++) {
+               msr = rdmsr(MSR_K1X_STATUS);
                cfid = K1X_FID(msr);
+               if (cfid == fid)
+                       break;
+               DELAY(100);
        }
        if (cfid == fid) {
                cpuspeed = cstate->state_table[level].freq;