Implement Multiple Message MSI support on amd64. This is experimental code
authorkettenis <kettenis@openbsd.org>
Fri, 19 Jan 2024 18:38:16 +0000 (18:38 +0000)
committerkettenis <kettenis@openbsd.org>
Fri, 19 Jan 2024 18:38:16 +0000 (18:38 +0000)
commitfb432fadab0adf2614ada0a52d3e164cf3545a90
treedee97314c714d20acf01da52e0b3ad9e34a71c31
parentaa99957f1b040dee9007fdb23ee9161938dae622
Implement Multiple Message MSI support on amd64.  This is experimental code
to assist qwx(4) development.  We may remove this code again at some point
in the future.

Multiple Message MSI has some serious design flaws, especially when
combined with the APIC interrupt controller architecture.  It was
superseded by MSI-X.  Unfortunately qwx(4) does not implement MSI-X.

ok stsp@, deraadt@
sys/arch/amd64/amd64/i8259.c
sys/arch/amd64/amd64/intr.c
sys/arch/amd64/amd64/machdep.c
sys/arch/amd64/include/pci_machdep.h
sys/arch/amd64/include/pic.h
sys/arch/amd64/include/segments.h
sys/arch/amd64/pci/pci_machdep.c
sys/dev/pci/pcireg.h