So it turns outthe HP engineers changed the PA-RISC 2.0 architecture

So it turns outthe HP engineers changed the PA-RISC 2.0 architecture
after it was published.  In particular, they changed the maximum cache
aliasing boundary from 1MB to 16MB.

It turns that on the PA-8700 the aliasing boundary is actually 4MB
(reported as such by the firmware at least).  There are some comments
in the Linux code that suggest that HP never actually built PA-RISC
CPUs with an 8MB or 16MB aliasing boundary.

So raise the aliasing boundary to 4MB.  This fixes the weird ps(1) problem
where it didn't print its own arguments correctly.