Add missing clock trigger to loongson_isa_splx().
authorvisa <visa@openbsd.org>
Mon, 14 Nov 2022 17:15:41 +0000 (17:15 +0000)
committervisa <visa@openbsd.org>
Mon, 14 Nov 2022 17:15:41 +0000 (17:15 +0000)
commitf33d13e0825724fd0335b74ff64810aa7c4e1a16
treed1cceea910cb39e4a297463f17957961a7649931
parent345c4d05797bdbbc2347b7d2c731f27795fbf9b1
Add missing clock trigger to loongson_isa_splx().

Fixes unexpected delays that have occurred with mips64 clock(4).
sys/arch/loongson/loongson/isa_machdep.c