mips64, loongson, octeon: switch to clockintr
authorcheloha <cheloha@openbsd.org>
Sat, 19 Nov 2022 16:23:48 +0000 (16:23 +0000)
committercheloha <cheloha@openbsd.org>
Sat, 19 Nov 2022 16:23:48 +0000 (16:23 +0000)
commitf124c57c01664764b4978a5c0b42b8f99d39f73b
tree134a1113b27453b79ed6dc164c9605a0c450df7e
parentfa086fd2b58313156e4f69f5c66249130c1733cf
mips64, loongson, octeon: switch to clockintr

- Remove mips64-specific clock interrupt scheduling bits from cpu_info.
- Add missing tick_nsec initialization to cpu_initclocks().
- Disable the glxclk interrupt clock on loongson.  visa@/miod@ say it
  can be removed later if it isn't useful for anything else.
- Wire up cp0_intrclock.

Notes:

- The loongson apm_suspend() changes are untested, but deraadt@ claims
  APM suspend/resume on loongson doesn't work anyway.
- loongson and octeon now have a randomized statclock(), stathz = hz.

With input from miod@, visa@.  Tested by miod@, visa@.

Link: https://marc.info/?l=openbsd-tech&m=166776379603497&w=2
ok visa@ mlarkin@
sys/arch/loongson/dev/apm.c
sys/arch/loongson/dev/glxclk.c
sys/arch/mips64/include/_types.h
sys/arch/mips64/include/cpu.h
sys/arch/mips64/mips64/clock.c
sys/arch/mips64/mips64/mips64_machdep.c