If the CPU cores implement FEAT_IDST, emulate access to the CPU ID
registers from userland and set HWCAP_CPUID. This will allow detection
of features to be introduced into the architecture in the future without
allocating new HWCAP_xxx or HWCAP2_xxx bits. We provide the same
sanitized view of the CPU ID registers as is currently available through
sysctl(2).
Note that this introduces an unconditional read of ID_AA64MMFR2_EL1. This
is known to cause problems on older versions of QEMU. If this turns out
to be a problem in cases where updating QEMU is not an option, we'll have
to implement a workaround.
Also note that since we don't emulate the CPU ID registers on older core,
this means that microarchitectural optimizations keyed of reads of MIDR_EL1
are not possible on OpenBSD. I don't think that is a real problem.
ok jca@