Improve how quirks are handled on sdhc(4)-compatible drivers. So far
we have passed a modified version of the contents in the capabilities
register if we wanted to override what sdhc(4) would otherwise read.
Unfortunately there's a second capabilities register that we did not
yet take into consideration, which is why to disable DDR50 support we
created a quirk flag in the softc. The sdhc(4) ACPI nodes have a way
to mask and set bits in both of the capabilities register, which is a
flexible approach to solving that issue and using that for our sdhc(4)
drivers even improves readability.
ok kettenis@