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(parent: ca76aa2) | patch
The EC GPE is always edge. edge interrupts have their STS bit reset
authorderaadt <deraadt@openbsd.org>
Mon, 2 Aug 2010 17:13:57 +0000 (17:13 +0000)
committerderaadt <deraadt@openbsd.org>
Mon, 2 Aug 2010 17:13:57 +0000 (17:13 +0000)
commitb88e0f1433e21bd16f2c89e47cee7f2fd5495372
treee1fbb4b606b2f774e149d93ae8f858ce9f54faa0tree | snapshot
parentca76aa236b09629c76ad2b555547dc7bedfc99c7commit | diff
The EC GPE is always edge.  edge interrupts have their STS bit reset
at interrupt reception; level interrupts have STS cleared when processing
is complete.  Since the STS has already been reset at interrupt reception
we should not reset late..
Found by marco
sys/dev/acpi/acpiec.c diff | blob | history
OpenBSD src
by Ahmet Artu Yildirim