amd64: specialreg.h: add MSR_TSC_ADJUST

amd64: specialreg.h: add MSR_TSC_ADJUST

Where available, the IA32_TSC_ADJUST MSR may be used to make race-free
relative adjustments to a logical CPU's TSC.  The value in the
register is interpreted as a signed 64-bit offset and added to the
"real" value of the TSC whenever the TSC MSR is read.  That is:

	RDTSC = REAL_TSC + TSC_ADJUST

and:

	RDMSR TSC = REAL_TSC + TSC_ADJUST

For example, if REAL_TSC=1 and TSC_ADJUST=1, then RDTSC would yield 2.
Or if REAL_TSC=10 and TSC_ADJUST=-5, then RDTSC would yield 5.

Writing TSC_ADJUST does not change the "real" underlying value of the
TSC.  Said another way setting TSC_ADJUST to zero will always undo any
prior adjustment.  This property may be useful in fixing desynchronized
TSCs.  In particular, buggy firmware may erroneously desynchronize a
normally synchronized TSC.  If this happens, in theory we can do:

	wrmsr(MSR_TSC_ADJUST, 0);

and fix any desynchronization during boot/resume with no fuss.

ok mlarkin@