As part of a revamp of the PM1/GPE code, I write this diff to look for

As part of a revamp of the PM1/GPE code, I write this diff to look for
unmanaged EN & STS bits in the PM1 register at interrupt time and report
them.  As a side effect this splits the STS acknowledgement into two writes
(for power, and sleep) instead of one. The printf that is added (to spot
unmanaged STS bits) has not yet been triggered as far as we know.

Before the "write to PM1 registers at the right offset" diff went in, this
was not neccessary.  But newer thinkpads do not have a working soft power
button without this diff.

We have no idea why.
ok mlarkin kettenis