Some hypervisors (such as Hertzner) allow msr read of DE_CFG (which does

Some hypervisors (such as Hertzner) allow msr read of DE_CFG (which does
not indicate bit 9 set, but they could have a firmware fix) but then block
a msr write to bit 9 (which disables enough AVX optimizations
to prevent the exfiltration of data), with a fault.  So let's also check
the HV bit before we decide to modify the bit.  hypervisors are expected
to set that bit. tested by lucas at sexy dot is.
with jsg, ok mlarkin