Put page tables in normal cachable memory on armv7. Check if the MMU walks

Put page tables in normal cachable memory on armv7.  Check if the MMU walks
the page tables coherently and also skip flushing modified ptes out of the
cache in that case.  Speeds up building a kernel with a factor of two on
Cortex-A9 (tested by me) and Cortex-A8 (tested by mglocker@).

ok patrick@