Adjust the definitions of L1_S_COHERENT_v7, L2_L_COHERENT_v7 and
authorkettenis <kettenis@openbsd.org>
Fri, 19 Aug 2016 14:05:23 +0000 (14:05 +0000)
committerkettenis <kettenis@openbsd.org>
Fri, 19 Aug 2016 14:05:23 +0000 (14:05 +0000)
commit86449d9ff81b1e37f5096a972257f4871bfa4797
tree8e3d022319ec0eaded3bd4222bde985397232b91
parent9cd732ef42fea61fbada9245dfc8560f30336829
Adjust the definitions of L1_S_COHERENT_v7, L2_L_COHERENT_v7 and
L2_S_COHERENT_v7 such that bus_dmamap_sync(9) avoids unnecessary cache
flushes again for DMA'able memory mapped with the BUS_DMA_COHERENT flag.
I broke this in pmap7.c rev 1.35.

ok tom@
sys/arch/arm/include/pmap.h