Like ARM, RISC-V does not implement floating point exceptions.
authorkettenis <kettenis@openbsd.org>
Thu, 17 Jun 2021 12:55:38 +0000 (12:55 +0000)
committerkettenis <kettenis@openbsd.org>
Thu, 17 Jun 2021 12:55:38 +0000 (12:55 +0000)
commit487aca8602a8b87ea56bd544fa9e22c3e0dcf0dc
tree746f0991687b52c80b20a7c5d7aed4347ae2b906
parent7f201fadd0fe3a455b528832aab3dcc3c9426ac5
Like ARM, RISC-V does not implement floating point exceptions.
regress/lib/libc/ieeefp/except/Makefile
regress/lib/libc/setjmp-fpu/fpu.c
regress/lib/libc/setjmp-fpu/setjmp-fpu.c
regress/lib/libm/fenv/fenv.c
regress/lib/libm/msun/fenv_test.c