The I2C controller on the Allwinner hardware is actually a modified
authorpatrick <patrick@openbsd.org>
Tue, 24 Jul 2018 16:11:33 +0000 (16:11 +0000)
committerpatrick <patrick@openbsd.org>
Tue, 24 Jul 2018 16:11:33 +0000 (16:11 +0000)
commit47e62276a2d611ff6b8ebdb06e5abb654f033aa3
treedbab6d73aa2f29fb68bc2654e0644a9ec163e6e9
parent529fc9df1014f9c3190a70853f7c949f7148d978
The I2C controller on the Allwinner hardware is actually a modified
Marvell controller.  The difference is essentially register offsets
and a clock divider calculation based on a power of two.  Also this
particular hardware needs a delay after sending a stop and before
reading the status register since apparently the data doesn't
propagate fast enough.  This makes sxitwi(4) work on the Marvell
Armada 38x.

ok kettenis@
sys/dev/fdt/sxitwi.c