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(parent: daac810) | patch
Sigh, ignoring instruction fetch bus errors for the kernel code should not
authormiod <miod@openbsd.org>
Mon, 18 Aug 2014 17:23:06 +0000 (17:23 +0000)
committermiod <miod@openbsd.org>
Mon, 18 Aug 2014 17:23:06 +0000 (17:23 +0000)
commit3e8d5ed726b786f354cacf7c3804ba83a01c83ca
treec97f06bdc6cce083871711af09dd196f67ddbb75tree | snapshot
parentdaac8107b10b6711c0940a4621c8d1220e0d4092commit | diff
Sigh, ignoring instruction fetch bus errors for the kernel code should not
depend upon the address being at the beginning of a cache line, for we may
arrive in the middle of a line thanks to a branch. Noticed the hard way...
sys/arch/mips64/mips64/trap.c diff | blob | history
OpenBSD src
by Ahmet Artu Yildirim