riscv has no delay slots, we don't need anything like this in the sigcode.
authorderaadt <deraadt@openbsd.org>
Tue, 11 May 2021 13:56:28 +0000 (13:56 +0000)
committerderaadt <deraadt@openbsd.org>
Tue, 11 May 2021 13:56:28 +0000 (13:56 +0000)
commit27596c117f61328193333c6af78736cdb0995665
tree6b615588fcc85a8ee6d4311287e9431603277263
parentc34a0df36ba0cc1c1ddc1785bb2cf469469374a3
riscv has no delay slots, we don't need anything like this in the sigcode.
ok jsg drahn
sys/arch/riscv64/riscv64/locore.S