ARMv7 data caches are "effectively" PIPT. This means there is in general

ARMv7 data caches are "effectively" PIPT.  This means there is in general
no need to clean and/or invalidate cached pages.  So remove most of the
cache cleaning and invalidation from the pmap.  We still need to synchronize
the instruction cache with the data cache in various places though.  And we
also need to make sure that we clean and invalidate when we make a page
non-cachable.

Tested by Daniel Bolgheroni, mglocker@ and jsg@. on Cortex-A8 and myself on
Cortex-A9.

ok visa@