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(parent: 880ce07) | patch
Correct a bit test for DDR2 CAS Latency and recognise CL7 and CL6.
authorjsg <jsg@openbsd.org>
Sun, 25 Jan 2015 11:38:49 +0000 (11:38 +0000)
committerjsg <jsg@openbsd.org>
Sun, 25 Jan 2015 11:38:49 +0000 (11:38 +0000)
commit182c86a5f9a053e69dddf7450b4eaf99a56acce9
treeff6aa09cd0df95ebe759aca2eb4ee3686cf64cdctree | snapshot
parent880ce07f8829ad9f3295ccc4fb91f82df8df89b6commit | diff
Correct a bit test for DDR2 CAS Latency and recognise CL7 and CL6.
While the spec only mentions bits for CL5->CL2 with the other
bits being marked 'TBD' it seems likely they are used now.

From David Vasek.
sys/dev/spdmem.c diff | blob | history
OpenBSD src
by Ahmet Artu Yildirim