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(parent: 0d22a4d) | patch
Bring riscv64 intr.c code in sync with arm64. This brings us:
authorkettenis <kettenis@openbsd.org>
Wed, 19 May 2021 17:39:49 +0000 (17:39 +0000)
committerkettenis <kettenis@openbsd.org>
Wed, 19 May 2021 17:39:49 +0000 (17:39 +0000)
commit1378d87c3259676b08343c99b25fa39baec92be3
treec8ea1fb46c73047cc76d48ca56eebd199dd215f8tree | snapshot
parent0d22a4ddf5e981bdac0a93e4aa42da4204e3c31acommit | diff
Bring riscv64 intr.c code in sync with arm64.  This brings us:

- MSI support
- Interfaces to route interrupts to specific CPUs
- Proper interrupt barriers
- s/riscv_intr_handler/machine_intr_handler/

ok mlarkin@
sys/arch/riscv64/dev/plic.c diff | blob | history
sys/arch/riscv64/include/fdt.h diff | blob | history
sys/arch/riscv64/include/intr.h diff | blob | history
sys/arch/riscv64/riscv64/intr.c diff | blob | history
OpenBSD src
by Ahmet Artu Yildirim