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   1 from __future__ import print_function
   2 import lldb
   3 from lldbsuite.test.lldbtest import *
   4 from lldbsuite.test.decorators import *
   5 from gdbclientutils import *
   6
   7 class TestArmRegisterDefinition(GDBRemoteTestBase):
   8
   9     @skipIfXmlSupportMissing
  10     @skipIfRemote
  11     def test(self):
  12         """
  13         Test lldb's parsing of the <architecture> tag in the target.xml register
  14         description packet.
  15         """
  16         class MyResponder(MockGDBServerResponder):
  17
  18             def qXferRead(self, obj, annex, offset, length):
  19                 if annex == "target.xml":
  20                     return """<?xml version="1.0"?>
  21                         <!DOCTYPE feature SYSTEM "gdb-target.dtd">
  22                         <target>
  23                         <architecture>arm</architecture>
  24                         <feature name="org.gnu.gdb.arm.m-profile">
  25                         <reg name="r0" bitsize="32" type="uint32" group="general"/>
  26                         <reg name="r1" bitsize="32" type="uint32" group="general"/>
  27                         <reg name="r2" bitsize="32" type="uint32" group="general"/>
  28                         <reg name="r3" bitsize="32" type="uint32" group="general"/>
  29                         <reg name="r4" bitsize="32" type="uint32" group="general"/>
  30                         <reg name="r5" bitsize="32" type="uint32" group="general"/>
  31                         <reg name="r6" bitsize="32" type="uint32" group="general"/>
  32                         <reg name="r7" bitsize="32" type="uint32" group="general"/>
  33                         <reg name="r8" bitsize="32" type="uint32" group="general"/>
  34                         <reg name="r9" bitsize="32" type="uint32" group="general"/>
  35                         <reg name="r10" bitsize="32" type="uint32" group="general"/>
  36                         <reg name="r11" bitsize="32" type="uint32" group="general"/>
  37                         <reg name="r12" bitsize="32" type="uint32" group="general"/>
  38                         <reg name="sp" bitsize="32" type="data_ptr" group="general"/>
  39                         <reg name="lr" bitsize="32" type="uint32" group="general"/>
  40                         <reg name="pc" bitsize="32" type="code_ptr" group="general"/>
  41                         <reg name="xpsr" bitsize="32" regnum="25" type="uint32" group="general"/>
  42                         <reg name="MSP" bitsize="32" regnum="26" type="uint32" group="general"/>
  43                         <reg name="PSP" bitsize="32" regnum="27" type="uint32" group="general"/>
  44                         <reg name="PRIMASK" bitsize="32" regnum="28" type="uint32" group="general"/>
  45                         <reg name="BASEPRI" bitsize="32" regnum="29" type="uint32" group="general"/>
  46                         <reg name="FAULTMASK" bitsize="32" regnum="30" type="uint32" group="general"/>
  47                         <reg name="CONTROL" bitsize="32" regnum="31" type="uint32" group="general"/>
  48                         <reg name="FPSCR" bitsize="32" type="uint32" group="float"/>
  49                         <reg name="s0" bitsize="32" type="float" group="float"/>
  50                         <reg name="s1" bitsize="32" type="float" group="float"/>
  51                         <reg name="s2" bitsize="32" type="float" group="float"/>
  52                         <reg name="s3" bitsize="32" type="float" group="float"/>
  53                         <reg name="s4" bitsize="32" type="float" group="float"/>
  54                         <reg name="s5" bitsize="32" type="float" group="float"/>
  55                         <reg name="s6" bitsize="32" type="float" group="float"/>
  56                         <reg name="s7" bitsize="32" type="float" group="float"/>
  57                         <reg name="s8" bitsize="32" type="float" group="float"/>
  58                         <reg name="s9" bitsize="32" type="float" group="float"/>
  59                         <reg name="s10" bitsize="32" type="float" group="float"/>
  60                         <reg name="s11" bitsize="32" type="float" group="float"/>
  61                         <reg name="s12" bitsize="32" type="float" group="float"/>
  62                         <reg name="s13" bitsize="32" type="float" group="float"/>
  63                         <reg name="s14" bitsize="32" type="float" group="float"/>
  64                         <reg name="s15" bitsize="32" type="float" group="float"/>
  65                         <reg name="s16" bitsize="32" type="float" group="float"/>
  66                         <reg name="s17" bitsize="32" type="float" group="float"/>
  67                         <reg name="s18" bitsize="32" type="float" group="float"/>
  68                         <reg name="s19" bitsize="32" type="float" group="float"/>
  69                         <reg name="s20" bitsize="32" type="float" group="float"/>
  70                         <reg name="s21" bitsize="32" type="float" group="float"/>
  71                         <reg name="s22" bitsize="32" type="float" group="float"/>
  72                         <reg name="s23" bitsize="32" type="float" group="float"/>
  73                         <reg name="s24" bitsize="32" type="float" group="float"/>
  74                         <reg name="s25" bitsize="32" type="float" group="float"/>
  75                         <reg name="s26" bitsize="32" type="float" group="float"/>
  76                         <reg name="s27" bitsize="32" type="float" group="float"/>
  77                         <reg name="s28" bitsize="32" type="float" group="float"/>
  78                         <reg name="s29" bitsize="32" type="float" group="float"/>
  79                         <reg name="s30" bitsize="32" type="float" group="float"/>
  80                         <reg name="s31" bitsize="32" type="float" group="float"/>
  81                         </feature>
  82                         </target>""", False
  83                 else:
  84                     return None, False
  85
  86             def readRegister(self, regnum):
  87                 return "E01"
  88
  89             def readRegisters(self):
  90                 return "20000000f8360020001000002fcb0008f8360020a0360020200c0020000000000000000000000000000000000000000000000000b87f0120b7d100082ed2000800000001b87f01200000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000"
  91
  92             def haltReason(self):
  93                 return "S05"
  94
  95             def qfThreadInfo(self):
  96                 return "mdead"
  97
  98             def qC(self):
  99                 return ""
 100
 101             def qSupported(self, client_supported):
 102                 return "PacketSize=4000;qXfer:memory-map:read-;QStartNoAckMode+;qXfer:threads:read+;hwbreak+;qXfer:features:read+"
 103
 104             def QThreadSuffixSupported(self):
 105                 return "OK"
 106
 107             def QListThreadsInStopReply(self):
 108                 return "OK"
 109
 110         self.server.responder = MyResponder()
 111         if self.TraceOn():
 112             self.runCmd("log enable gdb-remote packets")
 113             self.addTearDownHook(
 114                     lambda: self.runCmd("log disable gdb-remote packets"))
 115
 116         self.dbg.SetDefaultArchitecture("armv7em")
 117         target = self.dbg.CreateTargetWithFileAndArch(None, None)
 118
 119         process = self.connect(target)
 120
 121         if self.TraceOn():
 122             interp = self.dbg.GetCommandInterpreter()
 123             result = lldb.SBCommandReturnObject()
 124             interp.HandleCommand("target list", result)
 125             print(result.GetOutput())
 126
 127         r0_valobj = process.GetThreadAtIndex(0).GetFrameAtIndex(0).FindRegister("r0")
 128         self.assertEqual(r0_valobj.GetValueAsUnsigned(), 0x20)
 129
 130         pc_valobj = process.GetThreadAtIndex(0).GetFrameAtIndex(0).FindRegister("pc")
 131         self.assertEqual(pc_valobj.GetValueAsUnsigned(), 0x0800d22e)